ye tian / Mbed 2 deprecated missile_command

Dependencies:   4DGL-uLCD-SE mbed wave_player

Fork of missile_command by ECE 2035 TA

Committer:
arvahsu
Date:
Wed Nov 12 02:06:48 2014 +0000
Revision:
2:5e7876719560
Copy the SDFileSystem library due to the original author stop sharing the library.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
arvahsu 2:5e7876719560 1 /* mbed Microcontroller Library
arvahsu 2:5e7876719560 2 * Copyright (c) 2006-2012 ARM Limited
arvahsu 2:5e7876719560 3 *
arvahsu 2:5e7876719560 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
arvahsu 2:5e7876719560 5 * of this software and associated documentation files (the "Software"), to deal
arvahsu 2:5e7876719560 6 * in the Software without restriction, including without limitation the rights
arvahsu 2:5e7876719560 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
arvahsu 2:5e7876719560 8 * copies of the Software, and to permit persons to whom the Software is
arvahsu 2:5e7876719560 9 * furnished to do so, subject to the following conditions:
arvahsu 2:5e7876719560 10 *
arvahsu 2:5e7876719560 11 * The above copyright notice and this permission notice shall be included in
arvahsu 2:5e7876719560 12 * all copies or substantial portions of the Software.
arvahsu 2:5e7876719560 13 *
arvahsu 2:5e7876719560 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
arvahsu 2:5e7876719560 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
arvahsu 2:5e7876719560 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
arvahsu 2:5e7876719560 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
arvahsu 2:5e7876719560 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
arvahsu 2:5e7876719560 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
arvahsu 2:5e7876719560 20 * SOFTWARE.
arvahsu 2:5e7876719560 21 */
arvahsu 2:5e7876719560 22 /* Introduction
arvahsu 2:5e7876719560 23 * ------------
arvahsu 2:5e7876719560 24 * SD and MMC cards support a number of interfaces, but common to them all
arvahsu 2:5e7876719560 25 * is one based on SPI. This is the one I'm implmenting because it means
arvahsu 2:5e7876719560 26 * it is much more portable even though not so performant, and we already
arvahsu 2:5e7876719560 27 * have the mbed SPI Interface!
arvahsu 2:5e7876719560 28 *
arvahsu 2:5e7876719560 29 * The main reference I'm using is Chapter 7, "SPI Mode" of:
arvahsu 2:5e7876719560 30 * http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
arvahsu 2:5e7876719560 31 *
arvahsu 2:5e7876719560 32 * SPI Startup
arvahsu 2:5e7876719560 33 * -----------
arvahsu 2:5e7876719560 34 * The SD card powers up in SD mode. The SPI interface mode is selected by
arvahsu 2:5e7876719560 35 * asserting CS low and sending the reset command (CMD0). The card will
arvahsu 2:5e7876719560 36 * respond with a (R1) response.
arvahsu 2:5e7876719560 37 *
arvahsu 2:5e7876719560 38 * CMD8 is optionally sent to determine the voltage range supported, and
arvahsu 2:5e7876719560 39 * indirectly determine whether it is a version 1.x SD/non-SD card or
arvahsu 2:5e7876719560 40 * version 2.x. I'll just ignore this for now.
arvahsu 2:5e7876719560 41 *
arvahsu 2:5e7876719560 42 * ACMD41 is repeatedly issued to initialise the card, until "in idle"
arvahsu 2:5e7876719560 43 * (bit 0) of the R1 response goes to '0', indicating it is initialised.
arvahsu 2:5e7876719560 44 *
arvahsu 2:5e7876719560 45 * You should also indicate whether the host supports High Capicity cards,
arvahsu 2:5e7876719560 46 * and check whether the card is high capacity - i'll also ignore this
arvahsu 2:5e7876719560 47 *
arvahsu 2:5e7876719560 48 * SPI Protocol
arvahsu 2:5e7876719560 49 * ------------
arvahsu 2:5e7876719560 50 * The SD SPI protocol is based on transactions made up of 8-bit words, with
arvahsu 2:5e7876719560 51 * the host starting every bus transaction by asserting the CS signal low. The
arvahsu 2:5e7876719560 52 * card always responds to commands, data blocks and errors.
arvahsu 2:5e7876719560 53 *
arvahsu 2:5e7876719560 54 * The protocol supports a CRC, but by default it is off (except for the
arvahsu 2:5e7876719560 55 * first reset CMD0, where the CRC can just be pre-calculated, and CMD8)
arvahsu 2:5e7876719560 56 * I'll leave the CRC off I think!
arvahsu 2:5e7876719560 57 *
arvahsu 2:5e7876719560 58 * Standard capacity cards have variable data block sizes, whereas High
arvahsu 2:5e7876719560 59 * Capacity cards fix the size of data block to 512 bytes. I'll therefore
arvahsu 2:5e7876719560 60 * just always use the Standard Capacity cards with a block size of 512 bytes.
arvahsu 2:5e7876719560 61 * This is set with CMD16.
arvahsu 2:5e7876719560 62 *
arvahsu 2:5e7876719560 63 * You can read and write single blocks (CMD17, CMD25) or multiple blocks
arvahsu 2:5e7876719560 64 * (CMD18, CMD25). For simplicity, I'll just use single block accesses. When
arvahsu 2:5e7876719560 65 * the card gets a read command, it responds with a response token, and then
arvahsu 2:5e7876719560 66 * a data token or an error.
arvahsu 2:5e7876719560 67 *
arvahsu 2:5e7876719560 68 * SPI Command Format
arvahsu 2:5e7876719560 69 * ------------------
arvahsu 2:5e7876719560 70 * Commands are 6-bytes long, containing the command, 32-bit argument, and CRC.
arvahsu 2:5e7876719560 71 *
arvahsu 2:5e7876719560 72 * +---------------+------------+------------+-----------+----------+--------------+
arvahsu 2:5e7876719560 73 * | 01 | cmd[5:0] | arg[31:24] | arg[23:16] | arg[15:8] | arg[7:0] | crc[6:0] | 1 |
arvahsu 2:5e7876719560 74 * +---------------+------------+------------+-----------+----------+--------------+
arvahsu 2:5e7876719560 75 *
arvahsu 2:5e7876719560 76 * As I'm not using CRC, I can fix that byte to what is needed for CMD0 (0x95)
arvahsu 2:5e7876719560 77 *
arvahsu 2:5e7876719560 78 * All Application Specific commands shall be preceded with APP_CMD (CMD55).
arvahsu 2:5e7876719560 79 *
arvahsu 2:5e7876719560 80 * SPI Response Format
arvahsu 2:5e7876719560 81 * -------------------
arvahsu 2:5e7876719560 82 * The main response format (R1) is a status byte (normally zero). Key flags:
arvahsu 2:5e7876719560 83 * idle - 1 if the card is in an idle state/initialising
arvahsu 2:5e7876719560 84 * cmd - 1 if an illegal command code was detected
arvahsu 2:5e7876719560 85 *
arvahsu 2:5e7876719560 86 * +-------------------------------------------------+
arvahsu 2:5e7876719560 87 * R1 | 0 | arg | addr | seq | crc | cmd | erase | idle |
arvahsu 2:5e7876719560 88 * +-------------------------------------------------+
arvahsu 2:5e7876719560 89 *
arvahsu 2:5e7876719560 90 * R1b is the same, except it is followed by a busy signal (zeros) until
arvahsu 2:5e7876719560 91 * the first non-zero byte when it is ready again.
arvahsu 2:5e7876719560 92 *
arvahsu 2:5e7876719560 93 * Data Response Token
arvahsu 2:5e7876719560 94 * -------------------
arvahsu 2:5e7876719560 95 * Every data block written to the card is acknowledged by a byte
arvahsu 2:5e7876719560 96 * response token
arvahsu 2:5e7876719560 97 *
arvahsu 2:5e7876719560 98 * +----------------------+
arvahsu 2:5e7876719560 99 * | xxx | 0 | status | 1 |
arvahsu 2:5e7876719560 100 * +----------------------+
arvahsu 2:5e7876719560 101 * 010 - OK!
arvahsu 2:5e7876719560 102 * 101 - CRC Error
arvahsu 2:5e7876719560 103 * 110 - Write Error
arvahsu 2:5e7876719560 104 *
arvahsu 2:5e7876719560 105 * Single Block Read and Write
arvahsu 2:5e7876719560 106 * ---------------------------
arvahsu 2:5e7876719560 107 *
arvahsu 2:5e7876719560 108 * Block transfers have a byte header, followed by the data, followed
arvahsu 2:5e7876719560 109 * by a 16-bit CRC. In our case, the data will always be 512 bytes.
arvahsu 2:5e7876719560 110 *
arvahsu 2:5e7876719560 111 * +------+---------+---------+- - - -+---------+-----------+----------+
arvahsu 2:5e7876719560 112 * | 0xFE | data[0] | data[1] | | data[n] | crc[15:8] | crc[7:0] |
arvahsu 2:5e7876719560 113 * +------+---------+---------+- - - -+---------+-----------+----------+
arvahsu 2:5e7876719560 114 */
arvahsu 2:5e7876719560 115 #include "SDFileSystem.h"
arvahsu 2:5e7876719560 116 #include "mbed_debug.h"
arvahsu 2:5e7876719560 117
arvahsu 2:5e7876719560 118 #define SD_COMMAND_TIMEOUT 5000
arvahsu 2:5e7876719560 119
arvahsu 2:5e7876719560 120 #define SD_DBG 0
arvahsu 2:5e7876719560 121
arvahsu 2:5e7876719560 122 SDFileSystem::SDFileSystem(PinName mosi, PinName miso, PinName sclk, PinName cs, const char* name) :
arvahsu 2:5e7876719560 123 FATFileSystem(name), _spi(mosi, miso, sclk), _cs(cs) {
arvahsu 2:5e7876719560 124 _cs = 1;
arvahsu 2:5e7876719560 125 }
arvahsu 2:5e7876719560 126
arvahsu 2:5e7876719560 127 #define R1_IDLE_STATE (1 << 0)
arvahsu 2:5e7876719560 128 #define R1_ERASE_RESET (1 << 1)
arvahsu 2:5e7876719560 129 #define R1_ILLEGAL_COMMAND (1 << 2)
arvahsu 2:5e7876719560 130 #define R1_COM_CRC_ERROR (1 << 3)
arvahsu 2:5e7876719560 131 #define R1_ERASE_SEQUENCE_ERROR (1 << 4)
arvahsu 2:5e7876719560 132 #define R1_ADDRESS_ERROR (1 << 5)
arvahsu 2:5e7876719560 133 #define R1_PARAMETER_ERROR (1 << 6)
arvahsu 2:5e7876719560 134
arvahsu 2:5e7876719560 135 // Types
arvahsu 2:5e7876719560 136 // - v1.x Standard Capacity
arvahsu 2:5e7876719560 137 // - v2.x Standard Capacity
arvahsu 2:5e7876719560 138 // - v2.x High Capacity
arvahsu 2:5e7876719560 139 // - Not recognised as an SD Card
arvahsu 2:5e7876719560 140 #define SDCARD_FAIL 0
arvahsu 2:5e7876719560 141 #define SDCARD_V1 1
arvahsu 2:5e7876719560 142 #define SDCARD_V2 2
arvahsu 2:5e7876719560 143 #define SDCARD_V2HC 3
arvahsu 2:5e7876719560 144
arvahsu 2:5e7876719560 145 int SDFileSystem::initialise_card() {
arvahsu 2:5e7876719560 146 // Set to 100kHz for initialisation, and clock card with cs = 1
arvahsu 2:5e7876719560 147 _spi.frequency(100000);
arvahsu 2:5e7876719560 148 _cs = 1;
arvahsu 2:5e7876719560 149 for (int i = 0; i < 16; i++) {
arvahsu 2:5e7876719560 150 _spi.write(0xFF);
arvahsu 2:5e7876719560 151 }
arvahsu 2:5e7876719560 152
arvahsu 2:5e7876719560 153 // send CMD0, should return with all zeros except IDLE STATE set (bit 0)
arvahsu 2:5e7876719560 154 if (_cmd(0, 0) != R1_IDLE_STATE) {
arvahsu 2:5e7876719560 155 debug("No disk, or could not put SD card in to SPI idle state\n");
arvahsu 2:5e7876719560 156 return SDCARD_FAIL;
arvahsu 2:5e7876719560 157 }
arvahsu 2:5e7876719560 158
arvahsu 2:5e7876719560 159 // send CMD8 to determine whther it is ver 2.x
arvahsu 2:5e7876719560 160 int r = _cmd8();
arvahsu 2:5e7876719560 161 if (r == R1_IDLE_STATE) {
arvahsu 2:5e7876719560 162 return initialise_card_v2();
arvahsu 2:5e7876719560 163 } else if (r == (R1_IDLE_STATE | R1_ILLEGAL_COMMAND)) {
arvahsu 2:5e7876719560 164 return initialise_card_v1();
arvahsu 2:5e7876719560 165 } else {
arvahsu 2:5e7876719560 166 debug("Not in idle state after sending CMD8 (not an SD card?)\n");
arvahsu 2:5e7876719560 167 return SDCARD_FAIL;
arvahsu 2:5e7876719560 168 }
arvahsu 2:5e7876719560 169 }
arvahsu 2:5e7876719560 170
arvahsu 2:5e7876719560 171 int SDFileSystem::initialise_card_v1() {
arvahsu 2:5e7876719560 172 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
arvahsu 2:5e7876719560 173 _cmd(55, 0);
arvahsu 2:5e7876719560 174 if (_cmd(41, 0) == 0) {
arvahsu 2:5e7876719560 175 cdv = 512;
arvahsu 2:5e7876719560 176 debug_if(SD_DBG, "\n\rInit: SEDCARD_V1\n\r");
arvahsu 2:5e7876719560 177 return SDCARD_V1;
arvahsu 2:5e7876719560 178 }
arvahsu 2:5e7876719560 179 }
arvahsu 2:5e7876719560 180
arvahsu 2:5e7876719560 181 debug("Timeout waiting for v1.x card\n");
arvahsu 2:5e7876719560 182 return SDCARD_FAIL;
arvahsu 2:5e7876719560 183 }
arvahsu 2:5e7876719560 184
arvahsu 2:5e7876719560 185 int SDFileSystem::initialise_card_v2() {
arvahsu 2:5e7876719560 186 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
arvahsu 2:5e7876719560 187 wait_ms(50);
arvahsu 2:5e7876719560 188 _cmd58();
arvahsu 2:5e7876719560 189 _cmd(55, 0);
arvahsu 2:5e7876719560 190 if (_cmd(41, 0x40000000) == 0) {
arvahsu 2:5e7876719560 191 _cmd58();
arvahsu 2:5e7876719560 192 debug_if(SD_DBG, "\n\rInit: SDCARD_V2\n\r");
arvahsu 2:5e7876719560 193 cdv = 1;
arvahsu 2:5e7876719560 194 return SDCARD_V2;
arvahsu 2:5e7876719560 195 }
arvahsu 2:5e7876719560 196 }
arvahsu 2:5e7876719560 197
arvahsu 2:5e7876719560 198 debug("Timeout waiting for v2.x card\n");
arvahsu 2:5e7876719560 199 return SDCARD_FAIL;
arvahsu 2:5e7876719560 200 }
arvahsu 2:5e7876719560 201
arvahsu 2:5e7876719560 202 int SDFileSystem::disk_initialize() {
arvahsu 2:5e7876719560 203 int i = initialise_card();
arvahsu 2:5e7876719560 204 debug_if(SD_DBG, "init card = %d\n", i);
arvahsu 2:5e7876719560 205 _sectors = _sd_sectors();
arvahsu 2:5e7876719560 206
arvahsu 2:5e7876719560 207 // Set block length to 512 (CMD16)
arvahsu 2:5e7876719560 208 if (_cmd(16, 512) != 0) {
arvahsu 2:5e7876719560 209 debug("Set 512-byte block timed out\n");
arvahsu 2:5e7876719560 210 return 1;
arvahsu 2:5e7876719560 211 }
arvahsu 2:5e7876719560 212
arvahsu 2:5e7876719560 213 _spi.frequency(1000000); // Set to 1MHz for data transfer
arvahsu 2:5e7876719560 214 return 0;
arvahsu 2:5e7876719560 215 }
arvahsu 2:5e7876719560 216
arvahsu 2:5e7876719560 217 int SDFileSystem::disk_write(const uint8_t *buffer, uint64_t block_number) {
arvahsu 2:5e7876719560 218 // set write address for single block (CMD24)
arvahsu 2:5e7876719560 219 if (_cmd(24, block_number * cdv) != 0) {
arvahsu 2:5e7876719560 220 return 1;
arvahsu 2:5e7876719560 221 }
arvahsu 2:5e7876719560 222
arvahsu 2:5e7876719560 223 // send the data block
arvahsu 2:5e7876719560 224 _write(buffer, 512);
arvahsu 2:5e7876719560 225 return 0;
arvahsu 2:5e7876719560 226 }
arvahsu 2:5e7876719560 227
arvahsu 2:5e7876719560 228 int SDFileSystem::disk_read(uint8_t *buffer, uint64_t block_number) {
arvahsu 2:5e7876719560 229 // set read address for single block (CMD17)
arvahsu 2:5e7876719560 230 if (_cmd(17, block_number * cdv) != 0) {
arvahsu 2:5e7876719560 231 return 1;
arvahsu 2:5e7876719560 232 }
arvahsu 2:5e7876719560 233
arvahsu 2:5e7876719560 234 // receive the data
arvahsu 2:5e7876719560 235 _read(buffer, 512);
arvahsu 2:5e7876719560 236 return 0;
arvahsu 2:5e7876719560 237 }
arvahsu 2:5e7876719560 238
arvahsu 2:5e7876719560 239 int SDFileSystem::disk_status() { return 0; }
arvahsu 2:5e7876719560 240 int SDFileSystem::disk_sync() { return 0; }
arvahsu 2:5e7876719560 241 uint64_t SDFileSystem::disk_sectors() { return _sectors; }
arvahsu 2:5e7876719560 242
arvahsu 2:5e7876719560 243
arvahsu 2:5e7876719560 244 // PRIVATE FUNCTIONS
arvahsu 2:5e7876719560 245 int SDFileSystem::_cmd(int cmd, int arg) {
arvahsu 2:5e7876719560 246 _cs = 0;
arvahsu 2:5e7876719560 247
arvahsu 2:5e7876719560 248 // send a command
arvahsu 2:5e7876719560 249 _spi.write(0x40 | cmd);
arvahsu 2:5e7876719560 250 _spi.write(arg >> 24);
arvahsu 2:5e7876719560 251 _spi.write(arg >> 16);
arvahsu 2:5e7876719560 252 _spi.write(arg >> 8);
arvahsu 2:5e7876719560 253 _spi.write(arg >> 0);
arvahsu 2:5e7876719560 254 _spi.write(0x95);
arvahsu 2:5e7876719560 255
arvahsu 2:5e7876719560 256 // wait for the repsonse (response[7] == 0)
arvahsu 2:5e7876719560 257 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
arvahsu 2:5e7876719560 258 int response = _spi.write(0xFF);
arvahsu 2:5e7876719560 259 if (!(response & 0x80)) {
arvahsu 2:5e7876719560 260 _cs = 1;
arvahsu 2:5e7876719560 261 _spi.write(0xFF);
arvahsu 2:5e7876719560 262 return response;
arvahsu 2:5e7876719560 263 }
arvahsu 2:5e7876719560 264 }
arvahsu 2:5e7876719560 265 _cs = 1;
arvahsu 2:5e7876719560 266 _spi.write(0xFF);
arvahsu 2:5e7876719560 267 return -1; // timeout
arvahsu 2:5e7876719560 268 }
arvahsu 2:5e7876719560 269 int SDFileSystem::_cmdx(int cmd, int arg) {
arvahsu 2:5e7876719560 270 _cs = 0;
arvahsu 2:5e7876719560 271
arvahsu 2:5e7876719560 272 // send a command
arvahsu 2:5e7876719560 273 _spi.write(0x40 | cmd);
arvahsu 2:5e7876719560 274 _spi.write(arg >> 24);
arvahsu 2:5e7876719560 275 _spi.write(arg >> 16);
arvahsu 2:5e7876719560 276 _spi.write(arg >> 8);
arvahsu 2:5e7876719560 277 _spi.write(arg >> 0);
arvahsu 2:5e7876719560 278 _spi.write(0x95);
arvahsu 2:5e7876719560 279
arvahsu 2:5e7876719560 280 // wait for the repsonse (response[7] == 0)
arvahsu 2:5e7876719560 281 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
arvahsu 2:5e7876719560 282 int response = _spi.write(0xFF);
arvahsu 2:5e7876719560 283 if (!(response & 0x80)) {
arvahsu 2:5e7876719560 284 return response;
arvahsu 2:5e7876719560 285 }
arvahsu 2:5e7876719560 286 }
arvahsu 2:5e7876719560 287 _cs = 1;
arvahsu 2:5e7876719560 288 _spi.write(0xFF);
arvahsu 2:5e7876719560 289 return -1; // timeout
arvahsu 2:5e7876719560 290 }
arvahsu 2:5e7876719560 291
arvahsu 2:5e7876719560 292
arvahsu 2:5e7876719560 293 int SDFileSystem::_cmd58() {
arvahsu 2:5e7876719560 294 _cs = 0;
arvahsu 2:5e7876719560 295 int arg = 0;
arvahsu 2:5e7876719560 296
arvahsu 2:5e7876719560 297 // send a command
arvahsu 2:5e7876719560 298 _spi.write(0x40 | 58);
arvahsu 2:5e7876719560 299 _spi.write(arg >> 24);
arvahsu 2:5e7876719560 300 _spi.write(arg >> 16);
arvahsu 2:5e7876719560 301 _spi.write(arg >> 8);
arvahsu 2:5e7876719560 302 _spi.write(arg >> 0);
arvahsu 2:5e7876719560 303 _spi.write(0x95);
arvahsu 2:5e7876719560 304
arvahsu 2:5e7876719560 305 // wait for the repsonse (response[7] == 0)
arvahsu 2:5e7876719560 306 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
arvahsu 2:5e7876719560 307 int response = _spi.write(0xFF);
arvahsu 2:5e7876719560 308 if (!(response & 0x80)) {
arvahsu 2:5e7876719560 309 int ocr = _spi.write(0xFF) << 24;
arvahsu 2:5e7876719560 310 ocr |= _spi.write(0xFF) << 16;
arvahsu 2:5e7876719560 311 ocr |= _spi.write(0xFF) << 8;
arvahsu 2:5e7876719560 312 ocr |= _spi.write(0xFF) << 0;
arvahsu 2:5e7876719560 313 _cs = 1;
arvahsu 2:5e7876719560 314 _spi.write(0xFF);
arvahsu 2:5e7876719560 315 return response;
arvahsu 2:5e7876719560 316 }
arvahsu 2:5e7876719560 317 }
arvahsu 2:5e7876719560 318 _cs = 1;
arvahsu 2:5e7876719560 319 _spi.write(0xFF);
arvahsu 2:5e7876719560 320 return -1; // timeout
arvahsu 2:5e7876719560 321 }
arvahsu 2:5e7876719560 322
arvahsu 2:5e7876719560 323 int SDFileSystem::_cmd8() {
arvahsu 2:5e7876719560 324 _cs = 0;
arvahsu 2:5e7876719560 325
arvahsu 2:5e7876719560 326 // send a command
arvahsu 2:5e7876719560 327 _spi.write(0x40 | 8); // CMD8
arvahsu 2:5e7876719560 328 _spi.write(0x00); // reserved
arvahsu 2:5e7876719560 329 _spi.write(0x00); // reserved
arvahsu 2:5e7876719560 330 _spi.write(0x01); // 3.3v
arvahsu 2:5e7876719560 331 _spi.write(0xAA); // check pattern
arvahsu 2:5e7876719560 332 _spi.write(0x87); // crc
arvahsu 2:5e7876719560 333
arvahsu 2:5e7876719560 334 // wait for the repsonse (response[7] == 0)
arvahsu 2:5e7876719560 335 for (int i = 0; i < SD_COMMAND_TIMEOUT * 1000; i++) {
arvahsu 2:5e7876719560 336 char response[5];
arvahsu 2:5e7876719560 337 response[0] = _spi.write(0xFF);
arvahsu 2:5e7876719560 338 if (!(response[0] & 0x80)) {
arvahsu 2:5e7876719560 339 for (int j = 1; j < 5; j++) {
arvahsu 2:5e7876719560 340 response[i] = _spi.write(0xFF);
arvahsu 2:5e7876719560 341 }
arvahsu 2:5e7876719560 342 _cs = 1;
arvahsu 2:5e7876719560 343 _spi.write(0xFF);
arvahsu 2:5e7876719560 344 return response[0];
arvahsu 2:5e7876719560 345 }
arvahsu 2:5e7876719560 346 }
arvahsu 2:5e7876719560 347 _cs = 1;
arvahsu 2:5e7876719560 348 _spi.write(0xFF);
arvahsu 2:5e7876719560 349 return -1; // timeout
arvahsu 2:5e7876719560 350 }
arvahsu 2:5e7876719560 351
arvahsu 2:5e7876719560 352 int SDFileSystem::_read(uint8_t *buffer, uint32_t length) {
arvahsu 2:5e7876719560 353 _cs = 0;
arvahsu 2:5e7876719560 354
arvahsu 2:5e7876719560 355 // read until start byte (0xFF)
arvahsu 2:5e7876719560 356 while (_spi.write(0xFF) != 0xFE);
arvahsu 2:5e7876719560 357
arvahsu 2:5e7876719560 358 // read data
arvahsu 2:5e7876719560 359 for (int i = 0; i < length; i++) {
arvahsu 2:5e7876719560 360 buffer[i] = _spi.write(0xFF);
arvahsu 2:5e7876719560 361 }
arvahsu 2:5e7876719560 362 _spi.write(0xFF); // checksum
arvahsu 2:5e7876719560 363 _spi.write(0xFF);
arvahsu 2:5e7876719560 364
arvahsu 2:5e7876719560 365 _cs = 1;
arvahsu 2:5e7876719560 366 _spi.write(0xFF);
arvahsu 2:5e7876719560 367 return 0;
arvahsu 2:5e7876719560 368 }
arvahsu 2:5e7876719560 369
arvahsu 2:5e7876719560 370 int SDFileSystem::_write(const uint8_t*buffer, uint32_t length) {
arvahsu 2:5e7876719560 371 _cs = 0;
arvahsu 2:5e7876719560 372
arvahsu 2:5e7876719560 373 // indicate start of block
arvahsu 2:5e7876719560 374 _spi.write(0xFE);
arvahsu 2:5e7876719560 375
arvahsu 2:5e7876719560 376 // write the data
arvahsu 2:5e7876719560 377 for (int i = 0; i < length; i++) {
arvahsu 2:5e7876719560 378 _spi.write(buffer[i]);
arvahsu 2:5e7876719560 379 }
arvahsu 2:5e7876719560 380
arvahsu 2:5e7876719560 381 // write the checksum
arvahsu 2:5e7876719560 382 _spi.write(0xFF);
arvahsu 2:5e7876719560 383 _spi.write(0xFF);
arvahsu 2:5e7876719560 384
arvahsu 2:5e7876719560 385 // check the response token
arvahsu 2:5e7876719560 386 if ((_spi.write(0xFF) & 0x1F) != 0x05) {
arvahsu 2:5e7876719560 387 _cs = 1;
arvahsu 2:5e7876719560 388 _spi.write(0xFF);
arvahsu 2:5e7876719560 389 return 1;
arvahsu 2:5e7876719560 390 }
arvahsu 2:5e7876719560 391
arvahsu 2:5e7876719560 392 // wait for write to finish
arvahsu 2:5e7876719560 393 while (_spi.write(0xFF) == 0);
arvahsu 2:5e7876719560 394
arvahsu 2:5e7876719560 395 _cs = 1;
arvahsu 2:5e7876719560 396 _spi.write(0xFF);
arvahsu 2:5e7876719560 397 return 0;
arvahsu 2:5e7876719560 398 }
arvahsu 2:5e7876719560 399
arvahsu 2:5e7876719560 400 static uint32_t ext_bits(unsigned char *data, int msb, int lsb) {
arvahsu 2:5e7876719560 401 uint32_t bits = 0;
arvahsu 2:5e7876719560 402 uint32_t size = 1 + msb - lsb;
arvahsu 2:5e7876719560 403 for (int i = 0; i < size; i++) {
arvahsu 2:5e7876719560 404 uint32_t position = lsb + i;
arvahsu 2:5e7876719560 405 uint32_t byte = 15 - (position >> 3);
arvahsu 2:5e7876719560 406 uint32_t bit = position & 0x7;
arvahsu 2:5e7876719560 407 uint32_t value = (data[byte] >> bit) & 1;
arvahsu 2:5e7876719560 408 bits |= value << i;
arvahsu 2:5e7876719560 409 }
arvahsu 2:5e7876719560 410 return bits;
arvahsu 2:5e7876719560 411 }
arvahsu 2:5e7876719560 412
arvahsu 2:5e7876719560 413 uint64_t SDFileSystem::_sd_sectors() {
arvahsu 2:5e7876719560 414 uint32_t c_size, c_size_mult, read_bl_len;
arvahsu 2:5e7876719560 415 uint32_t block_len, mult, blocknr, capacity;
arvahsu 2:5e7876719560 416 uint32_t hc_c_size;
arvahsu 2:5e7876719560 417 uint64_t blocks;
arvahsu 2:5e7876719560 418
arvahsu 2:5e7876719560 419 // CMD9, Response R2 (R1 byte + 16-byte block read)
arvahsu 2:5e7876719560 420 if (_cmdx(9, 0) != 0) {
arvahsu 2:5e7876719560 421 debug("Didn't get a response from the disk\n");
arvahsu 2:5e7876719560 422 return 0;
arvahsu 2:5e7876719560 423 }
arvahsu 2:5e7876719560 424
arvahsu 2:5e7876719560 425 uint8_t csd[16];
arvahsu 2:5e7876719560 426 if (_read(csd, 16) != 0) {
arvahsu 2:5e7876719560 427 debug("Couldn't read csd response from disk\n");
arvahsu 2:5e7876719560 428 return 0;
arvahsu 2:5e7876719560 429 }
arvahsu 2:5e7876719560 430
arvahsu 2:5e7876719560 431 // csd_structure : csd[127:126]
arvahsu 2:5e7876719560 432 // c_size : csd[73:62]
arvahsu 2:5e7876719560 433 // c_size_mult : csd[49:47]
arvahsu 2:5e7876719560 434 // read_bl_len : csd[83:80] - the *maximum* read block length
arvahsu 2:5e7876719560 435
arvahsu 2:5e7876719560 436 int csd_structure = ext_bits(csd, 127, 126);
arvahsu 2:5e7876719560 437
arvahsu 2:5e7876719560 438 switch (csd_structure) {
arvahsu 2:5e7876719560 439 case 0:
arvahsu 2:5e7876719560 440 cdv = 512;
arvahsu 2:5e7876719560 441 c_size = ext_bits(csd, 73, 62);
arvahsu 2:5e7876719560 442 c_size_mult = ext_bits(csd, 49, 47);
arvahsu 2:5e7876719560 443 read_bl_len = ext_bits(csd, 83, 80);
arvahsu 2:5e7876719560 444
arvahsu 2:5e7876719560 445 block_len = 1 << read_bl_len;
arvahsu 2:5e7876719560 446 mult = 1 << (c_size_mult + 2);
arvahsu 2:5e7876719560 447 blocknr = (c_size + 1) * mult;
arvahsu 2:5e7876719560 448 capacity = blocknr * block_len;
arvahsu 2:5e7876719560 449 blocks = capacity / 512;
arvahsu 2:5e7876719560 450 debug_if(SD_DBG, "\n\rSDCard\n\rc_size: %d \n\rcapacity: %ld \n\rsectors: %lld\n\r", c_size, capacity, blocks);
arvahsu 2:5e7876719560 451 break;
arvahsu 2:5e7876719560 452
arvahsu 2:5e7876719560 453 case 1:
arvahsu 2:5e7876719560 454 cdv = 1;
arvahsu 2:5e7876719560 455 hc_c_size = ext_bits(csd, 63, 48);
arvahsu 2:5e7876719560 456 blocks = (hc_c_size+1)*1024;
arvahsu 2:5e7876719560 457 debug_if(SD_DBG, "\n\rSDHC Card \n\rhc_c_size: %d\n\rcapacity: %lld \n\rsectors: %lld\n\r", hc_c_size, blocks*512, blocks);
arvahsu 2:5e7876719560 458 break;
arvahsu 2:5e7876719560 459
arvahsu 2:5e7876719560 460 default:
arvahsu 2:5e7876719560 461 debug("CSD struct unsupported\r\n");
arvahsu 2:5e7876719560 462 return 0;
arvahsu 2:5e7876719560 463 };
arvahsu 2:5e7876719560 464 return blocks;
arvahsu 2:5e7876719560 465 }