lin thou / FreeRTOS_test_for_stm32f0

www.freertos.org test on stm32f0

Fork of FreeRTOS by Rohit Grover

Source/portable/RVDS/ARM_CM0/port.c@1:fc62ab66aa39, 2018-03-02 (annotated)

Committer:
thoulin
Date:
Fri Mar 02 09:46:03 2018 +0000
Revision:
1:fc62ab66aa39
stm32f030r8 free rtos but,it  can not run right.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
thoulin 1:fc62ab66aa39 1 /*
thoulin 1:fc62ab66aa39 2 FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
thoulin 1:fc62ab66aa39 3 All rights reserved
thoulin 1:fc62ab66aa39 4
thoulin 1:fc62ab66aa39 5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
thoulin 1:fc62ab66aa39 6
thoulin 1:fc62ab66aa39 7 ***************************************************************************
thoulin 1:fc62ab66aa39 8 * *
thoulin 1:fc62ab66aa39 9 * FreeRTOS provides completely free yet professionally developed, *
thoulin 1:fc62ab66aa39 10 * robust, strictly quality controlled, supported, and cross *
thoulin 1:fc62ab66aa39 11 * platform software that has become a de facto standard. *
thoulin 1:fc62ab66aa39 12 * *
thoulin 1:fc62ab66aa39 13 * Help yourself get started quickly and support the FreeRTOS *
thoulin 1:fc62ab66aa39 14 * project by purchasing a FreeRTOS tutorial book, reference *
thoulin 1:fc62ab66aa39 15 * manual, or both from: http://www.FreeRTOS.org/Documentation *
thoulin 1:fc62ab66aa39 16 * *
thoulin 1:fc62ab66aa39 17 * Thank you! *
thoulin 1:fc62ab66aa39 18 * *
thoulin 1:fc62ab66aa39 19 ***************************************************************************
thoulin 1:fc62ab66aa39 20
thoulin 1:fc62ab66aa39 21 This file is part of the FreeRTOS distribution.
thoulin 1:fc62ab66aa39 22
thoulin 1:fc62ab66aa39 23 FreeRTOS is free software; you can redistribute it and/or modify it under
thoulin 1:fc62ab66aa39 24 the terms of the GNU General Public License (version 2) as published by the
thoulin 1:fc62ab66aa39 25 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
thoulin 1:fc62ab66aa39 26
thoulin 1:fc62ab66aa39 27 >>! NOTE: The modification to the GPL is included to allow you to distribute
thoulin 1:fc62ab66aa39 28 >>! a combined work that includes FreeRTOS without being obliged to provide
thoulin 1:fc62ab66aa39 29 >>! the source code for proprietary components outside of the FreeRTOS
thoulin 1:fc62ab66aa39 30 >>! kernel.
thoulin 1:fc62ab66aa39 31
thoulin 1:fc62ab66aa39 32 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
thoulin 1:fc62ab66aa39 33 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
thoulin 1:fc62ab66aa39 34 FOR A PARTICULAR PURPOSE. Full license text is available from the following
thoulin 1:fc62ab66aa39 35 link: http://www.freertos.org/a00114.html
thoulin 1:fc62ab66aa39 36
thoulin 1:fc62ab66aa39 37 1 tab == 4 spaces!
thoulin 1:fc62ab66aa39 38
thoulin 1:fc62ab66aa39 39 ***************************************************************************
thoulin 1:fc62ab66aa39 40 * *
thoulin 1:fc62ab66aa39 41 * Having a problem? Start by reading the FAQ "My application does *
thoulin 1:fc62ab66aa39 42 * not run, what could be wrong?" *
thoulin 1:fc62ab66aa39 43 * *
thoulin 1:fc62ab66aa39 44 * http://www.FreeRTOS.org/FAQHelp.html *
thoulin 1:fc62ab66aa39 45 * *
thoulin 1:fc62ab66aa39 46 ***************************************************************************
thoulin 1:fc62ab66aa39 47
thoulin 1:fc62ab66aa39 48 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
thoulin 1:fc62ab66aa39 49 license and Real Time Engineers Ltd. contact details.
thoulin 1:fc62ab66aa39 50
thoulin 1:fc62ab66aa39 51 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
thoulin 1:fc62ab66aa39 52 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
thoulin 1:fc62ab66aa39 53 compatible FAT file system, and our tiny thread aware UDP/IP stack.
thoulin 1:fc62ab66aa39 54
thoulin 1:fc62ab66aa39 55 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
thoulin 1:fc62ab66aa39 56 Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
thoulin 1:fc62ab66aa39 57 licenses offer ticketed support, indemnification and middleware.
thoulin 1:fc62ab66aa39 58
thoulin 1:fc62ab66aa39 59 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
thoulin 1:fc62ab66aa39 60 engineered and independently SIL3 certified version for use in safety and
thoulin 1:fc62ab66aa39 61 mission critical applications that require provable dependability.
thoulin 1:fc62ab66aa39 62
thoulin 1:fc62ab66aa39 63 1 tab == 4 spaces!
thoulin 1:fc62ab66aa39 64 */
thoulin 1:fc62ab66aa39 65
thoulin 1:fc62ab66aa39 66 /*-----------------------------------------------------------
thoulin 1:fc62ab66aa39 67 * Implementation of functions defined in portable.h for the ARM CM0 port.
thoulin 1:fc62ab66aa39 68 *----------------------------------------------------------*/
thoulin 1:fc62ab66aa39 69
thoulin 1:fc62ab66aa39 70 /* Scheduler includes. */
thoulin 1:fc62ab66aa39 71 #include "FreeRTOS.h"
thoulin 1:fc62ab66aa39 72 #include "task.h"
thoulin 1:fc62ab66aa39 73
thoulin 1:fc62ab66aa39 74 /* Constants required to manipulate the NVIC. */
thoulin 1:fc62ab66aa39 75 #define portNVIC_SYSTICK_CTRL ( ( volatile unsigned long *) 0xe000e010 )
thoulin 1:fc62ab66aa39 76 #define portNVIC_SYSTICK_LOAD ( ( volatile unsigned long *) 0xe000e014 )
thoulin 1:fc62ab66aa39 77 #define portNVIC_INT_CTRL ( ( volatile unsigned long *) 0xe000ed04 )
thoulin 1:fc62ab66aa39 78 #define portNVIC_SYSPRI2 ( ( volatile unsigned long *) 0xe000ed20 )
thoulin 1:fc62ab66aa39 79 #define portNVIC_SYSTICK_CLK 0x00000004
thoulin 1:fc62ab66aa39 80 #define portNVIC_SYSTICK_INT 0x00000002
thoulin 1:fc62ab66aa39 81 #define portNVIC_SYSTICK_ENABLE 0x00000001
thoulin 1:fc62ab66aa39 82 #define portNVIC_PENDSVSET 0x10000000
thoulin 1:fc62ab66aa39 83 #define portMIN_INTERRUPT_PRIORITY ( 255UL )
thoulin 1:fc62ab66aa39 84 #define portNVIC_PENDSV_PRI ( portMIN_INTERRUPT_PRIORITY << 16UL )
thoulin 1:fc62ab66aa39 85 #define portNVIC_SYSTICK_PRI ( portMIN_INTERRUPT_PRIORITY << 24UL )
thoulin 1:fc62ab66aa39 86
thoulin 1:fc62ab66aa39 87 /* Constants required to set up the initial stack. */
thoulin 1:fc62ab66aa39 88 #define portINITIAL_XPSR ( 0x01000000 )
thoulin 1:fc62ab66aa39 89
thoulin 1:fc62ab66aa39 90 /* Constants used with memory barrier intrinsics. */
thoulin 1:fc62ab66aa39 91 #define portSY_FULL_READ_WRITE ( 15 )
thoulin 1:fc62ab66aa39 92
thoulin 1:fc62ab66aa39 93 /* Each task maintains its own interrupt status in the critical nesting
thoulin 1:fc62ab66aa39 94 variable. */
thoulin 1:fc62ab66aa39 95 static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;
thoulin 1:fc62ab66aa39 96
thoulin 1:fc62ab66aa39 97 /*
thoulin 1:fc62ab66aa39 98 * Setup the timer to generate the tick interrupts.
thoulin 1:fc62ab66aa39 99 */
thoulin 1:fc62ab66aa39 100 static void prvSetupTimerInterrupt( void );
thoulin 1:fc62ab66aa39 101
thoulin 1:fc62ab66aa39 102 /*
thoulin 1:fc62ab66aa39 103 * Exception handlers.
thoulin 1:fc62ab66aa39 104 */
thoulin 1:fc62ab66aa39 105 void xPortPendSVHandler( void );
thoulin 1:fc62ab66aa39 106 void xPortSysTickHandler( void );
thoulin 1:fc62ab66aa39 107 void vPortSVCHandler( void );
thoulin 1:fc62ab66aa39 108
thoulin 1:fc62ab66aa39 109 /*
thoulin 1:fc62ab66aa39 110 * Start first task is a separate function so it can be tested in isolation.
thoulin 1:fc62ab66aa39 111 */
thoulin 1:fc62ab66aa39 112 static void prvPortStartFirstTask( void );
thoulin 1:fc62ab66aa39 113
thoulin 1:fc62ab66aa39 114 /*
thoulin 1:fc62ab66aa39 115 * Used to catch tasks that attempt to return from their implementing function.
thoulin 1:fc62ab66aa39 116 */
thoulin 1:fc62ab66aa39 117 static void prvTaskExitError( void );
thoulin 1:fc62ab66aa39 118
thoulin 1:fc62ab66aa39 119 /*-----------------------------------------------------------*/
thoulin 1:fc62ab66aa39 120
thoulin 1:fc62ab66aa39 121 /*
thoulin 1:fc62ab66aa39 122 * See header file for description.
thoulin 1:fc62ab66aa39 123 */
thoulin 1:fc62ab66aa39 124 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
thoulin 1:fc62ab66aa39 125 {
thoulin 1:fc62ab66aa39 126 /* Simulate the stack frame as it would be created by a context switch
thoulin 1:fc62ab66aa39 127 interrupt. */
thoulin 1:fc62ab66aa39 128 pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
thoulin 1:fc62ab66aa39 129 *pxTopOfStack = portINITIAL_XPSR; /* xPSR */
thoulin 1:fc62ab66aa39 130 pxTopOfStack--;
thoulin 1:fc62ab66aa39 131 *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */
thoulin 1:fc62ab66aa39 132 pxTopOfStack--;
thoulin 1:fc62ab66aa39 133 *pxTopOfStack = ( portSTACK_TYPE ) prvTaskExitError; /* LR */
thoulin 1:fc62ab66aa39 134 pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
thoulin 1:fc62ab66aa39 135 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
thoulin 1:fc62ab66aa39 136 pxTopOfStack -= 8; /* R11..R4. */
thoulin 1:fc62ab66aa39 137
thoulin 1:fc62ab66aa39 138 return pxTopOfStack;
thoulin 1:fc62ab66aa39 139 }
thoulin 1:fc62ab66aa39 140 /*-----------------------------------------------------------*/
thoulin 1:fc62ab66aa39 141
thoulin 1:fc62ab66aa39 142 static void prvTaskExitError( void )
thoulin 1:fc62ab66aa39 143 {
thoulin 1:fc62ab66aa39 144 /* A function that implements a task must not exit or attempt to return to
thoulin 1:fc62ab66aa39 145 its caller as there is nothing to return to. If a task wants to exit it
thoulin 1:fc62ab66aa39 146 should instead call vTaskDelete( NULL ).
thoulin 1:fc62ab66aa39 147
thoulin 1:fc62ab66aa39 148 Artificially force an assert() to be triggered if configASSERT() is
thoulin 1:fc62ab66aa39 149 defined, then stop here so application writers can catch the error. */
thoulin 1:fc62ab66aa39 150 configASSERT( uxCriticalNesting == ~0UL );
thoulin 1:fc62ab66aa39 151 portDISABLE_INTERRUPTS();
thoulin 1:fc62ab66aa39 152 for( ;; );
thoulin 1:fc62ab66aa39 153 }
thoulin 1:fc62ab66aa39 154 /*-----------------------------------------------------------*/
thoulin 1:fc62ab66aa39 155
thoulin 1:fc62ab66aa39 156 void vPortSVCHandler( void )
thoulin 1:fc62ab66aa39 157 {
thoulin 1:fc62ab66aa39 158 /* This function is no longer used, but retained for backward
thoulin 1:fc62ab66aa39 159 compatibility. */
thoulin 1:fc62ab66aa39 160 }
thoulin 1:fc62ab66aa39 161 /*-----------------------------------------------------------*/
thoulin 1:fc62ab66aa39 162
thoulin 1:fc62ab66aa39 163 __asm void prvPortStartFirstTask( void )
thoulin 1:fc62ab66aa39 164 {
thoulin 1:fc62ab66aa39 165 extern pxCurrentTCB;
thoulin 1:fc62ab66aa39 166
thoulin 1:fc62ab66aa39 167 PRESERVE8
thoulin 1:fc62ab66aa39 168
thoulin 1:fc62ab66aa39 169 /* The MSP stack is not reset as, unlike on M3/4 parts, there is no vector
thoulin 1:fc62ab66aa39 170 table offset register that can be used to locate the initial stack value.
thoulin 1:fc62ab66aa39 171 Not all M0 parts have the application vector table at address 0. */
thoulin 1:fc62ab66aa39 172
thoulin 1:fc62ab66aa39 173 ldr r3, =pxCurrentTCB /* Obtain location of pxCurrentTCB. */
thoulin 1:fc62ab66aa39 174 ldr r1, [r3]
thoulin 1:fc62ab66aa39 175 ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */
thoulin 1:fc62ab66aa39 176 adds r0, #32 /* Discard everything up to r0. */
thoulin 1:fc62ab66aa39 177 msr psp, r0 /* This is now the new top of stack to use in the task. */
thoulin 1:fc62ab66aa39 178 movs r0, #2 /* Switch to the psp stack. */
thoulin 1:fc62ab66aa39 179 msr CONTROL, r0
thoulin 1:fc62ab66aa39 180 pop {r0-r5} /* Pop the registers that are saved automatically. */
thoulin 1:fc62ab66aa39 181 mov lr, r5 /* lr is now in r5. */
thoulin 1:fc62ab66aa39 182 cpsie i /* The first task has its context and interrupts can be enabled. */
thoulin 1:fc62ab66aa39 183 pop {pc} /* Finally, pop the PC to jump to the user defined task code. */
thoulin 1:fc62ab66aa39 184
thoulin 1:fc62ab66aa39 185 ALIGN
thoulin 1:fc62ab66aa39 186 }
thoulin 1:fc62ab66aa39 187 /*-----------------------------------------------------------*/
thoulin 1:fc62ab66aa39 188
thoulin 1:fc62ab66aa39 189 /*
thoulin 1:fc62ab66aa39 190 * See header file for description.
thoulin 1:fc62ab66aa39 191 */
thoulin 1:fc62ab66aa39 192 portBASE_TYPE xPortStartScheduler( void )
thoulin 1:fc62ab66aa39 193 {
thoulin 1:fc62ab66aa39 194 /* Make PendSV, CallSV and SysTick the same priroity as the kernel. */
thoulin 1:fc62ab66aa39 195 *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;
thoulin 1:fc62ab66aa39 196 *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;
thoulin 1:fc62ab66aa39 197
thoulin 1:fc62ab66aa39 198 /* Start the timer that generates the tick ISR. Interrupts are disabled
thoulin 1:fc62ab66aa39 199 here already. */
thoulin 1:fc62ab66aa39 200 prvSetupTimerInterrupt();
thoulin 1:fc62ab66aa39 201
thoulin 1:fc62ab66aa39 202 /* Initialise the critical nesting count ready for the first task. */
thoulin 1:fc62ab66aa39 203 uxCriticalNesting = 0;
thoulin 1:fc62ab66aa39 204
thoulin 1:fc62ab66aa39 205 /* Start the first task. */
thoulin 1:fc62ab66aa39 206 prvPortStartFirstTask();
thoulin 1:fc62ab66aa39 207
thoulin 1:fc62ab66aa39 208 /* Should not get here! */
thoulin 1:fc62ab66aa39 209 return 0;
thoulin 1:fc62ab66aa39 210 }
thoulin 1:fc62ab66aa39 211 /*-----------------------------------------------------------*/
thoulin 1:fc62ab66aa39 212
thoulin 1:fc62ab66aa39 213 void vPortEndScheduler( void )
thoulin 1:fc62ab66aa39 214 {
thoulin 1:fc62ab66aa39 215 /* It is unlikely that the CM0 port will require this function as there
thoulin 1:fc62ab66aa39 216 is nothing to return to. */
thoulin 1:fc62ab66aa39 217 }
thoulin 1:fc62ab66aa39 218 /*-----------------------------------------------------------*/
thoulin 1:fc62ab66aa39 219
thoulin 1:fc62ab66aa39 220 void vPortYield( void )
thoulin 1:fc62ab66aa39 221 {
thoulin 1:fc62ab66aa39 222 /* Set a PendSV to request a context switch. */
thoulin 1:fc62ab66aa39 223 *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
thoulin 1:fc62ab66aa39 224
thoulin 1:fc62ab66aa39 225 /* Barriers are normally not required but do ensure the code is completely
thoulin 1:fc62ab66aa39 226 within the specified behaviour for the architecture. */
thoulin 1:fc62ab66aa39 227 __dsb( portSY_FULL_READ_WRITE );
thoulin 1:fc62ab66aa39 228 __isb( portSY_FULL_READ_WRITE );
thoulin 1:fc62ab66aa39 229 }
thoulin 1:fc62ab66aa39 230 /*-----------------------------------------------------------*/
thoulin 1:fc62ab66aa39 231
thoulin 1:fc62ab66aa39 232 void vPortEnterCritical( void )
thoulin 1:fc62ab66aa39 233 {
thoulin 1:fc62ab66aa39 234 portDISABLE_INTERRUPTS();
thoulin 1:fc62ab66aa39 235 uxCriticalNesting++;
thoulin 1:fc62ab66aa39 236 __dsb( portSY_FULL_READ_WRITE );
thoulin 1:fc62ab66aa39 237 __isb( portSY_FULL_READ_WRITE );
thoulin 1:fc62ab66aa39 238 }
thoulin 1:fc62ab66aa39 239 /*-----------------------------------------------------------*/
thoulin 1:fc62ab66aa39 240
thoulin 1:fc62ab66aa39 241 void vPortExitCritical( void )
thoulin 1:fc62ab66aa39 242 {
thoulin 1:fc62ab66aa39 243 uxCriticalNesting--;
thoulin 1:fc62ab66aa39 244 if( uxCriticalNesting == 0 )
thoulin 1:fc62ab66aa39 245 {
thoulin 1:fc62ab66aa39 246 portENABLE_INTERRUPTS();
thoulin 1:fc62ab66aa39 247 }
thoulin 1:fc62ab66aa39 248 }
thoulin 1:fc62ab66aa39 249 /*-----------------------------------------------------------*/
thoulin 1:fc62ab66aa39 250
thoulin 1:fc62ab66aa39 251 __asm unsigned long ulSetInterruptMaskFromISR( void )
thoulin 1:fc62ab66aa39 252 {
thoulin 1:fc62ab66aa39 253 mrs r0, PRIMASK
thoulin 1:fc62ab66aa39 254 cpsid i
thoulin 1:fc62ab66aa39 255 bx lr
thoulin 1:fc62ab66aa39 256 }
thoulin 1:fc62ab66aa39 257 /*-----------------------------------------------------------*/
thoulin 1:fc62ab66aa39 258
thoulin 1:fc62ab66aa39 259 __asm void vClearInterruptMaskFromISR( unsigned long ulMask )
thoulin 1:fc62ab66aa39 260 {
thoulin 1:fc62ab66aa39 261 msr PRIMASK, r0
thoulin 1:fc62ab66aa39 262 bx lr
thoulin 1:fc62ab66aa39 263 }
thoulin 1:fc62ab66aa39 264 /*-----------------------------------------------------------*/
thoulin 1:fc62ab66aa39 265
thoulin 1:fc62ab66aa39 266 __asm void xPortPendSVHandler( void )
thoulin 1:fc62ab66aa39 267 {
thoulin 1:fc62ab66aa39 268 extern vTaskSwitchContext
thoulin 1:fc62ab66aa39 269 extern pxCurrentTCB
thoulin 1:fc62ab66aa39 270
thoulin 1:fc62ab66aa39 271 PRESERVE8
thoulin 1:fc62ab66aa39 272
thoulin 1:fc62ab66aa39 273 mrs r0, psp
thoulin 1:fc62ab66aa39 274
thoulin 1:fc62ab66aa39 275 ldr r3, =pxCurrentTCB /* Get the location of the current TCB. */
thoulin 1:fc62ab66aa39 276 ldr r2, [r3]
thoulin 1:fc62ab66aa39 277
thoulin 1:fc62ab66aa39 278 subs r0, #32 /* Make space for the remaining low registers. */
thoulin 1:fc62ab66aa39 279 str r0, [r2] /* Save the new top of stack. */
thoulin 1:fc62ab66aa39 280 stmia r0!, {r4-r7} /* Store the low registers that are not saved automatically. */
thoulin 1:fc62ab66aa39 281 mov r4, r8 /* Store the high registers. */
thoulin 1:fc62ab66aa39 282 mov r5, r9
thoulin 1:fc62ab66aa39 283 mov r6, r10
thoulin 1:fc62ab66aa39 284 mov r7, r11
thoulin 1:fc62ab66aa39 285 stmia r0!, {r4-r7}
thoulin 1:fc62ab66aa39 286
thoulin 1:fc62ab66aa39 287 push {r3, r14}
thoulin 1:fc62ab66aa39 288 cpsid i
thoulin 1:fc62ab66aa39 289 bl vTaskSwitchContext
thoulin 1:fc62ab66aa39 290 cpsie i
thoulin 1:fc62ab66aa39 291 pop {r2, r3} /* lr goes in r3. r2 now holds tcb pointer. */
thoulin 1:fc62ab66aa39 292
thoulin 1:fc62ab66aa39 293 ldr r1, [r2]
thoulin 1:fc62ab66aa39 294 ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */
thoulin 1:fc62ab66aa39 295 adds r0, #16 /* Move to the high registers. */
thoulin 1:fc62ab66aa39 296 ldmia r0!, {r4-r7} /* Pop the high registers. */
thoulin 1:fc62ab66aa39 297 mov r8, r4
thoulin 1:fc62ab66aa39 298 mov r9, r5
thoulin 1:fc62ab66aa39 299 mov r10, r6
thoulin 1:fc62ab66aa39 300 mov r11, r7
thoulin 1:fc62ab66aa39 301
thoulin 1:fc62ab66aa39 302 msr psp, r0 /* Remember the new top of stack for the task. */
thoulin 1:fc62ab66aa39 303
thoulin 1:fc62ab66aa39 304 subs r0, #32 /* Go back for the low registers that are not automatically restored. */
thoulin 1:fc62ab66aa39 305 ldmia r0!, {r4-r7} /* Pop low registers. */
thoulin 1:fc62ab66aa39 306
thoulin 1:fc62ab66aa39 307 bx r3
thoulin 1:fc62ab66aa39 308 ALIGN
thoulin 1:fc62ab66aa39 309 }
thoulin 1:fc62ab66aa39 310 /*-----------------------------------------------------------*/
thoulin 1:fc62ab66aa39 311
thoulin 1:fc62ab66aa39 312 void xPortSysTickHandler( void )
thoulin 1:fc62ab66aa39 313 {
thoulin 1:fc62ab66aa39 314 unsigned long ulPreviousMask;
thoulin 1:fc62ab66aa39 315
thoulin 1:fc62ab66aa39 316 ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
thoulin 1:fc62ab66aa39 317 {
thoulin 1:fc62ab66aa39 318 /* Increment the RTOS tick. */
thoulin 1:fc62ab66aa39 319 if( xTaskIncrementTick() != pdFALSE )
thoulin 1:fc62ab66aa39 320 {
thoulin 1:fc62ab66aa39 321 /* Pend a context switch. */
thoulin 1:fc62ab66aa39 322 *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
thoulin 1:fc62ab66aa39 323 }
thoulin 1:fc62ab66aa39 324 }
thoulin 1:fc62ab66aa39 325 portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
thoulin 1:fc62ab66aa39 326 }
thoulin 1:fc62ab66aa39 327 /*-----------------------------------------------------------*/
thoulin 1:fc62ab66aa39 328
thoulin 1:fc62ab66aa39 329 /*
thoulin 1:fc62ab66aa39 330 * Setup the systick timer to generate the tick interrupts at the required
thoulin 1:fc62ab66aa39 331 * frequency.
thoulin 1:fc62ab66aa39 332 */
thoulin 1:fc62ab66aa39 333 void prvSetupTimerInterrupt( void )
thoulin 1:fc62ab66aa39 334 {
thoulin 1:fc62ab66aa39 335 /* Configure SysTick to interrupt at the requested rate. */
thoulin 1:fc62ab66aa39 336 *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
thoulin 1:fc62ab66aa39 337 *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
thoulin 1:fc62ab66aa39 338 }
thoulin 1:fc62ab66aa39 339 /*-----------------------------------------------------------*/
thoulin 1:fc62ab66aa39 340