bugfixes and reduced version for disco board only
Dependents: Scope DISCO-F746NG_Sinewave DISCO-F746NG_Sweep DISCO-F746NG_Oscilloscope ... more
Fork of BSP_DISCO_F746NG_patch by
stm32746g_discovery_sd.c@7:a4e658110084, 2016-01-31 (annotated)
- Committer:
- the_sz
- Date:
- Sun Jan 31 17:45:21 2016 +0000
- Revision:
- 7:a4e658110084
- Parent:
- 1:e8fac4061a5b
remove debug line
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
NirT | 1:e8fac4061a5b | 1 | /** |
NirT | 1:e8fac4061a5b | 2 | ****************************************************************************** |
NirT | 1:e8fac4061a5b | 3 | * @file stm32746g_discovery_sd.c |
NirT | 1:e8fac4061a5b | 4 | * @author MCD Application Team |
NirT | 1:e8fac4061a5b | 5 | * @version V1.0.0 |
NirT | 1:e8fac4061a5b | 6 | * @date 25-June-2015 |
NirT | 1:e8fac4061a5b | 7 | * @brief This file includes the uSD card driver mounted on STM32746G-Discovery |
NirT | 1:e8fac4061a5b | 8 | * board. |
NirT | 1:e8fac4061a5b | 9 | @verbatim |
NirT | 1:e8fac4061a5b | 10 | 1. How To use this driver: |
NirT | 1:e8fac4061a5b | 11 | -------------------------- |
NirT | 1:e8fac4061a5b | 12 | - This driver is used to drive the micro SD external card mounted on STM32746G-Discovery |
NirT | 1:e8fac4061a5b | 13 | board. |
NirT | 1:e8fac4061a5b | 14 | - This driver does not need a specific component driver for the micro SD device |
NirT | 1:e8fac4061a5b | 15 | to be included with. |
NirT | 1:e8fac4061a5b | 16 | |
NirT | 1:e8fac4061a5b | 17 | 2. Driver description: |
NirT | 1:e8fac4061a5b | 18 | --------------------- |
NirT | 1:e8fac4061a5b | 19 | + Initialization steps: |
NirT | 1:e8fac4061a5b | 20 | o Initialize the micro SD card using the BSP_SD_Init() function. This |
NirT | 1:e8fac4061a5b | 21 | function includes the MSP layer hardware resources initialization and the |
NirT | 1:e8fac4061a5b | 22 | SDIO interface configuration to interface with the external micro SD. It |
NirT | 1:e8fac4061a5b | 23 | also includes the micro SD initialization sequence. |
NirT | 1:e8fac4061a5b | 24 | o To check the SD card presence you can use the function BSP_SD_IsDetected() which |
NirT | 1:e8fac4061a5b | 25 | returns the detection status |
NirT | 1:e8fac4061a5b | 26 | o If SD presence detection interrupt mode is desired, you must configure the |
NirT | 1:e8fac4061a5b | 27 | SD detection interrupt mode by calling the function BSP_SD_ITConfig(). The interrupt |
NirT | 1:e8fac4061a5b | 28 | is generated as an external interrupt whenever the micro SD card is |
NirT | 1:e8fac4061a5b | 29 | plugged/unplugged in/from the board. |
NirT | 1:e8fac4061a5b | 30 | o The function BSP_SD_GetCardInfo() is used to get the micro SD card information |
NirT | 1:e8fac4061a5b | 31 | which is stored in the structure "HAL_SD_CardInfoTypedef". |
NirT | 1:e8fac4061a5b | 32 | |
NirT | 1:e8fac4061a5b | 33 | + Micro SD card operations |
NirT | 1:e8fac4061a5b | 34 | o The micro SD card can be accessed with read/write block(s) operations once |
NirT | 1:e8fac4061a5b | 35 | it is ready for access. The access can be performed whether using the polling |
NirT | 1:e8fac4061a5b | 36 | mode by calling the functions BSP_SD_ReadBlocks()/BSP_SD_WriteBlocks(), or by DMA |
NirT | 1:e8fac4061a5b | 37 | transfer using the functions BSP_SD_ReadBlocks_DMA()/BSP_SD_WriteBlocks_DMA() |
NirT | 1:e8fac4061a5b | 38 | o The DMA transfer complete is used with interrupt mode. Once the SD transfer |
NirT | 1:e8fac4061a5b | 39 | is complete, the SD interrupt is handled using the function BSP_SD_IRQHandler(), |
NirT | 1:e8fac4061a5b | 40 | the DMA Tx/Rx transfer complete are handled using the functions |
NirT | 1:e8fac4061a5b | 41 | BSP_SD_DMA_Tx_IRQHandler()/BSP_SD_DMA_Rx_IRQHandler(). The corresponding user callbacks |
NirT | 1:e8fac4061a5b | 42 | are implemented by the user at application level. |
NirT | 1:e8fac4061a5b | 43 | o The SD erase block(s) is performed using the function BSP_SD_Erase() with specifying |
NirT | 1:e8fac4061a5b | 44 | the number of blocks to erase. |
NirT | 1:e8fac4061a5b | 45 | o The SD runtime status is returned when calling the function BSP_SD_GetStatus(). |
NirT | 1:e8fac4061a5b | 46 | @endverbatim |
NirT | 1:e8fac4061a5b | 47 | ****************************************************************************** |
NirT | 1:e8fac4061a5b | 48 | * @attention |
NirT | 1:e8fac4061a5b | 49 | * |
NirT | 1:e8fac4061a5b | 50 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
NirT | 1:e8fac4061a5b | 51 | * |
NirT | 1:e8fac4061a5b | 52 | * Redistribution and use in source and binary forms, with or without modification, |
NirT | 1:e8fac4061a5b | 53 | * are permitted provided that the following conditions are met: |
NirT | 1:e8fac4061a5b | 54 | * 1. Redistributions of source code must retain the above copyright notice, |
NirT | 1:e8fac4061a5b | 55 | * this list of conditions and the following disclaimer. |
NirT | 1:e8fac4061a5b | 56 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
NirT | 1:e8fac4061a5b | 57 | * this list of conditions and the following disclaimer in the documentation |
NirT | 1:e8fac4061a5b | 58 | * and/or other materials provided with the distribution. |
NirT | 1:e8fac4061a5b | 59 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
NirT | 1:e8fac4061a5b | 60 | * may be used to endorse or promote products derived from this software |
NirT | 1:e8fac4061a5b | 61 | * without specific prior written permission. |
NirT | 1:e8fac4061a5b | 62 | * |
NirT | 1:e8fac4061a5b | 63 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
NirT | 1:e8fac4061a5b | 64 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
NirT | 1:e8fac4061a5b | 65 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
NirT | 1:e8fac4061a5b | 66 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
NirT | 1:e8fac4061a5b | 67 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
NirT | 1:e8fac4061a5b | 68 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
NirT | 1:e8fac4061a5b | 69 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
NirT | 1:e8fac4061a5b | 70 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
NirT | 1:e8fac4061a5b | 71 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
NirT | 1:e8fac4061a5b | 72 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
NirT | 1:e8fac4061a5b | 73 | * |
NirT | 1:e8fac4061a5b | 74 | ****************************************************************************** |
NirT | 1:e8fac4061a5b | 75 | */ |
NirT | 1:e8fac4061a5b | 76 | |
NirT | 1:e8fac4061a5b | 77 | /* Includes ------------------------------------------------------------------*/ |
NirT | 1:e8fac4061a5b | 78 | #include "stm32746g_discovery_sd.h" |
NirT | 1:e8fac4061a5b | 79 | |
NirT | 1:e8fac4061a5b | 80 | /** @addtogroup BSP |
NirT | 1:e8fac4061a5b | 81 | * @{ |
NirT | 1:e8fac4061a5b | 82 | */ |
NirT | 1:e8fac4061a5b | 83 | |
NirT | 1:e8fac4061a5b | 84 | /** @addtogroup STM32746G_DISCOVERY |
NirT | 1:e8fac4061a5b | 85 | * @{ |
NirT | 1:e8fac4061a5b | 86 | */ |
NirT | 1:e8fac4061a5b | 87 | |
NirT | 1:e8fac4061a5b | 88 | /** @defgroup STM32746G_DISCOVERY_SD STM32746G_DISCOVERY_SD |
NirT | 1:e8fac4061a5b | 89 | * @{ |
NirT | 1:e8fac4061a5b | 90 | */ |
NirT | 1:e8fac4061a5b | 91 | |
NirT | 1:e8fac4061a5b | 92 | |
NirT | 1:e8fac4061a5b | 93 | /** @defgroup STM32746G_DISCOVERY_SD_Private_TypesDefinitions STM32746G_DISCOVERY_SD Private Types Definitions |
NirT | 1:e8fac4061a5b | 94 | * @{ |
NirT | 1:e8fac4061a5b | 95 | */ |
NirT | 1:e8fac4061a5b | 96 | /** |
NirT | 1:e8fac4061a5b | 97 | * @} |
NirT | 1:e8fac4061a5b | 98 | */ |
NirT | 1:e8fac4061a5b | 99 | |
NirT | 1:e8fac4061a5b | 100 | /** @defgroup STM32746G_DISCOVERY_SD_Private_Defines STM32746G_DISCOVERY_SD Private Defines |
NirT | 1:e8fac4061a5b | 101 | * @{ |
NirT | 1:e8fac4061a5b | 102 | */ |
NirT | 1:e8fac4061a5b | 103 | /** |
NirT | 1:e8fac4061a5b | 104 | * @} |
NirT | 1:e8fac4061a5b | 105 | */ |
NirT | 1:e8fac4061a5b | 106 | |
NirT | 1:e8fac4061a5b | 107 | /** @defgroup STM32746G_DISCOVERY_SD_Private_Macros STM32746G_DISCOVERY_SD Private Macros |
NirT | 1:e8fac4061a5b | 108 | * @{ |
NirT | 1:e8fac4061a5b | 109 | */ |
NirT | 1:e8fac4061a5b | 110 | /** |
NirT | 1:e8fac4061a5b | 111 | * @} |
NirT | 1:e8fac4061a5b | 112 | */ |
NirT | 1:e8fac4061a5b | 113 | |
NirT | 1:e8fac4061a5b | 114 | /** @defgroup STM32746G_DISCOVERY_SD_Private_Variables STM32746G_DISCOVERY_SD Private Variables |
NirT | 1:e8fac4061a5b | 115 | * @{ |
NirT | 1:e8fac4061a5b | 116 | */ |
NirT | 1:e8fac4061a5b | 117 | static SD_HandleTypeDef uSdHandle; |
NirT | 1:e8fac4061a5b | 118 | static SD_CardInfo uSdCardInfo; |
NirT | 1:e8fac4061a5b | 119 | |
NirT | 1:e8fac4061a5b | 120 | /** |
NirT | 1:e8fac4061a5b | 121 | * @} |
NirT | 1:e8fac4061a5b | 122 | */ |
NirT | 1:e8fac4061a5b | 123 | |
NirT | 1:e8fac4061a5b | 124 | /** @defgroup STM32746G_DISCOVERY_SD_Private_FunctionPrototypes STM32746G_DISCOVERY_SD Private Function Prototypes |
NirT | 1:e8fac4061a5b | 125 | * @{ |
NirT | 1:e8fac4061a5b | 126 | */ |
NirT | 1:e8fac4061a5b | 127 | /** |
NirT | 1:e8fac4061a5b | 128 | * @} |
NirT | 1:e8fac4061a5b | 129 | */ |
NirT | 1:e8fac4061a5b | 130 | |
NirT | 1:e8fac4061a5b | 131 | /** @defgroup STM32746G_DISCOVERY_SD_Exported_Functions STM32746G_DISCOVERY_SD Exported Functions |
NirT | 1:e8fac4061a5b | 132 | * @{ |
NirT | 1:e8fac4061a5b | 133 | */ |
NirT | 1:e8fac4061a5b | 134 | |
NirT | 1:e8fac4061a5b | 135 | /** |
NirT | 1:e8fac4061a5b | 136 | * @brief Initializes the SD card device. |
NirT | 1:e8fac4061a5b | 137 | * @retval SD status |
NirT | 1:e8fac4061a5b | 138 | */ |
NirT | 1:e8fac4061a5b | 139 | uint8_t BSP_SD_Init(void) |
NirT | 1:e8fac4061a5b | 140 | { |
NirT | 1:e8fac4061a5b | 141 | uint8_t sd_state = MSD_OK; |
NirT | 1:e8fac4061a5b | 142 | |
NirT | 1:e8fac4061a5b | 143 | /* uSD device interface configuration */ |
NirT | 1:e8fac4061a5b | 144 | uSdHandle.Instance = SDMMC1; |
NirT | 1:e8fac4061a5b | 145 | |
NirT | 1:e8fac4061a5b | 146 | uSdHandle.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING; |
NirT | 1:e8fac4061a5b | 147 | uSdHandle.Init.ClockBypass = SDMMC_CLOCK_BYPASS_DISABLE; |
NirT | 1:e8fac4061a5b | 148 | uSdHandle.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE; |
NirT | 1:e8fac4061a5b | 149 | uSdHandle.Init.BusWide = SDMMC_BUS_WIDE_1B; |
NirT | 1:e8fac4061a5b | 150 | uSdHandle.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE; |
NirT | 1:e8fac4061a5b | 151 | uSdHandle.Init.ClockDiv = SDMMC_TRANSFER_CLK_DIV; |
NirT | 1:e8fac4061a5b | 152 | |
NirT | 1:e8fac4061a5b | 153 | /* Msp SD Detect pin initialization */ |
NirT | 1:e8fac4061a5b | 154 | BSP_SD_Detect_MspInit(&uSdHandle, NULL); |
NirT | 1:e8fac4061a5b | 155 | if(BSP_SD_IsDetected() != SD_PRESENT) /* Check if SD card is present */ |
NirT | 1:e8fac4061a5b | 156 | { |
NirT | 1:e8fac4061a5b | 157 | return MSD_ERROR_SD_NOT_PRESENT; |
NirT | 1:e8fac4061a5b | 158 | } |
NirT | 1:e8fac4061a5b | 159 | |
NirT | 1:e8fac4061a5b | 160 | /* Msp SD initialization */ |
NirT | 1:e8fac4061a5b | 161 | BSP_SD_MspInit(&uSdHandle, NULL); |
NirT | 1:e8fac4061a5b | 162 | |
NirT | 1:e8fac4061a5b | 163 | /* HAL SD initialization */ |
NirT | 1:e8fac4061a5b | 164 | if(HAL_SD_Init(&uSdHandle, &uSdCardInfo) != SD_OK) |
NirT | 1:e8fac4061a5b | 165 | { |
NirT | 1:e8fac4061a5b | 166 | sd_state = MSD_ERROR; |
NirT | 1:e8fac4061a5b | 167 | } |
NirT | 1:e8fac4061a5b | 168 | |
NirT | 1:e8fac4061a5b | 169 | /* Configure SD Bus width */ |
NirT | 1:e8fac4061a5b | 170 | if(sd_state == MSD_OK) |
NirT | 1:e8fac4061a5b | 171 | { |
NirT | 1:e8fac4061a5b | 172 | /* Enable wide operation */ |
NirT | 1:e8fac4061a5b | 173 | if(HAL_SD_WideBusOperation_Config(&uSdHandle, SDMMC_BUS_WIDE_4B) != SD_OK) |
NirT | 1:e8fac4061a5b | 174 | { |
NirT | 1:e8fac4061a5b | 175 | sd_state = MSD_ERROR; |
NirT | 1:e8fac4061a5b | 176 | } |
NirT | 1:e8fac4061a5b | 177 | else |
NirT | 1:e8fac4061a5b | 178 | { |
NirT | 1:e8fac4061a5b | 179 | sd_state = MSD_OK; |
NirT | 1:e8fac4061a5b | 180 | } |
NirT | 1:e8fac4061a5b | 181 | } |
NirT | 1:e8fac4061a5b | 182 | |
NirT | 1:e8fac4061a5b | 183 | return sd_state; |
NirT | 1:e8fac4061a5b | 184 | } |
NirT | 1:e8fac4061a5b | 185 | |
NirT | 1:e8fac4061a5b | 186 | /** |
NirT | 1:e8fac4061a5b | 187 | * @brief DeInitializes the SD card device. |
NirT | 1:e8fac4061a5b | 188 | * @retval SD status |
NirT | 1:e8fac4061a5b | 189 | */ |
NirT | 1:e8fac4061a5b | 190 | uint8_t BSP_SD_DeInit(void) |
NirT | 1:e8fac4061a5b | 191 | { |
NirT | 1:e8fac4061a5b | 192 | uint8_t sd_state = MSD_OK; |
NirT | 1:e8fac4061a5b | 193 | |
NirT | 1:e8fac4061a5b | 194 | uSdHandle.Instance = SDMMC1; |
NirT | 1:e8fac4061a5b | 195 | |
NirT | 1:e8fac4061a5b | 196 | /* HAL SD deinitialization */ |
NirT | 1:e8fac4061a5b | 197 | if(HAL_SD_DeInit(&uSdHandle) != HAL_OK) |
NirT | 1:e8fac4061a5b | 198 | { |
NirT | 1:e8fac4061a5b | 199 | sd_state = MSD_ERROR; |
NirT | 1:e8fac4061a5b | 200 | } |
NirT | 1:e8fac4061a5b | 201 | |
NirT | 1:e8fac4061a5b | 202 | /* Msp SD deinitialization */ |
NirT | 1:e8fac4061a5b | 203 | uSdHandle.Instance = SDMMC1; |
NirT | 1:e8fac4061a5b | 204 | BSP_SD_MspDeInit(&uSdHandle, NULL); |
NirT | 1:e8fac4061a5b | 205 | |
NirT | 1:e8fac4061a5b | 206 | return sd_state; |
NirT | 1:e8fac4061a5b | 207 | } |
NirT | 1:e8fac4061a5b | 208 | |
NirT | 1:e8fac4061a5b | 209 | /** |
NirT | 1:e8fac4061a5b | 210 | * @brief Configures Interrupt mode for SD detection pin. |
NirT | 1:e8fac4061a5b | 211 | * @retval Returns MSD_OK |
NirT | 1:e8fac4061a5b | 212 | */ |
NirT | 1:e8fac4061a5b | 213 | uint8_t BSP_SD_ITConfig(void) |
NirT | 1:e8fac4061a5b | 214 | { |
NirT | 1:e8fac4061a5b | 215 | GPIO_InitTypeDef gpio_init_structure; |
NirT | 1:e8fac4061a5b | 216 | |
NirT | 1:e8fac4061a5b | 217 | /* Configure Interrupt mode for SD detection pin */ |
NirT | 1:e8fac4061a5b | 218 | gpio_init_structure.Pin = SD_DETECT_PIN; |
NirT | 1:e8fac4061a5b | 219 | gpio_init_structure.Pull = GPIO_PULLUP; |
NirT | 1:e8fac4061a5b | 220 | gpio_init_structure.Speed = GPIO_SPEED_FAST; |
NirT | 1:e8fac4061a5b | 221 | gpio_init_structure.Mode = GPIO_MODE_IT_RISING_FALLING; |
NirT | 1:e8fac4061a5b | 222 | HAL_GPIO_Init(SD_DETECT_GPIO_PORT, &gpio_init_structure); |
NirT | 1:e8fac4061a5b | 223 | |
NirT | 1:e8fac4061a5b | 224 | /* Enable and set SD detect EXTI Interrupt to the lowest priority */ |
NirT | 1:e8fac4061a5b | 225 | HAL_NVIC_SetPriority((IRQn_Type)(SD_DETECT_EXTI_IRQn), 0x0F, 0x00); |
NirT | 1:e8fac4061a5b | 226 | HAL_NVIC_EnableIRQ((IRQn_Type)(SD_DETECT_EXTI_IRQn)); |
NirT | 1:e8fac4061a5b | 227 | |
NirT | 1:e8fac4061a5b | 228 | return MSD_OK; |
NirT | 1:e8fac4061a5b | 229 | } |
NirT | 1:e8fac4061a5b | 230 | |
NirT | 1:e8fac4061a5b | 231 | /** |
NirT | 1:e8fac4061a5b | 232 | * @brief Detects if SD card is correctly plugged in the memory slot or not. |
NirT | 1:e8fac4061a5b | 233 | * @retval Returns if SD is detected or not |
NirT | 1:e8fac4061a5b | 234 | */ |
NirT | 1:e8fac4061a5b | 235 | uint8_t BSP_SD_IsDetected(void) |
NirT | 1:e8fac4061a5b | 236 | { |
NirT | 1:e8fac4061a5b | 237 | __IO uint8_t status = SD_PRESENT; |
NirT | 1:e8fac4061a5b | 238 | |
NirT | 1:e8fac4061a5b | 239 | /* Check SD card detect pin */ |
NirT | 1:e8fac4061a5b | 240 | if (HAL_GPIO_ReadPin(SD_DETECT_GPIO_PORT, SD_DETECT_PIN) == GPIO_PIN_SET) |
NirT | 1:e8fac4061a5b | 241 | { |
NirT | 1:e8fac4061a5b | 242 | status = SD_NOT_PRESENT; |
NirT | 1:e8fac4061a5b | 243 | } |
NirT | 1:e8fac4061a5b | 244 | |
NirT | 1:e8fac4061a5b | 245 | return status; |
NirT | 1:e8fac4061a5b | 246 | } |
NirT | 1:e8fac4061a5b | 247 | |
NirT | 1:e8fac4061a5b | 248 | /** |
NirT | 1:e8fac4061a5b | 249 | * @brief Reads block(s) from a specified address in an SD card, in polling mode. |
NirT | 1:e8fac4061a5b | 250 | * @param pData: Pointer to the buffer that will contain the data to transmit |
NirT | 1:e8fac4061a5b | 251 | * @param ReadAddr: Address from where data is to be read |
NirT | 1:e8fac4061a5b | 252 | * @param BlockSize: SD card data block size, that should be 512 |
NirT | 1:e8fac4061a5b | 253 | * @param NumOfBlocks: Number of SD blocks to read |
NirT | 1:e8fac4061a5b | 254 | * @retval SD status |
NirT | 1:e8fac4061a5b | 255 | */ |
NirT | 1:e8fac4061a5b | 256 | uint8_t BSP_SD_ReadBlocks(uint32_t *pData, uint64_t ReadAddr, uint32_t BlockSize, uint32_t NumOfBlocks) |
NirT | 1:e8fac4061a5b | 257 | { |
NirT | 1:e8fac4061a5b | 258 | if(HAL_SD_ReadBlocks(&uSdHandle, pData, ReadAddr, BlockSize, NumOfBlocks) != SD_OK) |
NirT | 1:e8fac4061a5b | 259 | { |
NirT | 1:e8fac4061a5b | 260 | return MSD_ERROR; |
NirT | 1:e8fac4061a5b | 261 | } |
NirT | 1:e8fac4061a5b | 262 | else |
NirT | 1:e8fac4061a5b | 263 | { |
NirT | 1:e8fac4061a5b | 264 | return MSD_OK; |
NirT | 1:e8fac4061a5b | 265 | } |
NirT | 1:e8fac4061a5b | 266 | } |
NirT | 1:e8fac4061a5b | 267 | |
NirT | 1:e8fac4061a5b | 268 | /** |
NirT | 1:e8fac4061a5b | 269 | * @brief Writes block(s) to a specified address in an SD card, in polling mode. |
NirT | 1:e8fac4061a5b | 270 | * @param pData: Pointer to the buffer that will contain the data to transmit |
NirT | 1:e8fac4061a5b | 271 | * @param WriteAddr: Address from where data is to be written |
NirT | 1:e8fac4061a5b | 272 | * @param BlockSize: SD card data block size, that should be 512 |
NirT | 1:e8fac4061a5b | 273 | * @param NumOfBlocks: Number of SD blocks to write |
NirT | 1:e8fac4061a5b | 274 | * @retval SD status |
NirT | 1:e8fac4061a5b | 275 | */ |
NirT | 1:e8fac4061a5b | 276 | uint8_t BSP_SD_WriteBlocks(uint32_t *pData, uint64_t WriteAddr, uint32_t BlockSize, uint32_t NumOfBlocks) |
NirT | 1:e8fac4061a5b | 277 | { |
NirT | 1:e8fac4061a5b | 278 | if(HAL_SD_WriteBlocks(&uSdHandle, pData, WriteAddr, BlockSize, NumOfBlocks) != SD_OK) |
NirT | 1:e8fac4061a5b | 279 | { |
NirT | 1:e8fac4061a5b | 280 | return MSD_ERROR; |
NirT | 1:e8fac4061a5b | 281 | } |
NirT | 1:e8fac4061a5b | 282 | else |
NirT | 1:e8fac4061a5b | 283 | { |
NirT | 1:e8fac4061a5b | 284 | return MSD_OK; |
NirT | 1:e8fac4061a5b | 285 | } |
NirT | 1:e8fac4061a5b | 286 | } |
NirT | 1:e8fac4061a5b | 287 | |
NirT | 1:e8fac4061a5b | 288 | /** |
NirT | 1:e8fac4061a5b | 289 | * @brief Reads block(s) from a specified address in an SD card, in DMA mode. |
NirT | 1:e8fac4061a5b | 290 | * @param pData: Pointer to the buffer that will contain the data to transmit |
NirT | 1:e8fac4061a5b | 291 | * @param ReadAddr: Address from where data is to be read |
NirT | 1:e8fac4061a5b | 292 | * @param BlockSize: SD card data block size, that should be 512 |
NirT | 1:e8fac4061a5b | 293 | * @param NumOfBlocks: Number of SD blocks to read |
NirT | 1:e8fac4061a5b | 294 | * @retval SD status |
NirT | 1:e8fac4061a5b | 295 | */ |
NirT | 1:e8fac4061a5b | 296 | uint8_t BSP_SD_ReadBlocks_DMA(uint32_t *pData, uint64_t ReadAddr, uint32_t BlockSize, uint32_t NumOfBlocks) |
NirT | 1:e8fac4061a5b | 297 | { |
NirT | 1:e8fac4061a5b | 298 | uint8_t sd_state = MSD_OK; |
NirT | 1:e8fac4061a5b | 299 | |
NirT | 1:e8fac4061a5b | 300 | /* Read block(s) in DMA transfer mode */ |
NirT | 1:e8fac4061a5b | 301 | if(HAL_SD_ReadBlocks_DMA(&uSdHandle, pData, ReadAddr, BlockSize, NumOfBlocks) != SD_OK) |
NirT | 1:e8fac4061a5b | 302 | { |
NirT | 1:e8fac4061a5b | 303 | sd_state = MSD_ERROR; |
NirT | 1:e8fac4061a5b | 304 | } |
NirT | 1:e8fac4061a5b | 305 | |
NirT | 1:e8fac4061a5b | 306 | /* Wait until transfer is complete */ |
NirT | 1:e8fac4061a5b | 307 | if(sd_state == MSD_OK) |
NirT | 1:e8fac4061a5b | 308 | { |
NirT | 1:e8fac4061a5b | 309 | if(HAL_SD_CheckReadOperation(&uSdHandle, (uint32_t)SD_DATATIMEOUT) != SD_OK) |
NirT | 1:e8fac4061a5b | 310 | { |
NirT | 1:e8fac4061a5b | 311 | sd_state = MSD_ERROR; |
NirT | 1:e8fac4061a5b | 312 | } |
NirT | 1:e8fac4061a5b | 313 | else |
NirT | 1:e8fac4061a5b | 314 | { |
NirT | 1:e8fac4061a5b | 315 | sd_state = MSD_OK; |
NirT | 1:e8fac4061a5b | 316 | } |
NirT | 1:e8fac4061a5b | 317 | } |
NirT | 1:e8fac4061a5b | 318 | |
NirT | 1:e8fac4061a5b | 319 | return sd_state; |
NirT | 1:e8fac4061a5b | 320 | } |
NirT | 1:e8fac4061a5b | 321 | |
NirT | 1:e8fac4061a5b | 322 | /** |
NirT | 1:e8fac4061a5b | 323 | * @brief Writes block(s) to a specified address in an SD card, in DMA mode. |
NirT | 1:e8fac4061a5b | 324 | * @param pData: Pointer to the buffer that will contain the data to transmit |
NirT | 1:e8fac4061a5b | 325 | * @param WriteAddr: Address from where data is to be written |
NirT | 1:e8fac4061a5b | 326 | * @param BlockSize: SD card data block size, that should be 512 |
NirT | 1:e8fac4061a5b | 327 | * @param NumOfBlocks: Number of SD blocks to write |
NirT | 1:e8fac4061a5b | 328 | * @retval SD status |
NirT | 1:e8fac4061a5b | 329 | */ |
NirT | 1:e8fac4061a5b | 330 | uint8_t BSP_SD_WriteBlocks_DMA(uint32_t *pData, uint64_t WriteAddr, uint32_t BlockSize, uint32_t NumOfBlocks) |
NirT | 1:e8fac4061a5b | 331 | { |
NirT | 1:e8fac4061a5b | 332 | uint8_t sd_state = MSD_OK; |
NirT | 1:e8fac4061a5b | 333 | |
NirT | 1:e8fac4061a5b | 334 | /* Write block(s) in DMA transfer mode */ |
NirT | 1:e8fac4061a5b | 335 | if(HAL_SD_WriteBlocks_DMA(&uSdHandle, pData, WriteAddr, BlockSize, NumOfBlocks) != SD_OK) |
NirT | 1:e8fac4061a5b | 336 | { |
NirT | 1:e8fac4061a5b | 337 | sd_state = MSD_ERROR; |
NirT | 1:e8fac4061a5b | 338 | } |
NirT | 1:e8fac4061a5b | 339 | |
NirT | 1:e8fac4061a5b | 340 | /* Wait until transfer is complete */ |
NirT | 1:e8fac4061a5b | 341 | if(sd_state == MSD_OK) |
NirT | 1:e8fac4061a5b | 342 | { |
NirT | 1:e8fac4061a5b | 343 | if(HAL_SD_CheckWriteOperation(&uSdHandle, (uint32_t)SD_DATATIMEOUT) != SD_OK) |
NirT | 1:e8fac4061a5b | 344 | { |
NirT | 1:e8fac4061a5b | 345 | sd_state = MSD_ERROR; |
NirT | 1:e8fac4061a5b | 346 | } |
NirT | 1:e8fac4061a5b | 347 | else |
NirT | 1:e8fac4061a5b | 348 | { |
NirT | 1:e8fac4061a5b | 349 | sd_state = MSD_OK; |
NirT | 1:e8fac4061a5b | 350 | } |
NirT | 1:e8fac4061a5b | 351 | } |
NirT | 1:e8fac4061a5b | 352 | |
NirT | 1:e8fac4061a5b | 353 | return sd_state; |
NirT | 1:e8fac4061a5b | 354 | } |
NirT | 1:e8fac4061a5b | 355 | |
NirT | 1:e8fac4061a5b | 356 | /** |
NirT | 1:e8fac4061a5b | 357 | * @brief Erases the specified memory area of the given SD card. |
NirT | 1:e8fac4061a5b | 358 | * @param StartAddr: Start byte address |
NirT | 1:e8fac4061a5b | 359 | * @param EndAddr: End byte address |
NirT | 1:e8fac4061a5b | 360 | * @retval SD status |
NirT | 1:e8fac4061a5b | 361 | */ |
NirT | 1:e8fac4061a5b | 362 | uint8_t BSP_SD_Erase(uint64_t StartAddr, uint64_t EndAddr) |
NirT | 1:e8fac4061a5b | 363 | { |
NirT | 1:e8fac4061a5b | 364 | if(HAL_SD_Erase(&uSdHandle, StartAddr, EndAddr) != SD_OK) |
NirT | 1:e8fac4061a5b | 365 | { |
NirT | 1:e8fac4061a5b | 366 | return MSD_ERROR; |
NirT | 1:e8fac4061a5b | 367 | } |
NirT | 1:e8fac4061a5b | 368 | else |
NirT | 1:e8fac4061a5b | 369 | { |
NirT | 1:e8fac4061a5b | 370 | return MSD_OK; |
NirT | 1:e8fac4061a5b | 371 | } |
NirT | 1:e8fac4061a5b | 372 | } |
NirT | 1:e8fac4061a5b | 373 | |
NirT | 1:e8fac4061a5b | 374 | /** |
NirT | 1:e8fac4061a5b | 375 | * @brief Initializes the SD MSP. |
NirT | 1:e8fac4061a5b | 376 | * @param hsd: SD handle |
NirT | 1:e8fac4061a5b | 377 | * @param Params |
NirT | 1:e8fac4061a5b | 378 | * @retval None |
NirT | 1:e8fac4061a5b | 379 | */ |
NirT | 1:e8fac4061a5b | 380 | __weak void BSP_SD_MspInit(SD_HandleTypeDef *hsd, void *Params) |
NirT | 1:e8fac4061a5b | 381 | { |
NirT | 1:e8fac4061a5b | 382 | static DMA_HandleTypeDef dma_rx_handle; |
NirT | 1:e8fac4061a5b | 383 | static DMA_HandleTypeDef dma_tx_handle; |
NirT | 1:e8fac4061a5b | 384 | GPIO_InitTypeDef gpio_init_structure; |
NirT | 1:e8fac4061a5b | 385 | |
NirT | 1:e8fac4061a5b | 386 | /* Enable SDIO clock */ |
NirT | 1:e8fac4061a5b | 387 | __HAL_RCC_SDMMC1_CLK_ENABLE(); |
NirT | 1:e8fac4061a5b | 388 | |
NirT | 1:e8fac4061a5b | 389 | /* Enable DMA2 clocks */ |
NirT | 1:e8fac4061a5b | 390 | __DMAx_TxRx_CLK_ENABLE(); |
NirT | 1:e8fac4061a5b | 391 | |
NirT | 1:e8fac4061a5b | 392 | /* Enable GPIOs clock */ |
NirT | 1:e8fac4061a5b | 393 | __HAL_RCC_GPIOC_CLK_ENABLE(); |
NirT | 1:e8fac4061a5b | 394 | __HAL_RCC_GPIOD_CLK_ENABLE(); |
NirT | 1:e8fac4061a5b | 395 | |
NirT | 1:e8fac4061a5b | 396 | /* Common GPIO configuration */ |
NirT | 1:e8fac4061a5b | 397 | gpio_init_structure.Mode = GPIO_MODE_AF_PP; |
NirT | 1:e8fac4061a5b | 398 | gpio_init_structure.Pull = GPIO_PULLUP; |
NirT | 1:e8fac4061a5b | 399 | gpio_init_structure.Speed = GPIO_SPEED_HIGH; |
NirT | 1:e8fac4061a5b | 400 | gpio_init_structure.Alternate = GPIO_AF12_SDMMC1; |
NirT | 1:e8fac4061a5b | 401 | |
NirT | 1:e8fac4061a5b | 402 | /* GPIOC configuration */ |
NirT | 1:e8fac4061a5b | 403 | gpio_init_structure.Pin = GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12; |
NirT | 1:e8fac4061a5b | 404 | HAL_GPIO_Init(GPIOC, &gpio_init_structure); |
NirT | 1:e8fac4061a5b | 405 | |
NirT | 1:e8fac4061a5b | 406 | /* GPIOD configuration */ |
NirT | 1:e8fac4061a5b | 407 | gpio_init_structure.Pin = GPIO_PIN_2; |
NirT | 1:e8fac4061a5b | 408 | HAL_GPIO_Init(GPIOD, &gpio_init_structure); |
NirT | 1:e8fac4061a5b | 409 | |
NirT | 1:e8fac4061a5b | 410 | /* NVIC configuration for SDIO interrupts */ |
NirT | 1:e8fac4061a5b | 411 | HAL_NVIC_SetPriority(SDMMC1_IRQn, 5, 0); |
NirT | 1:e8fac4061a5b | 412 | HAL_NVIC_EnableIRQ(SDMMC1_IRQn); |
NirT | 1:e8fac4061a5b | 413 | |
NirT | 1:e8fac4061a5b | 414 | /* Configure DMA Rx parameters */ |
NirT | 1:e8fac4061a5b | 415 | dma_rx_handle.Init.Channel = SD_DMAx_Rx_CHANNEL; |
NirT | 1:e8fac4061a5b | 416 | dma_rx_handle.Init.Direction = DMA_PERIPH_TO_MEMORY; |
NirT | 1:e8fac4061a5b | 417 | dma_rx_handle.Init.PeriphInc = DMA_PINC_DISABLE; |
NirT | 1:e8fac4061a5b | 418 | dma_rx_handle.Init.MemInc = DMA_MINC_ENABLE; |
NirT | 1:e8fac4061a5b | 419 | dma_rx_handle.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; |
NirT | 1:e8fac4061a5b | 420 | dma_rx_handle.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; |
NirT | 1:e8fac4061a5b | 421 | dma_rx_handle.Init.Mode = DMA_PFCTRL; |
NirT | 1:e8fac4061a5b | 422 | dma_rx_handle.Init.Priority = DMA_PRIORITY_VERY_HIGH; |
NirT | 1:e8fac4061a5b | 423 | dma_rx_handle.Init.FIFOMode = DMA_FIFOMODE_ENABLE; |
NirT | 1:e8fac4061a5b | 424 | dma_rx_handle.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; |
NirT | 1:e8fac4061a5b | 425 | dma_rx_handle.Init.MemBurst = DMA_MBURST_INC4; |
NirT | 1:e8fac4061a5b | 426 | dma_rx_handle.Init.PeriphBurst = DMA_PBURST_INC4; |
NirT | 1:e8fac4061a5b | 427 | |
NirT | 1:e8fac4061a5b | 428 | dma_rx_handle.Instance = SD_DMAx_Rx_STREAM; |
NirT | 1:e8fac4061a5b | 429 | |
NirT | 1:e8fac4061a5b | 430 | /* Associate the DMA handle */ |
NirT | 1:e8fac4061a5b | 431 | __HAL_LINKDMA(hsd, hdmarx, dma_rx_handle); |
NirT | 1:e8fac4061a5b | 432 | |
NirT | 1:e8fac4061a5b | 433 | /* Deinitialize the stream for new transfer */ |
NirT | 1:e8fac4061a5b | 434 | HAL_DMA_DeInit(&dma_rx_handle); |
NirT | 1:e8fac4061a5b | 435 | |
NirT | 1:e8fac4061a5b | 436 | /* Configure the DMA stream */ |
NirT | 1:e8fac4061a5b | 437 | HAL_DMA_Init(&dma_rx_handle); |
NirT | 1:e8fac4061a5b | 438 | |
NirT | 1:e8fac4061a5b | 439 | /* Configure DMA Tx parameters */ |
NirT | 1:e8fac4061a5b | 440 | dma_tx_handle.Init.Channel = SD_DMAx_Tx_CHANNEL; |
NirT | 1:e8fac4061a5b | 441 | dma_tx_handle.Init.Direction = DMA_MEMORY_TO_PERIPH; |
NirT | 1:e8fac4061a5b | 442 | dma_tx_handle.Init.PeriphInc = DMA_PINC_DISABLE; |
NirT | 1:e8fac4061a5b | 443 | dma_tx_handle.Init.MemInc = DMA_MINC_ENABLE; |
NirT | 1:e8fac4061a5b | 444 | dma_tx_handle.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; |
NirT | 1:e8fac4061a5b | 445 | dma_tx_handle.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; |
NirT | 1:e8fac4061a5b | 446 | dma_tx_handle.Init.Mode = DMA_PFCTRL; |
NirT | 1:e8fac4061a5b | 447 | dma_tx_handle.Init.Priority = DMA_PRIORITY_VERY_HIGH; |
NirT | 1:e8fac4061a5b | 448 | dma_tx_handle.Init.FIFOMode = DMA_FIFOMODE_ENABLE; |
NirT | 1:e8fac4061a5b | 449 | dma_tx_handle.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; |
NirT | 1:e8fac4061a5b | 450 | dma_tx_handle.Init.MemBurst = DMA_MBURST_INC4; |
NirT | 1:e8fac4061a5b | 451 | dma_tx_handle.Init.PeriphBurst = DMA_PBURST_INC4; |
NirT | 1:e8fac4061a5b | 452 | |
NirT | 1:e8fac4061a5b | 453 | dma_tx_handle.Instance = SD_DMAx_Tx_STREAM; |
NirT | 1:e8fac4061a5b | 454 | |
NirT | 1:e8fac4061a5b | 455 | /* Associate the DMA handle */ |
NirT | 1:e8fac4061a5b | 456 | __HAL_LINKDMA(hsd, hdmatx, dma_tx_handle); |
NirT | 1:e8fac4061a5b | 457 | |
NirT | 1:e8fac4061a5b | 458 | /* Deinitialize the stream for new transfer */ |
NirT | 1:e8fac4061a5b | 459 | HAL_DMA_DeInit(&dma_tx_handle); |
NirT | 1:e8fac4061a5b | 460 | |
NirT | 1:e8fac4061a5b | 461 | /* Configure the DMA stream */ |
NirT | 1:e8fac4061a5b | 462 | HAL_DMA_Init(&dma_tx_handle); |
NirT | 1:e8fac4061a5b | 463 | |
NirT | 1:e8fac4061a5b | 464 | /* NVIC configuration for DMA transfer complete interrupt */ |
NirT | 1:e8fac4061a5b | 465 | HAL_NVIC_SetPriority(SD_DMAx_Rx_IRQn, 6, 0); |
NirT | 1:e8fac4061a5b | 466 | HAL_NVIC_EnableIRQ(SD_DMAx_Rx_IRQn); |
NirT | 1:e8fac4061a5b | 467 | |
NirT | 1:e8fac4061a5b | 468 | /* NVIC configuration for DMA transfer complete interrupt */ |
NirT | 1:e8fac4061a5b | 469 | HAL_NVIC_SetPriority(SD_DMAx_Tx_IRQn, 6, 0); |
NirT | 1:e8fac4061a5b | 470 | HAL_NVIC_EnableIRQ(SD_DMAx_Tx_IRQn); |
NirT | 1:e8fac4061a5b | 471 | } |
NirT | 1:e8fac4061a5b | 472 | |
NirT | 1:e8fac4061a5b | 473 | /** |
NirT | 1:e8fac4061a5b | 474 | * @brief Initializes the SD Detect pin MSP. |
NirT | 1:e8fac4061a5b | 475 | * @param hsd: SD handle |
NirT | 1:e8fac4061a5b | 476 | * @param Params |
NirT | 1:e8fac4061a5b | 477 | * @retval None |
NirT | 1:e8fac4061a5b | 478 | */ |
NirT | 1:e8fac4061a5b | 479 | __weak void BSP_SD_Detect_MspInit(SD_HandleTypeDef *hsd, void *Params) |
NirT | 1:e8fac4061a5b | 480 | { |
NirT | 1:e8fac4061a5b | 481 | GPIO_InitTypeDef gpio_init_structure; |
NirT | 1:e8fac4061a5b | 482 | |
NirT | 1:e8fac4061a5b | 483 | SD_DETECT_GPIO_CLK_ENABLE(); |
NirT | 1:e8fac4061a5b | 484 | |
NirT | 1:e8fac4061a5b | 485 | /* GPIO configuration in input for uSD_Detect signal */ |
NirT | 1:e8fac4061a5b | 486 | gpio_init_structure.Pin = SD_DETECT_PIN; |
NirT | 1:e8fac4061a5b | 487 | gpio_init_structure.Mode = GPIO_MODE_INPUT; |
NirT | 1:e8fac4061a5b | 488 | gpio_init_structure.Pull = GPIO_PULLUP; |
NirT | 1:e8fac4061a5b | 489 | gpio_init_structure.Speed = GPIO_SPEED_HIGH; |
NirT | 1:e8fac4061a5b | 490 | HAL_GPIO_Init(SD_DETECT_GPIO_PORT, &gpio_init_structure); |
NirT | 1:e8fac4061a5b | 491 | } |
NirT | 1:e8fac4061a5b | 492 | |
NirT | 1:e8fac4061a5b | 493 | /** |
NirT | 1:e8fac4061a5b | 494 | * @brief DeInitializes the SD MSP. |
NirT | 1:e8fac4061a5b | 495 | * @param hsd: SD handle |
NirT | 1:e8fac4061a5b | 496 | * @param Params |
NirT | 1:e8fac4061a5b | 497 | * @retval None |
NirT | 1:e8fac4061a5b | 498 | */ |
NirT | 1:e8fac4061a5b | 499 | __weak void BSP_SD_MspDeInit(SD_HandleTypeDef *hsd, void *Params) |
NirT | 1:e8fac4061a5b | 500 | { |
NirT | 1:e8fac4061a5b | 501 | static DMA_HandleTypeDef dma_rx_handle; |
NirT | 1:e8fac4061a5b | 502 | static DMA_HandleTypeDef dma_tx_handle; |
NirT | 1:e8fac4061a5b | 503 | |
NirT | 1:e8fac4061a5b | 504 | /* Disable NVIC for DMA transfer complete interrupts */ |
NirT | 1:e8fac4061a5b | 505 | HAL_NVIC_DisableIRQ(SD_DMAx_Rx_IRQn); |
NirT | 1:e8fac4061a5b | 506 | HAL_NVIC_DisableIRQ(SD_DMAx_Tx_IRQn); |
NirT | 1:e8fac4061a5b | 507 | |
NirT | 1:e8fac4061a5b | 508 | /* Deinitialize the stream for new transfer */ |
NirT | 1:e8fac4061a5b | 509 | dma_rx_handle.Instance = SD_DMAx_Rx_STREAM; |
NirT | 1:e8fac4061a5b | 510 | HAL_DMA_DeInit(&dma_rx_handle); |
NirT | 1:e8fac4061a5b | 511 | |
NirT | 1:e8fac4061a5b | 512 | /* Deinitialize the stream for new transfer */ |
NirT | 1:e8fac4061a5b | 513 | dma_tx_handle.Instance = SD_DMAx_Tx_STREAM; |
NirT | 1:e8fac4061a5b | 514 | HAL_DMA_DeInit(&dma_tx_handle); |
NirT | 1:e8fac4061a5b | 515 | |
NirT | 1:e8fac4061a5b | 516 | /* Disable NVIC for SDIO interrupts */ |
NirT | 1:e8fac4061a5b | 517 | HAL_NVIC_DisableIRQ(SDMMC1_IRQn); |
NirT | 1:e8fac4061a5b | 518 | |
NirT | 1:e8fac4061a5b | 519 | /* DeInit GPIO pins can be done in the application |
NirT | 1:e8fac4061a5b | 520 | (by surcharging this __weak function) */ |
NirT | 1:e8fac4061a5b | 521 | |
NirT | 1:e8fac4061a5b | 522 | /* Disable SDMMC1 clock */ |
NirT | 1:e8fac4061a5b | 523 | __HAL_RCC_SDMMC1_CLK_DISABLE(); |
NirT | 1:e8fac4061a5b | 524 | |
NirT | 1:e8fac4061a5b | 525 | /* GPIO pins clock and DMA clocks can be shut down in the application |
NirT | 1:e8fac4061a5b | 526 | by surcharging this __weak function */ |
NirT | 1:e8fac4061a5b | 527 | } |
NirT | 1:e8fac4061a5b | 528 | |
NirT | 1:e8fac4061a5b | 529 | /** |
NirT | 1:e8fac4061a5b | 530 | * @brief Handles SD card interrupt request. |
NirT | 1:e8fac4061a5b | 531 | * @retval None |
NirT | 1:e8fac4061a5b | 532 | */ |
NirT | 1:e8fac4061a5b | 533 | void BSP_SD_IRQHandler(void) |
NirT | 1:e8fac4061a5b | 534 | { |
NirT | 1:e8fac4061a5b | 535 | HAL_SD_IRQHandler(&uSdHandle); |
NirT | 1:e8fac4061a5b | 536 | } |
NirT | 1:e8fac4061a5b | 537 | |
NirT | 1:e8fac4061a5b | 538 | /** |
NirT | 1:e8fac4061a5b | 539 | * @brief Handles SD DMA Tx transfer interrupt request. |
NirT | 1:e8fac4061a5b | 540 | * @retval None |
NirT | 1:e8fac4061a5b | 541 | */ |
NirT | 1:e8fac4061a5b | 542 | void BSP_SD_DMA_Tx_IRQHandler(void) |
NirT | 1:e8fac4061a5b | 543 | { |
NirT | 1:e8fac4061a5b | 544 | HAL_DMA_IRQHandler(uSdHandle.hdmatx); |
NirT | 1:e8fac4061a5b | 545 | } |
NirT | 1:e8fac4061a5b | 546 | |
NirT | 1:e8fac4061a5b | 547 | /** |
NirT | 1:e8fac4061a5b | 548 | * @brief Handles SD DMA Rx transfer interrupt request. |
NirT | 1:e8fac4061a5b | 549 | * @retval None |
NirT | 1:e8fac4061a5b | 550 | */ |
NirT | 1:e8fac4061a5b | 551 | void BSP_SD_DMA_Rx_IRQHandler(void) |
NirT | 1:e8fac4061a5b | 552 | { |
NirT | 1:e8fac4061a5b | 553 | HAL_DMA_IRQHandler(uSdHandle.hdmarx); |
NirT | 1:e8fac4061a5b | 554 | } |
NirT | 1:e8fac4061a5b | 555 | |
NirT | 1:e8fac4061a5b | 556 | /** |
NirT | 1:e8fac4061a5b | 557 | * @brief Gets the current SD card data status. |
NirT | 1:e8fac4061a5b | 558 | * @retval Data transfer state. |
NirT | 1:e8fac4061a5b | 559 | * This value can be one of the following values: |
NirT | 1:e8fac4061a5b | 560 | * @arg SD_TRANSFER_OK: No data transfer is acting |
NirT | 1:e8fac4061a5b | 561 | * @arg SD_TRANSFER_BUSY: Data transfer is acting |
NirT | 1:e8fac4061a5b | 562 | * @arg SD_TRANSFER_ERROR: Data transfer error |
NirT | 1:e8fac4061a5b | 563 | */ |
NirT | 1:e8fac4061a5b | 564 | HAL_SD_TransferStateTypedef BSP_SD_GetStatus(void) |
NirT | 1:e8fac4061a5b | 565 | { |
NirT | 1:e8fac4061a5b | 566 | return(HAL_SD_GetStatus(&uSdHandle)); |
NirT | 1:e8fac4061a5b | 567 | } |
NirT | 1:e8fac4061a5b | 568 | |
NirT | 1:e8fac4061a5b | 569 | /** |
NirT | 1:e8fac4061a5b | 570 | * @brief Get SD information about specific SD card. |
NirT | 1:e8fac4061a5b | 571 | * @param CardInfo: Pointer to HAL_SD_CardInfoTypedef structure |
NirT | 1:e8fac4061a5b | 572 | * @retval None |
NirT | 1:e8fac4061a5b | 573 | */ |
NirT | 1:e8fac4061a5b | 574 | void BSP_SD_GetCardInfo(HAL_SD_CardInfoTypedef *CardInfo) |
NirT | 1:e8fac4061a5b | 575 | { |
NirT | 1:e8fac4061a5b | 576 | /* Get SD card Information */ |
NirT | 1:e8fac4061a5b | 577 | HAL_SD_Get_CardInfo(&uSdHandle, CardInfo); |
NirT | 1:e8fac4061a5b | 578 | } |
NirT | 1:e8fac4061a5b | 579 | |
NirT | 1:e8fac4061a5b | 580 | /** |
NirT | 1:e8fac4061a5b | 581 | * @} |
NirT | 1:e8fac4061a5b | 582 | */ |
NirT | 1:e8fac4061a5b | 583 | |
NirT | 1:e8fac4061a5b | 584 | /** |
NirT | 1:e8fac4061a5b | 585 | * @} |
NirT | 1:e8fac4061a5b | 586 | */ |
NirT | 1:e8fac4061a5b | 587 | |
NirT | 1:e8fac4061a5b | 588 | /** |
NirT | 1:e8fac4061a5b | 589 | * @} |
NirT | 1:e8fac4061a5b | 590 | */ |
NirT | 1:e8fac4061a5b | 591 | |
NirT | 1:e8fac4061a5b | 592 | /** |
NirT | 1:e8fac4061a5b | 593 | * @} |
NirT | 1:e8fac4061a5b | 594 | */ |
NirT | 1:e8fac4061a5b | 595 | |
NirT | 1:e8fac4061a5b | 596 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
NirT | 1:e8fac4061a5b | 597 |