New Version with OS5

Committer:
tgrosch
Date:
Sun Oct 25 01:51:13 2020 +0000
Revision:
1:8567a29d4699
Parent:
0:62b846b3988a
Child:
3:0eb6a9927171
Transfer to MBED Studio

Who changed what in which revision?

UserRevisionLine numberNew contents of line
tgrosch 0:62b846b3988a 1 /*
tgrosch 0:62b846b3988a 2 * i2cHandler.cpp
tgrosch 0:62b846b3988a 3 *
tgrosch 0:62b846b3988a 4 * Created on: Nov 19, 2017
tgrosch 0:62b846b3988a 5 * Author: a0875461
tgrosch 0:62b846b3988a 6 */
tgrosch 0:62b846b3988a 7
tgrosch 0:62b846b3988a 8 #include "i2cHandler.h"
tgrosch 0:62b846b3988a 9 //#include "../definitions.h"
tgrosch 0:62b846b3988a 10
tgrosch 0:62b846b3988a 11 #include "hostController.h"
tgrosch 0:62b846b3988a 12 #define OPT3101_I2C_SLAVEADDRESS 0x50 // TODO fix this slave address
tgrosch 0:62b846b3988a 13 I2C::i2cHandler::i2cHandler(void){
tgrosch 0:62b846b3988a 14 //#ifdef TIMSP430F5529_LAUNCHPAD_CALIBRATION_TOOL
tgrosch 0:62b846b3988a 15 this->slaveAddress=OPT3101_I2C_SLAVEADDRESS;
tgrosch 0:62b846b3988a 16 //#endif
tgrosch 0:62b846b3988a 17 this->regBankSize=3;
tgrosch 0:62b846b3988a 18 this->timeOut=0xFF;
tgrosch 0:62b846b3988a 19 this->dataRx= new uint8_t[this->regBankSize+1];
tgrosch 0:62b846b3988a 20 this->continousReadByteCount=3*3-1;
tgrosch 0:62b846b3988a 21 this->continousReadRegisterAddress=0x08;
tgrosch 0:62b846b3988a 22 }
tgrosch 0:62b846b3988a 23
tgrosch 0:62b846b3988a 24 I2C::i2cHandler::~i2cHandler(void){
tgrosch 0:62b846b3988a 25 delete [] this->dataRx;
tgrosch 0:62b846b3988a 26 this->dataRx=NULL;
tgrosch 0:62b846b3988a 27 }
tgrosch 0:62b846b3988a 28
tgrosch 0:62b846b3988a 29 void I2C::i2cHandler::init(void){
tgrosch 1:8567a29d4699 30 //TODO do platform initialization here
tgrosch 0:62b846b3988a 31 // no reason to initalize mbed I2C
tgrosch 0:62b846b3988a 32 // this->i2cParam.selectClockSource = USCI_B_I2C_CLOCKSOURCE_SMCLK; // Clecting the SMCLK For the I2C Clocks.
tgrosch 0:62b846b3988a 33 // this->i2cParam.i2cClk = UCS_getSMCLK();
tgrosch 0:62b846b3988a 34 // this->i2cParam.dataRate = USCI_B_I2C_SET_DATA_RATE_400KBPS; // Setting to 400KBPS
tgrosch 0:62b846b3988a 35 // USCI_B_I2C_initMaster(USCI_B1_BASE, &this->i2cParam);
tgrosch 0:62b846b3988a 36
tgrosch 0:62b846b3988a 37 //Specify slave address
tgrosch 0:62b846b3988a 38 // USCI_B_I2C_setSlaveAddress(USCI_B1_BASE,this->slaveAddress);
tgrosch 0:62b846b3988a 39 // this->slaveAddress_=this->slaveAddress;
tgrosch 0:62b846b3988a 40
tgrosch 0:62b846b3988a 41 //Set Transmit mode
tgrosch 0:62b846b3988a 42 //USCI_B_I2C_setMode(USCI_B1_BASE,USCI_B_I2C_TRANSMIT_MODE); // Setting device as I2C Master device.
tgrosch 0:62b846b3988a 43
tgrosch 0:62b846b3988a 44 //Enable I2C Module to start operations
tgrosch 0:62b846b3988a 45 // USCI_B_I2C_enable(USCI_B1_BASE); // Enabling the I2C Module
tgrosch 0:62b846b3988a 46
tgrosch 0:62b846b3988a 47 }
tgrosch 0:62b846b3988a 48
tgrosch 0:62b846b3988a 49 void I2C::i2cHandler::updateSlaveAddress(){
tgrosch 0:62b846b3988a 50 if(this->slaveAddress_!=this->slaveAddress){
tgrosch 0:62b846b3988a 51 this->slaveAddress_=this->slaveAddress;
tgrosch 0:62b846b3988a 52 // USCI_B_I2C_setSlaveAddress(USCI_B1_BASE,this->slaveAddress);
tgrosch 0:62b846b3988a 53 }
tgrosch 0:62b846b3988a 54 }
tgrosch 0:62b846b3988a 55
tgrosch 0:62b846b3988a 56 bool I2C::i2cHandler::write(){
tgrosch 0:62b846b3988a 57 static uint32_t cnt;
tgrosch 0:62b846b3988a 58 static uint8_t c;
tgrosch 0:62b846b3988a 59 static bool state;
tgrosch 0:62b846b3988a 60
tgrosch 0:62b846b3988a 61 this->updateSlaveAddress();
tgrosch 0:62b846b3988a 62 state=true;
tgrosch 1:8567a29d4699 63 //TODO this is the I2C write
tgrosch 0:62b846b3988a 64 // USCI_B_I2C_setMode(USCI_B1_BASE,USCI_B_I2C_TRANSMIT_MODE);
tgrosch 0:62b846b3988a 65
tgrosch 0:62b846b3988a 66 // cnt=this->timeOut;
tgrosch 0:62b846b3988a 67 // while((USCI_B_I2C_isBusBusy(USCI_B1_BASE)) & cnt--);
tgrosch 0:62b846b3988a 68 // if(!cnt)
tgrosch 0:62b846b3988a 69 // return false;
tgrosch 0:62b846b3988a 70 // state&=USCI_B_I2C_masterSendMultiByteStartWithTimeout(USCI_B1_BASE,this->address,this->timeOut); // Function returns 1 for success
tgrosch 0:62b846b3988a 71 if(!state)
tgrosch 0:62b846b3988a 72 return false;
tgrosch 0:62b846b3988a 73
tgrosch 0:62b846b3988a 74 // while (USCI_B_I2C_masterIsStartSent(USCI_B1_BASE));
tgrosch 0:62b846b3988a 75 // for(c=0;c<this->regBankSize;c++)
tgrosch 0:62b846b3988a 76 // state&=USCI_B_I2C_masterSendMultiByteNextWithTimeout(USCI_B1_BASE,this->dataTx[c],this->timeOut);
tgrosch 0:62b846b3988a 77 // state&=USCI_B_I2C_masterSendMultiByteStopWithTimeout(USCI_B1_BASE,this->timeOut); // Function returns 1 for success
tgrosch 0:62b846b3988a 78 // while (USCI_B_I2C_masterIsStopSent(USCI_B1_BASE));
tgrosch 0:62b846b3988a 79 // USCI_B_I2C_setMode(USCI_B1_BASE,USCI_B_I2C_TRANSMIT_MODE);
tgrosch 1:8567a29d4699 80 return state;
tgrosch 0:62b846b3988a 81 }
tgrosch 0:62b846b3988a 82
tgrosch 0:62b846b3988a 83
tgrosch 0:62b846b3988a 84 bool I2C::i2cHandler::write(uint8_t address,uint8_t *data){
tgrosch 0:62b846b3988a 85 this->address=address;
tgrosch 0:62b846b3988a 86 this->dataTx=data;
tgrosch 0:62b846b3988a 87 return this->write();
tgrosch 0:62b846b3988a 88 }
tgrosch 0:62b846b3988a 89 /* This is overloaded function of i2C Write. This makes the register interface simple */
tgrosch 0:62b846b3988a 90 bool I2C::i2cHandler::write(uint8_t address,uint32_t data){
tgrosch 0:62b846b3988a 91 this->address=address;
tgrosch 0:62b846b3988a 92 this->dataTx=(uint8_t*) &data;
tgrosch 0:62b846b3988a 93 return this->write();
tgrosch 0:62b846b3988a 94 }
tgrosch 0:62b846b3988a 95 /* This is overloaded function of i2C Write. This makes the register interface simple */
tgrosch 0:62b846b3988a 96 bool I2C::i2cHandler::write(uint8_t *data){
tgrosch 0:62b846b3988a 97 this->address=data[0];
tgrosch 0:62b846b3988a 98 this->dataTx=&data[1];
tgrosch 0:62b846b3988a 99 return this->write();
tgrosch 0:62b846b3988a 100 }
tgrosch 0:62b846b3988a 101
tgrosch 0:62b846b3988a 102 bool I2C::i2cHandler::read(){
tgrosch 0:62b846b3988a 103 static bool state;
tgrosch 0:62b846b3988a 104 static uint8_t c;
tgrosch 0:62b846b3988a 105 static uint32_t cnt;
tgrosch 0:62b846b3988a 106 this->updateSlaveAddress();
tgrosch 0:62b846b3988a 107 state=true;
tgrosch 1:8567a29d4699 108 //TODO put in the I2C read
tgrosch 0:62b846b3988a 109 // cnt=this->timeOut;
tgrosch 0:62b846b3988a 110 // while((USCI_B_I2C_isBusBusy(USCI_B1_BASE)) & cnt--);
tgrosch 0:62b846b3988a 111 // if(!cnt)
tgrosch 0:62b846b3988a 112 // return false;
tgrosch 0:62b846b3988a 113 // state&=USCI_B_I2C_masterSendSingleByteWithTimeout(USCI_B1_BASE,this->dataRx[0],this->timeOut); // Function returns 1 for success
tgrosch 0:62b846b3988a 114 // if(!state)
tgrosch 0:62b846b3988a 115 // return false;
tgrosch 0:62b846b3988a 116 // cnt=this->timeOut;
tgrosch 0:62b846b3988a 117 // while (USCI_B_I2C_masterIsStartSent(USCI_B1_BASE) & cnt--);
tgrosch 0:62b846b3988a 118 // if(!cnt)
tgrosch 0:62b846b3988a 119 // return false;
tgrosch 0:62b846b3988a 120 // USCI_B_I2C_setMode(USCI_B1_BASE,USCI_B_I2C_RECEIVE_MODE);
tgrosch 0:62b846b3988a 121 // USCI_B_I2C_masterReceiveMultiByteStart(USCI_B1_BASE);
tgrosch 0:62b846b3988a 122 // for(c=1;c<this->regBankSize;c++)
tgrosch 0:62b846b3988a 123 // this->dataRx[c]=USCI_B_I2C_masterReceiveSingle(USCI_B1_BASE);
tgrosch 0:62b846b3988a 124 // USCI_B_I2C_masterReceiveMultiByteStop(USCI_B1_BASE);
tgrosch 0:62b846b3988a 125 // this->dataRx[c]=USCI_B_I2C_masterReceiveMultiByteEndPoll(USCI_B1_BASE);
tgrosch 0:62b846b3988a 126 // USCI_B_I2C_setMode(USCI_B1_BASE,USCI_B_I2C_TRANSMIT_MODE);
tgrosch 0:62b846b3988a 127 return state;
tgrosch 0:62b846b3988a 128 }
tgrosch 0:62b846b3988a 129
tgrosch 0:62b846b3988a 130 bool I2C::i2cHandler::continuousRead(uint8_t *data){
tgrosch 0:62b846b3988a 131 static bool state;
tgrosch 0:62b846b3988a 132 static uint8_t c;
tgrosch 0:62b846b3988a 133
tgrosch 0:62b846b3988a 134 state=true;
tgrosch 1:8567a29d4699 135 //TODO Put is the continiuos read of continouseReadByteCount bytes here
tgrosch 0:62b846b3988a 136 // if(USCI_B_I2C_isBusBusy(USCI_B1_BASE))
tgrosch 0:62b846b3988a 137 // return false;
tgrosch 0:62b846b3988a 138 // state&=USCI_B_I2C_masterSendSingleByteWithTimeout(USCI_B1_BASE,this->continousReadRegisterAddress,this->timeOut); // Function returns 1 for success
tgrosch 0:62b846b3988a 139 // while (USCI_B_I2C_masterIsStartSent(USCI_B1_BASE));
tgrosch 0:62b846b3988a 140 // USCI_B_I2C_setMode(USCI_B1_BASE,USCI_B_I2C_RECEIVE_MODE);
tgrosch 0:62b846b3988a 141 // USCI_B_I2C_masterReceiveMultiByteStart(USCI_B1_BASE);
tgrosch 0:62b846b3988a 142 // for(c=0;c<this->continousReadByteCount;c++)
tgrosch 0:62b846b3988a 143 // data[c]=USCI_B_I2C_masterReceiveSingle(USCI_B1_BASE);
tgrosch 0:62b846b3988a 144 // USCI_B_I2C_masterReceiveMultiByteStop(USCI_B1_BASE);
tgrosch 0:62b846b3988a 145 // data[c]=USCI_B_I2C_masterReceiveMultiByteEndPoll(USCI_B1_BASE);
tgrosch 0:62b846b3988a 146 // USCI_B_I2C_setMode(USCI_B1_BASE,USCI_B_I2C_TRANSMIT_MODE);
tgrosch 0:62b846b3988a 147 return state;
tgrosch 0:62b846b3988a 148 }
tgrosch 0:62b846b3988a 149
tgrosch 0:62b846b3988a 150
tgrosch 0:62b846b3988a 151
tgrosch 0:62b846b3988a 152
tgrosch 0:62b846b3988a 153 uint8_t* I2C::i2cHandler::read(uint8_t address){
tgrosch 0:62b846b3988a 154 this->dataRx[0]=address;
tgrosch 0:62b846b3988a 155 this->read();
tgrosch 0:62b846b3988a 156 return &this->dataRx[1];
tgrosch 0:62b846b3988a 157 }
tgrosch 0:62b846b3988a 158
tgrosch 0:62b846b3988a 159 bool I2C::i2cHandler::read(uint8_t address,uint8_t *data){
tgrosch 0:62b846b3988a 160 static bool state;
tgrosch 0:62b846b3988a 161 static uint8_t c;
tgrosch 0:62b846b3988a 162
tgrosch 0:62b846b3988a 163 this->dataRx[0]=address;
tgrosch 0:62b846b3988a 164 state=this->read();
tgrosch 0:62b846b3988a 165 for(c=1;c<this->regBankSize+1;c++)
tgrosch 0:62b846b3988a 166 data[c-1]=this->dataRx[c];
tgrosch 0:62b846b3988a 167 return state;
tgrosch 0:62b846b3988a 168 }
tgrosch 0:62b846b3988a 169
tgrosch 0:62b846b3988a 170 bool I2C::i2cHandler::read(uint8_t *data){
tgrosch 0:62b846b3988a 171 static bool state;
tgrosch 0:62b846b3988a 172 static uint8_t c;
tgrosch 0:62b846b3988a 173 state=true;
tgrosch 0:62b846b3988a 174 this->dataRx[0]=data[0];
tgrosch 0:62b846b3988a 175 state=this->read();
tgrosch 0:62b846b3988a 176 for(c=1;c<this->regBankSize+1;c++)
tgrosch 0:62b846b3988a 177 data[c]=this->dataRx[c];
tgrosch 0:62b846b3988a 178 return state;
tgrosch 0:62b846b3988a 179 }
tgrosch 0:62b846b3988a 180
tgrosch 0:62b846b3988a 181 bool I2C::i2cHandler::read(uint8_t address,uint32_t *data){
tgrosch 0:62b846b3988a 182 static bool state;
tgrosch 0:62b846b3988a 183 static uint8_t c;
tgrosch 0:62b846b3988a 184 static uint32_t addon;
tgrosch 0:62b846b3988a 185 state=true;
tgrosch 0:62b846b3988a 186
tgrosch 0:62b846b3988a 187 this->dataRx[0]=address;
tgrosch 0:62b846b3988a 188 state=this->read();
tgrosch 0:62b846b3988a 189 *data=0;
tgrosch 0:62b846b3988a 190 for(c=0;c<this->regBankSize;c++){
tgrosch 0:62b846b3988a 191 addon=this->dataRx[1+c];
tgrosch 0:62b846b3988a 192 addon=addon<<(c<<3);
tgrosch 0:62b846b3988a 193 *data+=addon;
tgrosch 0:62b846b3988a 194 }
tgrosch 0:62b846b3988a 195
tgrosch 0:62b846b3988a 196 return state;
tgrosch 0:62b846b3988a 197 }
tgrosch 0:62b846b3988a 198
tgrosch 0:62b846b3988a 199