Ted Grosch / Mbed 2 deprecated Nucleo_TOF_I2C

Export to MBED Studio

Dependencies:   mbed

OPT3101_configuration.cpp@1:8567a29d4699, 2020-10-25 (annotated)

Committer:
tgrosch
Date:
Sun Oct 25 01:51:13 2020 +0000
Revision:
1:8567a29d4699
Parent:
0:62b846b3988a 
Transfer to MBED Studio

Who changed what in which revision?

UserRevisionLine numberNew contents of line
tgrosch 0:62b846b3988a 1 /*
tgrosch 0:62b846b3988a 2 Copyright (c) 2018 Texas Instruments Incorporated
tgrosch 0:62b846b3988a 3 All rights reserved not granted herein.
tgrosch 0:62b846b3988a 4 Limited License.
tgrosch 0:62b846b3988a 5 Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive license under copyrights and patents it now or hereafter owns or controls to make, have made, use, import, offer to sell and sell ("Utilize") this software subject to the terms herein. With respect to the foregoing patent license, such license is granted solely to the extent that any such patent is necessary to Utilize the software alone. The patent license shall not apply to any combinations which include this software, other than combinations with devices manufactured by or for TI (TI Devices). No hardware patent is licensed hereunder.
tgrosch 0:62b846b3988a 6 Redistributions must preserve existing copyright notices and reproduce this license (including the above copyright notice and the disclaimer and (if applicable) source code license limitations below) in the documentation and/or other materials provided with the distribution
tgrosch 0:62b846b3988a 7 Redistribution and use in binary form, without modification, are permitted provided that the following conditions are met:
tgrosch 0:62b846b3988a 8 * No reverse engineering, decompilation, or disassembly of this software is permitted with respect to any software provided in binary form.
tgrosch 0:62b846b3988a 9 * any redistribution and use are licensed by TI for use only with TI Devices.
tgrosch 0:62b846b3988a 10 * Nothing shall obligate TI to provide you with source code for the software licensed and provided to you in object code.
tgrosch 0:62b846b3988a 11 If software source code is provided to you, modification and redistribution of the source code are permitted provided that the following conditions are met:
tgrosch 0:62b846b3988a 12 * any redistribution and use of the source code, including any resulting derivative works, are licensed by TI for use only with TI Devices.
tgrosch 0:62b846b3988a 13 * any redistribution and use of any object code compiled from the source code and any resulting derivative works, are licensed by TI for use only with TI Devices.
tgrosch 0:62b846b3988a 14 Neither the name of Texas Instruments Incorporated nor the names of its suppliers may be used to endorse or promote products derived from this software without specific prior written permission.
tgrosch 0:62b846b3988a 15 DISCLAIMER.
tgrosch 0:62b846b3988a 16 THIS SOFTWARE IS PROVIDED BY TI AND TI's LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
tgrosch 0:62b846b3988a 17 */
tgrosch 0:62b846b3988a 18
tgrosch 0:62b846b3988a 19
tgrosch 0:62b846b3988a 20 #include "OPT3101device.h"
tgrosch 0:62b846b3988a 21
tgrosch 0:62b846b3988a 22
tgrosch 0:62b846b3988a 23 /* OPT3101 device initialization Sequence Header file written by OPT3101 Calibration tool - Version 0.8.0
tgrosch 0:62b846b3988a 24 By: a0227156
tgrosch 0:62b846b3988a 25 On: 2019-10-02 19:54:11
tgrosch 0:62b846b3988a 26 Configuration Settings:
tgrosch 0:62b846b3988a 27 {
tgrosch 0:62b846b3988a 28 "genDeviceI2CMasterConnection": 1,
tgrosch 0:62b846b3988a 29 "autoHDRMode": true,
tgrosch 0:62b846b3988a 30 "monoshotMode": false,
tgrosch 0:62b846b3988a 31 "TX0HCurrent": 0,
tgrosch 0:62b846b3988a 32 "genDeviceI2CMasterTempSensor": false,
tgrosch 0:62b846b3988a 33 "TXDCCurrent": 0,
tgrosch 0:62b846b3988a 34 "superHDRMode": false,
tgrosch 0:62b846b3988a 35 "LEDOrder": 73746,
tgrosch 0:62b846b3988a 36 "timeStamp": 2019-10-02 19:53:28,
tgrosch 0:62b846b3988a 37 "genDeviceAmbientSupport": 5,
tgrosch 0:62b846b3988a 38 "freqComp": false,
tgrosch 0:62b846b3988a 39 "user": a0227156,
tgrosch 0:62b846b3988a 40 "autoHDRRatio": 4.0,
tgrosch 0:62b846b3988a 41 "multiLEDMode": true,
tgrosch 0:62b846b3988a 42 "TX1HCurrent": 0,
tgrosch 0:62b846b3988a 43 "genDeviceEEPROMConnection": true,
tgrosch 0:62b846b3988a 44 "toolVersion": 0.8.0,
tgrosch 0:62b846b3988a 45 "TX2HCurrent": 0,
tgrosch 0:62b846b3988a 46 "crc": -1193321828,
tgrosch 0:62b846b3988a 47 "genDeviceSubFrameCount": 256,
tgrosch 0:62b846b3988a 48 "autoHDRHThreshold": 25500,
tgrosch 0:62b846b3988a 49 "genDeviceAvgFrameCount": 6,
tgrosch 0:62b846b3988a 50 }
tgrosch 0:62b846b3988a 51 */
tgrosch 0:62b846b3988a 52 void OPT3101::device::initialize(void){
tgrosch 0:62b846b3988a 53 // List of registers to initialize OPT3101 device after power-up
tgrosch 0:62b846b3988a 54
tgrosch 0:62b846b3988a 55 this->reg.tg_ovl_window_start = 7000; // //Overload flab observation window
tgrosch 0:62b846b3988a 56 this->reg.en_temp_conv = 1; // //Enables the internal
tgrosch 0:62b846b3988a 57
tgrosch 0:62b846b3988a 58 this->reg.clip_mode_fc = 1; // //Enables Clip mode for Frequency correction
tgrosch 0:62b846b3988a 59 this->reg.clip_mode_temp = 0; // //Disables Clip mode for Temp coff phase correction
tgrosch 0:62b846b3988a 60 this->reg.clip_mode_offset = 0; // //Disables Clip mode for phase offset correction
tgrosch 0:62b846b3988a 61 this->reg.iq_read_data_sel = 3; // //Enables 16 bit frame counter
tgrosch 0:62b846b3988a 62 this->reg.iamb_max_sel = 14; // //Sets maximum ambient support
tgrosch 0:62b846b3988a 63 this->reg.en_temp_corr = 1; // //Enables Temperature Correction
tgrosch 0:62b846b3988a 64 this->reg.gpio1_obuf_en=1; // //Enabled output buffer on GPIO1 pin
tgrosch 0:62b846b3988a 65 this->reg.gpo1_mux_sel=2; // //select dig_gpo_0 on gpio1
tgrosch 0:62b846b3988a 66 this->reg.dig_gpo_sel0 = 9; // //Select Data Ready on dig_gpo_0
tgrosch 0:62b846b3988a 67
tgrosch 0:62b846b3988a 68 this->reg.num_sub_frames = 255; // //Sub frames count
tgrosch 0:62b846b3988a 69 this->reg.num_avg_sub_frames = 127; // //Average frames count
tgrosch 0:62b846b3988a 70 this->reg.xtalk_filt_time_const = 3; // //Crosstalk filter time constant
tgrosch 0:62b846b3988a 71 this->reg.tg_seq_int_start = 9850; // //Sequence Start
tgrosch 0:62b846b3988a 72 this->reg.tg_seq_int_end = 9858; // //Sequence End
tgrosch 0:62b846b3988a 73 this->reg.tg_seq_int_mask_start = 127; // //Same as AvgFrame Count
tgrosch 0:62b846b3988a 74 this->reg.tg_seq_int_mask_end = 127; // //Same as AvgFrame Count
tgrosch 0:62b846b3988a 75
tgrosch 0:62b846b3988a 76 this->reg.hdr_thr_high = 25500; // //High Threshold
tgrosch 0:62b846b3988a 77 this->reg.hdr_thr_low = 5875; // //Low Threshold
tgrosch 0:62b846b3988a 78 this->reg.en_adaptive_hdr = 1; // //Enables adaptive HDR feature
tgrosch 0:62b846b3988a 79
tgrosch 0:62b846b3988a 80 this->reg.illum_dac_h_tx0 = 31; // //High Current settings [173.6mA:5.6mA X 31]
tgrosch 0:62b846b3988a 81 this->reg.illum_scale_h_tx0 = 0; // //Illum scale for H [173.6mA:5.6mA X 31]
tgrosch 0:62b846b3988a 82
tgrosch 0:62b846b3988a 83 this->reg.illum_dac_l_tx0 = 31; // //High Current settings [043.4mA:1.4mA X 31]
tgrosch 0:62b846b3988a 84 this->reg.illum_scale_l_tx0 = 3; // //Illum scale for H [043.4mA:1.4mA X 31]
tgrosch 0:62b846b3988a 85
tgrosch 0:62b846b3988a 86 this->reg.illum_dac_h_tx1 = 31; // //High Current settings [173.6mA:5.6mA X 31]
tgrosch 0:62b846b3988a 87 this->reg.illum_scale_h_tx1 = 0; // //Illum scale for H [173.6mA:5.6mA X 31]
tgrosch 0:62b846b3988a 88
tgrosch 0:62b846b3988a 89 this->reg.illum_dac_l_tx1 = 31; // //High Current settings [043.4mA:1.4mA X 31]
tgrosch 0:62b846b3988a 90 this->reg.illum_scale_l_tx1 = 3; // //Illum scale for H [043.4mA:1.4mA X 31]
tgrosch 0:62b846b3988a 91
tgrosch 0:62b846b3988a 92 this->reg.illum_dac_h_tx2 = 31; // //High Current settings [173.6mA:5.6mA X 31]
tgrosch 0:62b846b3988a 93 this->reg.illum_scale_h_tx2 = 0; // //Illum scale for H [173.6mA:5.6mA X 31]
tgrosch 0:62b846b3988a 94
tgrosch 0:62b846b3988a 95 this->reg.illum_dac_l_tx2 = 31; // //High Current settings [043.4mA:1.4mA X 31]
tgrosch 0:62b846b3988a 96 this->reg.illum_scale_l_tx2 = 3; // //Illum scale for H [043.4mA:1.4mA X 31]
tgrosch 0:62b846b3988a 97
tgrosch 0:62b846b3988a 98 this->reg.tx_seq_reg = 2340; // //Setting TX Switching order
tgrosch 0:62b846b3988a 99 this->reg.en_tx_switch = 1 ; // //Enable TX Switching order
tgrosch 0:62b846b3988a 100
tgrosch 0:62b846b3988a 101 this->reg.tg_en = 1; // //Enables Timing Generator
tgrosch 0:62b846b3988a 102
tgrosch 0:62b846b3988a 103 this->configurationFlags_xtalkFilterTau = 3; // //This is not a register but a settings flag for the SDK
tgrosch 0:62b846b3988a 104 this->configurationFlags_monoshotMode = false; // //This is not a register but a settings flag for the SDK
tgrosch 0:62b846b3988a 105 this->configurationFlags_xtalkSettlingOneTauInMilliSeconds = 512; // //This is not a register but a settings flag for the SDK
tgrosch 0:62b846b3988a 106 this->configurationFlags_xtalkSettlingOneTauInDataReadyCounts = 8; // //This is not a register but a settings flag for the SDK
tgrosch 0:62b846b3988a 107 this->configurationFlags_frameTimeInMilliSeconds = 64; // //This is not a register but a settings flag for the SDK
tgrosch 0:62b846b3988a 108 this->configurationFlags_avgFrameCountExponentOfTwo = 7; // //This is not a register but a settings flag for the SDK
tgrosch 0:62b846b3988a 109
tgrosch 0:62b846b3988a 110 // tx2 xtalk compensation
tgrosch 0:62b846b3988a 111 //this->reg.EN_CTALK_FB_CLK=1;
tgrosch 0:62b846b3988a 112 //this->reg.EN_CALIB_CLK=1;
tgrosch 0:62b846b3988a 113 //this->reg.calib_curr1_en_I=1;
tgrosch 0:62b846b3988a 114 //this->reg.calib_curr1_gain_sel=0;
tgrosch 0:62b846b3988a 115 //this->reg.calib_curr1_DAC_I=4;
tgrosch 0:62b846b3988a 116 //this->reg.calib_curr1_inv_CLK_I=0;
tgrosch 0:62b846b3988a 117
tgrosch 0:62b846b3988a 118 }
tgrosch 0:62b846b3988a 119
tgrosch 0:62b846b3988a 120 OPT3101::device::device(void)//: TODO fix this initialization
tgrosch 0:62b846b3988a 121 //configurationFlags_isTXChannelActive{true,true,true},
tgrosch 0:62b846b3988a 122 //configurationFlags_isRegisterSetActive(true,true)
tgrosch 0:62b846b3988a 123 {
tgrosch 0:62b846b3988a 124 configurationFlags_isTXChannelActive[0] = true;
tgrosch 0:62b846b3988a 125 configurationFlags_isTXChannelActive[1] = true;
tgrosch 0:62b846b3988a 126 configurationFlags_isTXChannelActive[2] = true;
tgrosch 0:62b846b3988a 127 configurationFlags_isRegisterSetActive[0] = true;
tgrosch 0:62b846b3988a 128 configurationFlags_isRegisterSetActive[1] = true;
tgrosch 0:62b846b3988a 129 }
tgrosch 0:62b846b3988a 130
tgrosch 0:62b846b3988a 131 OPT3101::calibrationC::calibrationC(void)// : calibrationC(true)
tgrosch 0:62b846b3988a 132 {
tgrosch 0:62b846b3988a 133 this->recordLength = 6; // //This configuration requires 6 crosstalk and other configuration record(s)
tgrosch 0:62b846b3988a 134 this->registerAddressListSize= 43; // //This configuration requires 43 registers [1376] bits to be stored for calibration
tgrosch 0:62b846b3988a 135 this->EEPROM_connected = true; // //This configuration helps configure EEPROM
tgrosch 0:62b846b3988a 136 this->extTempSensor_connected= false; // //This configuration helps configure Ext temp sensor
tgrosch 0:62b846b3988a 137 this->registerAddressList[0] = 0x2f; // //Address for register(s) iphase_xtalk_reg_hdr0_tx0,temp_coeff_main_hdr1_tx1
tgrosch 0:62b846b3988a 138 this->registerAddressList[1] = 0x30; // //Address for register(s) qphase_xtalk_reg_hdr0_tx0,temp_coeff_main_hdr1_tx1
tgrosch 0:62b846b3988a 139 this->registerAddressList[2] = 0x38; // //Address for register(s) temp_coeff_xtalk_iphase_hdr0_tx0,qphase_xtalk_reg_hdr0_tx2
tgrosch 0:62b846b3988a 140 this->registerAddressList[3] = 0x39; // //Address for register(s) temp_coeff_xtalk_qphase_hdr0_tx0,iphase_xtalk_reg_hdr1_tx2
tgrosch 0:62b846b3988a 141 this->registerAddressList[4] = 0x42; // //Address for register(s) phase_offset_hdr0_tx0
tgrosch 0:62b846b3988a 142 this->registerAddressList[5] = 0x47; // //Address for register(s) tmain_calib_hdr0_tx0,tillum_calib_hdr0_tx0
tgrosch 0:62b846b3988a 143 this->registerAddressList[6] = 0x45; // //Address for register(s) temp_coeff_main_hdr0_tx0,tmain_calib_hdr1_tx2
tgrosch 0:62b846b3988a 144 this->registerAddressList[7] = 0x46; // //Address for register(s) temp_coeff_illum_hdr0_tx0,tillum_calib_hdr1_tx2
tgrosch 0:62b846b3988a 145 this->registerAddressList[8] = 0x31; // //Address for register(s) iphase_xtalk_reg_hdr1_tx0,temp_coeff_main_hdr0_tx2
tgrosch 0:62b846b3988a 146 this->registerAddressList[9] = 0x32; // //Address for register(s) qphase_xtalk_reg_hdr1_tx0,temp_coeff_main_hdr0_tx2
tgrosch 0:62b846b3988a 147 this->registerAddressList[10] = 0x5e; // //Address for register(s) temp_coeff_xtalk_iphase_hdr1_tx0,temp_coeff_xtalk_iphase_hdr0_tx1
tgrosch 0:62b846b3988a 148 this->registerAddressList[11] = 0x60; // //Address for register(s) temp_coeff_xtalk_qphase_hdr1_tx0,temp_coeff_xtalk_qphase_hdr0_tx1,temp_coeff_xtalk_qphase_hdr1_tx1
tgrosch 0:62b846b3988a 149 this->registerAddressList[12] = 0x51; // //Address for register(s) phase_offset_hdr1_tx0,temp_coeff_illum_hdr1_tx0
tgrosch 0:62b846b3988a 150 this->registerAddressList[13] = 0x48; // //Address for register(s) tmain_calib_hdr1_tx0,tillum_calib_hdr1_tx0
tgrosch 0:62b846b3988a 151 this->registerAddressList[14] = 0x2d; // //Address for register(s) temp_coeff_main_hdr1_tx0,temp_coeff_main_hdr0_tx1
tgrosch 0:62b846b3988a 152 this->registerAddressList[15] = 0x52; // //Address for register(s) temp_coeff_illum_hdr1_tx0,phase_offset_hdr0_tx1
tgrosch 0:62b846b3988a 153 this->registerAddressList[16] = 0x33; // //Address for register(s) iphase_xtalk_reg_hdr0_tx1,temp_coeff_main_hdr1_tx2
tgrosch 0:62b846b3988a 154 this->registerAddressList[17] = 0x34; // //Address for register(s) qphase_xtalk_reg_hdr0_tx1,temp_coeff_main_hdr1_tx2
tgrosch 0:62b846b3988a 155 this->registerAddressList[18] = 0x49; // //Address for register(s) tmain_calib_hdr0_tx1,tillum_calib_hdr0_tx1
tgrosch 0:62b846b3988a 156 this->registerAddressList[19] = 0x53; // //Address for register(s) temp_coeff_illum_hdr0_tx1,phase_offset_hdr1_tx1
tgrosch 0:62b846b3988a 157 this->registerAddressList[20] = 0x54; // //Address for register(s) temp_coeff_illum_hdr0_tx1,phase_offset_hdr0_tx2
tgrosch 0:62b846b3988a 158 this->registerAddressList[21] = 0x35; // //Address for register(s) iphase_xtalk_reg_hdr1_tx1
tgrosch 0:62b846b3988a 159 this->registerAddressList[22] = 0x36; // //Address for register(s) qphase_xtalk_reg_hdr1_tx1
tgrosch 0:62b846b3988a 160 this->registerAddressList[23] = 0x5f; // //Address for register(s) temp_coeff_xtalk_iphase_hdr1_tx1,temp_coeff_xtalk_iphase_hdr0_tx2,temp_coeff_xtalk_iphase_hdr1_tx2
tgrosch 0:62b846b3988a 161 this->registerAddressList[24] = 0x41; // //Address for register(s) tmain_calib_hdr1_tx1
tgrosch 0:62b846b3988a 162 this->registerAddressList[25] = 0x43; // //Address for register(s) tillum_calib_hdr1_tx1,en_phase_corr,en_temp_corr,scale_phase_temp_coeff
tgrosch 0:62b846b3988a 163 this->registerAddressList[26] = 0x55; // //Address for register(s) temp_coeff_illum_hdr1_tx1,phase_offset_hdr1_tx2
tgrosch 0:62b846b3988a 164 this->registerAddressList[27] = 0x56; // //Address for register(s) temp_coeff_illum_hdr1_tx1
tgrosch 0:62b846b3988a 165 this->registerAddressList[28] = 0x37; // //Address for register(s) iphase_xtalk_reg_hdr0_tx2
tgrosch 0:62b846b3988a 166 this->registerAddressList[29] = 0x61; // //Address for register(s) temp_coeff_xtalk_qphase_hdr0_tx2,temp_coeff_xtalk_qphase_hdr1_tx2
tgrosch 0:62b846b3988a 167 this->registerAddressList[30] = 0x3f; // //Address for register(s) tmain_calib_hdr0_tx2,tillum_calib_hdr0_tx2
tgrosch 0:62b846b3988a 168 this->registerAddressList[31] = 0x57; // //Address for register(s) temp_coeff_illum_hdr0_tx2
tgrosch 0:62b846b3988a 169 this->registerAddressList[32] = 0x58; // //Address for register(s) temp_coeff_illum_hdr0_tx2
tgrosch 0:62b846b3988a 170 this->registerAddressList[33] = 0x3a; // //Address for register(s) qphase_xtalk_reg_hdr1_tx2,scale_temp_coeff_xtalk
tgrosch 0:62b846b3988a 171 this->registerAddressList[34] = 0x59; // //Address for register(s) temp_coeff_illum_hdr1_tx2
tgrosch 0:62b846b3988a 172 this->registerAddressList[35] = 0x5a; // //Address for register(s) temp_coeff_illum_hdr1_tx2
tgrosch 0:62b846b3988a 173 this->registerAddressList[36] = 0x2e; // //Address for register(s) illum_xtalk_reg_scale
tgrosch 0:62b846b3988a 174 this->registerAddressList[37] = 0x71; // //Address for register(s) shift_illum_phase
tgrosch 0:62b846b3988a 175 this->registerAddressList[38] = 0xb5; // //Address for register(s) scale_amb_phase_corr_coeff
tgrosch 0:62b846b3988a 176 this->registerAddressList[39] = 0x0c; // //Address for register(s) amb_phase_corr_pwl_coeff0
tgrosch 0:62b846b3988a 177 this->registerAddressList[40] = 0xb4; // //Address for register(s) amb_phase_corr_pwl_coeff1,amb_phase_corr_pwl_coeff2,amb_phase_corr_pwl_coeff3
tgrosch 0:62b846b3988a 178 this->registerAddressList[41] = 0xb8; // //Address for register(s) amb_phase_corr_pwl_x0,amb_phase_corr_pwl_x1
tgrosch 0:62b846b3988a 179 this->registerAddressList[42] = 0xb9; // //Address for register(s) amb_phase_corr_pwl_x2
tgrosch 0:62b846b3988a 180
tgrosch 0:62b846b3988a 181 }
tgrosch 0:62b846b3988a 182
tgrosch 0:62b846b3988a 183