SDRAM_DISCO_F746NG_BlockDevice
Dependents: DISCO-F746NG_SDRAMBlockDevice
Fork of SDRAM_DISCO_F746NG by
SDRAM_DISCO_F746NG_BlockDevice.h@1:36b940e6b8d2, 2018-03-08 (annotated)
- Committer:
- tapiov
- Date:
- Thu Mar 08 20:14:42 2018 +0000
- Revision:
- 1:36b940e6b8d2
First commit to publish
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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tapiov | 1:36b940e6b8d2 | 1 | /* Copyright (c) 2010-2016 mbed.org, MIT License |
tapiov | 1:36b940e6b8d2 | 2 | * |
tapiov | 1:36b940e6b8d2 | 3 | * Permission is hereby granted, free of charge, to any person obtaining a copy of this software |
tapiov | 1:36b940e6b8d2 | 4 | * and associated documentation files (the "Software"), to deal in the Software without |
tapiov | 1:36b940e6b8d2 | 5 | * restriction, including without limitation the rights to use, copy, modify, merge, publish, |
tapiov | 1:36b940e6b8d2 | 6 | * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the |
tapiov | 1:36b940e6b8d2 | 7 | * Software is furnished to do so, subject to the following conditions: |
tapiov | 1:36b940e6b8d2 | 8 | * |
tapiov | 1:36b940e6b8d2 | 9 | * The above copyright notice and this permission notice shall be included in all copies or |
tapiov | 1:36b940e6b8d2 | 10 | * substantial portions of the Software. |
tapiov | 1:36b940e6b8d2 | 11 | * |
tapiov | 1:36b940e6b8d2 | 12 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING |
tapiov | 1:36b940e6b8d2 | 13 | * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
tapiov | 1:36b940e6b8d2 | 14 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, |
tapiov | 1:36b940e6b8d2 | 15 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
tapiov | 1:36b940e6b8d2 | 16 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
tapiov | 1:36b940e6b8d2 | 17 | */ |
tapiov | 1:36b940e6b8d2 | 18 | |
tapiov | 1:36b940e6b8d2 | 19 | #ifndef __SDRAM_DISCO_F746NG_H |
tapiov | 1:36b940e6b8d2 | 20 | #define __SDRAM_DISCO_F746NG_H |
tapiov | 1:36b940e6b8d2 | 21 | |
tapiov | 1:36b940e6b8d2 | 22 | #ifdef TARGET_DISCO_F746NG |
tapiov | 1:36b940e6b8d2 | 23 | |
tapiov | 1:36b940e6b8d2 | 24 | #include "mbed.h" |
tapiov | 1:36b940e6b8d2 | 25 | #include "stm32746g_discovery_sdram.h" |
tapiov | 1:36b940e6b8d2 | 26 | #include "BlockDevice.h" |
tapiov | 1:36b940e6b8d2 | 27 | |
tapiov | 1:36b940e6b8d2 | 28 | /* |
tapiov | 1:36b940e6b8d2 | 29 | This class drives the SDRAM driver (MT48LC4M32B2B5-7) present on DISCO_F746NG board. |
tapiov | 1:36b940e6b8d2 | 30 | |
tapiov | 1:36b940e6b8d2 | 31 | Usage: |
tapiov | 1:36b940e6b8d2 | 32 | |
tapiov | 1:36b940e6b8d2 | 33 | #include "mbed.h" |
tapiov | 1:36b940e6b8d2 | 34 | #include "SDRAM_DISCO_F746NG.h" |
tapiov | 1:36b940e6b8d2 | 35 | |
tapiov | 1:36b940e6b8d2 | 36 | int main() |
tapiov | 1:36b940e6b8d2 | 37 | { |
tapiov | 1:36b940e6b8d2 | 38 | sdram.WriteData(SDRAM_DEVICE_ADDR + WRITE_READ_ADDR, WriteBuffer, BUFFER_SIZE); |
tapiov | 1:36b940e6b8d2 | 39 | SDRAMCommandStructure.CommandMode = FMC_SDRAM_CMD_SELFREFRESH_MODE; |
tapiov | 1:36b940e6b8d2 | 40 | SDRAMCommandStructure.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK2; |
tapiov | 1:36b940e6b8d2 | 41 | SDRAMCommandStructure.AutoRefreshNumber = 1; |
tapiov | 1:36b940e6b8d2 | 42 | SDRAMCommandStructure.ModeRegisterDefinition = 0; |
tapiov | 1:36b940e6b8d2 | 43 | sdram.Sendcmd(&SDRAMCommandStructure); |
tapiov | 1:36b940e6b8d2 | 44 | SDRAMCommandStructure.CommandMode = FMC_SDRAM_CMD_NORMAL_MODE; |
tapiov | 1:36b940e6b8d2 | 45 | sdram.Sendcmd(&SDRAMCommandStructure); |
tapiov | 1:36b940e6b8d2 | 46 | sdram.ReadData(SDRAM_DEVICE_ADDR + WRITE_READ_ADDR, ReadBuffer, BUFFER_SIZE); |
tapiov | 1:36b940e6b8d2 | 47 | CompareBuffer(WriteBuffer, ReadBuffer, BUFFER_SIZE); |
tapiov | 1:36b940e6b8d2 | 48 | while(1) { |
tapiov | 1:36b940e6b8d2 | 49 | } |
tapiov | 1:36b940e6b8d2 | 50 | } |
tapiov | 1:36b940e6b8d2 | 51 | |
tapiov | 1:36b940e6b8d2 | 52 | */ |
tapiov | 1:36b940e6b8d2 | 53 | class SDRAM_DISCO_F746NG_BlockDevice : public BlockDevice |
tapiov | 1:36b940e6b8d2 | 54 | { |
tapiov | 1:36b940e6b8d2 | 55 | |
tapiov | 1:36b940e6b8d2 | 56 | public: |
tapiov | 1:36b940e6b8d2 | 57 | //! Constructor |
tapiov | 1:36b940e6b8d2 | 58 | //SDRAM_DISCO_F746NG_BlockDevice(); |
tapiov | 1:36b940e6b8d2 | 59 | |
tapiov | 1:36b940e6b8d2 | 60 | //! Destructor |
tapiov | 1:36b940e6b8d2 | 61 | //~SDRAM_DISCO_F746NG_BlockDevice(); |
tapiov | 1:36b940e6b8d2 | 62 | |
tapiov | 1:36b940e6b8d2 | 63 | |
tapiov | 1:36b940e6b8d2 | 64 | /** |
tapiov | 1:36b940e6b8d2 | 65 | * @brief Initializes the SDRAM device. |
tapiov | 1:36b940e6b8d2 | 66 | * @retval SDRAM status |
tapiov | 1:36b940e6b8d2 | 67 | */ |
tapiov | 1:36b940e6b8d2 | 68 | |
tapiov | 1:36b940e6b8d2 | 69 | virtual int init(); |
tapiov | 1:36b940e6b8d2 | 70 | //virtual uint8_t Init(void); |
tapiov | 1:36b940e6b8d2 | 71 | |
tapiov | 1:36b940e6b8d2 | 72 | /** |
tapiov | 1:36b940e6b8d2 | 73 | * @brief DeInitializes the SDRAM device. |
tapiov | 1:36b940e6b8d2 | 74 | * @retval SDRAM status |
tapiov | 1:36b940e6b8d2 | 75 | */ |
tapiov | 1:36b940e6b8d2 | 76 | |
tapiov | 1:36b940e6b8d2 | 77 | virtual int deinit(); |
tapiov | 1:36b940e6b8d2 | 78 | //virtual uint8_t DeInit(void); |
tapiov | 1:36b940e6b8d2 | 79 | |
tapiov | 1:36b940e6b8d2 | 80 | /** |
tapiov | 1:36b940e6b8d2 | 81 | * @brief Programs the SDRAM device. |
tapiov | 1:36b940e6b8d2 | 82 | * @param RefreshCount: SDRAM refresh counter value |
tapiov | 1:36b940e6b8d2 | 83 | * @retval None |
tapiov | 1:36b940e6b8d2 | 84 | */ |
tapiov | 1:36b940e6b8d2 | 85 | |
tapiov | 1:36b940e6b8d2 | 86 | void Initialization_sequence(uint32_t RefreshCount); |
tapiov | 1:36b940e6b8d2 | 87 | |
tapiov | 1:36b940e6b8d2 | 88 | /** |
tapiov | 1:36b940e6b8d2 | 89 | * @brief Reads an amount of data from the SDRAM memory in polling mode. |
tapiov | 1:36b940e6b8d2 | 90 | * @param uwStartAddress: Read start address |
tapiov | 1:36b940e6b8d2 | 91 | * @param pData: Pointer to data to be read |
tapiov | 1:36b940e6b8d2 | 92 | * @param uwDataSize: Size of read data from the memory |
tapiov | 1:36b940e6b8d2 | 93 | * @retval SDRAM status |
tapiov | 1:36b940e6b8d2 | 94 | */ |
tapiov | 1:36b940e6b8d2 | 95 | |
tapiov | 1:36b940e6b8d2 | 96 | virtual int read(void *buffer, bd_addr_t addr, bd_size_t size); |
tapiov | 1:36b940e6b8d2 | 97 | //uint8_t ReadData(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize); |
tapiov | 1:36b940e6b8d2 | 98 | |
tapiov | 1:36b940e6b8d2 | 99 | /** |
tapiov | 1:36b940e6b8d2 | 100 | * @brief Reads an amount of data from the SDRAM memory in DMA mode. |
tapiov | 1:36b940e6b8d2 | 101 | * @param uwStartAddress: Read start address |
tapiov | 1:36b940e6b8d2 | 102 | * @param pData: Pointer to data to be read |
tapiov | 1:36b940e6b8d2 | 103 | * @param uwDataSize: Size of read data from the memory |
tapiov | 1:36b940e6b8d2 | 104 | * @retval SDRAM status |
tapiov | 1:36b940e6b8d2 | 105 | */ |
tapiov | 1:36b940e6b8d2 | 106 | |
tapiov | 1:36b940e6b8d2 | 107 | uint8_t ReadData_DMA(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize); |
tapiov | 1:36b940e6b8d2 | 108 | |
tapiov | 1:36b940e6b8d2 | 109 | /** |
tapiov | 1:36b940e6b8d2 | 110 | * @brief Writes an amount of data to the SDRAM memory in polling mode. |
tapiov | 1:36b940e6b8d2 | 111 | * @param uwStartAddress: Write start address |
tapiov | 1:36b940e6b8d2 | 112 | * @param pData: Pointer to data to be written |
tapiov | 1:36b940e6b8d2 | 113 | * @param uwDataSize: Size of written data from the memory |
tapiov | 1:36b940e6b8d2 | 114 | * @retval SDRAM status |
tapiov | 1:36b940e6b8d2 | 115 | */ |
tapiov | 1:36b940e6b8d2 | 116 | |
tapiov | 1:36b940e6b8d2 | 117 | virtual int program(const void *buffer, bd_addr_t addr, bd_size_t size); |
tapiov | 1:36b940e6b8d2 | 118 | //uint8_t WriteData(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize); |
tapiov | 1:36b940e6b8d2 | 119 | |
tapiov | 1:36b940e6b8d2 | 120 | /** |
tapiov | 1:36b940e6b8d2 | 121 | * @brief Writes an amount of data to the SDRAM memory in DMA mode. |
tapiov | 1:36b940e6b8d2 | 122 | * @param uwStartAddress: Write start address |
tapiov | 1:36b940e6b8d2 | 123 | * @param pData: Pointer to data to be written |
tapiov | 1:36b940e6b8d2 | 124 | * @param uwDataSize: Size of written data from the memory |
tapiov | 1:36b940e6b8d2 | 125 | * @retval SDRAM status |
tapiov | 1:36b940e6b8d2 | 126 | */ |
tapiov | 1:36b940e6b8d2 | 127 | uint8_t WriteData_DMA(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize); |
tapiov | 1:36b940e6b8d2 | 128 | |
tapiov | 1:36b940e6b8d2 | 129 | /** |
tapiov | 1:36b940e6b8d2 | 130 | * @brief Sends command to the SDRAM bank. |
tapiov | 1:36b940e6b8d2 | 131 | * @param SdramCmd: Pointer to SDRAM command structure |
tapiov | 1:36b940e6b8d2 | 132 | * @retval SDRAM status |
tapiov | 1:36b940e6b8d2 | 133 | */ |
tapiov | 1:36b940e6b8d2 | 134 | uint8_t Sendcmd(FMC_SDRAM_CommandTypeDef *SdramCmd); |
tapiov | 1:36b940e6b8d2 | 135 | |
tapiov | 1:36b940e6b8d2 | 136 | virtual int erase(bd_addr_t addr, bd_size_t size); |
tapiov | 1:36b940e6b8d2 | 137 | virtual bd_size_t get_read_size() const; |
tapiov | 1:36b940e6b8d2 | 138 | virtual bd_size_t get_program_size() const; |
tapiov | 1:36b940e6b8d2 | 139 | virtual bd_size_t get_erase_size() const; |
tapiov | 1:36b940e6b8d2 | 140 | virtual bd_size_t size() const; |
tapiov | 1:36b940e6b8d2 | 141 | |
tapiov | 1:36b940e6b8d2 | 142 | private: |
tapiov | 1:36b940e6b8d2 | 143 | |
tapiov | 1:36b940e6b8d2 | 144 | }; |
tapiov | 1:36b940e6b8d2 | 145 | |
tapiov | 1:36b940e6b8d2 | 146 | #else |
tapiov | 1:36b940e6b8d2 | 147 | #error "This class must be used with DISCO_F746NG board only." |
tapiov | 1:36b940e6b8d2 | 148 | #endif // TARGET_DISCO_F746NG |
tapiov | 1:36b940e6b8d2 | 149 | |
tapiov | 1:36b940e6b8d2 | 150 | #endif |