shinichi nakazawa / mbed-src

mbed library sources

Dependents:   Nucleo_blink_led

Fork of mbed-src by mbed official

vendor/NXP/LPC4088/hal/serial_api.c@10:3bc89ef62ce7, 2013-06-14 (annotated)

Committer:
emilmont
Date:
Fri Jun 14 17:49:17 2013 +0100
Revision:
10:3bc89ef62ce7
Unify mbed library sources

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 10:3bc89ef62ce7 1 /* mbed Microcontroller Library
emilmont 10:3bc89ef62ce7 2 * Copyright (c) 2006-2013 ARM Limited
emilmont 10:3bc89ef62ce7 3 *
emilmont 10:3bc89ef62ce7 4 * Licensed under the Apache License, Version 2.0 (the "License");
emilmont 10:3bc89ef62ce7 5 * you may not use this file except in compliance with the License.
emilmont 10:3bc89ef62ce7 6 * You may obtain a copy of the License at
emilmont 10:3bc89ef62ce7 7 *
emilmont 10:3bc89ef62ce7 8 * http://www.apache.org/licenses/LICENSE-2.0
emilmont 10:3bc89ef62ce7 9 *
emilmont 10:3bc89ef62ce7 10 * Unless required by applicable law or agreed to in writing, software
emilmont 10:3bc89ef62ce7 11 * distributed under the License is distributed on an "AS IS" BASIS,
emilmont 10:3bc89ef62ce7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
emilmont 10:3bc89ef62ce7 13 * See the License for the specific language governing permissions and
emilmont 10:3bc89ef62ce7 14 * limitations under the License.
emilmont 10:3bc89ef62ce7 15 */
emilmont 10:3bc89ef62ce7 16 // math.h required for floating point operations for baud rate calculation
emilmont 10:3bc89ef62ce7 17 #include <math.h>
emilmont 10:3bc89ef62ce7 18 #include <string.h>
emilmont 10:3bc89ef62ce7 19
emilmont 10:3bc89ef62ce7 20 #include "serial_api.h"
emilmont 10:3bc89ef62ce7 21 #include "cmsis.h"
emilmont 10:3bc89ef62ce7 22 #include "pinmap.h"
emilmont 10:3bc89ef62ce7 23 #include "error.h"
emilmont 10:3bc89ef62ce7 24
emilmont 10:3bc89ef62ce7 25 /******************************************************************************
emilmont 10:3bc89ef62ce7 26 * INITIALIZATION
emilmont 10:3bc89ef62ce7 27 ******************************************************************************/
emilmont 10:3bc89ef62ce7 28 static const PinMap PinMap_UART_TX[] = {
emilmont 10:3bc89ef62ce7 29 {P0_0, UART_3, 2},
emilmont 10:3bc89ef62ce7 30 {P0_2, UART_0, 1},
emilmont 10:3bc89ef62ce7 31 {P0_10, UART_2, 1},
emilmont 10:3bc89ef62ce7 32 {P0_15, UART_1, 1},
emilmont 10:3bc89ef62ce7 33 {P1_29, UART_4, 5},
emilmont 10:3bc89ef62ce7 34 {P0_25, UART_3, 3},
emilmont 10:3bc89ef62ce7 35 {P2_0 , UART_1, 2},
emilmont 10:3bc89ef62ce7 36 {P2_8 , UART_2, 2},
emilmont 10:3bc89ef62ce7 37 {P3_16, UART_1, 3},
emilmont 10:3bc89ef62ce7 38 {P4_22, UART_2, 2},
emilmont 10:3bc89ef62ce7 39 {P4_28, UART_3, 2},
emilmont 10:3bc89ef62ce7 40 {P5_4, UART_4, 4},
emilmont 10:3bc89ef62ce7 41 {NC , NC , 0}
emilmont 10:3bc89ef62ce7 42 };
emilmont 10:3bc89ef62ce7 43
emilmont 10:3bc89ef62ce7 44 static const PinMap PinMap_UART_RX[] = {
emilmont 10:3bc89ef62ce7 45 {P0_1 , UART_3, 2},
emilmont 10:3bc89ef62ce7 46 {P0_3 , UART_0, 1},
emilmont 10:3bc89ef62ce7 47 {P0_11, UART_2, 1},
emilmont 10:3bc89ef62ce7 48 {P0_16, UART_1, 1},
emilmont 10:3bc89ef62ce7 49 {P0_26, UART_3, 3},
emilmont 10:3bc89ef62ce7 50 {P2_1 , UART_1, 2},
emilmont 10:3bc89ef62ce7 51 {P2_9 , UART_2, 2},
emilmont 10:3bc89ef62ce7 52 {P3_17, UART_1, 3},
emilmont 10:3bc89ef62ce7 53 {P4_23, UART_2, 2},
emilmont 10:3bc89ef62ce7 54 {P4_29, UART_3, 2},
emilmont 10:3bc89ef62ce7 55 {P5_3, UART_4, 4},
emilmont 10:3bc89ef62ce7 56 {NC , NC , 0}
emilmont 10:3bc89ef62ce7 57 };
emilmont 10:3bc89ef62ce7 58
emilmont 10:3bc89ef62ce7 59 #define UART_NUM 5
emilmont 10:3bc89ef62ce7 60
emilmont 10:3bc89ef62ce7 61 static uint32_t serial_irq_ids[UART_NUM] = {0};
emilmont 10:3bc89ef62ce7 62 static uart_irq_handler irq_handler;
emilmont 10:3bc89ef62ce7 63
emilmont 10:3bc89ef62ce7 64 int stdio_uart_inited = 0;
emilmont 10:3bc89ef62ce7 65 serial_t stdio_uart;
emilmont 10:3bc89ef62ce7 66
emilmont 10:3bc89ef62ce7 67 void serial_init(serial_t *obj, PinName tx, PinName rx) {
emilmont 10:3bc89ef62ce7 68 int is_stdio_uart = 0;
emilmont 10:3bc89ef62ce7 69
emilmont 10:3bc89ef62ce7 70 // determine the UART to use
emilmont 10:3bc89ef62ce7 71 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
emilmont 10:3bc89ef62ce7 72 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
emilmont 10:3bc89ef62ce7 73 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
emilmont 10:3bc89ef62ce7 74 if ((int)uart == NC) {
emilmont 10:3bc89ef62ce7 75 error("Serial pinout mapping failed");
emilmont 10:3bc89ef62ce7 76 }
emilmont 10:3bc89ef62ce7 77
emilmont 10:3bc89ef62ce7 78 obj->uart = (LPC_UART_TypeDef *)uart;
emilmont 10:3bc89ef62ce7 79 // enable power
emilmont 10:3bc89ef62ce7 80 switch (uart) {
emilmont 10:3bc89ef62ce7 81 case UART_0: LPC_SC->PCONP |= 1 << 3; break;
emilmont 10:3bc89ef62ce7 82 case UART_1: LPC_SC->PCONP |= 1 << 4; break;
emilmont 10:3bc89ef62ce7 83 case UART_2: LPC_SC->PCONP |= 1 << 24; break;
emilmont 10:3bc89ef62ce7 84 case UART_3: LPC_SC->PCONP |= 1 << 25; break;
emilmont 10:3bc89ef62ce7 85 case UART_4: LPC_SC->PCONP |= 1 << 8; break;
emilmont 10:3bc89ef62ce7 86 }
emilmont 10:3bc89ef62ce7 87
emilmont 10:3bc89ef62ce7 88 // enable fifos and default rx trigger level
emilmont 10:3bc89ef62ce7 89 obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled
emilmont 10:3bc89ef62ce7 90 | 0 << 1 // Rx Fifo Reset
emilmont 10:3bc89ef62ce7 91 | 0 << 2 // Tx Fifo Reset
emilmont 10:3bc89ef62ce7 92 | 0 << 6; // Rx irq trigger level - 0 = 1 char, 1 = 4 chars, 2 = 8 chars, 3 = 14 chars
emilmont 10:3bc89ef62ce7 93
emilmont 10:3bc89ef62ce7 94 // disable irqs
emilmont 10:3bc89ef62ce7 95 obj->uart->IER = 0 << 0 // Rx Data available irq enable
emilmont 10:3bc89ef62ce7 96 | 0 << 1 // Tx Fifo empty irq enable
emilmont 10:3bc89ef62ce7 97 | 0 << 2; // Rx Line Status irq enable
emilmont 10:3bc89ef62ce7 98
emilmont 10:3bc89ef62ce7 99 // set default baud rate and format
emilmont 10:3bc89ef62ce7 100 serial_baud (obj, 9600);
emilmont 10:3bc89ef62ce7 101 serial_format(obj, 8, ParityNone, 1);
emilmont 10:3bc89ef62ce7 102
emilmont 10:3bc89ef62ce7 103 // pinout the chosen uart
emilmont 10:3bc89ef62ce7 104 pinmap_pinout(tx, PinMap_UART_TX);
emilmont 10:3bc89ef62ce7 105 pinmap_pinout(rx, PinMap_UART_RX);
emilmont 10:3bc89ef62ce7 106
emilmont 10:3bc89ef62ce7 107 // set rx/tx pins in PullUp mode
emilmont 10:3bc89ef62ce7 108 pin_mode(tx, PullUp);
emilmont 10:3bc89ef62ce7 109 pin_mode(rx, PullUp);
emilmont 10:3bc89ef62ce7 110
emilmont 10:3bc89ef62ce7 111 switch (uart) {
emilmont 10:3bc89ef62ce7 112 case UART_0: obj->index = 0; break;
emilmont 10:3bc89ef62ce7 113 case UART_1: obj->index = 1; break;
emilmont 10:3bc89ef62ce7 114 case UART_2: obj->index = 2; break;
emilmont 10:3bc89ef62ce7 115 case UART_3: obj->index = 3; break;
emilmont 10:3bc89ef62ce7 116 case UART_4: obj->index = 4; break;
emilmont 10:3bc89ef62ce7 117 }
emilmont 10:3bc89ef62ce7 118
emilmont 10:3bc89ef62ce7 119 is_stdio_uart = (uart == STDIO_UART) ? (1) : (0);
emilmont 10:3bc89ef62ce7 120
emilmont 10:3bc89ef62ce7 121 if (is_stdio_uart) {
emilmont 10:3bc89ef62ce7 122 stdio_uart_inited = 1;
emilmont 10:3bc89ef62ce7 123 memcpy(&stdio_uart, obj, sizeof(serial_t));
emilmont 10:3bc89ef62ce7 124 }
emilmont 10:3bc89ef62ce7 125 }
emilmont 10:3bc89ef62ce7 126
emilmont 10:3bc89ef62ce7 127 void serial_free(serial_t *obj) {
emilmont 10:3bc89ef62ce7 128 serial_irq_ids[obj->index] = 0;
emilmont 10:3bc89ef62ce7 129 }
emilmont 10:3bc89ef62ce7 130
emilmont 10:3bc89ef62ce7 131 // serial_baud
emilmont 10:3bc89ef62ce7 132 // set the baud rate, taking in to account the current SystemFrequency
emilmont 10:3bc89ef62ce7 133 void serial_baud(serial_t *obj, int baudrate) {
emilmont 10:3bc89ef62ce7 134 uint32_t PCLK = PeripheralClock;
emilmont 10:3bc89ef62ce7 135
emilmont 10:3bc89ef62ce7 136 // First we check to see if the basic divide with no DivAddVal/MulVal
emilmont 10:3bc89ef62ce7 137 // ratio gives us an integer result. If it does, we set DivAddVal = 0,
emilmont 10:3bc89ef62ce7 138 // MulVal = 1. Otherwise, we search the valid ratio value range to find
emilmont 10:3bc89ef62ce7 139 // the closest match. This could be more elegant, using search methods
emilmont 10:3bc89ef62ce7 140 // and/or lookup tables, but the brute force method is not that much
emilmont 10:3bc89ef62ce7 141 // slower, and is more maintainable.
emilmont 10:3bc89ef62ce7 142 uint16_t DL = PCLK / (16 * baudrate);
emilmont 10:3bc89ef62ce7 143
emilmont 10:3bc89ef62ce7 144 uint8_t DivAddVal = 0;
emilmont 10:3bc89ef62ce7 145 uint8_t MulVal = 1;
emilmont 10:3bc89ef62ce7 146 int hit = 0;
emilmont 10:3bc89ef62ce7 147 uint16_t dlv;
emilmont 10:3bc89ef62ce7 148 uint8_t mv, dav;
emilmont 10:3bc89ef62ce7 149 if ((PCLK % (16 * baudrate)) != 0) { // Checking for zero remainder
emilmont 10:3bc89ef62ce7 150 float err_best = (float) baudrate;
emilmont 10:3bc89ef62ce7 151 uint16_t dlmax = DL;
emilmont 10:3bc89ef62ce7 152 for ( dlv = (dlmax/2); (dlv <= dlmax) && !hit; dlv++) {
emilmont 10:3bc89ef62ce7 153 for ( mv = 1; mv <= 15; mv++) {
emilmont 10:3bc89ef62ce7 154 for ( dav = 1; dav < mv; dav++) {
emilmont 10:3bc89ef62ce7 155 float ratio = 1.0f + ((float) dav / (float) mv);
emilmont 10:3bc89ef62ce7 156 float calcbaud = (float)PCLK / (16.0f * (float) dlv * ratio);
emilmont 10:3bc89ef62ce7 157 float err = fabs(((float) baudrate - calcbaud) / (float) baudrate);
emilmont 10:3bc89ef62ce7 158 if (err < err_best) {
emilmont 10:3bc89ef62ce7 159 DL = dlv;
emilmont 10:3bc89ef62ce7 160 DivAddVal = dav;
emilmont 10:3bc89ef62ce7 161 MulVal = mv;
emilmont 10:3bc89ef62ce7 162 err_best = err;
emilmont 10:3bc89ef62ce7 163 if (err < 0.001f) {
emilmont 10:3bc89ef62ce7 164 hit = 1;
emilmont 10:3bc89ef62ce7 165 }
emilmont 10:3bc89ef62ce7 166 }
emilmont 10:3bc89ef62ce7 167 }
emilmont 10:3bc89ef62ce7 168 }
emilmont 10:3bc89ef62ce7 169 }
emilmont 10:3bc89ef62ce7 170 }
emilmont 10:3bc89ef62ce7 171
emilmont 10:3bc89ef62ce7 172 // set LCR[DLAB] to enable writing to divider registers
emilmont 10:3bc89ef62ce7 173 obj->uart->LCR |= (1 << 7);
emilmont 10:3bc89ef62ce7 174
emilmont 10:3bc89ef62ce7 175 // set divider values
emilmont 10:3bc89ef62ce7 176 obj->uart->DLM = (DL >> 8) & 0xFF;
emilmont 10:3bc89ef62ce7 177 obj->uart->DLL = (DL >> 0) & 0xFF;
emilmont 10:3bc89ef62ce7 178 obj->uart->FDR = (uint32_t) DivAddVal << 0
emilmont 10:3bc89ef62ce7 179 | (uint32_t) MulVal << 4;
emilmont 10:3bc89ef62ce7 180
emilmont 10:3bc89ef62ce7 181 // clear LCR[DLAB]
emilmont 10:3bc89ef62ce7 182 obj->uart->LCR &= ~(1 << 7);
emilmont 10:3bc89ef62ce7 183 }
emilmont 10:3bc89ef62ce7 184
emilmont 10:3bc89ef62ce7 185 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
emilmont 10:3bc89ef62ce7 186 // 0: 1 stop bits, 1: 2 stop bits
emilmont 10:3bc89ef62ce7 187 if (stop_bits != 1 && stop_bits != 2) {
emilmont 10:3bc89ef62ce7 188 error("Invalid stop bits specified");
emilmont 10:3bc89ef62ce7 189 }
emilmont 10:3bc89ef62ce7 190 stop_bits -= 1;
emilmont 10:3bc89ef62ce7 191
emilmont 10:3bc89ef62ce7 192 // 0: 5 data bits ... 3: 8 data bits
emilmont 10:3bc89ef62ce7 193 if (data_bits < 5 || data_bits > 8) {
emilmont 10:3bc89ef62ce7 194 error("Invalid number of bits (%d) in serial format, should be 5..8", data_bits);
emilmont 10:3bc89ef62ce7 195 }
emilmont 10:3bc89ef62ce7 196 data_bits -= 5;
emilmont 10:3bc89ef62ce7 197
emilmont 10:3bc89ef62ce7 198 int parity_enable, parity_select;
emilmont 10:3bc89ef62ce7 199 switch (parity) {
emilmont 10:3bc89ef62ce7 200 case ParityNone: parity_enable = 0; parity_select = 0; break;
emilmont 10:3bc89ef62ce7 201 case ParityOdd : parity_enable = 1; parity_select = 0; break;
emilmont 10:3bc89ef62ce7 202 case ParityEven: parity_enable = 1; parity_select = 1; break;
emilmont 10:3bc89ef62ce7 203 case ParityForced1: parity_enable = 1; parity_select = 2; break;
emilmont 10:3bc89ef62ce7 204 case ParityForced0: parity_enable = 1; parity_select = 3; break;
emilmont 10:3bc89ef62ce7 205 default:
emilmont 10:3bc89ef62ce7 206 error("Invalid serial parity setting");
emilmont 10:3bc89ef62ce7 207 return;
emilmont 10:3bc89ef62ce7 208 }
emilmont 10:3bc89ef62ce7 209
emilmont 10:3bc89ef62ce7 210 obj->uart->LCR = data_bits << 0
emilmont 10:3bc89ef62ce7 211 | stop_bits << 2
emilmont 10:3bc89ef62ce7 212 | parity_enable << 3
emilmont 10:3bc89ef62ce7 213 | parity_select << 4;
emilmont 10:3bc89ef62ce7 214 }
emilmont 10:3bc89ef62ce7 215
emilmont 10:3bc89ef62ce7 216 /******************************************************************************
emilmont 10:3bc89ef62ce7 217 * INTERRUPTS HANDLING
emilmont 10:3bc89ef62ce7 218 ******************************************************************************/
emilmont 10:3bc89ef62ce7 219 static inline void uart_irq(uint32_t iir, uint32_t index) {
emilmont 10:3bc89ef62ce7 220 // [Chapter 14] LPC17xx UART0/2/3: UARTn Interrupt Handling
emilmont 10:3bc89ef62ce7 221 SerialIrq irq_type;
emilmont 10:3bc89ef62ce7 222 switch (iir) {
emilmont 10:3bc89ef62ce7 223 case 1: irq_type = TxIrq; break;
emilmont 10:3bc89ef62ce7 224 case 2: irq_type = RxIrq; break;
emilmont 10:3bc89ef62ce7 225 default: return;
emilmont 10:3bc89ef62ce7 226 }
emilmont 10:3bc89ef62ce7 227
emilmont 10:3bc89ef62ce7 228 if (serial_irq_ids[index] != 0)
emilmont 10:3bc89ef62ce7 229 irq_handler(serial_irq_ids[index], irq_type);
emilmont 10:3bc89ef62ce7 230 }
emilmont 10:3bc89ef62ce7 231
emilmont 10:3bc89ef62ce7 232 void uart0_irq() {uart_irq((LPC_UART0->IIR >> 1) & 0x7, 0);}
emilmont 10:3bc89ef62ce7 233 void uart1_irq() {uart_irq((LPC_UART1->IIR >> 1) & 0x7, 1);}
emilmont 10:3bc89ef62ce7 234 void uart2_irq() {uart_irq((LPC_UART2->IIR >> 1) & 0x7, 2);}
emilmont 10:3bc89ef62ce7 235 void uart3_irq() {uart_irq((LPC_UART3->IIR >> 1) & 0x7, 3);}
emilmont 10:3bc89ef62ce7 236 void uart4_irq() {uart_irq((LPC_UART4->IIR >> 1) & 0x7, 4);}
emilmont 10:3bc89ef62ce7 237
emilmont 10:3bc89ef62ce7 238 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
emilmont 10:3bc89ef62ce7 239 irq_handler = handler;
emilmont 10:3bc89ef62ce7 240 serial_irq_ids[obj->index] = id;
emilmont 10:3bc89ef62ce7 241 }
emilmont 10:3bc89ef62ce7 242
emilmont 10:3bc89ef62ce7 243 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
emilmont 10:3bc89ef62ce7 244 IRQn_Type irq_n = (IRQn_Type)0;
emilmont 10:3bc89ef62ce7 245 uint32_t vector = 0;
emilmont 10:3bc89ef62ce7 246 switch ((int)obj->uart) {
emilmont 10:3bc89ef62ce7 247 case UART_0: irq_n=UART0_IRQn; vector = (uint32_t)&uart0_irq; break;
emilmont 10:3bc89ef62ce7 248 case UART_1: irq_n=UART1_IRQn; vector = (uint32_t)&uart1_irq; break;
emilmont 10:3bc89ef62ce7 249 case UART_2: irq_n=UART2_IRQn; vector = (uint32_t)&uart2_irq; break;
emilmont 10:3bc89ef62ce7 250 case UART_3: irq_n=UART3_IRQn; vector = (uint32_t)&uart3_irq; break;
emilmont 10:3bc89ef62ce7 251 case UART_4: irq_n=UART4_IRQn; vector = (uint32_t)&uart4_irq; break;
emilmont 10:3bc89ef62ce7 252 }
emilmont 10:3bc89ef62ce7 253
emilmont 10:3bc89ef62ce7 254 if (enable) {
emilmont 10:3bc89ef62ce7 255 obj->uart->IER |= 1 << irq;
emilmont 10:3bc89ef62ce7 256 NVIC_SetVector(irq_n, vector);
emilmont 10:3bc89ef62ce7 257 NVIC_EnableIRQ(irq_n);
emilmont 10:3bc89ef62ce7 258 } else { // disable
emilmont 10:3bc89ef62ce7 259 int all_disabled = 0;
emilmont 10:3bc89ef62ce7 260 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
emilmont 10:3bc89ef62ce7 261 obj->uart->IER &= ~(1 << irq);
emilmont 10:3bc89ef62ce7 262 all_disabled = (obj->uart->IER & (1 << other_irq)) == 0;
emilmont 10:3bc89ef62ce7 263 if (all_disabled)
emilmont 10:3bc89ef62ce7 264 NVIC_DisableIRQ(irq_n);
emilmont 10:3bc89ef62ce7 265 }
emilmont 10:3bc89ef62ce7 266 }
emilmont 10:3bc89ef62ce7 267
emilmont 10:3bc89ef62ce7 268 /******************************************************************************
emilmont 10:3bc89ef62ce7 269 * READ/WRITE
emilmont 10:3bc89ef62ce7 270 ******************************************************************************/
emilmont 10:3bc89ef62ce7 271 int serial_getc(serial_t *obj) {
emilmont 10:3bc89ef62ce7 272 while (!serial_readable(obj));
emilmont 10:3bc89ef62ce7 273 return obj->uart->RBR;
emilmont 10:3bc89ef62ce7 274 }
emilmont 10:3bc89ef62ce7 275
emilmont 10:3bc89ef62ce7 276 void serial_putc(serial_t *obj, int c) {
emilmont 10:3bc89ef62ce7 277 while (!serial_writable(obj));
emilmont 10:3bc89ef62ce7 278 obj->uart->THR = c;
emilmont 10:3bc89ef62ce7 279
emilmont 10:3bc89ef62ce7 280 uint32_t lsr = obj->uart->LSR;
emilmont 10:3bc89ef62ce7 281 lsr = lsr;
emilmont 10:3bc89ef62ce7 282 uint32_t thr = obj->uart->THR;
emilmont 10:3bc89ef62ce7 283 thr = thr;
emilmont 10:3bc89ef62ce7 284 }
emilmont 10:3bc89ef62ce7 285
emilmont 10:3bc89ef62ce7 286 int serial_readable(serial_t *obj) {
emilmont 10:3bc89ef62ce7 287 return obj->uart->LSR & 0x01;
emilmont 10:3bc89ef62ce7 288 }
emilmont 10:3bc89ef62ce7 289
emilmont 10:3bc89ef62ce7 290 int serial_writable(serial_t *obj) {
emilmont 10:3bc89ef62ce7 291 return obj->uart->LSR & 0x20;
emilmont 10:3bc89ef62ce7 292 }
emilmont 10:3bc89ef62ce7 293
emilmont 10:3bc89ef62ce7 294 void serial_clear(serial_t *obj) {
emilmont 10:3bc89ef62ce7 295 obj->uart->FCR = 1 << 1 // rx FIFO reset
emilmont 10:3bc89ef62ce7 296 | 1 << 2 // tx FIFO reset
emilmont 10:3bc89ef62ce7 297 | 0 << 6; // interrupt depth
emilmont 10:3bc89ef62ce7 298 }
emilmont 10:3bc89ef62ce7 299
emilmont 10:3bc89ef62ce7 300 void serial_pinout_tx(PinName tx) {
emilmont 10:3bc89ef62ce7 301 pinmap_pinout(tx, PinMap_UART_TX);
emilmont 10:3bc89ef62ce7 302 }