File content as of revision 0:5c4d7b2438d3:

{% extends "codered_cproject_cortexm0_common.tmpl" %}

{% block startup_file %}startup_LPC824_CR.cpp{% endblock %}

{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
<TargetConfig>
<Properties property_0="" property_2="LPC800_32.cfx" property_3="NXP" property_4="LPC824" property_count="5" version="70200"/>
<infoList vendor="NXP"><info chip="LPC824" flash_driver="LPC800_32.cfx" match_id="0x0" name="LPC824" stub="crt_emu_cm3_gen"><chip><name>LPC824</name>
<family>LPC82x</family>
<vendor>NXP (formerly Philips)</vendor>
<reset board="None" core="Real" sys="Real"/>
<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/>
<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
<memory id="RAM" type="RAM"/>
<memory id="Periph" is_volatile="true" type="Peripheral"/>
<memoryInstance derived_from="Flash" id="MFlash32" location="0x0" size="0x8000"/>
<memoryInstance derived_from="RAM" id="RamLoc8" location="0x10000000" size="0x2000"/>
<peripheralInstance derived_from="V6M_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/>
<peripheralInstance derived_from="V6M_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/>
<peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x40000000"/>
<peripheralInstance derived_from="MRT" determined="infoFile" id="MRT" location="0x40004000"/>
<peripheralInstance derived_from="WKT" determined="infoFile" id="WKT" location="0x40008000"/>
<peripheralInstance derived_from="SWM" determined="infoFile" id="SWM" location="0x4000c000"/>
<peripheralInstance derived_from="ADC" determined="infoFile" id="ADC" location="0x4001c000"/>
<peripheralInstance derived_from="PMU" determined="infoFile" id="PMU" location="0x40020000"/>
<peripheralInstance derived_from="CMP" determined="infoFile" id="CMP" location="0x40024000"/>
<peripheralInstance derived_from="DMATRIGMUX" determined="infoFile" id="DMATRIGMUX" location="0x40028000"/>
<peripheralInstance derived_from="INPUTMUX" determined="infoFile" id="INPUTMUX" location="0x4002c000"/>
<peripheralInstance derived_from="FLASHCTRL" determined="infoFile" id="FLASHCTRL" location="0x40040000"/>
<peripheralInstance derived_from="IOCON" determined="infoFile" id="IOCON" location="0x40044000"/>
<peripheralInstance derived_from="SYSCON" determined="infoFile" id="SYSCON" location="0x40048000"/>
<peripheralInstance derived_from="I2C0" determined="infoFile" id="I2C0" location="0x40050000"/>
<peripheralInstance derived_from="I2C1" determined="infoFile" id="I2C1" location="0x40054000"/>
<peripheralInstance derived_from="SPI0" determined="infoFile" id="SPI0" location="0x40058000"/>
<peripheralInstance derived_from="SPI1" determined="infoFile" id="SPI1" location="0x4005c000"/>
<peripheralInstance derived_from="USART0" determined="infoFile" id="USART0" location="0x40064000"/>
<peripheralInstance derived_from="USART1" determined="infoFile" id="USART1" location="0x40068000"/>
<peripheralInstance derived_from="USART2" determined="infoFile" id="USART2" location="0x4006c000"/>
<peripheralInstance derived_from="I2C2" determined="infoFile" id="I2C2" location="0x40070000"/>
<peripheralInstance derived_from="I2C3" determined="infoFile" id="I2C3" location="0x40074000"/>
<peripheralInstance derived_from="CRC" determined="infoFile" id="CRC" location="0x50000000"/>
<peripheralInstance derived_from="SCT" determined="infoFile" id="SCT" location="0x50004000"/>
<peripheralInstance derived_from="DMA" determined="infoFile" id="DMA" location="0x50008000"/>
<peripheralInstance derived_from="GPIO-PORT" determined="infoFile" id="GPIO-PORT" location="0xa0000000"/>
<peripheralInstance derived_from="PIN-INT" determined="infoFile" id="PIN-INT" location="0xa0004000"/>
</chip>
<processor><name gcc_name="cortex-m0">Cortex-M0</name>
<family>Cortex-M</family>
</processor>
<link href="LPC82x_peripheral.xme" show="embed" type="simple"/>
</info>
</infoList>
</TargetConfig>{% endblock %}