Greg Steiert / pegasus_dev

Development mbed library for MAX32630FTHR

Dependents:   blinky_max32630fthr

tools/export/codered_lpc1549_cproject.tmpl@0:5c4d7b2438d3, 2016-11-11 (annotated)

Committer:
switches
Date:
Fri Nov 11 20:59:50 2016 +0000
Revision:
0:5c4d7b2438d3
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
switches 0:5c4d7b2438d3 1 {% extends "codered_cproject_cortexm3_common.tmpl" %}
switches 0:5c4d7b2438d3 2
switches 0:5c4d7b2438d3 3 {% block startup_file %}cr_startup_lpc15xx.c{% endblock %}
switches 0:5c4d7b2438d3 4
switches 0:5c4d7b2438d3 5 {% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
switches 0:5c4d7b2438d3 6 <TargetConfig>
switches 0:5c4d7b2438d3 7 <Properties property_0="" property_2="LPC15xx_256K.cfx" property_3="NXP" property_4="LPC1549" property_count="5" version="70200"/>
switches 0:5c4d7b2438d3 8 <infoList vendor="NXP">
switches 0:5c4d7b2438d3 9 <info chip="LPC1549" connectscript="LPC15RunBootRomConnect.scp" flash_driver="LPC15xx_256K.cfx" match_id="0x0" name="LPC1549" resetscript="LPC15RunBootRomReset.scp" stub="crt_emu_cm3_gen">
switches 0:5c4d7b2438d3 10 <chip>
switches 0:5c4d7b2438d3 11 <name>LPC1549</name>
switches 0:5c4d7b2438d3 12 <family>LPC15xx</family>
switches 0:5c4d7b2438d3 13 <vendor>NXP (formerly Philips)</vendor>
switches 0:5c4d7b2438d3 14 <reset board="None" core="Real" sys="Real"/>
switches 0:5c4d7b2438d3 15 <clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/>
switches 0:5c4d7b2438d3 16 <memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
switches 0:5c4d7b2438d3 17 <memory id="RAM" type="RAM"/>
switches 0:5c4d7b2438d3 18 <memory id="Periph" is_volatile="true" type="Peripheral"/>
switches 0:5c4d7b2438d3 19 <memoryInstance derived_from="Flash" id="MFlash256" location="0x0" size="0x40000"/>
switches 0:5c4d7b2438d3 20 <memoryInstance derived_from="RAM" id="Ram0_16" location="0x2000000" size="0x4000"/>
switches 0:5c4d7b2438d3 21 <memoryInstance derived_from="RAM" id="Ram1_16" location="0x2004000" size="0x4000"/>
switches 0:5c4d7b2438d3 22 <memoryInstance derived_from="RAM" id="Ram2_4" location="0x2008000" size="0x1000"/>
switches 0:5c4d7b2438d3 23 <peripheralInstance derived_from="LPC15_MPU" determined="infoFile" id="MPU" location="0xe000ed90"/>
switches 0:5c4d7b2438d3 24 <peripheralInstance derived_from="LPC15_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/>
switches 0:5c4d7b2438d3 25 <peripheralInstance derived_from="LPC15_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/>
switches 0:5c4d7b2438d3 26 <peripheralInstance derived_from="LPC15_ITM" determined="infoFile" id="ITM" location="0xe0000000"/>
switches 0:5c4d7b2438d3 27 <peripheralInstance derived_from="GPIO-PORT" determined="infoFile" id="GPIO-PORT" location="0x1c000000"/>
switches 0:5c4d7b2438d3 28 <peripheralInstance derived_from="DMA" determined="infoFile" id="DMA" location="0x1c004000"/>
switches 0:5c4d7b2438d3 29 <peripheralInstance derived_from="USB" determined="infoFile" id="USB" location="0x1c00c000"/>
switches 0:5c4d7b2438d3 30 <peripheralInstance derived_from="CRC" determined="infoFile" id="CRC" location="0x1c010000"/>
switches 0:5c4d7b2438d3 31 <peripheralInstance derived_from="SCT0" determined="infoFile" id="SCT0" location="0x1c018000"/>
switches 0:5c4d7b2438d3 32 <peripheralInstance derived_from="SCT1" determined="infoFile" id="SCT1" location="0x1c01c000"/>
switches 0:5c4d7b2438d3 33 <peripheralInstance derived_from="SCT2" determined="infoFile" id="SCT2" location="0x1c020000"/>
switches 0:5c4d7b2438d3 34 <peripheralInstance derived_from="SCT3" determined="infoFile" id="SCT3" location="0x1c024000"/>
switches 0:5c4d7b2438d3 35 <peripheralInstance derived_from="ADC0" determined="infoFile" id="ADC0" location="0x40000000"/>
switches 0:5c4d7b2438d3 36 <peripheralInstance derived_from="DAC" determined="infoFile" id="DAC" location="0x40004000"/>
switches 0:5c4d7b2438d3 37 <peripheralInstance derived_from="ACMP" determined="infoFile" id="ACMP" location="0x40008000"/>
switches 0:5c4d7b2438d3 38 <peripheralInstance derived_from="INMUX" determined="infoFile" id="INMUX" location="0x40014000"/>
switches 0:5c4d7b2438d3 39 <peripheralInstance derived_from="RTC" determined="infoFile" id="RTC" location="0x40028000"/>
switches 0:5c4d7b2438d3 40 <peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x4002c000"/>
switches 0:5c4d7b2438d3 41 <peripheralInstance derived_from="SWM" determined="infoFile" id="SWM" location="0x40038000"/>
switches 0:5c4d7b2438d3 42 <peripheralInstance derived_from="PMU" determined="infoFile" id="PMU" location="0x4003c000"/>
switches 0:5c4d7b2438d3 43 <peripheralInstance derived_from="USART0" determined="infoFile" id="USART0" location="0x40040000"/>
switches 0:5c4d7b2438d3 44 <peripheralInstance derived_from="USART1" determined="infoFile" id="USART1" location="0x40044000"/>
switches 0:5c4d7b2438d3 45 <peripheralInstance derived_from="SPI0" determined="infoFile" id="SPI0" location="0x40048000"/>
switches 0:5c4d7b2438d3 46 <peripheralInstance derived_from="SPI1" determined="infoFile" id="SPI1" location="0x4004c000"/>
switches 0:5c4d7b2438d3 47 <peripheralInstance derived_from="I2C0" determined="infoFile" id="I2C0" location="0x40050000"/>
switches 0:5c4d7b2438d3 48 <peripheralInstance derived_from="QEI" determined="infoFile" id="QEI" location="0x40058000"/>
switches 0:5c4d7b2438d3 49 <peripheralInstance derived_from="SYSCON" determined="infoFile" id="SYSCON" location="0x40074000"/>
switches 0:5c4d7b2438d3 50 <peripheralInstance derived_from="ADC1" determined="infoFile" id="ADC1" location="0x40080000"/>
switches 0:5c4d7b2438d3 51 <peripheralInstance derived_from="MRT" determined="infoFile" id="MRT" location="0x400a0000"/>
switches 0:5c4d7b2438d3 52 <peripheralInstance derived_from="PINT" determined="infoFile" id="PINT" location="0x400a4000"/>
switches 0:5c4d7b2438d3 53 <peripheralInstance derived_from="GINT0" determined="infoFile" id="GINT0" location="0x400a8000"/>
switches 0:5c4d7b2438d3 54 <peripheralInstance derived_from="GINT1" determined="infoFile" id="GINT1" location="0x400ac000"/>
switches 0:5c4d7b2438d3 55 <peripheralInstance derived_from="RIT" determined="infoFile" id="RIT" location="0x400b4000"/>
switches 0:5c4d7b2438d3 56 <peripheralInstance derived_from="SCTIPU" determined="infoFile" id="SCTIPU" location="0x400b8000"/>
switches 0:5c4d7b2438d3 57 <peripheralInstance derived_from="FLASHCTRL" determined="infoFile" id="FLASHCTRL" location="0x400bc000"/>
switches 0:5c4d7b2438d3 58 <peripheralInstance derived_from="USART2" determined="infoFile" id="USART2" location="0x400c0000"/>
switches 0:5c4d7b2438d3 59 <peripheralInstance derived_from="C-CAN0" determined="infoFile" id="C-CAN0" location="0x400f0000"/>
switches 0:5c4d7b2438d3 60 <peripheralInstance derived_from="IOCON" determined="infoFile" id="IOCON" location="0x400f8000"/>
switches 0:5c4d7b2438d3 61 </chip>
switches 0:5c4d7b2438d3 62 <processor>
switches 0:5c4d7b2438d3 63 <name gcc_name="cortex-m3">Cortex-M3</name>
switches 0:5c4d7b2438d3 64 <family>Cortex-M</family>
switches 0:5c4d7b2438d3 65 </processor>
switches 0:5c4d7b2438d3 66 <link href="nxp_lpcxxxx_peripheral.xme" show="embed" type="simple"/>
switches 0:5c4d7b2438d3 67 </info>
switches 0:5c4d7b2438d3 68 </infoList>
switches 0:5c4d7b2438d3 69 </TargetConfig>{% endblock %}