Greg Steiert / pegasus_dev

Development mbed library for MAX32630FTHR

Dependents:   blinky_max32630fthr

hal/i2c_api.h@0:5c4d7b2438d3, 2016-11-11 (annotated)

Committer:
switches
Date:
Fri Nov 11 20:59:50 2016 +0000
Revision:
0:5c4d7b2438d3
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
switches 0:5c4d7b2438d3 1
switches 0:5c4d7b2438d3 2 /** \addtogroup hal */
switches 0:5c4d7b2438d3 3 /** @{*/
switches 0:5c4d7b2438d3 4 /* mbed Microcontroller Library
switches 0:5c4d7b2438d3 5 * Copyright (c) 2006-2015 ARM Limited
switches 0:5c4d7b2438d3 6 *
switches 0:5c4d7b2438d3 7 * Licensed under the Apache License, Version 2.0 (the "License");
switches 0:5c4d7b2438d3 8 * you may not use this file except in compliance with the License.
switches 0:5c4d7b2438d3 9 * You may obtain a copy of the License at
switches 0:5c4d7b2438d3 10 *
switches 0:5c4d7b2438d3 11 * http://www.apache.org/licenses/LICENSE-2.0
switches 0:5c4d7b2438d3 12 *
switches 0:5c4d7b2438d3 13 * Unless required by applicable law or agreed to in writing, software
switches 0:5c4d7b2438d3 14 * distributed under the License is distributed on an "AS IS" BASIS,
switches 0:5c4d7b2438d3 15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
switches 0:5c4d7b2438d3 16 * See the License for the specific language governing permissions and
switches 0:5c4d7b2438d3 17 * limitations under the License.
switches 0:5c4d7b2438d3 18 */
switches 0:5c4d7b2438d3 19 #ifndef MBED_I2C_API_H
switches 0:5c4d7b2438d3 20 #define MBED_I2C_API_H
switches 0:5c4d7b2438d3 21
switches 0:5c4d7b2438d3 22 #include "device.h"
switches 0:5c4d7b2438d3 23 #include "hal/buffer.h"
switches 0:5c4d7b2438d3 24
switches 0:5c4d7b2438d3 25 #if DEVICE_I2C_ASYNCH
switches 0:5c4d7b2438d3 26 #include "hal/dma_api.h"
switches 0:5c4d7b2438d3 27 #endif
switches 0:5c4d7b2438d3 28
switches 0:5c4d7b2438d3 29 #if DEVICE_I2C
switches 0:5c4d7b2438d3 30
switches 0:5c4d7b2438d3 31 /**
switches 0:5c4d7b2438d3 32 * @defgroup hal_I2CEvents I2C Events Macros
switches 0:5c4d7b2438d3 33 *
switches 0:5c4d7b2438d3 34 * @{
switches 0:5c4d7b2438d3 35 */
switches 0:5c4d7b2438d3 36 #define I2C_EVENT_ERROR (1 << 1)
switches 0:5c4d7b2438d3 37 #define I2C_EVENT_ERROR_NO_SLAVE (1 << 2)
switches 0:5c4d7b2438d3 38 #define I2C_EVENT_TRANSFER_COMPLETE (1 << 3)
switches 0:5c4d7b2438d3 39 #define I2C_EVENT_TRANSFER_EARLY_NACK (1 << 4)
switches 0:5c4d7b2438d3 40 #define I2C_EVENT_ALL (I2C_EVENT_ERROR | I2C_EVENT_TRANSFER_COMPLETE | I2C_EVENT_ERROR_NO_SLAVE | I2C_EVENT_TRANSFER_EARLY_NACK)
switches 0:5c4d7b2438d3 41
switches 0:5c4d7b2438d3 42 /**@}*/
switches 0:5c4d7b2438d3 43
switches 0:5c4d7b2438d3 44 #if DEVICE_I2C_ASYNCH
switches 0:5c4d7b2438d3 45 /** Asynch I2C HAL structure
switches 0:5c4d7b2438d3 46 */
switches 0:5c4d7b2438d3 47 typedef struct {
switches 0:5c4d7b2438d3 48 struct i2c_s i2c; /**< Target specific I2C structure */
switches 0:5c4d7b2438d3 49 struct buffer_s tx_buff; /**< Tx buffer */
switches 0:5c4d7b2438d3 50 struct buffer_s rx_buff; /**< Rx buffer */
switches 0:5c4d7b2438d3 51 } i2c_t;
switches 0:5c4d7b2438d3 52
switches 0:5c4d7b2438d3 53 #else
switches 0:5c4d7b2438d3 54 /** Non-asynch I2C HAL structure
switches 0:5c4d7b2438d3 55 */
switches 0:5c4d7b2438d3 56 typedef struct i2c_s i2c_t;
switches 0:5c4d7b2438d3 57
switches 0:5c4d7b2438d3 58 #endif
switches 0:5c4d7b2438d3 59
switches 0:5c4d7b2438d3 60 enum {
switches 0:5c4d7b2438d3 61 I2C_ERROR_NO_SLAVE = -1,
switches 0:5c4d7b2438d3 62 I2C_ERROR_BUS_BUSY = -2
switches 0:5c4d7b2438d3 63 };
switches 0:5c4d7b2438d3 64
switches 0:5c4d7b2438d3 65 #ifdef __cplusplus
switches 0:5c4d7b2438d3 66 extern "C" {
switches 0:5c4d7b2438d3 67 #endif
switches 0:5c4d7b2438d3 68
switches 0:5c4d7b2438d3 69 /**
switches 0:5c4d7b2438d3 70 * \defgroup hal_GeneralI2C I2C Configuration Functions
switches 0:5c4d7b2438d3 71 * @{
switches 0:5c4d7b2438d3 72 */
switches 0:5c4d7b2438d3 73
switches 0:5c4d7b2438d3 74 /** Initialize the I2C peripheral. It sets the default parameters for I2C
switches 0:5c4d7b2438d3 75 * peripheral, and configures its specifieds pins.
switches 0:5c4d7b2438d3 76 *
switches 0:5c4d7b2438d3 77 * @param obj The I2C object
switches 0:5c4d7b2438d3 78 * @param sda The sda pin
switches 0:5c4d7b2438d3 79 * @param scl The scl pin
switches 0:5c4d7b2438d3 80 */
switches 0:5c4d7b2438d3 81 void i2c_init(i2c_t *obj, PinName sda, PinName scl);
switches 0:5c4d7b2438d3 82
switches 0:5c4d7b2438d3 83 /** Configure the I2C frequency
switches 0:5c4d7b2438d3 84 *
switches 0:5c4d7b2438d3 85 * @param obj The I2C object
switches 0:5c4d7b2438d3 86 * @param hz Frequency in Hz
switches 0:5c4d7b2438d3 87 */
switches 0:5c4d7b2438d3 88 void i2c_frequency(i2c_t *obj, int hz);
switches 0:5c4d7b2438d3 89
switches 0:5c4d7b2438d3 90 /** Send START command
switches 0:5c4d7b2438d3 91 *
switches 0:5c4d7b2438d3 92 * @param obj The I2C object
switches 0:5c4d7b2438d3 93 */
switches 0:5c4d7b2438d3 94 int i2c_start(i2c_t *obj);
switches 0:5c4d7b2438d3 95
switches 0:5c4d7b2438d3 96 /** Send STOP command
switches 0:5c4d7b2438d3 97 *
switches 0:5c4d7b2438d3 98 * @param obj The I2C object
switches 0:5c4d7b2438d3 99 */
switches 0:5c4d7b2438d3 100 int i2c_stop(i2c_t *obj);
switches 0:5c4d7b2438d3 101
switches 0:5c4d7b2438d3 102 /** Blocking reading data
switches 0:5c4d7b2438d3 103 *
switches 0:5c4d7b2438d3 104 * @param obj The I2C object
switches 0:5c4d7b2438d3 105 * @param address 7-bit address (last bit is 1)
switches 0:5c4d7b2438d3 106 * @param data The buffer for receiving
switches 0:5c4d7b2438d3 107 * @param length Number of bytes to read
switches 0:5c4d7b2438d3 108 * @param stop Stop to be generated after the transfer is done
switches 0:5c4d7b2438d3 109 * @return Number of read bytes
switches 0:5c4d7b2438d3 110 */
switches 0:5c4d7b2438d3 111 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop);
switches 0:5c4d7b2438d3 112
switches 0:5c4d7b2438d3 113 /** Blocking sending data
switches 0:5c4d7b2438d3 114 *
switches 0:5c4d7b2438d3 115 * @param obj The I2C object
switches 0:5c4d7b2438d3 116 * @param address 7-bit address (last bit is 0)
switches 0:5c4d7b2438d3 117 * @param data The buffer for sending
switches 0:5c4d7b2438d3 118 * @param length Number of bytes to write
switches 0:5c4d7b2438d3 119 * @param stop Stop to be generated after the transfer is done
switches 0:5c4d7b2438d3 120 * @return Number of written bytes
switches 0:5c4d7b2438d3 121 */
switches 0:5c4d7b2438d3 122 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop);
switches 0:5c4d7b2438d3 123
switches 0:5c4d7b2438d3 124 /** Reset I2C peripheral. TODO: The action here. Most of the implementation sends stop()
switches 0:5c4d7b2438d3 125 *
switches 0:5c4d7b2438d3 126 * @param obj The I2C object
switches 0:5c4d7b2438d3 127 */
switches 0:5c4d7b2438d3 128 void i2c_reset(i2c_t *obj);
switches 0:5c4d7b2438d3 129
switches 0:5c4d7b2438d3 130 /** Read one byte
switches 0:5c4d7b2438d3 131 *
switches 0:5c4d7b2438d3 132 * @param obj The I2C object
switches 0:5c4d7b2438d3 133 * @param last Acknoledge
switches 0:5c4d7b2438d3 134 * @return The read byte
switches 0:5c4d7b2438d3 135 */
switches 0:5c4d7b2438d3 136 int i2c_byte_read(i2c_t *obj, int last);
switches 0:5c4d7b2438d3 137
switches 0:5c4d7b2438d3 138 /** Write one byte
switches 0:5c4d7b2438d3 139 *
switches 0:5c4d7b2438d3 140 * @param obj The I2C object
switches 0:5c4d7b2438d3 141 * @param data Byte to be written
switches 0:5c4d7b2438d3 142 * @return 0 if NAK was received, 1 if ACK was received, 2 for timeout.
switches 0:5c4d7b2438d3 143 */
switches 0:5c4d7b2438d3 144 int i2c_byte_write(i2c_t *obj, int data);
switches 0:5c4d7b2438d3 145
switches 0:5c4d7b2438d3 146 /**@}*/
switches 0:5c4d7b2438d3 147
switches 0:5c4d7b2438d3 148 #if DEVICE_I2CSLAVE
switches 0:5c4d7b2438d3 149
switches 0:5c4d7b2438d3 150 /**
switches 0:5c4d7b2438d3 151 * \defgroup SynchI2C Synchronous I2C Hardware Abstraction Layer for slave
switches 0:5c4d7b2438d3 152 * @{
switches 0:5c4d7b2438d3 153 */
switches 0:5c4d7b2438d3 154
switches 0:5c4d7b2438d3 155 /** Configure I2C as slave or master.
switches 0:5c4d7b2438d3 156 * @param obj The I2C object
switches 0:5c4d7b2438d3 157 * @return non-zero if a value is available
switches 0:5c4d7b2438d3 158 */
switches 0:5c4d7b2438d3 159 void i2c_slave_mode(i2c_t *obj, int enable_slave);
switches 0:5c4d7b2438d3 160
switches 0:5c4d7b2438d3 161 /** Check to see if the I2C slave has been addressed.
switches 0:5c4d7b2438d3 162 * @param obj The I2C object
switches 0:5c4d7b2438d3 163 * @return The status - 1 - read addresses, 2 - write to all slaves,
switches 0:5c4d7b2438d3 164 * 3 write addressed, 0 - the slave has not been addressed
switches 0:5c4d7b2438d3 165 */
switches 0:5c4d7b2438d3 166 int i2c_slave_receive(i2c_t *obj);
switches 0:5c4d7b2438d3 167
switches 0:5c4d7b2438d3 168 /** Configure I2C as slave or master.
switches 0:5c4d7b2438d3 169 * @param obj The I2C object
switches 0:5c4d7b2438d3 170 * @return non-zero if a value is available
switches 0:5c4d7b2438d3 171 */
switches 0:5c4d7b2438d3 172 int i2c_slave_read(i2c_t *obj, char *data, int length);
switches 0:5c4d7b2438d3 173
switches 0:5c4d7b2438d3 174 /** Configure I2C as slave or master.
switches 0:5c4d7b2438d3 175 * @param obj The I2C object
switches 0:5c4d7b2438d3 176 * @return non-zero if a value is available
switches 0:5c4d7b2438d3 177 */
switches 0:5c4d7b2438d3 178 int i2c_slave_write(i2c_t *obj, const char *data, int length);
switches 0:5c4d7b2438d3 179
switches 0:5c4d7b2438d3 180 /** Configure I2C address.
switches 0:5c4d7b2438d3 181 * @param obj The I2C object
switches 0:5c4d7b2438d3 182 * @param idx Currently not used
switches 0:5c4d7b2438d3 183 * @param address The address to be set
switches 0:5c4d7b2438d3 184 * @param mask Currently not used
switches 0:5c4d7b2438d3 185 */
switches 0:5c4d7b2438d3 186 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask);
switches 0:5c4d7b2438d3 187
switches 0:5c4d7b2438d3 188 #endif
switches 0:5c4d7b2438d3 189
switches 0:5c4d7b2438d3 190 /**@}*/
switches 0:5c4d7b2438d3 191
switches 0:5c4d7b2438d3 192 #if DEVICE_I2C_ASYNCH
switches 0:5c4d7b2438d3 193
switches 0:5c4d7b2438d3 194 /**
switches 0:5c4d7b2438d3 195 * \defgroup hal_AsynchI2C Asynchronous I2C Hardware Abstraction Layer
switches 0:5c4d7b2438d3 196 * @{
switches 0:5c4d7b2438d3 197 */
switches 0:5c4d7b2438d3 198
switches 0:5c4d7b2438d3 199 /** Start I2C asynchronous transfer
switches 0:5c4d7b2438d3 200 *
switches 0:5c4d7b2438d3 201 * @param obj The I2C object
switches 0:5c4d7b2438d3 202 * @param tx The transmit buffer
switches 0:5c4d7b2438d3 203 * @param tx_length The number of bytes to transmit
switches 0:5c4d7b2438d3 204 * @param rx The receive buffer
switches 0:5c4d7b2438d3 205 * @param rx_length The number of bytes to receive
switches 0:5c4d7b2438d3 206 * @param address The address to be set - 7bit or 9bit
switches 0:5c4d7b2438d3 207 * @param stop If true, stop will be generated after the transfer is done
switches 0:5c4d7b2438d3 208 * @param handler The I2C IRQ handler to be set
switches 0:5c4d7b2438d3 209 * @param hint DMA hint usage
switches 0:5c4d7b2438d3 210 */
switches 0:5c4d7b2438d3 211 void i2c_transfer_asynch(i2c_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint32_t address, uint32_t stop, uint32_t handler, uint32_t event, DMAUsage hint);
switches 0:5c4d7b2438d3 212
switches 0:5c4d7b2438d3 213 /** The asynchronous IRQ handler
switches 0:5c4d7b2438d3 214 *
switches 0:5c4d7b2438d3 215 * @param obj The I2C object which holds the transfer information
switches 0:5c4d7b2438d3 216 * @return Event flags if a transfer termination condition was met, otherwise return 0.
switches 0:5c4d7b2438d3 217 */
switches 0:5c4d7b2438d3 218 uint32_t i2c_irq_handler_asynch(i2c_t *obj);
switches 0:5c4d7b2438d3 219
switches 0:5c4d7b2438d3 220 /** Attempts to determine if the I2C peripheral is already in use
switches 0:5c4d7b2438d3 221 *
switches 0:5c4d7b2438d3 222 * @param obj The I2C object
switches 0:5c4d7b2438d3 223 * @return Non-zero if the I2C module is active or zero if it is not
switches 0:5c4d7b2438d3 224 */
switches 0:5c4d7b2438d3 225 uint8_t i2c_active(i2c_t *obj);
switches 0:5c4d7b2438d3 226
switches 0:5c4d7b2438d3 227 /** Abort asynchronous transfer
switches 0:5c4d7b2438d3 228 *
switches 0:5c4d7b2438d3 229 * This function does not perform any check - that should happen in upper layers.
switches 0:5c4d7b2438d3 230 * @param obj The I2C object
switches 0:5c4d7b2438d3 231 */
switches 0:5c4d7b2438d3 232 void i2c_abort_asynch(i2c_t *obj);
switches 0:5c4d7b2438d3 233
switches 0:5c4d7b2438d3 234 #endif
switches 0:5c4d7b2438d3 235
switches 0:5c4d7b2438d3 236 /**@}*/
switches 0:5c4d7b2438d3 237
switches 0:5c4d7b2438d3 238 #ifdef __cplusplus
switches 0:5c4d7b2438d3 239 }
switches 0:5c4d7b2438d3 240 #endif
switches 0:5c4d7b2438d3 241
switches 0:5c4d7b2438d3 242 #endif
switches 0:5c4d7b2438d3 243
switches 0:5c4d7b2438d3 244 #endif
switches 0:5c4d7b2438d3 245
switches 0:5c4d7b2438d3 246 /** @}*/