Greg Steiert / pegasus_dev

Development mbed library for MAX32630FTHR

Dependents:   blinky_max32630fthr

platform/CThunk.h@3:1198227e6421, 2016-12-16 (annotated)

Committer:
switches
Date:
Fri Dec 16 16:27:57 2016 +0000
Revision:
3:1198227e6421
Parent:
0:5c4d7b2438d3 
Changed ADC scale for MAX32625 platforms to 1.2V full scale to match MAX32630 platforms

Who changed what in which revision?

UserRevisionLine numberNew contents of line
switches 0:5c4d7b2438d3 1
switches 0:5c4d7b2438d3 2 /** \addtogroup platform */
switches 0:5c4d7b2438d3 3 /** @{*/
switches 0:5c4d7b2438d3 4 /* General C++ Object Thunking class
switches 0:5c4d7b2438d3 5 *
switches 0:5c4d7b2438d3 6 * - allows direct callbacks to non-static C++ class functions
switches 0:5c4d7b2438d3 7 * - keeps track for the corresponding class instance
switches 0:5c4d7b2438d3 8 * - supports an optional context parameter for the called function
switches 0:5c4d7b2438d3 9 * - ideally suited for class object receiving interrupts (NVIC_SetVector)
switches 0:5c4d7b2438d3 10 *
switches 0:5c4d7b2438d3 11 * Copyright (c) 2014-2015 ARM Limited
switches 0:5c4d7b2438d3 12 *
switches 0:5c4d7b2438d3 13 * Licensed under the Apache License, Version 2.0 (the "License");
switches 0:5c4d7b2438d3 14 * you may not use this file except in compliance with the License.
switches 0:5c4d7b2438d3 15 * You may obtain a copy of the License at
switches 0:5c4d7b2438d3 16 *
switches 0:5c4d7b2438d3 17 * http://www.apache.org/licenses/LICENSE-2.0
switches 0:5c4d7b2438d3 18 *
switches 0:5c4d7b2438d3 19 * Unless required by applicable law or agreed to in writing, software
switches 0:5c4d7b2438d3 20 * distributed under the License is distributed on an "AS IS" BASIS,
switches 0:5c4d7b2438d3 21 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
switches 0:5c4d7b2438d3 22 * See the License for the specific language governing permissions and
switches 0:5c4d7b2438d3 23 * limitations under the License.
switches 0:5c4d7b2438d3 24 */
switches 0:5c4d7b2438d3 25
switches 0:5c4d7b2438d3 26 /* General C++ Object Thunking class
switches 0:5c4d7b2438d3 27 *
switches 0:5c4d7b2438d3 28 * - allows direct callbacks to non-static C++ class functions
switches 0:5c4d7b2438d3 29 * - keeps track for the corresponding class instance
switches 0:5c4d7b2438d3 30 * - supports an optional context parameter for the called function
switches 0:5c4d7b2438d3 31 * - ideally suited for class object receiving interrupts (NVIC_SetVector)
switches 0:5c4d7b2438d3 32 */
switches 0:5c4d7b2438d3 33
switches 0:5c4d7b2438d3 34 #ifndef __CTHUNK_H__
switches 0:5c4d7b2438d3 35 #define __CTHUNK_H__
switches 0:5c4d7b2438d3 36
switches 0:5c4d7b2438d3 37 #define CTHUNK_ADDRESS 1
switches 0:5c4d7b2438d3 38 #define CTHUNK_VARIABLES volatile uint32_t code[2]
switches 0:5c4d7b2438d3 39
switches 0:5c4d7b2438d3 40 #if (defined(__CORTEX_M3) || defined(__CORTEX_M4) || defined(__CORTEX_M7) || defined(__CORTEX_A9))
switches 0:5c4d7b2438d3 41 /**
switches 0:5c4d7b2438d3 42 * CTHUNK disassembly for Cortex-M3/M4/M7/A9 (thumb2):
switches 0:5c4d7b2438d3 43 * * adr r0, #4
switches 0:5c4d7b2438d3 44 * * ldm r0, {r0, r1, r2, pc}
switches 0:5c4d7b2438d3 45 *
switches 0:5c4d7b2438d3 46 * This instruction loads the arguments for the static thunking function to r0-r2, and
switches 0:5c4d7b2438d3 47 * branches to that function by loading its address into PC.
switches 0:5c4d7b2438d3 48 *
switches 0:5c4d7b2438d3 49 * This is safe for both regular calling and interrupt calling, since it only touches scratch registers
switches 0:5c4d7b2438d3 50 * which should be saved by the caller, and are automatically saved as part of the IRQ context switch.
switches 0:5c4d7b2438d3 51 */
switches 0:5c4d7b2438d3 52 #define CTHUNK_ASSIGMENT do { \
switches 0:5c4d7b2438d3 53 m_thunk.code[0] = 0xE890A001; \
switches 0:5c4d7b2438d3 54 m_thunk.code[1] = 0x00008007; \
switches 0:5c4d7b2438d3 55 } while (0)
switches 0:5c4d7b2438d3 56
switches 0:5c4d7b2438d3 57 #elif (defined(__CORTEX_M0PLUS) || defined(__CORTEX_M0))
switches 0:5c4d7b2438d3 58 /*
switches 0:5c4d7b2438d3 59 * CTHUNK disassembly for Cortex M0/M0+ (thumb):
switches 0:5c4d7b2438d3 60 * * adr r0, #4
switches 0:5c4d7b2438d3 61 * * ldm r0, {r0, r1, r2, r3}
switches 0:5c4d7b2438d3 62 * * bx r3
switches 0:5c4d7b2438d3 63 */
switches 0:5c4d7b2438d3 64 #define CTHUNK_ASSIGMENT do { \
switches 0:5c4d7b2438d3 65 m_thunk.code[0] = 0xC80FA001; \
switches 0:5c4d7b2438d3 66 m_thunk.code[1] = 0x00004718; \
switches 0:5c4d7b2438d3 67 } while (0)
switches 0:5c4d7b2438d3 68
switches 0:5c4d7b2438d3 69 #else
switches 0:5c4d7b2438d3 70 #error "Target is not currently suported."
switches 0:5c4d7b2438d3 71 #endif
switches 0:5c4d7b2438d3 72
switches 0:5c4d7b2438d3 73 /* IRQ/Exception compatible thunk entry function */
switches 0:5c4d7b2438d3 74 typedef void (*CThunkEntry)(void);
switches 0:5c4d7b2438d3 75
switches 0:5c4d7b2438d3 76 /**
switches 0:5c4d7b2438d3 77 * Class for created a pointer with data bound to it
switches 0:5c4d7b2438d3 78 *
switches 0:5c4d7b2438d3 79 * @Note Synchronization level: Not protected
switches 0:5c4d7b2438d3 80 */
switches 0:5c4d7b2438d3 81 template<class T>
switches 0:5c4d7b2438d3 82 class CThunk
switches 0:5c4d7b2438d3 83 {
switches 0:5c4d7b2438d3 84 public:
switches 0:5c4d7b2438d3 85 typedef void (T::*CCallbackSimple)(void);
switches 0:5c4d7b2438d3 86 typedef void (T::*CCallback)(void* context);
switches 0:5c4d7b2438d3 87
switches 0:5c4d7b2438d3 88 inline CThunk(T *instance)
switches 0:5c4d7b2438d3 89 {
switches 0:5c4d7b2438d3 90 init(instance, NULL, NULL);
switches 0:5c4d7b2438d3 91 }
switches 0:5c4d7b2438d3 92
switches 0:5c4d7b2438d3 93 inline CThunk(T *instance, CCallback callback)
switches 0:5c4d7b2438d3 94 {
switches 0:5c4d7b2438d3 95 init(instance, callback, NULL);
switches 0:5c4d7b2438d3 96 }
switches 0:5c4d7b2438d3 97
switches 0:5c4d7b2438d3 98 ~CThunk() {
switches 0:5c4d7b2438d3 99
switches 0:5c4d7b2438d3 100 }
switches 0:5c4d7b2438d3 101
switches 0:5c4d7b2438d3 102 inline CThunk(T *instance, CCallbackSimple callback)
switches 0:5c4d7b2438d3 103 {
switches 0:5c4d7b2438d3 104 init(instance, (CCallback)callback, NULL);
switches 0:5c4d7b2438d3 105 }
switches 0:5c4d7b2438d3 106
switches 0:5c4d7b2438d3 107 inline CThunk(T &instance, CCallback callback)
switches 0:5c4d7b2438d3 108 {
switches 0:5c4d7b2438d3 109 init(instance, callback, NULL);
switches 0:5c4d7b2438d3 110 }
switches 0:5c4d7b2438d3 111
switches 0:5c4d7b2438d3 112 inline CThunk(T &instance, CCallbackSimple callback)
switches 0:5c4d7b2438d3 113 {
switches 0:5c4d7b2438d3 114 init(instance, (CCallback)callback, NULL);
switches 0:5c4d7b2438d3 115 }
switches 0:5c4d7b2438d3 116
switches 0:5c4d7b2438d3 117 inline CThunk(T &instance, CCallback callback, void* context)
switches 0:5c4d7b2438d3 118 {
switches 0:5c4d7b2438d3 119 init(instance, callback, context);
switches 0:5c4d7b2438d3 120 }
switches 0:5c4d7b2438d3 121
switches 0:5c4d7b2438d3 122 inline void callback(CCallback callback)
switches 0:5c4d7b2438d3 123 {
switches 0:5c4d7b2438d3 124 m_callback = callback;
switches 0:5c4d7b2438d3 125 }
switches 0:5c4d7b2438d3 126
switches 0:5c4d7b2438d3 127 inline void callback(CCallbackSimple callback)
switches 0:5c4d7b2438d3 128 {
switches 0:5c4d7b2438d3 129 m_callback = (CCallback)callback;
switches 0:5c4d7b2438d3 130 }
switches 0:5c4d7b2438d3 131
switches 0:5c4d7b2438d3 132 inline void context(void* context)
switches 0:5c4d7b2438d3 133 {
switches 0:5c4d7b2438d3 134 m_thunk.context = (uint32_t)context;
switches 0:5c4d7b2438d3 135 }
switches 0:5c4d7b2438d3 136
switches 0:5c4d7b2438d3 137 inline void context(uint32_t context)
switches 0:5c4d7b2438d3 138 {
switches 0:5c4d7b2438d3 139 m_thunk.context = context;
switches 0:5c4d7b2438d3 140 }
switches 0:5c4d7b2438d3 141
switches 0:5c4d7b2438d3 142 inline uint32_t entry(void)
switches 0:5c4d7b2438d3 143 {
switches 0:5c4d7b2438d3 144 return (((uint32_t)&m_thunk)|CTHUNK_ADDRESS);
switches 0:5c4d7b2438d3 145 }
switches 0:5c4d7b2438d3 146
switches 0:5c4d7b2438d3 147 /* get thunk entry point for connecting rhunk to an IRQ table */
switches 0:5c4d7b2438d3 148 inline operator CThunkEntry(void)
switches 0:5c4d7b2438d3 149 {
switches 0:5c4d7b2438d3 150 return (CThunkEntry)entry();
switches 0:5c4d7b2438d3 151 }
switches 0:5c4d7b2438d3 152
switches 0:5c4d7b2438d3 153 /* get thunk entry point for connecting rhunk to an IRQ table */
switches 0:5c4d7b2438d3 154 inline operator uint32_t(void)
switches 0:5c4d7b2438d3 155 {
switches 0:5c4d7b2438d3 156 return entry();
switches 0:5c4d7b2438d3 157 }
switches 0:5c4d7b2438d3 158
switches 0:5c4d7b2438d3 159 /* simple test function */
switches 0:5c4d7b2438d3 160 inline void call(void)
switches 0:5c4d7b2438d3 161 {
switches 0:5c4d7b2438d3 162 (((CThunkEntry)(entry()))());
switches 0:5c4d7b2438d3 163 }
switches 0:5c4d7b2438d3 164
switches 0:5c4d7b2438d3 165 private:
switches 0:5c4d7b2438d3 166 T* m_instance;
switches 0:5c4d7b2438d3 167 volatile CCallback m_callback;
switches 0:5c4d7b2438d3 168
switches 0:5c4d7b2438d3 169 // TODO: this needs proper fix, to refactor toolchain header file and all its use
switches 0:5c4d7b2438d3 170 // PACKED there is not defined properly for IAR
switches 0:5c4d7b2438d3 171 #if defined (__ICCARM__)
switches 0:5c4d7b2438d3 172 typedef __packed struct
switches 0:5c4d7b2438d3 173 {
switches 0:5c4d7b2438d3 174 CTHUNK_VARIABLES;
switches 0:5c4d7b2438d3 175 volatile uint32_t instance;
switches 0:5c4d7b2438d3 176 volatile uint32_t context;
switches 0:5c4d7b2438d3 177 volatile uint32_t callback;
switches 0:5c4d7b2438d3 178 volatile uint32_t trampoline;
switches 0:5c4d7b2438d3 179 } CThunkTrampoline;
switches 0:5c4d7b2438d3 180 #else
switches 0:5c4d7b2438d3 181 typedef struct
switches 0:5c4d7b2438d3 182 {
switches 0:5c4d7b2438d3 183 CTHUNK_VARIABLES;
switches 0:5c4d7b2438d3 184 volatile uint32_t instance;
switches 0:5c4d7b2438d3 185 volatile uint32_t context;
switches 0:5c4d7b2438d3 186 volatile uint32_t callback;
switches 0:5c4d7b2438d3 187 volatile uint32_t trampoline;
switches 0:5c4d7b2438d3 188 } __attribute__((__packed__)) CThunkTrampoline;
switches 0:5c4d7b2438d3 189 #endif
switches 0:5c4d7b2438d3 190
switches 0:5c4d7b2438d3 191 static void trampoline(T* instance, void* context, CCallback* callback)
switches 0:5c4d7b2438d3 192 {
switches 0:5c4d7b2438d3 193 if(instance && *callback) {
switches 0:5c4d7b2438d3 194 (static_cast<T*>(instance)->**callback)(context);
switches 0:5c4d7b2438d3 195 }
switches 0:5c4d7b2438d3 196 }
switches 0:5c4d7b2438d3 197
switches 0:5c4d7b2438d3 198 volatile CThunkTrampoline m_thunk;
switches 0:5c4d7b2438d3 199
switches 0:5c4d7b2438d3 200 inline void init(T *instance, CCallback callback, void* context)
switches 0:5c4d7b2438d3 201 {
switches 0:5c4d7b2438d3 202 /* remember callback - need to add this level of redirection
switches 0:5c4d7b2438d3 203 as pointer size for member functions differs between platforms */
switches 0:5c4d7b2438d3 204 m_callback = callback;
switches 0:5c4d7b2438d3 205
switches 0:5c4d7b2438d3 206 /* populate thunking trampoline */
switches 0:5c4d7b2438d3 207 CTHUNK_ASSIGMENT;
switches 0:5c4d7b2438d3 208 m_thunk.context = (uint32_t)context;
switches 0:5c4d7b2438d3 209 m_thunk.instance = (uint32_t)instance;
switches 0:5c4d7b2438d3 210 m_thunk.callback = (uint32_t)&m_callback;
switches 0:5c4d7b2438d3 211 m_thunk.trampoline = (uint32_t)&trampoline;
switches 0:5c4d7b2438d3 212
switches 0:5c4d7b2438d3 213 #if defined(__CORTEX_A9)
switches 0:5c4d7b2438d3 214 /* Data cache clean */
switches 0:5c4d7b2438d3 215 /* Cache control */
switches 0:5c4d7b2438d3 216 {
switches 0:5c4d7b2438d3 217 uint32_t start_addr = (uint32_t)&m_thunk & 0xFFFFFFE0;
switches 0:5c4d7b2438d3 218 uint32_t end_addr = (uint32_t)&m_thunk + sizeof(m_thunk);
switches 0:5c4d7b2438d3 219 uint32_t addr;
switches 0:5c4d7b2438d3 220
switches 0:5c4d7b2438d3 221 /* Data cache clean and invalid */
switches 0:5c4d7b2438d3 222 for (addr = start_addr; addr < end_addr; addr += 0x20) {
switches 0:5c4d7b2438d3 223 __v7_clean_inv_dcache_mva((void *)addr);
switches 0:5c4d7b2438d3 224 }
switches 0:5c4d7b2438d3 225 /* Instruction cache invalid */
switches 0:5c4d7b2438d3 226 __v7_inv_icache_all();
switches 0:5c4d7b2438d3 227 __ca9u_inv_tlb_all();
switches 0:5c4d7b2438d3 228 __v7_inv_btac();
switches 0:5c4d7b2438d3 229 }
switches 0:5c4d7b2438d3 230 #endif
switches 0:5c4d7b2438d3 231 #if defined(__CORTEX_M7)
switches 0:5c4d7b2438d3 232 /* Data cache clean and invalid */
switches 0:5c4d7b2438d3 233 SCB_CleanInvalidateDCache();
switches 0:5c4d7b2438d3 234
switches 0:5c4d7b2438d3 235 /* Instruction cache invalid */
switches 0:5c4d7b2438d3 236 SCB_InvalidateICache();
switches 0:5c4d7b2438d3 237 #endif
switches 0:5c4d7b2438d3 238 __ISB();
switches 0:5c4d7b2438d3 239 __DSB();
switches 0:5c4d7b2438d3 240 }
switches 0:5c4d7b2438d3 241 };
switches 0:5c4d7b2438d3 242
switches 0:5c4d7b2438d3 243 #endif/*__CTHUNK_H__*/
switches 0:5c4d7b2438d3 244
switches 0:5c4d7b2438d3 245 /** @}*/