Greg Steiert / maxim_dev

Dependents:   sensomed

hal/spi_api.h@0:0e018d759a2a, 2016-11-08 (annotated)

Committer:
switches
Date:
Tue Nov 08 18:27:11 2016 +0000
Revision:
0:0e018d759a2a
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switches 0:0e018d759a2a 1
switches 0:0e018d759a2a 2 /** \addtogroup hal */
switches 0:0e018d759a2a 3 /** @{*/
switches 0:0e018d759a2a 4 /* mbed Microcontroller Library
switches 0:0e018d759a2a 5 * Copyright (c) 2006-2013 ARM Limited
switches 0:0e018d759a2a 6 *
switches 0:0e018d759a2a 7 * Licensed under the Apache License, Version 2.0 (the "License");
switches 0:0e018d759a2a 8 * you may not use this file except in compliance with the License.
switches 0:0e018d759a2a 9 * You may obtain a copy of the License at
switches 0:0e018d759a2a 10 *
switches 0:0e018d759a2a 11 * http://www.apache.org/licenses/LICENSE-2.0
switches 0:0e018d759a2a 12 *
switches 0:0e018d759a2a 13 * Unless required by applicable law or agreed to in writing, software
switches 0:0e018d759a2a 14 * distributed under the License is distributed on an "AS IS" BASIS,
switches 0:0e018d759a2a 15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
switches 0:0e018d759a2a 16 * See the License for the specific language governing permissions and
switches 0:0e018d759a2a 17 * limitations under the License.
switches 0:0e018d759a2a 18 */
switches 0:0e018d759a2a 19 #ifndef MBED_SPI_API_H
switches 0:0e018d759a2a 20 #define MBED_SPI_API_H
switches 0:0e018d759a2a 21
switches 0:0e018d759a2a 22 #include "device.h"
switches 0:0e018d759a2a 23 #include "hal/dma_api.h"
switches 0:0e018d759a2a 24 #include "hal/buffer.h"
switches 0:0e018d759a2a 25
switches 0:0e018d759a2a 26 #if DEVICE_SPI
switches 0:0e018d759a2a 27
switches 0:0e018d759a2a 28 #define SPI_EVENT_ERROR (1 << 1)
switches 0:0e018d759a2a 29 #define SPI_EVENT_COMPLETE (1 << 2)
switches 0:0e018d759a2a 30 #define SPI_EVENT_RX_OVERFLOW (1 << 3)
switches 0:0e018d759a2a 31 #define SPI_EVENT_ALL (SPI_EVENT_ERROR | SPI_EVENT_COMPLETE | SPI_EVENT_RX_OVERFLOW)
switches 0:0e018d759a2a 32
switches 0:0e018d759a2a 33 #define SPI_EVENT_INTERNAL_TRANSFER_COMPLETE (1 << 30) // Internal flag to report that an event occurred
switches 0:0e018d759a2a 34
switches 0:0e018d759a2a 35 #define SPI_FILL_WORD (0xFFFF)
switches 0:0e018d759a2a 36
switches 0:0e018d759a2a 37 #if DEVICE_SPI_ASYNCH
switches 0:0e018d759a2a 38 /** Asynch SPI HAL structure
switches 0:0e018d759a2a 39 */
switches 0:0e018d759a2a 40 typedef struct {
switches 0:0e018d759a2a 41 struct spi_s spi; /**< Target specific SPI structure */
switches 0:0e018d759a2a 42 struct buffer_s tx_buff; /**< Tx buffer */
switches 0:0e018d759a2a 43 struct buffer_s rx_buff; /**< Rx buffer */
switches 0:0e018d759a2a 44 } spi_t;
switches 0:0e018d759a2a 45
switches 0:0e018d759a2a 46 #else
switches 0:0e018d759a2a 47 /** Non-asynch SPI HAL structure
switches 0:0e018d759a2a 48 */
switches 0:0e018d759a2a 49 typedef struct spi_s spi_t;
switches 0:0e018d759a2a 50
switches 0:0e018d759a2a 51 #endif
switches 0:0e018d759a2a 52
switches 0:0e018d759a2a 53 #ifdef __cplusplus
switches 0:0e018d759a2a 54 extern "C" {
switches 0:0e018d759a2a 55 #endif
switches 0:0e018d759a2a 56
switches 0:0e018d759a2a 57 /**
switches 0:0e018d759a2a 58 * \defgroup hal_GeneralSPI SPI Configuration Functions
switches 0:0e018d759a2a 59 * @{
switches 0:0e018d759a2a 60 */
switches 0:0e018d759a2a 61
switches 0:0e018d759a2a 62 /** Initialize the SPI peripheral
switches 0:0e018d759a2a 63 *
switches 0:0e018d759a2a 64 * Configures the pins used by SPI, sets a default format and frequency, and enables the peripheral
switches 0:0e018d759a2a 65 * @param[out] obj The SPI object to initialize
switches 0:0e018d759a2a 66 * @param[in] mosi The pin to use for MOSI
switches 0:0e018d759a2a 67 * @param[in] miso The pin to use for MISO
switches 0:0e018d759a2a 68 * @param[in] sclk The pin to use for SCLK
switches 0:0e018d759a2a 69 * @param[in] ssel The pin to use for SSEL
switches 0:0e018d759a2a 70 */
switches 0:0e018d759a2a 71 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel);
switches 0:0e018d759a2a 72
switches 0:0e018d759a2a 73 /** Release a SPI object
switches 0:0e018d759a2a 74 *
switches 0:0e018d759a2a 75 * TODO: spi_free is currently unimplemented
switches 0:0e018d759a2a 76 * This will require reference counting at the C++ level to be safe
switches 0:0e018d759a2a 77 *
switches 0:0e018d759a2a 78 * Return the pins owned by the SPI object to their reset state
switches 0:0e018d759a2a 79 * Disable the SPI peripheral
switches 0:0e018d759a2a 80 * Disable the SPI clock
switches 0:0e018d759a2a 81 * @param[in] obj The SPI object to deinitialize
switches 0:0e018d759a2a 82 */
switches 0:0e018d759a2a 83 void spi_free(spi_t *obj);
switches 0:0e018d759a2a 84
switches 0:0e018d759a2a 85 /** Configure the SPI format
switches 0:0e018d759a2a 86 *
switches 0:0e018d759a2a 87 * Set the number of bits per frame, configure clock polarity and phase, shift order and master/slave mode.
switches 0:0e018d759a2a 88 * The default bit order is MSB.
switches 0:0e018d759a2a 89 * @param[in,out] obj The SPI object to configure
switches 0:0e018d759a2a 90 * @param[in] bits The number of bits per frame
switches 0:0e018d759a2a 91 * @param[in] mode The SPI mode (clock polarity, phase, and shift direction)
switches 0:0e018d759a2a 92 * @param[in] slave Zero for master mode or non-zero for slave mode
switches 0:0e018d759a2a 93 */
switches 0:0e018d759a2a 94 void spi_format(spi_t *obj, int bits, int mode, int slave);
switches 0:0e018d759a2a 95
switches 0:0e018d759a2a 96 /** Set the SPI baud rate
switches 0:0e018d759a2a 97 *
switches 0:0e018d759a2a 98 * Actual frequency may differ from the desired frequency due to available dividers and bus clock
switches 0:0e018d759a2a 99 * Configures the SPI peripheral's baud rate
switches 0:0e018d759a2a 100 * @param[in,out] obj The SPI object to configure
switches 0:0e018d759a2a 101 * @param[in] hz The baud rate in Hz
switches 0:0e018d759a2a 102 */
switches 0:0e018d759a2a 103 void spi_frequency(spi_t *obj, int hz);
switches 0:0e018d759a2a 104
switches 0:0e018d759a2a 105 /**@}*/
switches 0:0e018d759a2a 106 /**
switches 0:0e018d759a2a 107 * \defgroup SynchSPI Synchronous SPI Hardware Abstraction Layer
switches 0:0e018d759a2a 108 * @{
switches 0:0e018d759a2a 109 */
switches 0:0e018d759a2a 110
switches 0:0e018d759a2a 111 /** Write a byte out in master mode and receive a value
switches 0:0e018d759a2a 112 *
switches 0:0e018d759a2a 113 * @param[in] obj The SPI peripheral to use for sending
switches 0:0e018d759a2a 114 * @param[in] value The value to send
switches 0:0e018d759a2a 115 * @return Returns the value received during send
switches 0:0e018d759a2a 116 */
switches 0:0e018d759a2a 117 int spi_master_write(spi_t *obj, int value);
switches 0:0e018d759a2a 118
switches 0:0e018d759a2a 119 /** Check if a value is available to read
switches 0:0e018d759a2a 120 *
switches 0:0e018d759a2a 121 * @param[in] obj The SPI peripheral to check
switches 0:0e018d759a2a 122 * @return non-zero if a value is available
switches 0:0e018d759a2a 123 */
switches 0:0e018d759a2a 124 int spi_slave_receive(spi_t *obj);
switches 0:0e018d759a2a 125
switches 0:0e018d759a2a 126 /** Get a received value out of the SPI receive buffer in slave mode
switches 0:0e018d759a2a 127 *
switches 0:0e018d759a2a 128 * Blocks until a value is available
switches 0:0e018d759a2a 129 * @param[in] obj The SPI peripheral to read
switches 0:0e018d759a2a 130 * @return The value received
switches 0:0e018d759a2a 131 */
switches 0:0e018d759a2a 132 int spi_slave_read(spi_t *obj);
switches 0:0e018d759a2a 133
switches 0:0e018d759a2a 134 /** Write a value to the SPI peripheral in slave mode
switches 0:0e018d759a2a 135 *
switches 0:0e018d759a2a 136 * Blocks until the SPI peripheral can be written to
switches 0:0e018d759a2a 137 * @param[in] obj The SPI peripheral to write
switches 0:0e018d759a2a 138 * @param[in] value The value to write
switches 0:0e018d759a2a 139 */
switches 0:0e018d759a2a 140 void spi_slave_write(spi_t *obj, int value);
switches 0:0e018d759a2a 141
switches 0:0e018d759a2a 142 /** Checks if the specified SPI peripheral is in use
switches 0:0e018d759a2a 143 *
switches 0:0e018d759a2a 144 * @param[in] obj The SPI peripheral to check
switches 0:0e018d759a2a 145 * @return non-zero if the peripheral is currently transmitting
switches 0:0e018d759a2a 146 */
switches 0:0e018d759a2a 147 int spi_busy(spi_t *obj);
switches 0:0e018d759a2a 148
switches 0:0e018d759a2a 149 /** Get the module number
switches 0:0e018d759a2a 150 *
switches 0:0e018d759a2a 151 * @param[in] obj The SPI peripheral to check
switches 0:0e018d759a2a 152 * @return The module number
switches 0:0e018d759a2a 153 */
switches 0:0e018d759a2a 154 uint8_t spi_get_module(spi_t *obj);
switches 0:0e018d759a2a 155
switches 0:0e018d759a2a 156 /**@}*/
switches 0:0e018d759a2a 157
switches 0:0e018d759a2a 158 #if DEVICE_SPI_ASYNCH
switches 0:0e018d759a2a 159 /**
switches 0:0e018d759a2a 160 * \defgroup AsynchSPI Asynchronous SPI Hardware Abstraction Layer
switches 0:0e018d759a2a 161 * @{
switches 0:0e018d759a2a 162 */
switches 0:0e018d759a2a 163
switches 0:0e018d759a2a 164 /** Begin the SPI transfer. Buffer pointers and lengths are specified in tx_buff and rx_buff
switches 0:0e018d759a2a 165 *
switches 0:0e018d759a2a 166 * @param[in] obj The SPI object that holds the transfer information
switches 0:0e018d759a2a 167 * @param[in] tx The transmit buffer
switches 0:0e018d759a2a 168 * @param[in] tx_length The number of bytes to transmit
switches 0:0e018d759a2a 169 * @param[in] rx The receive buffer
switches 0:0e018d759a2a 170 * @param[in] rx_length The number of bytes to receive
switches 0:0e018d759a2a 171 * @param[in] bit_width The bit width of buffer words
switches 0:0e018d759a2a 172 * @param[in] event The logical OR of events to be registered
switches 0:0e018d759a2a 173 * @param[in] handler SPI interrupt handler
switches 0:0e018d759a2a 174 * @param[in] hint A suggestion for how to use DMA with this transfer
switches 0:0e018d759a2a 175 */
switches 0:0e018d759a2a 176 void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint);
switches 0:0e018d759a2a 177
switches 0:0e018d759a2a 178 /** The asynchronous IRQ handler
switches 0:0e018d759a2a 179 *
switches 0:0e018d759a2a 180 * Reads the received values out of the RX FIFO, writes values into the TX FIFO and checks for transfer termination
switches 0:0e018d759a2a 181 * conditions, such as buffer overflows or transfer complete.
switches 0:0e018d759a2a 182 * @param[in] obj The SPI object that holds the transfer information
switches 0:0e018d759a2a 183 * @return Event flags if a transfer termination condition was met; otherwise 0.
switches 0:0e018d759a2a 184 */
switches 0:0e018d759a2a 185 uint32_t spi_irq_handler_asynch(spi_t *obj);
switches 0:0e018d759a2a 186
switches 0:0e018d759a2a 187 /** Attempts to determine if the SPI peripheral is already in use
switches 0:0e018d759a2a 188 *
switches 0:0e018d759a2a 189 * If a temporary DMA channel has been allocated, peripheral is in use.
switches 0:0e018d759a2a 190 * If a permanent DMA channel has been allocated, check if the DMA channel is in use. If not, proceed as though no DMA
switches 0:0e018d759a2a 191 * channel were allocated.
switches 0:0e018d759a2a 192 * If no DMA channel is allocated, check whether tx and rx buffers have been assigned. For each assigned buffer, check
switches 0:0e018d759a2a 193 * if the corresponding buffer position is less than the buffer length. If buffers do not indicate activity, check if
switches 0:0e018d759a2a 194 * there are any bytes in the FIFOs.
switches 0:0e018d759a2a 195 * @param[in] obj The SPI object to check for activity
switches 0:0e018d759a2a 196 * @return Non-zero if the SPI port is active or zero if it is not.
switches 0:0e018d759a2a 197 */
switches 0:0e018d759a2a 198 uint8_t spi_active(spi_t *obj);
switches 0:0e018d759a2a 199
switches 0:0e018d759a2a 200 /** Abort an SPI transfer
switches 0:0e018d759a2a 201 *
switches 0:0e018d759a2a 202 * @param obj The SPI peripheral to stop
switches 0:0e018d759a2a 203 */
switches 0:0e018d759a2a 204 void spi_abort_asynch(spi_t *obj);
switches 0:0e018d759a2a 205
switches 0:0e018d759a2a 206
switches 0:0e018d759a2a 207 #endif
switches 0:0e018d759a2a 208
switches 0:0e018d759a2a 209 /**@}*/
switches 0:0e018d759a2a 210
switches 0:0e018d759a2a 211 #ifdef __cplusplus
switches 0:0e018d759a2a 212 }
switches 0:0e018d759a2a 213 #endif // __cplusplus
switches 0:0e018d759a2a 214
switches 0:0e018d759a2a 215 #endif // SPI_DEVICE
switches 0:0e018d759a2a 216
switches 0:0e018d759a2a 217 #endif // MBED_SPI_API_H
switches 0:0e018d759a2a 218
switches 0:0e018d759a2a 219 /** @}*/