MAX14690 library
Fork of MAX14690 by
Diff: MAX14690.h
- Revision:
- 12:1ca110017930
- Parent:
- 11:022bcd2ea263
- Child:
- 13:666b6c505289
--- a/MAX14690.h Sat Nov 19 00:23:44 2016 +0000 +++ b/MAX14690.h Sat Nov 19 00:32:54 2016 +0000 @@ -106,36 +106,36 @@ typedef enum { REG_CHIP_ID = 0x00, ///< Chip ID REG_CHIP_REV = 0x01, ///< Chip Revision - REG_STATUS_A = 0x02, ///< - REG_STATUS_B = 0x03, ///< - REG_STATUS_C = 0x04, ///< - REG_INT_A = 0x05, ///< - REG_INT_B = 0x06, ///< - REG_INT_MASK_A = 0x07, ///< - REG_INT_MASK_B = 0x08, ///< - REG_I_LIM_CNTL = 0x09, ///< - REG_CHG_CNTL_A = 0x0A, ///< - REG_CHG_CNTL_B = 0x0B, ///< - REG_CHG_TMR = 0x0C, ///< - REG_BUCK1_CFG = 0x0D, ///< - REG_BUCK1_VSET = 0x0E, ///< - REG_BUCK2_CFG = 0x0F, ///< - REG_BUCK2_VSET = 0x10, ///< - REG_RSVD_11 = 0x11, ///< - REG_LDO1_CFG = 0x12, ///< - REG_LDO1_VSET = 0x13, ///< - REG_LDO2_CFG = 0x14, ///< - REG_LDO2_VSET = 0x15, ///< - REG_LDO3_CFG = 0x16, ///< - REG_LDO3_VSET = 0x17, ///< - REG_THRM_CFG = 0x18, ///< - REG_MON_CFG = 0x19, ///< - REG_BOOT_CFG = 0x1A, ///< - REG_PIN_STATUS = 0x1B, ///< - REG_BUCK_EXTRA = 0x1C, ///< - REG_PWR_CFG = 0x1D, ///< - REG_NULL = 0x1E, ///< - REG_PWR_OFF = 0x1F, ///< + REG_STATUS_A = 0x02, ///< Status Register A + REG_STATUS_B = 0x03, ///< Status Register B + REG_STATUS_C = 0x04, ///< Status Register C + REG_INT_A = 0x05, ///< Interrupt Register A + REG_INT_B = 0x06, ///< Interrupt Register B + REG_INT_MASK_A = 0x07, ///< Interrupt Mask A + REG_INT_MASK_B = 0x08, ///< Interrupt Mask B + REG_I_LIM_CNTL = 0x09, ///< Input Limit Control + REG_CHG_CNTL_A = 0x0A, ///< Charger Control A + REG_CHG_CNTL_B = 0x0B, ///< Charger Control B + REG_CHG_TMR = 0x0C, ///< Charger Timers + REG_BUCK1_CFG = 0x0D, ///< Buck 1 Configuration + REG_BUCK1_VSET = 0x0E, ///< Buck 1 Voltage Setting + REG_BUCK2_CFG = 0x0F, ///< Buck 2 Configuration + REG_BUCK2_VSET = 0x10, ///< Buck 2 Voltage Setting + REG_RSVD_11 = 0x11, ///< Reserved 0x11 + REG_LDO1_CFG = 0x12, ///< LDO 1 Configuration + REG_LDO1_VSET = 0x13, ///< LDO 1 Voltage Setting + REG_LDO2_CFG = 0x14, ///< LDO 2 Configuration + REG_LDO2_VSET = 0x15, ///< LDO 2 Voltage Setting + REG_LDO3_CFG = 0x16, ///< LDO 3 Configuration + REG_LDO3_VSET = 0x17, ///< LDO 3 Voltage Setting + REG_THRM_CFG = 0x18, ///< Thermistor Configuration + REG_MON_CFG = 0x19, ///< Monitor Multiplexer Configuration + REG_BOOT_CFG = 0x1A, ///< Boot Configuration + REG_PIN_STATUS = 0x1B, ///< Pin Status + REG_BUCK_EXTRA = 0x1C, ///< Additional Buck Settings + REG_PWR_CFG = 0x1D, ///< Power Configuration + REG_NULL = 0x1E, ///< Reserved 0x1E + REG_PWR_OFF = 0x1F, ///< Power Off Register } registers_t; /**