MDX-20用の改造

Dependencies:   FatFileSystemCpp

Committer:
igorsk
Date:
Tue Jan 26 23:25:56 2010 +0000
Revision:
0:e294af8d0e07

        

Who changed what in which revision?

UserRevisionLine numberNew contents of line
igorsk 0:e294af8d0e07 1 /*
igorsk 0:e294af8d0e07 2 **************************************************************************************************************
igorsk 0:e294af8d0e07 3 * NXP USB Host Stack
igorsk 0:e294af8d0e07 4 *
igorsk 0:e294af8d0e07 5 * (c) Copyright 2008, NXP SemiConductors
igorsk 0:e294af8d0e07 6 * (c) Copyright 2008, OnChip Technologies LLC
igorsk 0:e294af8d0e07 7 * All Rights Reserved
igorsk 0:e294af8d0e07 8 *
igorsk 0:e294af8d0e07 9 * www.nxp.com
igorsk 0:e294af8d0e07 10 * www.onchiptech.com
igorsk 0:e294af8d0e07 11 *
igorsk 0:e294af8d0e07 12 * File : usbhost_lpc17xx.c
igorsk 0:e294af8d0e07 13 * Programmer(s) : Ravikanth.P
igorsk 0:e294af8d0e07 14 * Version :
igorsk 0:e294af8d0e07 15 *
igorsk 0:e294af8d0e07 16 **************************************************************************************************************
igorsk 0:e294af8d0e07 17 */
igorsk 0:e294af8d0e07 18
igorsk 0:e294af8d0e07 19 /*
igorsk 0:e294af8d0e07 20 **************************************************************************************************************
igorsk 0:e294af8d0e07 21 * INCLUDE HEADER FILES
igorsk 0:e294af8d0e07 22 **************************************************************************************************************
igorsk 0:e294af8d0e07 23 */
igorsk 0:e294af8d0e07 24
igorsk 0:e294af8d0e07 25 #include "usbhost_lpc17xx.h"
igorsk 0:e294af8d0e07 26
igorsk 0:e294af8d0e07 27 /*
igorsk 0:e294af8d0e07 28 **************************************************************************************************************
igorsk 0:e294af8d0e07 29 * GLOBAL VARIABLES
igorsk 0:e294af8d0e07 30 **************************************************************************************************************
igorsk 0:e294af8d0e07 31 */
igorsk 0:e294af8d0e07 32 int gUSBConnected;
igorsk 0:e294af8d0e07 33
igorsk 0:e294af8d0e07 34 volatile USB_INT32U HOST_RhscIntr = 0; /* Root Hub Status Change interrupt */
igorsk 0:e294af8d0e07 35 volatile USB_INT32U HOST_WdhIntr = 0; /* Semaphore to wait until the TD is submitted */
igorsk 0:e294af8d0e07 36 volatile USB_INT08U HOST_TDControlStatus = 0;
igorsk 0:e294af8d0e07 37 volatile HCED *EDCtrl; /* Control endpoint descriptor structure */
igorsk 0:e294af8d0e07 38 volatile HCED *EDBulkIn; /* BulkIn endpoint descriptor structure */
igorsk 0:e294af8d0e07 39 volatile HCED *EDBulkOut; /* BulkOut endpoint descriptor structure */
igorsk 0:e294af8d0e07 40 volatile HCTD *TDHead; /* Head transfer descriptor structure */
igorsk 0:e294af8d0e07 41 volatile HCTD *TDTail; /* Tail transfer descriptor structure */
igorsk 0:e294af8d0e07 42 volatile HCCA *Hcca; /* Host Controller Communications Area structure */
igorsk 0:e294af8d0e07 43 USB_INT16U *TDBufNonVol; /* Identical to TDBuffer just to reduce compiler warnings */
igorsk 0:e294af8d0e07 44 volatile USB_INT08U *TDBuffer; /* Current Buffer Pointer of transfer descriptor */
igorsk 0:e294af8d0e07 45
igorsk 0:e294af8d0e07 46 // USB host structures
igorsk 0:e294af8d0e07 47 // AHB SRAM block 1
igorsk 0:e294af8d0e07 48 #define HOSTBASEADDR 0x2007C000
igorsk 0:e294af8d0e07 49 // reserve memory for the linker
igorsk 0:e294af8d0e07 50 static USB_INT08U HostBuf[0x200] __attribute__((at(HOSTBASEADDR)));
igorsk 0:e294af8d0e07 51 /*
igorsk 0:e294af8d0e07 52 **************************************************************************************************************
igorsk 0:e294af8d0e07 53 * DELAY IN MILLI SECONDS
igorsk 0:e294af8d0e07 54 *
igorsk 0:e294af8d0e07 55 * Description: This function provides a delay in milli seconds
igorsk 0:e294af8d0e07 56 *
igorsk 0:e294af8d0e07 57 * Arguments : delay The delay required
igorsk 0:e294af8d0e07 58 *
igorsk 0:e294af8d0e07 59 * Returns : None
igorsk 0:e294af8d0e07 60 *
igorsk 0:e294af8d0e07 61 **************************************************************************************************************
igorsk 0:e294af8d0e07 62 */
igorsk 0:e294af8d0e07 63
igorsk 0:e294af8d0e07 64 void Host_DelayMS (USB_INT32U delay)
igorsk 0:e294af8d0e07 65 {
igorsk 0:e294af8d0e07 66 volatile USB_INT32U i;
igorsk 0:e294af8d0e07 67
igorsk 0:e294af8d0e07 68
igorsk 0:e294af8d0e07 69 for (i = 0; i < delay; i++) {
igorsk 0:e294af8d0e07 70 Host_DelayUS(1000);
igorsk 0:e294af8d0e07 71 }
igorsk 0:e294af8d0e07 72 }
igorsk 0:e294af8d0e07 73
igorsk 0:e294af8d0e07 74 /*
igorsk 0:e294af8d0e07 75 **************************************************************************************************************
igorsk 0:e294af8d0e07 76 * DELAY IN MICRO SECONDS
igorsk 0:e294af8d0e07 77 *
igorsk 0:e294af8d0e07 78 * Description: This function provides a delay in micro seconds
igorsk 0:e294af8d0e07 79 *
igorsk 0:e294af8d0e07 80 * Arguments : delay The delay required
igorsk 0:e294af8d0e07 81 *
igorsk 0:e294af8d0e07 82 * Returns : None
igorsk 0:e294af8d0e07 83 *
igorsk 0:e294af8d0e07 84 **************************************************************************************************************
igorsk 0:e294af8d0e07 85 */
igorsk 0:e294af8d0e07 86
igorsk 0:e294af8d0e07 87 void Host_DelayUS (USB_INT32U delay)
igorsk 0:e294af8d0e07 88 {
igorsk 0:e294af8d0e07 89 volatile USB_INT32U i;
igorsk 0:e294af8d0e07 90
igorsk 0:e294af8d0e07 91
igorsk 0:e294af8d0e07 92 for (i = 0; i < (4 * delay); i++) { /* This logic was tested. It gives app. 1 micro sec delay */
igorsk 0:e294af8d0e07 93 ;
igorsk 0:e294af8d0e07 94 }
igorsk 0:e294af8d0e07 95 }
igorsk 0:e294af8d0e07 96
igorsk 0:e294af8d0e07 97 // bits of the USB/OTG clock control register
igorsk 0:e294af8d0e07 98 #define HOST_CLK_EN (1<<0)
igorsk 0:e294af8d0e07 99 #define DEV_CLK_EN (1<<1)
igorsk 0:e294af8d0e07 100 #define PORTSEL_CLK_EN (1<<3)
igorsk 0:e294af8d0e07 101 #define AHB_CLK_EN (1<<4)
igorsk 0:e294af8d0e07 102
igorsk 0:e294af8d0e07 103 // bits of the USB/OTG clock status register
igorsk 0:e294af8d0e07 104 #define HOST_CLK_ON (1<<0)
igorsk 0:e294af8d0e07 105 #define DEV_CLK_ON (1<<1)
igorsk 0:e294af8d0e07 106 #define PORTSEL_CLK_ON (1<<3)
igorsk 0:e294af8d0e07 107 #define AHB_CLK_ON (1<<4)
igorsk 0:e294af8d0e07 108
igorsk 0:e294af8d0e07 109 // we need host clock, OTG/portsel clock and AHB clock
igorsk 0:e294af8d0e07 110 #define CLOCK_MASK (HOST_CLK_EN | PORTSEL_CLK_EN | AHB_CLK_EN)
igorsk 0:e294af8d0e07 111
igorsk 0:e294af8d0e07 112 /*
igorsk 0:e294af8d0e07 113 **************************************************************************************************************
igorsk 0:e294af8d0e07 114 * INITIALIZE THE HOST CONTROLLER
igorsk 0:e294af8d0e07 115 *
igorsk 0:e294af8d0e07 116 * Description: This function initializes lpc17xx host controller
igorsk 0:e294af8d0e07 117 *
igorsk 0:e294af8d0e07 118 * Arguments : None
igorsk 0:e294af8d0e07 119 *
igorsk 0:e294af8d0e07 120 * Returns :
igorsk 0:e294af8d0e07 121 *
igorsk 0:e294af8d0e07 122 **************************************************************************************************************
igorsk 0:e294af8d0e07 123 */
igorsk 0:e294af8d0e07 124 void Host_Init (void)
igorsk 0:e294af8d0e07 125 {
igorsk 0:e294af8d0e07 126 PRINT_Log("In Host_Init\n");
igorsk 0:e294af8d0e07 127 NVIC_DisableIRQ(USB_IRQn); /* Disable the USB interrupt source */
igorsk 0:e294af8d0e07 128
igorsk 0:e294af8d0e07 129 // turn on power for USB
igorsk 0:e294af8d0e07 130 LPC_SC->PCONP |= (1UL<<31);
igorsk 0:e294af8d0e07 131 // Enable USB host clock, port selection and AHB clock
igorsk 0:e294af8d0e07 132 LPC_USB->USBClkCtrl |= CLOCK_MASK;
igorsk 0:e294af8d0e07 133 // Wait for clocks to become available
igorsk 0:e294af8d0e07 134 while ((LPC_USB->USBClkSt & CLOCK_MASK) != CLOCK_MASK)
igorsk 0:e294af8d0e07 135 ;
igorsk 0:e294af8d0e07 136
igorsk 0:e294af8d0e07 137 // it seems the bits[0:1] mean the following
igorsk 0:e294af8d0e07 138 // 0: U1=device, U2=host
igorsk 0:e294af8d0e07 139 // 1: U1=host, U2=host
igorsk 0:e294af8d0e07 140 // 2: reserved
igorsk 0:e294af8d0e07 141 // 3: U1=host, U2=device
igorsk 0:e294af8d0e07 142 // NB: this register is only available if OTG clock (aka "port select") is enabled!!
igorsk 0:e294af8d0e07 143 // since we don't care about port 2, set just bit 0 to 1 (U1=host)
igorsk 0:e294af8d0e07 144 LPC_USB->OTGStCtrl |= 1;
igorsk 0:e294af8d0e07 145
igorsk 0:e294af8d0e07 146 // now that we've configured the ports, we can turn off the portsel clock
igorsk 0:e294af8d0e07 147 LPC_USB->USBClkCtrl &= ~PORTSEL_CLK_EN;
igorsk 0:e294af8d0e07 148
igorsk 0:e294af8d0e07 149 // power pins are not connected on mbed, so we can skip them
igorsk 0:e294af8d0e07 150 /* P1[18] = USB_UP_LED, 01 */
igorsk 0:e294af8d0e07 151 /* P1[19] = /USB_PPWR, 10 */
igorsk 0:e294af8d0e07 152 /* P1[22] = USB_PWRD, 10 */
igorsk 0:e294af8d0e07 153 /* P1[27] = /USB_OVRCR, 10 */
igorsk 0:e294af8d0e07 154 /*LPC_PINCON->PINSEL3 &= ~((3<<4) | (3<<6) | (3<<12) | (3<<22));
igorsk 0:e294af8d0e07 155 LPC_PINCON->PINSEL3 |= ((1<<4)|(2<<6) | (2<<12) | (2<<22)); // 0x00802080
igorsk 0:e294af8d0e07 156 */
igorsk 0:e294af8d0e07 157
igorsk 0:e294af8d0e07 158 // configure USB D+/D- pins
igorsk 0:e294af8d0e07 159 /* P0[29] = USB_D+, 01 */
igorsk 0:e294af8d0e07 160 /* P0[30] = USB_D-, 01 */
igorsk 0:e294af8d0e07 161 LPC_PINCON->PINSEL1 &= ~((3<<26) | (3<<28));
igorsk 0:e294af8d0e07 162 LPC_PINCON->PINSEL1 |= ((1<<26)|(1<<28)); // 0x14000000
igorsk 0:e294af8d0e07 163
igorsk 0:e294af8d0e07 164 PRINT_Log("Initializing Host Stack\n");
igorsk 0:e294af8d0e07 165
igorsk 0:e294af8d0e07 166 Hcca = (volatile HCCA *)(HostBuf+0x000);
igorsk 0:e294af8d0e07 167 TDHead = (volatile HCTD *)(HostBuf+0x100);
igorsk 0:e294af8d0e07 168 TDTail = (volatile HCTD *)(HostBuf+0x110);
igorsk 0:e294af8d0e07 169 EDCtrl = (volatile HCED *)(HostBuf+0x120);
igorsk 0:e294af8d0e07 170 EDBulkIn = (volatile HCED *)(HostBuf+0x130);
igorsk 0:e294af8d0e07 171 EDBulkOut = (volatile HCED *)(HostBuf+0x140);
igorsk 0:e294af8d0e07 172 TDBuffer = (volatile USB_INT08U *)(HostBuf+0x150);
igorsk 0:e294af8d0e07 173
igorsk 0:e294af8d0e07 174 /* Initialize all the TDs, EDs and HCCA to 0 */
igorsk 0:e294af8d0e07 175 Host_EDInit(EDCtrl);
igorsk 0:e294af8d0e07 176 Host_EDInit(EDBulkIn);
igorsk 0:e294af8d0e07 177 Host_EDInit(EDBulkOut);
igorsk 0:e294af8d0e07 178 Host_TDInit(TDHead);
igorsk 0:e294af8d0e07 179 Host_TDInit(TDTail);
igorsk 0:e294af8d0e07 180 Host_HCCAInit(Hcca);
igorsk 0:e294af8d0e07 181
igorsk 0:e294af8d0e07 182 Host_DelayMS(50); /* Wait 50 ms before apply reset */
igorsk 0:e294af8d0e07 183 LPC_USB->HcControl = 0; /* HARDWARE RESET */
igorsk 0:e294af8d0e07 184 LPC_USB->HcControlHeadED = 0; /* Initialize Control list head to Zero */
igorsk 0:e294af8d0e07 185 LPC_USB->HcBulkHeadED = 0; /* Initialize Bulk list head to Zero */
igorsk 0:e294af8d0e07 186
igorsk 0:e294af8d0e07 187 /* SOFTWARE RESET */
igorsk 0:e294af8d0e07 188 LPC_USB->HcCommandStatus = OR_CMD_STATUS_HCR;
igorsk 0:e294af8d0e07 189 LPC_USB->HcFmInterval = DEFAULT_FMINTERVAL; /* Write Fm Interval and Largest Data Packet Counter */
igorsk 0:e294af8d0e07 190
igorsk 0:e294af8d0e07 191 /* Put HC in operational state */
igorsk 0:e294af8d0e07 192 LPC_USB->HcControl = (LPC_USB->HcControl & (~OR_CONTROL_HCFS)) | OR_CONTROL_HC_OPER;
igorsk 0:e294af8d0e07 193 LPC_USB->HcRhStatus = OR_RH_STATUS_LPSC; /* Set Global Power */
igorsk 0:e294af8d0e07 194
igorsk 0:e294af8d0e07 195 LPC_USB->HcHCCA = (USB_INT32U)Hcca;
igorsk 0:e294af8d0e07 196 LPC_USB->HcInterruptStatus |= LPC_USB->HcInterruptStatus; /* Clear Interrrupt Status */
igorsk 0:e294af8d0e07 197
igorsk 0:e294af8d0e07 198
igorsk 0:e294af8d0e07 199 LPC_USB->HcInterruptEnable = OR_INTR_ENABLE_MIE |
igorsk 0:e294af8d0e07 200 OR_INTR_ENABLE_WDH |
igorsk 0:e294af8d0e07 201 OR_INTR_ENABLE_RHSC;
igorsk 0:e294af8d0e07 202
igorsk 0:e294af8d0e07 203 NVIC_SetPriority(USB_IRQn, 0); /* highest priority */
igorsk 0:e294af8d0e07 204 /* Enable the USB Interrupt */
igorsk 0:e294af8d0e07 205 NVIC_EnableIRQ(USB_IRQn);
igorsk 0:e294af8d0e07 206 PRINT_Log("Host Initialized\n");
igorsk 0:e294af8d0e07 207 }
igorsk 0:e294af8d0e07 208
igorsk 0:e294af8d0e07 209 /*
igorsk 0:e294af8d0e07 210 **************************************************************************************************************
igorsk 0:e294af8d0e07 211 * INTERRUPT SERVICE ROUTINE
igorsk 0:e294af8d0e07 212 *
igorsk 0:e294af8d0e07 213 * Description: This function services the interrupt caused by host controller
igorsk 0:e294af8d0e07 214 *
igorsk 0:e294af8d0e07 215 * Arguments : None
igorsk 0:e294af8d0e07 216 *
igorsk 0:e294af8d0e07 217 * Returns : None
igorsk 0:e294af8d0e07 218 *
igorsk 0:e294af8d0e07 219 **************************************************************************************************************
igorsk 0:e294af8d0e07 220 */
igorsk 0:e294af8d0e07 221
igorsk 0:e294af8d0e07 222 void USB_IRQHandler (void) __irq
igorsk 0:e294af8d0e07 223 {
igorsk 0:e294af8d0e07 224 USB_INT32U int_status;
igorsk 0:e294af8d0e07 225 USB_INT32U ie_status;
igorsk 0:e294af8d0e07 226
igorsk 0:e294af8d0e07 227 int_status = LPC_USB->HcInterruptStatus; /* Read Interrupt Status */
igorsk 0:e294af8d0e07 228 ie_status = LPC_USB->HcInterruptEnable; /* Read Interrupt enable status */
igorsk 0:e294af8d0e07 229
igorsk 0:e294af8d0e07 230 if (!(int_status & ie_status)) {
igorsk 0:e294af8d0e07 231 return;
igorsk 0:e294af8d0e07 232 } else {
igorsk 0:e294af8d0e07 233
igorsk 0:e294af8d0e07 234 int_status = int_status & ie_status;
igorsk 0:e294af8d0e07 235 if (int_status & OR_INTR_STATUS_RHSC) { /* Root hub status change interrupt */
igorsk 0:e294af8d0e07 236 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CSC) {
igorsk 0:e294af8d0e07 237 if (LPC_USB->HcRhStatus & OR_RH_STATUS_DRWE) {
igorsk 0:e294af8d0e07 238 /*
igorsk 0:e294af8d0e07 239 * When DRWE is on, Connect Status Change
igorsk 0:e294af8d0e07 240 * means a remote wakeup event.
igorsk 0:e294af8d0e07 241 */
igorsk 0:e294af8d0e07 242 HOST_RhscIntr = 1;// JUST SOMETHING FOR A BREAKPOINT
igorsk 0:e294af8d0e07 243 }
igorsk 0:e294af8d0e07 244 else {
igorsk 0:e294af8d0e07 245 /*
igorsk 0:e294af8d0e07 246 * When DRWE is off, Connect Status Change
igorsk 0:e294af8d0e07 247 * is NOT a remote wakeup event
igorsk 0:e294af8d0e07 248 */
igorsk 0:e294af8d0e07 249 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CCS) {
igorsk 0:e294af8d0e07 250 if (!gUSBConnected) {
igorsk 0:e294af8d0e07 251 HOST_TDControlStatus = 0;
igorsk 0:e294af8d0e07 252 HOST_WdhIntr = 0;
igorsk 0:e294af8d0e07 253 HOST_RhscIntr = 1;
igorsk 0:e294af8d0e07 254 gUSBConnected = 1;
igorsk 0:e294af8d0e07 255 }
igorsk 0:e294af8d0e07 256 else
igorsk 0:e294af8d0e07 257 PRINT_Log("Spurious status change (connected)?\n");
igorsk 0:e294af8d0e07 258 } else {
igorsk 0:e294af8d0e07 259 if (gUSBConnected) {
igorsk 0:e294af8d0e07 260 LPC_USB->HcInterruptEnable = 0; // why do we get multiple disc. rupts???
igorsk 0:e294af8d0e07 261 HOST_RhscIntr = 0;
igorsk 0:e294af8d0e07 262 gUSBConnected = 0;
igorsk 0:e294af8d0e07 263 }
igorsk 0:e294af8d0e07 264 else
igorsk 0:e294af8d0e07 265 PRINT_Log("Spurious status change (disconnected)?\n");
igorsk 0:e294af8d0e07 266 }
igorsk 0:e294af8d0e07 267 }
igorsk 0:e294af8d0e07 268 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_CSC;
igorsk 0:e294af8d0e07 269 }
igorsk 0:e294af8d0e07 270 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRSC) {
igorsk 0:e294af8d0e07 271 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC;
igorsk 0:e294af8d0e07 272 }
igorsk 0:e294af8d0e07 273 }
igorsk 0:e294af8d0e07 274 if (int_status & OR_INTR_STATUS_WDH) { /* Writeback Done Head interrupt */
igorsk 0:e294af8d0e07 275 HOST_WdhIntr = 1;
igorsk 0:e294af8d0e07 276 HOST_TDControlStatus = (TDHead->Control >> 28) & 0xf;
igorsk 0:e294af8d0e07 277 }
igorsk 0:e294af8d0e07 278 LPC_USB->HcInterruptStatus = int_status; /* Clear interrupt status register */
igorsk 0:e294af8d0e07 279 }
igorsk 0:e294af8d0e07 280 return;
igorsk 0:e294af8d0e07 281 }
igorsk 0:e294af8d0e07 282
igorsk 0:e294af8d0e07 283 /*
igorsk 0:e294af8d0e07 284 **************************************************************************************************************
igorsk 0:e294af8d0e07 285 * PROCESS TRANSFER DESCRIPTOR
igorsk 0:e294af8d0e07 286 *
igorsk 0:e294af8d0e07 287 * Description: This function processes the transfer descriptor
igorsk 0:e294af8d0e07 288 *
igorsk 0:e294af8d0e07 289 * Arguments : ed Endpoint descriptor that contains this transfer descriptor
igorsk 0:e294af8d0e07 290 * token SETUP, IN, OUT
igorsk 0:e294af8d0e07 291 * buffer Current Buffer Pointer of the transfer descriptor
igorsk 0:e294af8d0e07 292 * buffer_len Length of the buffer
igorsk 0:e294af8d0e07 293 *
igorsk 0:e294af8d0e07 294 * Returns : OK if TD submission is successful
igorsk 0:e294af8d0e07 295 * ERROR if TD submission fails
igorsk 0:e294af8d0e07 296 *
igorsk 0:e294af8d0e07 297 **************************************************************************************************************
igorsk 0:e294af8d0e07 298 */
igorsk 0:e294af8d0e07 299
igorsk 0:e294af8d0e07 300 USB_INT32S Host_ProcessTD (volatile HCED *ed,
igorsk 0:e294af8d0e07 301 volatile USB_INT32U token,
igorsk 0:e294af8d0e07 302 volatile USB_INT08U *buffer,
igorsk 0:e294af8d0e07 303 USB_INT32U buffer_len)
igorsk 0:e294af8d0e07 304 {
igorsk 0:e294af8d0e07 305 volatile USB_INT32U td_toggle;
igorsk 0:e294af8d0e07 306
igorsk 0:e294af8d0e07 307
igorsk 0:e294af8d0e07 308 if (ed == EDCtrl) {
igorsk 0:e294af8d0e07 309 if (token == TD_SETUP) {
igorsk 0:e294af8d0e07 310 td_toggle = TD_TOGGLE_0;
igorsk 0:e294af8d0e07 311 } else {
igorsk 0:e294af8d0e07 312 td_toggle = TD_TOGGLE_1;
igorsk 0:e294af8d0e07 313 }
igorsk 0:e294af8d0e07 314 } else {
igorsk 0:e294af8d0e07 315 td_toggle = 0;
igorsk 0:e294af8d0e07 316 }
igorsk 0:e294af8d0e07 317 TDHead->Control = (TD_ROUNDING |
igorsk 0:e294af8d0e07 318 token |
igorsk 0:e294af8d0e07 319 TD_DELAY_INT(0) |
igorsk 0:e294af8d0e07 320 td_toggle |
igorsk 0:e294af8d0e07 321 TD_CC);
igorsk 0:e294af8d0e07 322 TDTail->Control = 0;
igorsk 0:e294af8d0e07 323 TDHead->CurrBufPtr = (USB_INT32U) buffer;
igorsk 0:e294af8d0e07 324 TDTail->CurrBufPtr = 0;
igorsk 0:e294af8d0e07 325 TDHead->Next = (USB_INT32U) TDTail;
igorsk 0:e294af8d0e07 326 TDTail->Next = 0;
igorsk 0:e294af8d0e07 327 TDHead->BufEnd = (USB_INT32U)(buffer + (buffer_len - 1));
igorsk 0:e294af8d0e07 328 TDTail->BufEnd = 0;
igorsk 0:e294af8d0e07 329
igorsk 0:e294af8d0e07 330 ed->HeadTd = (USB_INT32U)TDHead | ((ed->HeadTd) & 0x00000002);
igorsk 0:e294af8d0e07 331 ed->TailTd = (USB_INT32U)TDTail;
igorsk 0:e294af8d0e07 332 ed->Next = 0;
igorsk 0:e294af8d0e07 333
igorsk 0:e294af8d0e07 334 if (ed == EDCtrl) {
igorsk 0:e294af8d0e07 335 LPC_USB->HcControlHeadED = (USB_INT32U)ed;
igorsk 0:e294af8d0e07 336 LPC_USB->HcCommandStatus = LPC_USB->HcCommandStatus | OR_CMD_STATUS_CLF;
igorsk 0:e294af8d0e07 337 LPC_USB->HcControl = LPC_USB->HcControl | OR_CONTROL_CLE;
igorsk 0:e294af8d0e07 338 } else {
igorsk 0:e294af8d0e07 339 LPC_USB->HcBulkHeadED = (USB_INT32U)ed;
igorsk 0:e294af8d0e07 340 LPC_USB->HcCommandStatus = LPC_USB->HcCommandStatus | OR_CMD_STATUS_BLF;
igorsk 0:e294af8d0e07 341 LPC_USB->HcControl = LPC_USB->HcControl | OR_CONTROL_BLE;
igorsk 0:e294af8d0e07 342 }
igorsk 0:e294af8d0e07 343
igorsk 0:e294af8d0e07 344 Host_WDHWait();
igorsk 0:e294af8d0e07 345
igorsk 0:e294af8d0e07 346 // if (!(TDHead->Control & 0xF0000000)) {
igorsk 0:e294af8d0e07 347 if (!HOST_TDControlStatus) {
igorsk 0:e294af8d0e07 348 return (OK);
igorsk 0:e294af8d0e07 349 } else {
igorsk 0:e294af8d0e07 350 return (ERR_TD_FAIL);
igorsk 0:e294af8d0e07 351 }
igorsk 0:e294af8d0e07 352 }
igorsk 0:e294af8d0e07 353
igorsk 0:e294af8d0e07 354 /*
igorsk 0:e294af8d0e07 355 **************************************************************************************************************
igorsk 0:e294af8d0e07 356 * ENUMERATE THE DEVICE
igorsk 0:e294af8d0e07 357 *
igorsk 0:e294af8d0e07 358 * Description: This function is used to enumerate the device connected
igorsk 0:e294af8d0e07 359 *
igorsk 0:e294af8d0e07 360 * Arguments : None
igorsk 0:e294af8d0e07 361 *
igorsk 0:e294af8d0e07 362 * Returns : None
igorsk 0:e294af8d0e07 363 *
igorsk 0:e294af8d0e07 364 **************************************************************************************************************
igorsk 0:e294af8d0e07 365 */
igorsk 0:e294af8d0e07 366
igorsk 0:e294af8d0e07 367 USB_INT32S Host_EnumDev (void)
igorsk 0:e294af8d0e07 368 {
igorsk 0:e294af8d0e07 369 USB_INT32S rc;
igorsk 0:e294af8d0e07 370
igorsk 0:e294af8d0e07 371 PRINT_Log("Connect a Mass Storage device\n");
igorsk 0:e294af8d0e07 372 while (!HOST_RhscIntr)
igorsk 0:e294af8d0e07 373 __WFI();
igorsk 0:e294af8d0e07 374 Host_DelayMS(100); /* USB 2.0 spec says atleast 50ms delay beore port reset */
igorsk 0:e294af8d0e07 375 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRS; // Initiate port reset
igorsk 0:e294af8d0e07 376 while (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRS)
igorsk 0:e294af8d0e07 377 __WFI(); // Wait for port reset to complete...
igorsk 0:e294af8d0e07 378 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC; // ...and clear port reset signal
igorsk 0:e294af8d0e07 379 Host_DelayMS(200); /* Wait for 100 MS after port reset */
igorsk 0:e294af8d0e07 380
igorsk 0:e294af8d0e07 381 EDCtrl->Control = 8 << 16; /* Put max pkt size = 8 */
igorsk 0:e294af8d0e07 382 /* Read first 8 bytes of device desc */
igorsk 0:e294af8d0e07 383 rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_DEVICE, 0, TDBuffer, 8);
igorsk 0:e294af8d0e07 384 if (rc != OK) {
igorsk 0:e294af8d0e07 385 PRINT_Err(rc);
igorsk 0:e294af8d0e07 386 return (rc);
igorsk 0:e294af8d0e07 387 }
igorsk 0:e294af8d0e07 388 EDCtrl->Control = TDBuffer[7] << 16; /* Get max pkt size of endpoint 0 */
igorsk 0:e294af8d0e07 389 rc = HOST_SET_ADDRESS(1); /* Set the device address to 1 */
igorsk 0:e294af8d0e07 390 if (rc != OK) {
igorsk 0:e294af8d0e07 391 PRINT_Err(rc);
igorsk 0:e294af8d0e07 392 return (rc);
igorsk 0:e294af8d0e07 393 }
igorsk 0:e294af8d0e07 394 Host_DelayMS(2);
igorsk 0:e294af8d0e07 395 EDCtrl->Control = (EDCtrl->Control) | 1; /* Modify control pipe with address 1 */
igorsk 0:e294af8d0e07 396 /* Get the configuration descriptor */
igorsk 0:e294af8d0e07 397 rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_CONFIGURATION, 0, TDBuffer, 9);
igorsk 0:e294af8d0e07 398 if (rc != OK) {
igorsk 0:e294af8d0e07 399 PRINT_Err(rc);
igorsk 0:e294af8d0e07 400 return (rc);
igorsk 0:e294af8d0e07 401 }
igorsk 0:e294af8d0e07 402 /* Get the first configuration data */
igorsk 0:e294af8d0e07 403 rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_CONFIGURATION, 0, TDBuffer, ReadLE16U(&TDBuffer[2]));
igorsk 0:e294af8d0e07 404 if (rc != OK) {
igorsk 0:e294af8d0e07 405 PRINT_Err(rc);
igorsk 0:e294af8d0e07 406 return (rc);
igorsk 0:e294af8d0e07 407 }
igorsk 0:e294af8d0e07 408 rc = MS_ParseConfiguration(); /* Parse the configuration */
igorsk 0:e294af8d0e07 409 if (rc != OK) {
igorsk 0:e294af8d0e07 410 PRINT_Err(rc);
igorsk 0:e294af8d0e07 411 return (rc);
igorsk 0:e294af8d0e07 412 }
igorsk 0:e294af8d0e07 413 rc = USBH_SET_CONFIGURATION(1); /* Select device configuration 1 */
igorsk 0:e294af8d0e07 414 if (rc != OK) {
igorsk 0:e294af8d0e07 415 PRINT_Err(rc);
igorsk 0:e294af8d0e07 416 }
igorsk 0:e294af8d0e07 417 Host_DelayMS(100); /* Some devices may require this delay */
igorsk 0:e294af8d0e07 418 return (rc);
igorsk 0:e294af8d0e07 419 }
igorsk 0:e294af8d0e07 420
igorsk 0:e294af8d0e07 421 /*
igorsk 0:e294af8d0e07 422 **************************************************************************************************************
igorsk 0:e294af8d0e07 423 * RECEIVE THE CONTROL INFORMATION
igorsk 0:e294af8d0e07 424 *
igorsk 0:e294af8d0e07 425 * Description: This function is used to receive the control information
igorsk 0:e294af8d0e07 426 *
igorsk 0:e294af8d0e07 427 * Arguments : bm_request_type
igorsk 0:e294af8d0e07 428 * b_request
igorsk 0:e294af8d0e07 429 * w_value
igorsk 0:e294af8d0e07 430 * w_index
igorsk 0:e294af8d0e07 431 * w_length
igorsk 0:e294af8d0e07 432 * buffer
igorsk 0:e294af8d0e07 433 *
igorsk 0:e294af8d0e07 434 * Returns : OK if Success
igorsk 0:e294af8d0e07 435 * ERROR if Failed
igorsk 0:e294af8d0e07 436 *
igorsk 0:e294af8d0e07 437 **************************************************************************************************************
igorsk 0:e294af8d0e07 438 */
igorsk 0:e294af8d0e07 439
igorsk 0:e294af8d0e07 440 USB_INT32S Host_CtrlRecv ( USB_INT08U bm_request_type,
igorsk 0:e294af8d0e07 441 USB_INT08U b_request,
igorsk 0:e294af8d0e07 442 USB_INT16U w_value,
igorsk 0:e294af8d0e07 443 USB_INT16U w_index,
igorsk 0:e294af8d0e07 444 USB_INT16U w_length,
igorsk 0:e294af8d0e07 445 volatile USB_INT08U *buffer)
igorsk 0:e294af8d0e07 446 {
igorsk 0:e294af8d0e07 447 USB_INT32S rc;
igorsk 0:e294af8d0e07 448
igorsk 0:e294af8d0e07 449
igorsk 0:e294af8d0e07 450 Host_FillSetup(bm_request_type, b_request, w_value, w_index, w_length);
igorsk 0:e294af8d0e07 451 rc = Host_ProcessTD(EDCtrl, TD_SETUP, TDBuffer, 8);
igorsk 0:e294af8d0e07 452 if (rc == OK) {
igorsk 0:e294af8d0e07 453 if (w_length) {
igorsk 0:e294af8d0e07 454 rc = Host_ProcessTD(EDCtrl, TD_IN, TDBuffer, w_length);
igorsk 0:e294af8d0e07 455 }
igorsk 0:e294af8d0e07 456 if (rc == OK) {
igorsk 0:e294af8d0e07 457 rc = Host_ProcessTD(EDCtrl, TD_OUT, NULL, 0);
igorsk 0:e294af8d0e07 458 }
igorsk 0:e294af8d0e07 459 }
igorsk 0:e294af8d0e07 460 return (rc);
igorsk 0:e294af8d0e07 461 }
igorsk 0:e294af8d0e07 462
igorsk 0:e294af8d0e07 463 /*
igorsk 0:e294af8d0e07 464 **************************************************************************************************************
igorsk 0:e294af8d0e07 465 * SEND THE CONTROL INFORMATION
igorsk 0:e294af8d0e07 466 *
igorsk 0:e294af8d0e07 467 * Description: This function is used to send the control information
igorsk 0:e294af8d0e07 468 *
igorsk 0:e294af8d0e07 469 * Arguments : None
igorsk 0:e294af8d0e07 470 *
igorsk 0:e294af8d0e07 471 * Returns : OK if Success
igorsk 0:e294af8d0e07 472 * ERR_INVALID_BOOTSIG if Failed
igorsk 0:e294af8d0e07 473 *
igorsk 0:e294af8d0e07 474 **************************************************************************************************************
igorsk 0:e294af8d0e07 475 */
igorsk 0:e294af8d0e07 476
igorsk 0:e294af8d0e07 477 USB_INT32S Host_CtrlSend ( USB_INT08U bm_request_type,
igorsk 0:e294af8d0e07 478 USB_INT08U b_request,
igorsk 0:e294af8d0e07 479 USB_INT16U w_value,
igorsk 0:e294af8d0e07 480 USB_INT16U w_index,
igorsk 0:e294af8d0e07 481 USB_INT16U w_length,
igorsk 0:e294af8d0e07 482 volatile USB_INT08U *buffer)
igorsk 0:e294af8d0e07 483 {
igorsk 0:e294af8d0e07 484 USB_INT32S rc;
igorsk 0:e294af8d0e07 485
igorsk 0:e294af8d0e07 486
igorsk 0:e294af8d0e07 487 Host_FillSetup(bm_request_type, b_request, w_value, w_index, w_length);
igorsk 0:e294af8d0e07 488
igorsk 0:e294af8d0e07 489 rc = Host_ProcessTD(EDCtrl, TD_SETUP, TDBuffer, 8);
igorsk 0:e294af8d0e07 490 if (rc == OK) {
igorsk 0:e294af8d0e07 491 if (w_length) {
igorsk 0:e294af8d0e07 492 rc = Host_ProcessTD(EDCtrl, TD_OUT, TDBuffer, w_length);
igorsk 0:e294af8d0e07 493 }
igorsk 0:e294af8d0e07 494 if (rc == OK) {
igorsk 0:e294af8d0e07 495 rc = Host_ProcessTD(EDCtrl, TD_IN, NULL, 0);
igorsk 0:e294af8d0e07 496 }
igorsk 0:e294af8d0e07 497 }
igorsk 0:e294af8d0e07 498 return (rc);
igorsk 0:e294af8d0e07 499 }
igorsk 0:e294af8d0e07 500
igorsk 0:e294af8d0e07 501 /*
igorsk 0:e294af8d0e07 502 **************************************************************************************************************
igorsk 0:e294af8d0e07 503 * FILL SETUP PACKET
igorsk 0:e294af8d0e07 504 *
igorsk 0:e294af8d0e07 505 * Description: This function is used to fill the setup packet
igorsk 0:e294af8d0e07 506 *
igorsk 0:e294af8d0e07 507 * Arguments : None
igorsk 0:e294af8d0e07 508 *
igorsk 0:e294af8d0e07 509 * Returns : OK if Success
igorsk 0:e294af8d0e07 510 * ERR_INVALID_BOOTSIG if Failed
igorsk 0:e294af8d0e07 511 *
igorsk 0:e294af8d0e07 512 **************************************************************************************************************
igorsk 0:e294af8d0e07 513 */
igorsk 0:e294af8d0e07 514
igorsk 0:e294af8d0e07 515 void Host_FillSetup (USB_INT08U bm_request_type,
igorsk 0:e294af8d0e07 516 USB_INT08U b_request,
igorsk 0:e294af8d0e07 517 USB_INT16U w_value,
igorsk 0:e294af8d0e07 518 USB_INT16U w_index,
igorsk 0:e294af8d0e07 519 USB_INT16U w_length)
igorsk 0:e294af8d0e07 520 {
igorsk 0:e294af8d0e07 521 int i;
igorsk 0:e294af8d0e07 522 for (i=0;i<w_length;i++)
igorsk 0:e294af8d0e07 523 TDBuffer[i] = 0;
igorsk 0:e294af8d0e07 524
igorsk 0:e294af8d0e07 525 TDBuffer[0] = bm_request_type;
igorsk 0:e294af8d0e07 526 TDBuffer[1] = b_request;
igorsk 0:e294af8d0e07 527 WriteLE16U(&TDBuffer[2], w_value);
igorsk 0:e294af8d0e07 528 WriteLE16U(&TDBuffer[4], w_index);
igorsk 0:e294af8d0e07 529 WriteLE16U(&TDBuffer[6], w_length);
igorsk 0:e294af8d0e07 530 }
igorsk 0:e294af8d0e07 531
igorsk 0:e294af8d0e07 532
igorsk 0:e294af8d0e07 533
igorsk 0:e294af8d0e07 534 /*
igorsk 0:e294af8d0e07 535 **************************************************************************************************************
igorsk 0:e294af8d0e07 536 * INITIALIZE THE TRANSFER DESCRIPTOR
igorsk 0:e294af8d0e07 537 *
igorsk 0:e294af8d0e07 538 * Description: This function initializes transfer descriptor
igorsk 0:e294af8d0e07 539 *
igorsk 0:e294af8d0e07 540 * Arguments : Pointer to TD structure
igorsk 0:e294af8d0e07 541 *
igorsk 0:e294af8d0e07 542 * Returns : None
igorsk 0:e294af8d0e07 543 *
igorsk 0:e294af8d0e07 544 **************************************************************************************************************
igorsk 0:e294af8d0e07 545 */
igorsk 0:e294af8d0e07 546
igorsk 0:e294af8d0e07 547 void Host_TDInit (volatile HCTD *td)
igorsk 0:e294af8d0e07 548 {
igorsk 0:e294af8d0e07 549
igorsk 0:e294af8d0e07 550 td->Control = 0;
igorsk 0:e294af8d0e07 551 td->CurrBufPtr = 0;
igorsk 0:e294af8d0e07 552 td->Next = 0;
igorsk 0:e294af8d0e07 553 td->BufEnd = 0;
igorsk 0:e294af8d0e07 554 }
igorsk 0:e294af8d0e07 555
igorsk 0:e294af8d0e07 556 /*
igorsk 0:e294af8d0e07 557 **************************************************************************************************************
igorsk 0:e294af8d0e07 558 * INITIALIZE THE ENDPOINT DESCRIPTOR
igorsk 0:e294af8d0e07 559 *
igorsk 0:e294af8d0e07 560 * Description: This function initializes endpoint descriptor
igorsk 0:e294af8d0e07 561 *
igorsk 0:e294af8d0e07 562 * Arguments : Pointer to ED strcuture
igorsk 0:e294af8d0e07 563 *
igorsk 0:e294af8d0e07 564 * Returns : None
igorsk 0:e294af8d0e07 565 *
igorsk 0:e294af8d0e07 566 **************************************************************************************************************
igorsk 0:e294af8d0e07 567 */
igorsk 0:e294af8d0e07 568
igorsk 0:e294af8d0e07 569 void Host_EDInit (volatile HCED *ed)
igorsk 0:e294af8d0e07 570 {
igorsk 0:e294af8d0e07 571
igorsk 0:e294af8d0e07 572 ed->Control = 0;
igorsk 0:e294af8d0e07 573 ed->TailTd = 0;
igorsk 0:e294af8d0e07 574 ed->HeadTd = 0;
igorsk 0:e294af8d0e07 575 ed->Next = 0;
igorsk 0:e294af8d0e07 576 }
igorsk 0:e294af8d0e07 577
igorsk 0:e294af8d0e07 578 /*
igorsk 0:e294af8d0e07 579 **************************************************************************************************************
igorsk 0:e294af8d0e07 580 * INITIALIZE HOST CONTROLLER COMMUNICATIONS AREA
igorsk 0:e294af8d0e07 581 *
igorsk 0:e294af8d0e07 582 * Description: This function initializes host controller communications area
igorsk 0:e294af8d0e07 583 *
igorsk 0:e294af8d0e07 584 * Arguments : Pointer to HCCA
igorsk 0:e294af8d0e07 585 *
igorsk 0:e294af8d0e07 586 * Returns :
igorsk 0:e294af8d0e07 587 *
igorsk 0:e294af8d0e07 588 **************************************************************************************************************
igorsk 0:e294af8d0e07 589 */
igorsk 0:e294af8d0e07 590
igorsk 0:e294af8d0e07 591 void Host_HCCAInit (volatile HCCA *hcca)
igorsk 0:e294af8d0e07 592 {
igorsk 0:e294af8d0e07 593 USB_INT32U i;
igorsk 0:e294af8d0e07 594
igorsk 0:e294af8d0e07 595
igorsk 0:e294af8d0e07 596 for (i = 0; i < 32; i++) {
igorsk 0:e294af8d0e07 597
igorsk 0:e294af8d0e07 598 hcca->IntTable[i] = 0;
igorsk 0:e294af8d0e07 599 hcca->FrameNumber = 0;
igorsk 0:e294af8d0e07 600 hcca->DoneHead = 0;
igorsk 0:e294af8d0e07 601 }
igorsk 0:e294af8d0e07 602
igorsk 0:e294af8d0e07 603 }
igorsk 0:e294af8d0e07 604
igorsk 0:e294af8d0e07 605 /*
igorsk 0:e294af8d0e07 606 **************************************************************************************************************
igorsk 0:e294af8d0e07 607 * WAIT FOR WDH INTERRUPT
igorsk 0:e294af8d0e07 608 *
igorsk 0:e294af8d0e07 609 * Description: This function is infinite loop which breaks when ever a WDH interrupt rises
igorsk 0:e294af8d0e07 610 *
igorsk 0:e294af8d0e07 611 * Arguments : None
igorsk 0:e294af8d0e07 612 *
igorsk 0:e294af8d0e07 613 * Returns : None
igorsk 0:e294af8d0e07 614 *
igorsk 0:e294af8d0e07 615 **************************************************************************************************************
igorsk 0:e294af8d0e07 616 */
igorsk 0:e294af8d0e07 617
igorsk 0:e294af8d0e07 618 void Host_WDHWait (void)
igorsk 0:e294af8d0e07 619 {
igorsk 0:e294af8d0e07 620 while (!HOST_WdhIntr)
igorsk 0:e294af8d0e07 621 __WFI();
igorsk 0:e294af8d0e07 622
igorsk 0:e294af8d0e07 623 HOST_WdhIntr = 0;
igorsk 0:e294af8d0e07 624 }
igorsk 0:e294af8d0e07 625
igorsk 0:e294af8d0e07 626 /*
igorsk 0:e294af8d0e07 627 **************************************************************************************************************
igorsk 0:e294af8d0e07 628 * READ LE 32U
igorsk 0:e294af8d0e07 629 *
igorsk 0:e294af8d0e07 630 * Description: This function is used to read an unsigned integer from a character buffer in the platform
igorsk 0:e294af8d0e07 631 * containing little endian processor
igorsk 0:e294af8d0e07 632 *
igorsk 0:e294af8d0e07 633 * Arguments : pmem Pointer to the character buffer
igorsk 0:e294af8d0e07 634 *
igorsk 0:e294af8d0e07 635 * Returns : val Unsigned integer
igorsk 0:e294af8d0e07 636 *
igorsk 0:e294af8d0e07 637 **************************************************************************************************************
igorsk 0:e294af8d0e07 638 */
igorsk 0:e294af8d0e07 639
igorsk 0:e294af8d0e07 640 USB_INT32U ReadLE32U (volatile USB_INT08U *pmem)
igorsk 0:e294af8d0e07 641 {
igorsk 0:e294af8d0e07 642 USB_INT32U val = *(USB_INT32U*)pmem;
igorsk 0:e294af8d0e07 643 #ifdef __BIG_ENDIAN
igorsk 0:e294af8d0e07 644 return __REV(val);
igorsk 0:e294af8d0e07 645 #else
igorsk 0:e294af8d0e07 646 return val;
igorsk 0:e294af8d0e07 647 #endif
igorsk 0:e294af8d0e07 648 }
igorsk 0:e294af8d0e07 649
igorsk 0:e294af8d0e07 650 /*
igorsk 0:e294af8d0e07 651 **************************************************************************************************************
igorsk 0:e294af8d0e07 652 * WRITE LE 32U
igorsk 0:e294af8d0e07 653 *
igorsk 0:e294af8d0e07 654 * Description: This function is used to write an unsigned integer into a charecter buffer in the platform
igorsk 0:e294af8d0e07 655 * containing little endian processor.
igorsk 0:e294af8d0e07 656 *
igorsk 0:e294af8d0e07 657 * Arguments : pmem Pointer to the charecter buffer
igorsk 0:e294af8d0e07 658 * val Integer value to be placed in the charecter buffer
igorsk 0:e294af8d0e07 659 *
igorsk 0:e294af8d0e07 660 * Returns : None
igorsk 0:e294af8d0e07 661 *
igorsk 0:e294af8d0e07 662 **************************************************************************************************************
igorsk 0:e294af8d0e07 663 */
igorsk 0:e294af8d0e07 664
igorsk 0:e294af8d0e07 665 void WriteLE32U (volatile USB_INT08U *pmem,
igorsk 0:e294af8d0e07 666 USB_INT32U val)
igorsk 0:e294af8d0e07 667 {
igorsk 0:e294af8d0e07 668 #ifdef __BIG_ENDIAN
igorsk 0:e294af8d0e07 669 *(USB_INT32U*)pmem = __REV(val);
igorsk 0:e294af8d0e07 670 #else
igorsk 0:e294af8d0e07 671 *(USB_INT32U*)pmem = val;
igorsk 0:e294af8d0e07 672 #endif
igorsk 0:e294af8d0e07 673 }
igorsk 0:e294af8d0e07 674
igorsk 0:e294af8d0e07 675 /*
igorsk 0:e294af8d0e07 676 **************************************************************************************************************
igorsk 0:e294af8d0e07 677 * READ LE 16U
igorsk 0:e294af8d0e07 678 *
igorsk 0:e294af8d0e07 679 * Description: This function is used to read an unsigned short integer from a charecter buffer in the platform
igorsk 0:e294af8d0e07 680 * containing little endian processor
igorsk 0:e294af8d0e07 681 *
igorsk 0:e294af8d0e07 682 * Arguments : pmem Pointer to the charecter buffer
igorsk 0:e294af8d0e07 683 *
igorsk 0:e294af8d0e07 684 * Returns : val Unsigned short integer
igorsk 0:e294af8d0e07 685 *
igorsk 0:e294af8d0e07 686 **************************************************************************************************************
igorsk 0:e294af8d0e07 687 */
igorsk 0:e294af8d0e07 688
igorsk 0:e294af8d0e07 689 USB_INT16U ReadLE16U (volatile USB_INT08U *pmem)
igorsk 0:e294af8d0e07 690 {
igorsk 0:e294af8d0e07 691 USB_INT16U val = *(USB_INT16U*)pmem;
igorsk 0:e294af8d0e07 692 #ifdef __BIG_ENDIAN
igorsk 0:e294af8d0e07 693 return __REV16(val);
igorsk 0:e294af8d0e07 694 #else
igorsk 0:e294af8d0e07 695 return val;
igorsk 0:e294af8d0e07 696 #endif
igorsk 0:e294af8d0e07 697 }
igorsk 0:e294af8d0e07 698
igorsk 0:e294af8d0e07 699 /*
igorsk 0:e294af8d0e07 700 **************************************************************************************************************
igorsk 0:e294af8d0e07 701 * WRITE LE 16U
igorsk 0:e294af8d0e07 702 *
igorsk 0:e294af8d0e07 703 * Description: This function is used to write an unsigned short integer into a charecter buffer in the
igorsk 0:e294af8d0e07 704 * platform containing little endian processor
igorsk 0:e294af8d0e07 705 *
igorsk 0:e294af8d0e07 706 * Arguments : pmem Pointer to the charecter buffer
igorsk 0:e294af8d0e07 707 * val Value to be placed in the charecter buffer
igorsk 0:e294af8d0e07 708 *
igorsk 0:e294af8d0e07 709 * Returns : None
igorsk 0:e294af8d0e07 710 *
igorsk 0:e294af8d0e07 711 **************************************************************************************************************
igorsk 0:e294af8d0e07 712 */
igorsk 0:e294af8d0e07 713
igorsk 0:e294af8d0e07 714 void WriteLE16U (volatile USB_INT08U *pmem,
igorsk 0:e294af8d0e07 715 USB_INT16U val)
igorsk 0:e294af8d0e07 716 {
igorsk 0:e294af8d0e07 717 #ifdef __BIG_ENDIAN
igorsk 0:e294af8d0e07 718 *(USB_INT16U*)pmem = (__REV16(val) & 0xFFFF);
igorsk 0:e294af8d0e07 719 #else
igorsk 0:e294af8d0e07 720 *(USB_INT16U*)pmem = val;
igorsk 0:e294af8d0e07 721 #endif
igorsk 0:e294af8d0e07 722 }
igorsk 0:e294af8d0e07 723
igorsk 0:e294af8d0e07 724 /*
igorsk 0:e294af8d0e07 725 **************************************************************************************************************
igorsk 0:e294af8d0e07 726 * READ BE 32U
igorsk 0:e294af8d0e07 727 *
igorsk 0:e294af8d0e07 728 * Description: This function is used to read an unsigned integer from a charecter buffer in the platform
igorsk 0:e294af8d0e07 729 * containing big endian processor
igorsk 0:e294af8d0e07 730 *
igorsk 0:e294af8d0e07 731 * Arguments : pmem Pointer to the charecter buffer
igorsk 0:e294af8d0e07 732 *
igorsk 0:e294af8d0e07 733 * Returns : val Unsigned integer
igorsk 0:e294af8d0e07 734 *
igorsk 0:e294af8d0e07 735 **************************************************************************************************************
igorsk 0:e294af8d0e07 736 */
igorsk 0:e294af8d0e07 737
igorsk 0:e294af8d0e07 738 USB_INT32U ReadBE32U (volatile USB_INT08U *pmem)
igorsk 0:e294af8d0e07 739 {
igorsk 0:e294af8d0e07 740 USB_INT32U val = *(USB_INT32U*)pmem;
igorsk 0:e294af8d0e07 741 #ifdef __BIG_ENDIAN
igorsk 0:e294af8d0e07 742 return val;
igorsk 0:e294af8d0e07 743 #else
igorsk 0:e294af8d0e07 744 return __REV(val);
igorsk 0:e294af8d0e07 745 #endif
igorsk 0:e294af8d0e07 746 }
igorsk 0:e294af8d0e07 747
igorsk 0:e294af8d0e07 748 /*
igorsk 0:e294af8d0e07 749 **************************************************************************************************************
igorsk 0:e294af8d0e07 750 * WRITE BE 32U
igorsk 0:e294af8d0e07 751 *
igorsk 0:e294af8d0e07 752 * Description: This function is used to write an unsigned integer into a charecter buffer in the platform
igorsk 0:e294af8d0e07 753 * containing big endian processor
igorsk 0:e294af8d0e07 754 *
igorsk 0:e294af8d0e07 755 * Arguments : pmem Pointer to the charecter buffer
igorsk 0:e294af8d0e07 756 * val Value to be placed in the charecter buffer
igorsk 0:e294af8d0e07 757 *
igorsk 0:e294af8d0e07 758 * Returns : None
igorsk 0:e294af8d0e07 759 *
igorsk 0:e294af8d0e07 760 **************************************************************************************************************
igorsk 0:e294af8d0e07 761 */
igorsk 0:e294af8d0e07 762
igorsk 0:e294af8d0e07 763 void WriteBE32U (volatile USB_INT08U *pmem,
igorsk 0:e294af8d0e07 764 USB_INT32U val)
igorsk 0:e294af8d0e07 765 {
igorsk 0:e294af8d0e07 766 #ifdef __BIG_ENDIAN
igorsk 0:e294af8d0e07 767 *(USB_INT32U*)pmem = val;
igorsk 0:e294af8d0e07 768 #else
igorsk 0:e294af8d0e07 769 *(USB_INT32U*)pmem = __REV(val);
igorsk 0:e294af8d0e07 770 #endif
igorsk 0:e294af8d0e07 771 }
igorsk 0:e294af8d0e07 772
igorsk 0:e294af8d0e07 773 /*
igorsk 0:e294af8d0e07 774 **************************************************************************************************************
igorsk 0:e294af8d0e07 775 * READ BE 16U
igorsk 0:e294af8d0e07 776 *
igorsk 0:e294af8d0e07 777 * Description: This function is used to read an unsigned short integer from a charecter buffer in the platform
igorsk 0:e294af8d0e07 778 * containing big endian processor
igorsk 0:e294af8d0e07 779 *
igorsk 0:e294af8d0e07 780 * Arguments : pmem Pointer to the charecter buffer
igorsk 0:e294af8d0e07 781 *
igorsk 0:e294af8d0e07 782 * Returns : val Unsigned short integer
igorsk 0:e294af8d0e07 783 *
igorsk 0:e294af8d0e07 784 **************************************************************************************************************
igorsk 0:e294af8d0e07 785 */
igorsk 0:e294af8d0e07 786
igorsk 0:e294af8d0e07 787 USB_INT16U ReadBE16U (volatile USB_INT08U *pmem)
igorsk 0:e294af8d0e07 788 {
igorsk 0:e294af8d0e07 789 USB_INT16U val = *(USB_INT16U*)pmem;
igorsk 0:e294af8d0e07 790 #ifdef __BIG_ENDIAN
igorsk 0:e294af8d0e07 791 return val;
igorsk 0:e294af8d0e07 792 #else
igorsk 0:e294af8d0e07 793 return __REV16(val);
igorsk 0:e294af8d0e07 794 #endif
igorsk 0:e294af8d0e07 795 }
igorsk 0:e294af8d0e07 796
igorsk 0:e294af8d0e07 797 /*
igorsk 0:e294af8d0e07 798 **************************************************************************************************************
igorsk 0:e294af8d0e07 799 * WRITE BE 16U
igorsk 0:e294af8d0e07 800 *
igorsk 0:e294af8d0e07 801 * Description: This function is used to write an unsigned short integer into the charecter buffer in the
igorsk 0:e294af8d0e07 802 * platform containing big endian processor
igorsk 0:e294af8d0e07 803 *
igorsk 0:e294af8d0e07 804 * Arguments : pmem Pointer to the charecter buffer
igorsk 0:e294af8d0e07 805 * val Value to be placed in the charecter buffer
igorsk 0:e294af8d0e07 806 *
igorsk 0:e294af8d0e07 807 * Returns : None
igorsk 0:e294af8d0e07 808 *
igorsk 0:e294af8d0e07 809 **************************************************************************************************************
igorsk 0:e294af8d0e07 810 */
igorsk 0:e294af8d0e07 811
igorsk 0:e294af8d0e07 812 void WriteBE16U (volatile USB_INT08U *pmem,
igorsk 0:e294af8d0e07 813 USB_INT16U val)
igorsk 0:e294af8d0e07 814 {
igorsk 0:e294af8d0e07 815 #ifdef __BIG_ENDIAN
igorsk 0:e294af8d0e07 816 *(USB_INT16U*)pmem = val;
igorsk 0:e294af8d0e07 817 #else
igorsk 0:e294af8d0e07 818 *(USB_INT16U*)pmem = (__REV16(val) & 0xFFFF);
igorsk 0:e294af8d0e07 819 #endif
igorsk 0:e294af8d0e07 820 }