LP1768 power mode implementation and measurement.

I measured the LP1768 power in different power mode and in different clock frequency using a USB power meter. The code could be found here http://mbed.org/users/steniu01/code/LP1768-lowpower_test. The data is shown below.


As the datasheet show, the sleep mode don't save much power while deep sleep and power down do. When reduce the clock frequency, power could be saved in normal run mode. The current is still relatively high in power down mode. I guess it is because it is the power cost by the peripherals. When power down the the PHY, power could be reduced further in Power Down mode. The next step is to investigate what will be the power reduced after powering down most of the peripherals.

2 comments on LP1768 power mode implementation and measurement. :

02 Aug 2014
06 Aug 2014

X M wrote:

In the link you posted, I am not sure which frequency it was running on. But I do find in normal mode, the current I measured is 0.17A while in that page it is 0.14A. I believe it is the voltage supply and frequency make the difference. In sleep mode, I don't see much current drop as well in that page. Feel free to try my program and measuring the power using a power meter. The program should be used as it is on NXP1768.

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