Diff: i2c.h

Revision:

214:6848a51af734

Parent:

209:63e9c8f8b5d2

Child:

220:2aeab83212e6

--- a/i2c.h	Sat Jul 02 15:28:21 2016 +0000
+++ b/i2c.h	Sun Jul 03 09:33:33 2016 +0000
@@ -26,29 +26,31 @@
     I2C0->C1 |= 0x80;               //Enabling I2C module
     PORTE->PCR[1] |= 0x00000004;    //Disabling high slew rates for SDA and SCL lines
     PORTE->PCR[0] |= 0x00000004;    //Disabling high slew rates for SDA and SCL lines
-    Thread::wait(1);                //Wait for all I2C registers to be updates to their their values
+    wait_ms(1);               //Wait for all I2C registers to be updates to their their values
 }
 bool FCTN_I2C_READ_PL(char *data,int length)       // Returns 0 for success
 {    
     PL_I2C_GPIO = 1;
     read_ack = master.read(addr_pl|1,data,length);
-    Thread::wait(1);        //as per tests Thread::wait not required on master side. But its safe to give 1ms 
+    wait_ms(1);        //as per tests Thread::wait not required on master side. But its safe to give 1ms 
     pdirr1=PTE->PDIR;
     uint8_t i2c_count = 0;    
     if(read_ack == 0)   //if read_ack says success, it may or may not be successful.Hence we check SCL and SDA
     {
         while(((pdirr1 & 0x03000000)!=0x03000000)&& i2c_count<10)//checking SCL and SDA for time=10ms
         {
-            Thread::wait(1);
+            wait_ms(1);
             pdirr1=PTE->PDIR;
             i2c_count++;
         }
         if(((pdirr1 & 0x03000000)==0x03000000))//if SCL and SDA are both high
         {    
-            gPC.printf("\n\rData received from BAE");
+            TIME_LATEST_I2C_SPEED = FCTN_CDMS_RD_RTC() >> 7;
+            gPC.printf("\n\rData received from PL");
         }
         else 
-        {            
+        {   
+            CDMS_I2C_ERR_SPEED_COUNTER++;
             I2C_busreset();
             read_ack = 1;
         }
@@ -65,23 +67,25 @@
 bool FCTN_I2C_WRITE_PL(char *data2,uint8_t tc_len2)       // Returns 0 for success
 {
     write_ack = master.write(addr_pl|0x00,data2,tc_len2);//address to be defined in payload    
-    Thread::wait(1);    //As per the tests Thread::wait is not required on master side but its safe to give 1ms
+    wait_ms(1);    //As per the tests Thread::wait is not required on master side but its safe to give 1ms
     pdirw1=PTE->PDIR;
     uint8_t i2c_count = 0;
     if(write_ack == 0)
     {
         while(((pdirw1 & 0x03000000)!=0x03000000)&& i2c_count<10)
         {
-            Thread::wait(1);
+            wait_ms(1);
             pdirw1=PTE->PDIR;
             i2c_count++;
         }
         if(((pdirw1 & 0x03000000)==0x03000000))
         {
-            gPC.printf("\n\r Data sent");        
+            TIME_LATEST_I2C_SPEED = FCTN_CDMS_RD_RTC() >> 7;
+            gPC.printf("\n\r Data sent to PL");        
         }
         else
         {
+            CDMS_I2C_ERR_SPEED_COUNTER++;
             I2C_busreset();
             write_ack = 1;
         }
@@ -97,23 +101,25 @@
 {   
     CDMS_I2C_GPIO = 1;
     read_ack = master.read(addr_bae|1,data,length);
-    Thread::wait(1);        //as per tests Thread::wait not required on master side. But its safe to give 1ms 
+    wait_ms(1);        //as per tests Thread::wait not required on master side. But its safe to give 1ms 
     pdirr1=PTE->PDIR;
     uint8_t i2c_count = 0;    
     if(read_ack == 0)   //if read_ack says success, it may or may not be successful.Hence we check SCL and SDA
     {
         while(((pdirr1 & 0x03000000)!=0x03000000)&& i2c_count<10)//checking SCL and SDA for time=10ms
         {
-            Thread::wait(1);
+            wait_ms(1);
             pdirr1=PTE->PDIR;
             i2c_count++;
         }
         if(((pdirr1 & 0x03000000)==0x03000000))//if SCL and SDA are both high
         {    
+            TIME_LATEST_I2C_BAE = FCTN_CDMS_RD_RTC() >> 7;
             gPC.printf("\n\rData received from BAE");
         }
         else 
-        {            
+        {   
+            CDMS_I2C_ERR_BAE_COUNTER++;
             I2C_busreset();
             read_ack = 1;
         }
@@ -131,23 +137,25 @@
 {    
     CDMS_I2C_GPIO = 1;
     write_ack = master.write(addr_bae|0x00,data,tc_len2);    
-    Thread::wait(1);    //As per the tests Thread::wait is not required on master side but its safe to give 1ms
+    wait_ms(1);    //As per the tests Thread::wait is not required on master side but its safe to give 1ms
     pdirw1=PTE->PDIR;
     uint8_t i2c_count = 0;
     if(write_ack == 0)
     {
         while(((pdirw1 & 0x03000000)!=0x03000000)&& i2c_count<10)
         {
-            Thread::wait(1);
+            wait_ms(1);
             pdirw1=PTE->PDIR;
             i2c_count++;
         }
         if(((pdirw1 & 0x03000000)==0x03000000))
         {
-            gPC.printf("\n\r Data sent");        
+            TIME_LATEST_I2C_BAE = FCTN_CDMS_RD_RTC() >> 7;
+            gPC.printf("\n\r Data sent BAE");        
         }
         else
         {
+            CDMS_I2C_ERR_BAE_COUNTER++;
             I2C_busreset();
             write_ack = 1;
         }