Sumio Morioka / Mbed 2 deprecated if201410_section5

First release

Dependencies:   EthernetInterface HTTPServer TextLCD mbed-rpc mbed-rtos mbed

Sample code of section 5 in Oct 2014 issue of the Interface Magazine, published by CQ publishing in Japan. CQ出版社インターフェース誌 2014年10月号5章に掲載のサンプルコードです．

LPC1768にトラ技OV7670モジュールとサーボを接続したうえで，リモート操作可能なネットワーク・カメラにしています．このコードのうちカメラ制御部には，Sadaei Osakabe氏のコードを流用させていただいています．

また，次のHTMLファイルをダウンロードして，LPC1768のフラッシュメモリに置いてください．ネットワーク経由で，このHTMLにアクセスをします（ブラウザで開く）． /media/uploads/smorioka/netcam.htm

ov7670.h@0:993f719c9352, 2014-08-26 (annotated)

Committer:
smorioka
Date:
Tue Aug 26 16:49:26 2014 +0000
Revision:
0:993f719c9352
Sample code of section 5 in Oct 2014 issue of the Interface Magazine, published by CQ publishing in Japan.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
smorioka 0:993f719c9352 1 // This code was written by Mr.Sadaei Osakabe.
smorioka 0:993f719c9352 2 // Original code is located at
smorioka 0:993f719c9352 3 // https://mbed.org/users/diasea/code/OV7670_with_AL422B_Color_Size_test/
smorioka 0:993f719c9352 4
smorioka 0:993f719c9352 5 #include "mbed.h"
smorioka 0:993f719c9352 6 #include "ov7670reg.h"
smorioka 0:993f719c9352 7
smorioka 0:993f719c9352 8 #define OV7670_WRITE (0x42)
smorioka 0:993f719c9352 9 #define OV7670_READ (0x43)
smorioka 0:993f719c9352 10 #define OV7670_WRITEWAIT (20)
smorioka 0:993f719c9352 11 #define OV7670_NOACK (0)
smorioka 0:993f719c9352 12 #define OV7670_REGMAX (201)
smorioka 0:993f719c9352 13 #define OV7670_I2CFREQ (50000)
smorioka 0:993f719c9352 14
smorioka 0:993f719c9352 15 //
smorioka 0:993f719c9352 16 // OV7670 + FIFO AL422B camera board test
smorioka 0:993f719c9352 17 //
smorioka 0:993f719c9352 18 class OV7670
smorioka 0:993f719c9352 19 {
smorioka 0:993f719c9352 20 public:
smorioka 0:993f719c9352 21 I2C camera;
smorioka 0:993f719c9352 22 InterruptIn vsync,href;
smorioka 0:993f719c9352 23 DigitalOut wen;
smorioka 0:993f719c9352 24 BusIn data;
smorioka 0:993f719c9352 25 DigitalOut rrst,oe,rclk;
smorioka 0:993f719c9352 26 volatile int LineCounter;
smorioka 0:993f719c9352 27 volatile int LastLines;
smorioka 0:993f719c9352 28 volatile bool CaptureReq;
smorioka 0:993f719c9352 29 volatile bool Busy;
smorioka 0:993f719c9352 30 volatile bool Done;
smorioka 0:993f719c9352 31
smorioka 0:993f719c9352 32 OV7670(
smorioka 0:993f719c9352 33 PinName sda,// Camera I2C port
smorioka 0:993f719c9352 34 PinName scl,// Camera I2C port
smorioka 0:993f719c9352 35 PinName vs, // VSYNC
smorioka 0:993f719c9352 36 PinName hr, // HREF
smorioka 0:993f719c9352 37 PinName we, // WEN
smorioka 0:993f719c9352 38 PinName d7, // D7
smorioka 0:993f719c9352 39 PinName d6, // D6
smorioka 0:993f719c9352 40 PinName d5, // D5
smorioka 0:993f719c9352 41 PinName d4, // D4
smorioka 0:993f719c9352 42 PinName d3, // D3
smorioka 0:993f719c9352 43 PinName d2, // D2
smorioka 0:993f719c9352 44 PinName d1, // D1
smorioka 0:993f719c9352 45 PinName d0, // D0
smorioka 0:993f719c9352 46 PinName rt, // /RRST
smorioka 0:993f719c9352 47 PinName o, // /OE
smorioka 0:993f719c9352 48 PinName rc // RCLK
smorioka 0:993f719c9352 49 ) : camera(sda,scl),vsync(vs),href(hr),wen(we),data(d0,d1,d2,d3,d4,d5,d6,d7),rrst(rt),oe(o),rclk(rc)
smorioka 0:993f719c9352 50 {
smorioka 0:993f719c9352 51 camera.stop();
smorioka 0:993f719c9352 52 camera.frequency(OV7670_I2CFREQ);
smorioka 0:993f719c9352 53 vsync.fall(this,&OV7670::VsyncHandler);
smorioka 0:993f719c9352 54 href.rise(this,&OV7670::HrefHandler);
smorioka 0:993f719c9352 55 CaptureReq = false;
smorioka 0:993f719c9352 56 Busy = false;
smorioka 0:993f719c9352 57 Done = false;
smorioka 0:993f719c9352 58 LineCounter = 0;
smorioka 0:993f719c9352 59 rrst = 1;
smorioka 0:993f719c9352 60 oe = 1;
smorioka 0:993f719c9352 61 rclk = 1;
smorioka 0:993f719c9352 62 wen = 0;
smorioka 0:993f719c9352 63 }
smorioka 0:993f719c9352 64
smorioka 0:993f719c9352 65 // capture request
smorioka 0:993f719c9352 66 void CaptureNext(void)
smorioka 0:993f719c9352 67 {
smorioka 0:993f719c9352 68 CaptureReq = true;
smorioka 0:993f719c9352 69 Busy = true;
smorioka 0:993f719c9352 70 }
smorioka 0:993f719c9352 71
smorioka 0:993f719c9352 72 // capture done? (with clear)
smorioka 0:993f719c9352 73 bool CaptureDone(void)
smorioka 0:993f719c9352 74 {
smorioka 0:993f719c9352 75 bool result;
smorioka 0:993f719c9352 76 if (Busy) {
smorioka 0:993f719c9352 77 result = false;
smorioka 0:993f719c9352 78 } else {
smorioka 0:993f719c9352 79 result = Done;
smorioka 0:993f719c9352 80 Done = false;
smorioka 0:993f719c9352 81 }
smorioka 0:993f719c9352 82 return result;
smorioka 0:993f719c9352 83 }
smorioka 0:993f719c9352 84
smorioka 0:993f719c9352 85 // write to camera
smorioka 0:993f719c9352 86 void WriteReg(int addr,int data)
smorioka 0:993f719c9352 87 {
smorioka 0:993f719c9352 88 // WRITE 0x42,ADDR,DATA
smorioka 0:993f719c9352 89 camera.start();
smorioka 0:993f719c9352 90 camera.write(OV7670_WRITE);
smorioka 0:993f719c9352 91 wait_us(OV7670_WRITEWAIT);
smorioka 0:993f719c9352 92 camera.write(addr);
smorioka 0:993f719c9352 93 wait_us(OV7670_WRITEWAIT);
smorioka 0:993f719c9352 94 camera.write(data);
smorioka 0:993f719c9352 95 camera.stop();
smorioka 0:993f719c9352 96 }
smorioka 0:993f719c9352 97
smorioka 0:993f719c9352 98 // read from camera
smorioka 0:993f719c9352 99 int ReadReg(int addr)
smorioka 0:993f719c9352 100 {
smorioka 0:993f719c9352 101 int data;
smorioka 0:993f719c9352 102
smorioka 0:993f719c9352 103 // WRITE 0x42,ADDR
smorioka 0:993f719c9352 104 camera.start();
smorioka 0:993f719c9352 105 camera.write(OV7670_WRITE);
smorioka 0:993f719c9352 106 wait_us(OV7670_WRITEWAIT);
smorioka 0:993f719c9352 107 camera.write(addr);
smorioka 0:993f719c9352 108 camera.stop();
smorioka 0:993f719c9352 109 wait_us(OV7670_WRITEWAIT);
smorioka 0:993f719c9352 110
smorioka 0:993f719c9352 111 // WRITE 0x43,READ
smorioka 0:993f719c9352 112 camera.start();
smorioka 0:993f719c9352 113 camera.write(OV7670_READ);
smorioka 0:993f719c9352 114 wait_us(OV7670_WRITEWAIT);
smorioka 0:993f719c9352 115 data = camera.read(OV7670_NOACK);
smorioka 0:993f719c9352 116 camera.stop();
smorioka 0:993f719c9352 117
smorioka 0:993f719c9352 118 return data;
smorioka 0:993f719c9352 119 }
smorioka 0:993f719c9352 120
smorioka 0:993f719c9352 121 // print register
smorioka 0:993f719c9352 122 void PrintRegister(void) {
smorioka 0:993f719c9352 123 printf("AD : +0 +1 +2 +3 +4 +5 +6 +7 +8 +9 +A +B +C +D +E +F");
smorioka 0:993f719c9352 124 for (int i=0;i<OV7670_REGMAX;i++) {
smorioka 0:993f719c9352 125 int data;
smorioka 0:993f719c9352 126 data = ReadReg(i); // READ REG
smorioka 0:993f719c9352 127 if ((i & 0x0F) == 0) {
smorioka 0:993f719c9352 128 printf("\r\n%02X : ",i);
smorioka 0:993f719c9352 129 }
smorioka 0:993f719c9352 130 printf("%02X ",data);
smorioka 0:993f719c9352 131 }
smorioka 0:993f719c9352 132 printf("\r\n");
smorioka 0:993f719c9352 133 }
smorioka 0:993f719c9352 134
smorioka 0:993f719c9352 135 void Reset(void) {
smorioka 0:993f719c9352 136 WriteReg(REG_COM7,COM7_RESET); // RESET CAMERA
smorioka 0:993f719c9352 137 wait_ms(200);
smorioka 0:993f719c9352 138 }
smorioka 0:993f719c9352 139
smorioka 0:993f719c9352 140 void InitForFIFOWriteReset(void) {
smorioka 0:993f719c9352 141 WriteReg(REG_COM10, COM10_VS_NEG);
smorioka 0:993f719c9352 142 }
smorioka 0:993f719c9352 143
smorioka 0:993f719c9352 144 void InitSetColorbar(void) {
smorioka 0:993f719c9352 145 int reg_com7 = ReadReg(REG_COM7);
smorioka 0:993f719c9352 146 // color bar
smorioka 0:993f719c9352 147 WriteReg(REG_COM17, reg_com7|COM17_CBAR);
smorioka 0:993f719c9352 148 }
smorioka 0:993f719c9352 149
smorioka 0:993f719c9352 150 void InitDefaultReg(void) {
smorioka 0:993f719c9352 151 // Gamma curve values
smorioka 0:993f719c9352 152 WriteReg(0x7a, 0x20);
smorioka 0:993f719c9352 153 WriteReg(0x7b, 0x10);
smorioka 0:993f719c9352 154 WriteReg(0x7c, 0x1e);
smorioka 0:993f719c9352 155 WriteReg(0x7d, 0x35);
smorioka 0:993f719c9352 156 WriteReg(0x7e, 0x5a);
smorioka 0:993f719c9352 157 WriteReg(0x7f, 0x69);
smorioka 0:993f719c9352 158 WriteReg(0x80, 0x76);
smorioka 0:993f719c9352 159 WriteReg(0x81, 0x80);
smorioka 0:993f719c9352 160 WriteReg(0x82, 0x88);
smorioka 0:993f719c9352 161 WriteReg(0x83, 0x8f);
smorioka 0:993f719c9352 162 WriteReg(0x84, 0x96);
smorioka 0:993f719c9352 163 WriteReg(0x85, 0xa3);
smorioka 0:993f719c9352 164 WriteReg(0x86, 0xaf);
smorioka 0:993f719c9352 165 WriteReg(0x87, 0xc4);
smorioka 0:993f719c9352 166 WriteReg(0x88, 0xd7);
smorioka 0:993f719c9352 167 WriteReg(0x89, 0xe8);
smorioka 0:993f719c9352 168
smorioka 0:993f719c9352 169 // AGC and AEC parameters. Note we start by disabling those features,
smorioka 0:993f719c9352 170 //then turn them only after tweaking the values.
smorioka 0:993f719c9352 171 WriteReg(REG_COM8, COM8_FASTAEC | COM8_AECSTEP | COM8_BFILT);
smorioka 0:993f719c9352 172 WriteReg(REG_GAIN, 0);
smorioka 0:993f719c9352 173 WriteReg(REG_AECH, 0);
smorioka 0:993f719c9352 174 WriteReg(REG_COM4, 0x40);
smorioka 0:993f719c9352 175 // magic reserved bit
smorioka 0:993f719c9352 176 WriteReg(REG_COM9, 0x18);
smorioka 0:993f719c9352 177 // 4x gain + magic rsvd bit
smorioka 0:993f719c9352 178 WriteReg(REG_BD50MAX, 0x05);
smorioka 0:993f719c9352 179 WriteReg(REG_BD60MAX, 0x07);
smorioka 0:993f719c9352 180 WriteReg(REG_AEW, 0x95);
smorioka 0:993f719c9352 181 WriteReg(REG_AEB, 0x33);
smorioka 0:993f719c9352 182 WriteReg(REG_VPT, 0xe3);
smorioka 0:993f719c9352 183 WriteReg(REG_HAECC1, 0x78);
smorioka 0:993f719c9352 184 WriteReg(REG_HAECC2, 0x68);
smorioka 0:993f719c9352 185 WriteReg(0xa1, 0x03);
smorioka 0:993f719c9352 186 // magic
smorioka 0:993f719c9352 187 WriteReg(REG_HAECC3, 0xd8);
smorioka 0:993f719c9352 188 WriteReg(REG_HAECC4, 0xd8);
smorioka 0:993f719c9352 189 WriteReg(REG_HAECC5, 0xf0);
smorioka 0:993f719c9352 190 WriteReg(REG_HAECC6, 0x90);
smorioka 0:993f719c9352 191 WriteReg(REG_HAECC7, 0x94);
smorioka 0:993f719c9352 192 WriteReg(REG_COM8, COM8_FASTAEC|COM8_AECSTEP|COM8_BFILT|COM8_AGC|COM8_AEC);
smorioka 0:993f719c9352 193
smorioka 0:993f719c9352 194 // Almost all of these are magic "reserved" values.
smorioka 0:993f719c9352 195 WriteReg(REG_COM5, 0x61);
smorioka 0:993f719c9352 196 WriteReg(REG_COM6, 0x4b);
smorioka 0:993f719c9352 197 WriteReg(0x16, 0x02);
smorioka 0:993f719c9352 198 WriteReg(REG_MVFP, 0x07);
smorioka 0:993f719c9352 199 WriteReg(0x21, 0x02);
smorioka 0:993f719c9352 200 WriteReg(0x22, 0x91);
smorioka 0:993f719c9352 201 WriteReg(0x29, 0x07);
smorioka 0:993f719c9352 202 WriteReg(0x33, 0x0b);
smorioka 0:993f719c9352 203 WriteReg(0x35, 0x0b);
smorioka 0:993f719c9352 204 WriteReg(0x37, 0x1d);
smorioka 0:993f719c9352 205 WriteReg(0x38, 0x71);
smorioka 0:993f719c9352 206 WriteReg(0x39, 0x2a);
smorioka 0:993f719c9352 207 WriteReg(REG_COM12, 0x78);
smorioka 0:993f719c9352 208 WriteReg(0x4d, 0x40);
smorioka 0:993f719c9352 209 WriteReg(0x4e, 0x20);
smorioka 0:993f719c9352 210 WriteReg(REG_GFIX, 0);
smorioka 0:993f719c9352 211 WriteReg(0x6b, 0x0a);
smorioka 0:993f719c9352 212 WriteReg(0x74, 0x10);
smorioka 0:993f719c9352 213 WriteReg(0x8d, 0x4f);
smorioka 0:993f719c9352 214 WriteReg(0x8e, 0);
smorioka 0:993f719c9352 215 WriteReg(0x8f, 0);
smorioka 0:993f719c9352 216 WriteReg(0x90, 0);
smorioka 0:993f719c9352 217 WriteReg(0x91, 0);
smorioka 0:993f719c9352 218 WriteReg(0x96, 0);
smorioka 0:993f719c9352 219 WriteReg(0x9a, 0);
smorioka 0:993f719c9352 220 WriteReg(0xb0, 0x84);
smorioka 0:993f719c9352 221 WriteReg(0xb1, 0x0c);
smorioka 0:993f719c9352 222 WriteReg(0xb2, 0x0e);
smorioka 0:993f719c9352 223 WriteReg(0xb3, 0x82);
smorioka 0:993f719c9352 224 WriteReg(0xb8, 0x0a);
smorioka 0:993f719c9352 225
smorioka 0:993f719c9352 226 // More reserved magic, some of which tweaks white balance
smorioka 0:993f719c9352 227 WriteReg(0x43, 0x0a);
smorioka 0:993f719c9352 228 WriteReg(0x44, 0xf0);
smorioka 0:993f719c9352 229 WriteReg(0x45, 0x34);
smorioka 0:993f719c9352 230 WriteReg(0x46, 0x58);
smorioka 0:993f719c9352 231 WriteReg(0x47, 0x28);
smorioka 0:993f719c9352 232 WriteReg(0x48, 0x3a);
smorioka 0:993f719c9352 233 WriteReg(0x59, 0x88);
smorioka 0:993f719c9352 234 WriteReg(0x5a, 0x88);
smorioka 0:993f719c9352 235 WriteReg(0x5b, 0x44);
smorioka 0:993f719c9352 236 WriteReg(0x5c, 0x67);
smorioka 0:993f719c9352 237 WriteReg(0x5d, 0x49);
smorioka 0:993f719c9352 238 WriteReg(0x5e, 0x0e);
smorioka 0:993f719c9352 239 WriteReg(0x6c, 0x0a);
smorioka 0:993f719c9352 240 WriteReg(0x6d, 0x55);
smorioka 0:993f719c9352 241 WriteReg(0x6e, 0x11);
smorioka 0:993f719c9352 242 WriteReg(0x6f, 0x9f);
smorioka 0:993f719c9352 243 // "9e for advance AWB"
smorioka 0:993f719c9352 244 WriteReg(0x6a, 0x40);
smorioka 0:993f719c9352 245 WriteReg(REG_BLUE, 0x40);
smorioka 0:993f719c9352 246 WriteReg(REG_RED, 0x60);
smorioka 0:993f719c9352 247 WriteReg(REG_COM8, COM8_FASTAEC|COM8_AECSTEP|COM8_BFILT|COM8_AGC|COM8_AEC|COM8_AWB);
smorioka 0:993f719c9352 248
smorioka 0:993f719c9352 249 // Matrix coefficients
smorioka 0:993f719c9352 250 WriteReg(0x4f, 0x80);
smorioka 0:993f719c9352 251 WriteReg(0x50, 0x80);
smorioka 0:993f719c9352 252 WriteReg(0x51, 0);
smorioka 0:993f719c9352 253 WriteReg(0x52, 0x22);
smorioka 0:993f719c9352 254 WriteReg(0x53, 0x5e);
smorioka 0:993f719c9352 255 WriteReg(0x54, 0x80);
smorioka 0:993f719c9352 256 WriteReg(0x58, 0x9e);
smorioka 0:993f719c9352 257
smorioka 0:993f719c9352 258 WriteReg(REG_COM16, COM16_AWBGAIN);
smorioka 0:993f719c9352 259 WriteReg(REG_EDGE, 0);
smorioka 0:993f719c9352 260 WriteReg(0x75, 0x05);
smorioka 0:993f719c9352 261 WriteReg(0x76, 0xe1);
smorioka 0:993f719c9352 262 WriteReg(0x4c, 0);
smorioka 0:993f719c9352 263 WriteReg(0x77, 0x01);
smorioka 0:993f719c9352 264 WriteReg(0x4b, 0x09);
smorioka 0:993f719c9352 265 WriteReg(0xc9, 0x60);
smorioka 0:993f719c9352 266 WriteReg(REG_COM16, 0x38);
smorioka 0:993f719c9352 267 WriteReg(0x56, 0x40);
smorioka 0:993f719c9352 268
smorioka 0:993f719c9352 269 WriteReg(0x34, 0x11);
smorioka 0:993f719c9352 270 WriteReg(REG_COM11, COM11_EXP|COM11_HZAUTO_ON);
smorioka 0:993f719c9352 271 WriteReg(0xa4, 0x88);
smorioka 0:993f719c9352 272 WriteReg(0x96, 0);
smorioka 0:993f719c9352 273 WriteReg(0x97, 0x30);
smorioka 0:993f719c9352 274 WriteReg(0x98, 0x20);
smorioka 0:993f719c9352 275 WriteReg(0x99, 0x30);
smorioka 0:993f719c9352 276 WriteReg(0x9a, 0x84);
smorioka 0:993f719c9352 277 WriteReg(0x9b, 0x29);
smorioka 0:993f719c9352 278 WriteReg(0x9c, 0x03);
smorioka 0:993f719c9352 279 WriteReg(0x9d, 0x4c);
smorioka 0:993f719c9352 280 WriteReg(0x9e, 0x3f);
smorioka 0:993f719c9352 281 WriteReg(0x78, 0x04);
smorioka 0:993f719c9352 282
smorioka 0:993f719c9352 283 // Extra-weird stuff. Some sort of multiplexor register
smorioka 0:993f719c9352 284 WriteReg(0x79, 0x01);
smorioka 0:993f719c9352 285 WriteReg(0xc8, 0xf0);
smorioka 0:993f719c9352 286 WriteReg(0x79, 0x0f);
smorioka 0:993f719c9352 287 WriteReg(0xc8, 0x00);
smorioka 0:993f719c9352 288 WriteReg(0x79, 0x10);
smorioka 0:993f719c9352 289 WriteReg(0xc8, 0x7e);
smorioka 0:993f719c9352 290 WriteReg(0x79, 0x0a);
smorioka 0:993f719c9352 291 WriteReg(0xc8, 0x80);
smorioka 0:993f719c9352 292 WriteReg(0x79, 0x0b);
smorioka 0:993f719c9352 293 WriteReg(0xc8, 0x01);
smorioka 0:993f719c9352 294 WriteReg(0x79, 0x0c);
smorioka 0:993f719c9352 295 WriteReg(0xc8, 0x0f);
smorioka 0:993f719c9352 296 WriteReg(0x79, 0x0d);
smorioka 0:993f719c9352 297 WriteReg(0xc8, 0x20);
smorioka 0:993f719c9352 298 WriteReg(0x79, 0x09);
smorioka 0:993f719c9352 299 WriteReg(0xc8, 0x80);
smorioka 0:993f719c9352 300 WriteReg(0x79, 0x02);
smorioka 0:993f719c9352 301 WriteReg(0xc8, 0xc0);
smorioka 0:993f719c9352 302 WriteReg(0x79, 0x03);
smorioka 0:993f719c9352 303 WriteReg(0xc8, 0x40);
smorioka 0:993f719c9352 304 WriteReg(0x79, 0x05);
smorioka 0:993f719c9352 305 WriteReg(0xc8, 0x30);
smorioka 0:993f719c9352 306 WriteReg(0x79, 0x26);
smorioka 0:993f719c9352 307 }
smorioka 0:993f719c9352 308
smorioka 0:993f719c9352 309 void InitRGB444(void){
smorioka 0:993f719c9352 310 int reg_com7 = ReadReg(REG_COM7);
smorioka 0:993f719c9352 311
smorioka 0:993f719c9352 312 WriteReg(REG_COM7, reg_com7|COM7_RGB);
smorioka 0:993f719c9352 313 WriteReg(REG_RGB444, RGB444_ENABLE|RGB444_XBGR);
smorioka 0:993f719c9352 314 WriteReg(REG_COM15, COM15_R01FE|COM15_RGB444);
smorioka 0:993f719c9352 315
smorioka 0:993f719c9352 316 WriteReg(REG_COM1, 0x40); // Magic reserved bit
smorioka 0:993f719c9352 317 WriteReg(REG_COM9, 0x38); // 16x gain ceiling; 0x8 is reserved bit
smorioka 0:993f719c9352 318 WriteReg(0x4f, 0xb3); // "matrix coefficient 1"
smorioka 0:993f719c9352 319 WriteReg(0x50, 0xb3); // "matrix coefficient 2"
smorioka 0:993f719c9352 320 WriteReg(0x51, 0x00); // vb
smorioka 0:993f719c9352 321 WriteReg(0x52, 0x3d); // "matrix coefficient 4"
smorioka 0:993f719c9352 322 WriteReg(0x53, 0xa7); // "matrix coefficient 5"
smorioka 0:993f719c9352 323 WriteReg(0x54, 0xe4); // "matrix coefficient 6"
smorioka 0:993f719c9352 324 WriteReg(REG_COM13, COM13_GAMMA|COM13_UVSAT|0x2); // Magic rsvd bit
smorioka 0:993f719c9352 325
smorioka 0:993f719c9352 326 WriteReg(REG_TSLB, 0x04);
smorioka 0:993f719c9352 327 }
smorioka 0:993f719c9352 328
smorioka 0:993f719c9352 329 void InitRGB555(void){
smorioka 0:993f719c9352 330 int reg_com7 = ReadReg(REG_COM7);
smorioka 0:993f719c9352 331
smorioka 0:993f719c9352 332 WriteReg(REG_COM7, reg_com7|COM7_RGB);
smorioka 0:993f719c9352 333 WriteReg(REG_RGB444, RGB444_DISABLE);
smorioka 0:993f719c9352 334 WriteReg(REG_COM15, COM15_RGB555|COM15_R00FF);
smorioka 0:993f719c9352 335
smorioka 0:993f719c9352 336 WriteReg(REG_TSLB, 0x04);
smorioka 0:993f719c9352 337
smorioka 0:993f719c9352 338 WriteReg(REG_COM1, 0x00);
smorioka 0:993f719c9352 339 WriteReg(REG_COM9, 0x38); // 16x gain ceiling; 0x8 is reserved bit
smorioka 0:993f719c9352 340 WriteReg(0x4f, 0xb3); // "matrix coefficient 1"
smorioka 0:993f719c9352 341 WriteReg(0x50, 0xb3); // "matrix coefficient 2"
smorioka 0:993f719c9352 342 WriteReg(0x51, 0x00); // vb
smorioka 0:993f719c9352 343 WriteReg(0x52, 0x3d); // "matrix coefficient 4"
smorioka 0:993f719c9352 344 WriteReg(0x53, 0xa7); // "matrix coefficient 5"
smorioka 0:993f719c9352 345 WriteReg(0x54, 0xe4); // "matrix coefficient 6"
smorioka 0:993f719c9352 346 WriteReg(REG_COM13, COM13_GAMMA|COM13_UVSAT);
smorioka 0:993f719c9352 347 }
smorioka 0:993f719c9352 348
smorioka 0:993f719c9352 349 void InitRGB565(void){
smorioka 0:993f719c9352 350 int reg_com7 = ReadReg(REG_COM7);
smorioka 0:993f719c9352 351
smorioka 0:993f719c9352 352 WriteReg(REG_COM7, reg_com7|COM7_RGB);
smorioka 0:993f719c9352 353 WriteReg(REG_RGB444, RGB444_DISABLE);
smorioka 0:993f719c9352 354 WriteReg(REG_COM15, COM15_R00FF|COM15_RGB565);
smorioka 0:993f719c9352 355
smorioka 0:993f719c9352 356 WriteReg(REG_TSLB, 0x04);
smorioka 0:993f719c9352 357
smorioka 0:993f719c9352 358 WriteReg(REG_COM1, 0x00);
smorioka 0:993f719c9352 359 WriteReg(REG_COM9, 0x38); // 16x gain ceiling; 0x8 is reserved bit
smorioka 0:993f719c9352 360 WriteReg(0x4f, 0xb3); // "matrix coefficient 1"
smorioka 0:993f719c9352 361 WriteReg(0x50, 0xb3); // "matrix coefficient 2"
smorioka 0:993f719c9352 362 WriteReg(0x51, 0x00); // vb
smorioka 0:993f719c9352 363 WriteReg(0x52, 0x3d); // "matrix coefficient 4"
smorioka 0:993f719c9352 364 WriteReg(0x53, 0xa7); // "matrix coefficient 5"
smorioka 0:993f719c9352 365 WriteReg(0x54, 0xe4); // "matrix coefficient 6"
smorioka 0:993f719c9352 366 WriteReg(REG_COM13, COM13_GAMMA|COM13_UVSAT);
smorioka 0:993f719c9352 367 }
smorioka 0:993f719c9352 368
smorioka 0:993f719c9352 369 void InitYUV(void){
smorioka 0:993f719c9352 370 int reg_com7 = ReadReg(REG_COM7);
smorioka 0:993f719c9352 371
smorioka 0:993f719c9352 372 WriteReg(REG_COM7, reg_com7|COM7_YUV);
smorioka 0:993f719c9352 373 WriteReg(REG_RGB444, RGB444_DISABLE);
smorioka 0:993f719c9352 374 WriteReg(REG_COM15, COM15_R00FF);
smorioka 0:993f719c9352 375
smorioka 0:993f719c9352 376 WriteReg(REG_TSLB, 0x04);
smorioka 0:993f719c9352 377 // WriteReg(REG_TSLB, 0x14);
smorioka 0:993f719c9352 378 // WriteReg(REG_MANU, 0x00);
smorioka 0:993f719c9352 379 // WriteReg(REG_MANV, 0x00);
smorioka 0:993f719c9352 380
smorioka 0:993f719c9352 381 WriteReg(REG_COM1, 0x00);
smorioka 0:993f719c9352 382 WriteReg(REG_COM9, 0x18); // 4x gain ceiling; 0x8 is reserved bit
smorioka 0:993f719c9352 383 WriteReg(0x4f, 0x80); // "matrix coefficient 1"
smorioka 0:993f719c9352 384 WriteReg(0x50, 0x80); // "matrix coefficient 2"
smorioka 0:993f719c9352 385 WriteReg(0x51, 0x00); // vb
smorioka 0:993f719c9352 386 WriteReg(0x52, 0x22); // "matrix coefficient 4"
smorioka 0:993f719c9352 387 WriteReg(0x53, 0x5e); // "matrix coefficient 5"
smorioka 0:993f719c9352 388 WriteReg(0x54, 0x80); // "matrix coefficient 6"
smorioka 0:993f719c9352 389 WriteReg(REG_COM13, COM13_GAMMA|COM13_UVSAT|COM13_UVSWAP);
smorioka 0:993f719c9352 390 }
smorioka 0:993f719c9352 391
smorioka 0:993f719c9352 392 void InitBayerRGB(void){
smorioka 0:993f719c9352 393 int reg_com7 = ReadReg(REG_COM7);
smorioka 0:993f719c9352 394
smorioka 0:993f719c9352 395 // odd line BGBG... even line GRGR...
smorioka 0:993f719c9352 396 WriteReg(REG_COM7, reg_com7|COM7_BAYER);
smorioka 0:993f719c9352 397 // odd line GBGB... even line RGRG...
smorioka 0:993f719c9352 398 //WriteReg(REG_COM7, reg_com7|COM7_PBAYER);
smorioka 0:993f719c9352 399
smorioka 0:993f719c9352 400 WriteReg(REG_RGB444, RGB444_DISABLE);
smorioka 0:993f719c9352 401 WriteReg(REG_COM15, COM15_R00FF);
smorioka 0:993f719c9352 402
smorioka 0:993f719c9352 403 WriteReg(REG_COM13, 0x08); /* No gamma, magic rsvd bit */
smorioka 0:993f719c9352 404 WriteReg(REG_COM16, 0x3d); /* Edge enhancement, denoise */
smorioka 0:993f719c9352 405 WriteReg(REG_REG76, 0xe1); /* Pix correction, magic rsvd */
smorioka 0:993f719c9352 406
smorioka 0:993f719c9352 407 WriteReg(REG_TSLB, 0x04);
smorioka 0:993f719c9352 408 }
smorioka 0:993f719c9352 409
smorioka 0:993f719c9352 410 void InitVGA(void) {
smorioka 0:993f719c9352 411 // VGA
smorioka 0:993f719c9352 412 int reg_com7 = ReadReg(REG_COM7);
smorioka 0:993f719c9352 413
smorioka 0:993f719c9352 414 WriteReg(REG_COM7,reg_com7|COM7_VGA);
smorioka 0:993f719c9352 415
smorioka 0:993f719c9352 416 WriteReg(REG_HSTART,HSTART_VGA);
smorioka 0:993f719c9352 417 WriteReg(REG_HSTOP,HSTOP_VGA);
smorioka 0:993f719c9352 418 WriteReg(REG_HREF,HREF_VGA);
smorioka 0:993f719c9352 419 WriteReg(REG_VSTART,VSTART_VGA);
smorioka 0:993f719c9352 420 WriteReg(REG_VSTOP,VSTOP_VGA);
smorioka 0:993f719c9352 421 WriteReg(REG_VREF,VREF_VGA);
smorioka 0:993f719c9352 422 WriteReg(REG_COM3, COM3_VGA);
smorioka 0:993f719c9352 423 WriteReg(REG_COM14, COM14_VGA);
smorioka 0:993f719c9352 424 WriteReg(REG_SCALING_XSC, SCALING_XSC_VGA);
smorioka 0:993f719c9352 425 WriteReg(REG_SCALING_YSC, SCALING_YSC_VGA);
smorioka 0:993f719c9352 426 WriteReg(REG_SCALING_DCWCTR, SCALING_DCWCTR_VGA);
smorioka 0:993f719c9352 427 WriteReg(REG_SCALING_PCLK_DIV, SCALING_PCLK_DIV_VGA);
smorioka 0:993f719c9352 428 WriteReg(REG_SCALING_PCLK_DELAY, SCALING_PCLK_DELAY_VGA);
smorioka 0:993f719c9352 429 }
smorioka 0:993f719c9352 430
smorioka 0:993f719c9352 431 void InitFIFO_2bytes_color_nealy_limit_size(void) {
smorioka 0:993f719c9352 432 // nealy FIFO limit 544x360
smorioka 0:993f719c9352 433 int reg_com7 = ReadReg(REG_COM7);
smorioka 0:993f719c9352 434
smorioka 0:993f719c9352 435 WriteReg(REG_COM7,reg_com7|COM7_VGA);
smorioka 0:993f719c9352 436
smorioka 0:993f719c9352 437 WriteReg(REG_HSTART,HSTART_VGA);
smorioka 0:993f719c9352 438 WriteReg(REG_HSTOP,HSTOP_VGA);
smorioka 0:993f719c9352 439 WriteReg(REG_HREF,HREF_VGA);
smorioka 0:993f719c9352 440 WriteReg(REG_VSTART,VSTART_VGA);
smorioka 0:993f719c9352 441 WriteReg(REG_VSTOP,VSTOP_VGA);
smorioka 0:993f719c9352 442 WriteReg(REG_VREF,VREF_VGA);
smorioka 0:993f719c9352 443 WriteReg(REG_COM3, COM3_VGA);
smorioka 0:993f719c9352 444 WriteReg(REG_COM14, COM14_VGA);
smorioka 0:993f719c9352 445 WriteReg(REG_SCALING_XSC, SCALING_XSC_VGA);
smorioka 0:993f719c9352 446 WriteReg(REG_SCALING_YSC, SCALING_YSC_VGA);
smorioka 0:993f719c9352 447 WriteReg(REG_SCALING_DCWCTR, SCALING_DCWCTR_VGA);
smorioka 0:993f719c9352 448 WriteReg(REG_SCALING_PCLK_DIV, SCALING_PCLK_DIV_VGA);
smorioka 0:993f719c9352 449 WriteReg(REG_SCALING_PCLK_DELAY, SCALING_PCLK_DELAY_VGA);
smorioka 0:993f719c9352 450
smorioka 0:993f719c9352 451 WriteReg(REG_HSTART, 0x17);
smorioka 0:993f719c9352 452 WriteReg(REG_HSTOP, 0x5b);
smorioka 0:993f719c9352 453 WriteReg(REG_VSTART, 0x12);
smorioka 0:993f719c9352 454 WriteReg(REG_VSTOP, 0x6c);
smorioka 0:993f719c9352 455 }
smorioka 0:993f719c9352 456
smorioka 0:993f719c9352 457 void InitVGA_3_4(void) {
smorioka 0:993f719c9352 458 // VGA 3/4 -> 480x360
smorioka 0:993f719c9352 459 int reg_com7 = ReadReg(REG_COM7);
smorioka 0:993f719c9352 460
smorioka 0:993f719c9352 461 WriteReg(REG_COM7,reg_com7|COM7_VGA);
smorioka 0:993f719c9352 462
smorioka 0:993f719c9352 463 WriteReg(REG_HSTART,HSTART_VGA);
smorioka 0:993f719c9352 464 WriteReg(REG_HSTOP,HSTOP_VGA);
smorioka 0:993f719c9352 465 WriteReg(REG_HREF,HREF_VGA);
smorioka 0:993f719c9352 466 WriteReg(REG_VSTART,VSTART_VGA);
smorioka 0:993f719c9352 467 WriteReg(REG_VSTOP,VSTOP_VGA);
smorioka 0:993f719c9352 468 WriteReg(REG_VREF,VREF_VGA);
smorioka 0:993f719c9352 469 WriteReg(REG_COM3, COM3_VGA);
smorioka 0:993f719c9352 470 WriteReg(REG_COM14, COM14_VGA);
smorioka 0:993f719c9352 471 WriteReg(REG_SCALING_XSC, SCALING_XSC_VGA);
smorioka 0:993f719c9352 472 WriteReg(REG_SCALING_YSC, SCALING_YSC_VGA);
smorioka 0:993f719c9352 473 WriteReg(REG_SCALING_DCWCTR, SCALING_DCWCTR_VGA);
smorioka 0:993f719c9352 474 WriteReg(REG_SCALING_PCLK_DIV, SCALING_PCLK_DIV_VGA);
smorioka 0:993f719c9352 475 WriteReg(REG_SCALING_PCLK_DELAY, SCALING_PCLK_DELAY_VGA);
smorioka 0:993f719c9352 476
smorioka 0:993f719c9352 477 WriteReg(REG_HSTART, 0x1b);
smorioka 0:993f719c9352 478 WriteReg(REG_HSTOP, 0x57);
smorioka 0:993f719c9352 479 WriteReg(REG_VSTART, 0x12);
smorioka 0:993f719c9352 480 WriteReg(REG_VSTOP, 0x6c);
smorioka 0:993f719c9352 481 }
smorioka 0:993f719c9352 482
smorioka 0:993f719c9352 483 void InitQVGA(void) {
smorioka 0:993f719c9352 484 // QQVGA
smorioka 0:993f719c9352 485 int reg_com7 = ReadReg(REG_COM7);
smorioka 0:993f719c9352 486
smorioka 0:993f719c9352 487 WriteReg(REG_COM7,reg_com7|COM7_QVGA);
smorioka 0:993f719c9352 488
smorioka 0:993f719c9352 489 WriteReg(REG_HSTART,HSTART_QVGA);
smorioka 0:993f719c9352 490 WriteReg(REG_HSTOP,HSTOP_QVGA);
smorioka 0:993f719c9352 491 WriteReg(REG_HREF,HREF_QVGA);
smorioka 0:993f719c9352 492 WriteReg(REG_VSTART,VSTART_QVGA);
smorioka 0:993f719c9352 493 WriteReg(REG_VSTOP,VSTOP_QVGA);
smorioka 0:993f719c9352 494 WriteReg(REG_VREF,VREF_QVGA);
smorioka 0:993f719c9352 495 WriteReg(REG_COM3, COM3_QVGA);
smorioka 0:993f719c9352 496 WriteReg(REG_COM14, COM14_QVGA);
smorioka 0:993f719c9352 497 WriteReg(REG_SCALING_XSC, SCALING_XSC_QVGA);
smorioka 0:993f719c9352 498 WriteReg(REG_SCALING_YSC, SCALING_YSC_QVGA);
smorioka 0:993f719c9352 499 WriteReg(REG_SCALING_DCWCTR, SCALING_DCWCTR_QVGA);
smorioka 0:993f719c9352 500 WriteReg(REG_SCALING_PCLK_DIV, SCALING_PCLK_DIV_QVGA);
smorioka 0:993f719c9352 501 WriteReg(REG_SCALING_PCLK_DELAY, SCALING_PCLK_DELAY_QVGA);
smorioka 0:993f719c9352 502 }
smorioka 0:993f719c9352 503
smorioka 0:993f719c9352 504 void InitQQVGA(void) {
smorioka 0:993f719c9352 505 // QQVGA
smorioka 0:993f719c9352 506 int reg_com7 = ReadReg(REG_COM7);
smorioka 0:993f719c9352 507
smorioka 0:993f719c9352 508 WriteReg(REG_COM7,reg_com7|COM7_QQVGA);
smorioka 0:993f719c9352 509
smorioka 0:993f719c9352 510 WriteReg(REG_HSTART,HSTART_QQVGA);
smorioka 0:993f719c9352 511 WriteReg(REG_HSTOP,HSTOP_QQVGA);
smorioka 0:993f719c9352 512 WriteReg(REG_HREF,HREF_QQVGA);
smorioka 0:993f719c9352 513 WriteReg(REG_VSTART,VSTART_QQVGA);
smorioka 0:993f719c9352 514 WriteReg(REG_VSTOP,VSTOP_QQVGA);
smorioka 0:993f719c9352 515 WriteReg(REG_VREF,VREF_QQVGA);
smorioka 0:993f719c9352 516 WriteReg(REG_COM3, COM3_QQVGA);
smorioka 0:993f719c9352 517 WriteReg(REG_COM14, COM14_QQVGA);
smorioka 0:993f719c9352 518 WriteReg(REG_SCALING_XSC, SCALING_XSC_QQVGA);
smorioka 0:993f719c9352 519 WriteReg(REG_SCALING_YSC, SCALING_YSC_QQVGA);
smorioka 0:993f719c9352 520 WriteReg(REG_SCALING_DCWCTR, SCALING_DCWCTR_QQVGA);
smorioka 0:993f719c9352 521 WriteReg(REG_SCALING_PCLK_DIV, SCALING_PCLK_DIV_QQVGA);
smorioka 0:993f719c9352 522 WriteReg(REG_SCALING_PCLK_DELAY, SCALING_PCLK_DELAY_QQVGA);
smorioka 0:993f719c9352 523 }
smorioka 0:993f719c9352 524
smorioka 0:993f719c9352 525 // vsync handler
smorioka 0:993f719c9352 526 void VsyncHandler(void)
smorioka 0:993f719c9352 527 {
smorioka 0:993f719c9352 528 // Capture Enable
smorioka 0:993f719c9352 529 if (CaptureReq) {
smorioka 0:993f719c9352 530 wen = 1;
smorioka 0:993f719c9352 531 Done = false;
smorioka 0:993f719c9352 532 CaptureReq = false;
smorioka 0:993f719c9352 533 } else {
smorioka 0:993f719c9352 534 wen = 0;
smorioka 0:993f719c9352 535 if (Busy) {
smorioka 0:993f719c9352 536 Busy = false;
smorioka 0:993f719c9352 537 Done = true;
smorioka 0:993f719c9352 538 }
smorioka 0:993f719c9352 539 }
smorioka 0:993f719c9352 540
smorioka 0:993f719c9352 541 // Hline Counter
smorioka 0:993f719c9352 542 LastLines = LineCounter;
smorioka 0:993f719c9352 543 LineCounter = 0;
smorioka 0:993f719c9352 544 }
smorioka 0:993f719c9352 545
smorioka 0:993f719c9352 546 // href handler
smorioka 0:993f719c9352 547 void HrefHandler(void)
smorioka 0:993f719c9352 548 {
smorioka 0:993f719c9352 549 LineCounter++;
smorioka 0:993f719c9352 550 }
smorioka 0:993f719c9352 551
smorioka 0:993f719c9352 552 // Data Read
smorioka 0:993f719c9352 553 int ReadOneByte(void)
smorioka 0:993f719c9352 554 {
smorioka 0:993f719c9352 555 int result;
smorioka 0:993f719c9352 556 rclk = 1;
smorioka 0:993f719c9352 557 // wait_us(1);
smorioka 0:993f719c9352 558 result = data;
smorioka 0:993f719c9352 559 rclk = 0;
smorioka 0:993f719c9352 560 return result;
smorioka 0:993f719c9352 561 }
smorioka 0:993f719c9352 562
smorioka 0:993f719c9352 563 // Data Start
smorioka 0:993f719c9352 564 void ReadStart(void)
smorioka 0:993f719c9352 565 {
smorioka 0:993f719c9352 566 rrst = 0;
smorioka 0:993f719c9352 567 oe = 0;
smorioka 0:993f719c9352 568 wait_us(1);
smorioka 0:993f719c9352 569 rclk = 0;
smorioka 0:993f719c9352 570 wait_us(1);
smorioka 0:993f719c9352 571 rclk = 1;
smorioka 0:993f719c9352 572 wait_us(1);
smorioka 0:993f719c9352 573 rrst = 1;
smorioka 0:993f719c9352 574 }
smorioka 0:993f719c9352 575
smorioka 0:993f719c9352 576 // Data Stop
smorioka 0:993f719c9352 577 void ReadStop(void)
smorioka 0:993f719c9352 578 {
smorioka 0:993f719c9352 579 oe = 1;
smorioka 0:993f719c9352 580 ReadOneByte();
smorioka 0:993f719c9352 581 rclk = 1;
smorioka 0:993f719c9352 582 }
smorioka 0:993f719c9352 583 };
smorioka 0:993f719c9352 584