Driver to control a peripheral circuit being controlled by the operation of a FET. Inbetween the mbed and FET is a single D type latch, used to latch a signal to the driver.
Latch_FET_Driver.cpp@7:909d7e3822d8, 2016-03-10 (annotated)
- Committer:
- sk398
- Date:
- Thu Mar 10 16:25:15 2016 +0000
- Revision:
- 7:909d7e3822d8
- Parent:
- 5:7d1b124490ed
Delay time updated
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
sk398 | 7:909d7e3822d8 | 1 | /* ##################################################################### |
sk398 | 7:909d7e3822d8 | 2 | Latch_FET_Driver.cpp |
sk398 | 7:909d7e3822d8 | 3 | -------------------------- |
sk398 | 7:909d7e3822d8 | 4 | |
sk398 | 7:909d7e3822d8 | 5 | Surface Ship, Group 5 |
sk398 | 7:909d7e3822d8 | 6 | --------------------- |
sk398 | 7:909d7e3822d8 | 7 | |
sk398 | 7:909d7e3822d8 | 8 | Written by: Steven Kay |
sk398 | 7:909d7e3822d8 | 9 | |
sk398 | 7:909d7e3822d8 | 10 | Date: February 2016 |
sk398 | 7:909d7e3822d8 | 11 | |
sk398 | 7:909d7e3822d8 | 12 | Function: This |
sk398 | 7:909d7e3822d8 | 13 | |
sk398 | 7:909d7e3822d8 | 14 | Version: 1.0 |
sk398 | 7:909d7e3822d8 | 15 | |
sk398 | 7:909d7e3822d8 | 16 | Version History |
sk398 | 7:909d7e3822d8 | 17 | --------------- |
sk398 | 7:909d7e3822d8 | 18 | |
sk398 | 7:909d7e3822d8 | 19 | 1.1 rgdfgdfgdfggdfgdg |
sk398 | 7:909d7e3822d8 | 20 | |
sk398 | 7:909d7e3822d8 | 21 | 1.0 gdgddfdddgd |
sk398 | 7:909d7e3822d8 | 22 | |
sk398 | 7:909d7e3822d8 | 23 | ##################################################################### */ |
sk398 | 7:909d7e3822d8 | 24 | |
sk398 | 0:87f2d094bea3 | 25 | #include "mbed.h" |
sk398 | 0:87f2d094bea3 | 26 | #include "Latch_FET_Driver.h" |
sk398 | 0:87f2d094bea3 | 27 | |
sk398 | 5:7d1b124490ed | 28 | |
sk398 | 5:7d1b124490ed | 29 | /* ============================================================= |
sk398 | 5:7d1b124490ed | 30 | Latch_FET_Driver constructor |
sk398 | 5:7d1b124490ed | 31 | |
sk398 | 5:7d1b124490ed | 32 | Inputs |
sk398 | 5:7d1b124490ed | 33 | ------ |
sk398 | 5:7d1b124490ed | 34 | PinName D: Pin to create D input to D Latch |
sk398 | 5:7d1b124490ed | 35 | PinName CLK: Pin to create CLK input to D Latch |
sk398 | 5:7d1b124490ed | 36 | |
sk398 | 5:7d1b124490ed | 37 | Description |
sk398 | 5:7d1b124490ed | 38 | ----------- |
sk398 | 5:7d1b124490ed | 39 | |
sk398 | 5:7d1b124490ed | 40 | Once the new DigitalOut types are assigned, the D Latch at |
sk398 | 5:7d1b124490ed | 41 | the given Pins is initialised to an outputLow state, ensuring |
sk398 | 5:7d1b124490ed | 42 | that uopn setup, a known state is entered quickly. |
sk398 | 5:7d1b124490ed | 43 | |
sk398 | 5:7d1b124490ed | 44 | ============================================================= */ |
sk398 | 5:7d1b124490ed | 45 | Latch_FET_Driver::Latch_FET_Driver(PinName D,PinName CLK) |
sk398 | 0:87f2d094bea3 | 46 | { |
sk398 | 5:7d1b124490ed | 47 | // Assign passed in Pin Names as new DigitalOut data types |
sk398 | 5:7d1b124490ed | 48 | _D = new DigitalOut(D); |
sk398 | 5:7d1b124490ed | 49 | _CLK = new DigitalOut(CLK); |
sk398 | 5:7d1b124490ed | 50 | |
sk398 | 5:7d1b124490ed | 51 | // Ensure that D latch does not enter unknown state |
sk398 | 5:7d1b124490ed | 52 | // Initialise is the same as the outputLow method |
sk398 | 5:7d1b124490ed | 53 | Latch_FET_Driver::outputLow(); |
sk398 | 0:87f2d094bea3 | 54 | } |
sk398 | 0:87f2d094bea3 | 55 | |
sk398 | 5:7d1b124490ed | 56 | /* ================================================================ |
sk398 | 5:7d1b124490ed | 57 | outputHigh is a public method to set a HIGH output on the given |
sk398 | 5:7d1b124490ed | 58 | D Latch. |
sk398 | 5:7d1b124490ed | 59 | |
sk398 | 5:7d1b124490ed | 60 | The procedure to set Q into a HIGH condition is as follows; |
sk398 | 5:7d1b124490ed | 61 | |
sk398 | 5:7d1b124490ed | 62 | 1. Ensure CLK is low |
sk398 | 5:7d1b124490ed | 63 | 2. Set D high |
sk398 | 5:7d1b124490ed | 64 | 3. wait STATE_DELAY us |
sk398 | 5:7d1b124490ed | 65 | 4. Set CLK high |
sk398 | 5:7d1b124490ed | 66 | 5. wait 10*STATE_DELAY us |
sk398 | 5:7d1b124490ed | 67 | 6. Set CLK low |
sk398 | 5:7d1b124490ed | 68 | 7. wait STATE_DELAY us |
sk398 | 5:7d1b124490ed | 69 | 8. set D low |
sk398 | 5:7d1b124490ed | 70 | 9. return void |
sk398 | 5:7d1b124490ed | 71 | ================================================================ */ |
sk398 | 5:7d1b124490ed | 72 | void Latch_FET_Driver::outputHigh() |
sk398 | 0:87f2d094bea3 | 73 | { |
sk398 | 5:7d1b124490ed | 74 | _CLK -> write(LOW); |
sk398 | 5:7d1b124490ed | 75 | _D -> write(HIGH); |
sk398 | 5:7d1b124490ed | 76 | wait_us(STATE_DELAY); |
sk398 | 5:7d1b124490ed | 77 | _CLK -> write(HIGH); |
sk398 | 5:7d1b124490ed | 78 | wait_us(10*STATE_DELAY); |
sk398 | 5:7d1b124490ed | 79 | _CLK -> write(LOW); |
sk398 | 5:7d1b124490ed | 80 | wait_us(STATE_DELAY); |
sk398 | 5:7d1b124490ed | 81 | _D -> write(LOW); |
sk398 | 0:87f2d094bea3 | 82 | } |
sk398 | 0:87f2d094bea3 | 83 | |
sk398 | 5:7d1b124490ed | 84 | /* ================================================================ |
sk398 | 5:7d1b124490ed | 85 | outputLow is a public method to set a HIGH output on the given |
sk398 | 5:7d1b124490ed | 86 | D Latch. |
sk398 | 5:7d1b124490ed | 87 | |
sk398 | 5:7d1b124490ed | 88 | The procedure to set Q into a LOW condition is as follows; |
sk398 | 5:7d1b124490ed | 89 | |
sk398 | 5:7d1b124490ed | 90 | 1. Ensure CLK is low |
sk398 | 5:7d1b124490ed | 91 | 2. Set D low |
sk398 | 5:7d1b124490ed | 92 | 3. wait STATE_DELAY us |
sk398 | 5:7d1b124490ed | 93 | 4. Set CLK high |
sk398 | 5:7d1b124490ed | 94 | 5. wait 10*STATE_DELAY us |
sk398 | 5:7d1b124490ed | 95 | 6. Set CLK low |
sk398 | 5:7d1b124490ed | 96 | 7. wait STATE_DELAY us |
sk398 | 5:7d1b124490ed | 97 | 8. return void |
sk398 | 5:7d1b124490ed | 98 | ================================================================ */ |
sk398 | 5:7d1b124490ed | 99 | void Latch_FET_Driver::outputLow() |
sk398 | 5:7d1b124490ed | 100 | { |
sk398 | 5:7d1b124490ed | 101 | _CLK -> write(LOW); |
sk398 | 5:7d1b124490ed | 102 | _D -> write(LOW); |
sk398 | 5:7d1b124490ed | 103 | wait_us(STATE_DELAY); |
sk398 | 5:7d1b124490ed | 104 | _CLK -> write(HIGH); |
sk398 | 5:7d1b124490ed | 105 | wait_us(10*STATE_DELAY); |
sk398 | 5:7d1b124490ed | 106 | _CLK -> write(LOW); |
sk398 | 5:7d1b124490ed | 107 | wait_us(STATE_DELAY); |
sk398 | 5:7d1b124490ed | 108 | } |
sk398 | 2:9059b675917e | 109 | |
sk398 | 5:7d1b124490ed | 110 |