CMSIS DSP Library from CMSIS 2.0. See http://www.onarm.com/cmsis/ for full details
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arm_power_q31.c
00001 /* ---------------------------------------------------------------------- 00002 * Copyright (C) 2010 ARM Limited. All rights reserved. 00003 * 00004 * $Date: 29. November 2010 00005 * $Revision: V1.0.3 00006 * 00007 * Project: CMSIS DSP Library 00008 * Title: arm_power_q31.c 00009 * 00010 * Description: sum of the square of the elements in an array of Q31 type 00011 * 00012 * Target Processor: Cortex-M4/Cortex-M3 00013 * 00014 * Version 1.0.3 2010/11/29 00015 * Re-organized the CMSIS folders and updated documentation. 00016 * 00017 * Version 1.0.2 2010/11/11 00018 * Documentation updated. 00019 * 00020 * Version 1.0.1 2010/10/05 00021 * Production release and review comments incorporated. 00022 * 00023 * Version 1.0.0 2010/09/20 00024 * Production release and review comments incorporated. 00025 * -------------------------------------------------------------------- */ 00026 00027 #include "arm_math.h" 00028 00029 /** 00030 * @ingroup groupStats 00031 */ 00032 00033 /** 00034 * @addtogroup power 00035 * @{ 00036 */ 00037 00038 /** 00039 * @brief Sum of the squares of the elements of a Q31 vector. 00040 * @param[in] *pSrc points to the input vector 00041 * @param[in] blockSize length of the input vector 00042 * @param[out] *pResult sum of the squares value returned here 00043 * @return none. 00044 * 00045 * @details 00046 * <b>Scaling and Overflow Behavior:</b> 00047 * 00048 * \par 00049 * The function is implemented using a 64-bit internal accumulator. 00050 * The input is represented in 1.31 format. 00051 * Intermediate multiplication yields a 2.62 format, and this 00052 * result is truncated to 2.48 format by discarding the lower 14 bits. 00053 * The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format. 00054 * With 15 guard bits in the accumulator, there is no risk of overflow, and the 00055 * full precision of the intermediate multiplication is preserved. 00056 * Finally, the return result is in 16.48 format. 00057 * 00058 */ 00059 00060 void arm_power_q31( 00061 q31_t * pSrc, 00062 uint32_t blockSize, 00063 q63_t * pResult) 00064 { 00065 q63_t sum = 0; /* Temporary result storage */ 00066 q31_t in; 00067 uint32_t blkCnt; /* loop counter */ 00068 00069 00070 /*loop Unrolling */ 00071 blkCnt = blockSize >> 2u; 00072 00073 /* First part of the processing with loop unrolling. Compute 4 outputs at a time. 00074 ** a second loop below computes the remaining 1 to 3 samples. */ 00075 while(blkCnt > 0u) 00076 { 00077 /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */ 00078 /* Compute Power then shift intermediate results by 14 bits to maintain 16.48 format and then store the result in a temporary variable sum, providing 15 guard bits. */ 00079 in = *pSrc++; 00080 sum += ((q63_t) in * in) >> 14u; 00081 00082 in = *pSrc++; 00083 sum += ((q63_t) in * in) >> 14u; 00084 00085 in = *pSrc++; 00086 sum += ((q63_t) in * in) >> 14u; 00087 00088 in = *pSrc++; 00089 sum += ((q63_t) in * in) >> 14u; 00090 00091 /* Decrement the loop counter */ 00092 blkCnt--; 00093 } 00094 00095 /* If the blockSize is not a multiple of 4, compute any remaining output samples here. 00096 ** No loop unrolling is used. */ 00097 blkCnt = blockSize % 0x4u; 00098 00099 while(blkCnt > 0u) 00100 { 00101 /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */ 00102 /* Compute Power and then store the result in a temporary variable, sum. */ 00103 in = *pSrc++; 00104 sum += ((q63_t) in * in) >> 14u; 00105 00106 /* Decrement the loop counter */ 00107 blkCnt--; 00108 } 00109 00110 /* Store the results in 16.48 format */ 00111 *pResult = sum; 00112 } 00113 00114 /** 00115 * @} end of power group 00116 */
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