Shivanand Gowda / S70FL01GS

Dependents:   SPI_FLASH_MEM_1Gb

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S70FL01GS.h

00001 // S70FL01GS.h
00002 
00003 #ifndef S70FL01GS_H
00004 #define S70FL01GS_H
00005 
00006 #include "mbed.h"
00007 #include <string>
00008 
00009 #define SPI_FREQ        5000000                 //Change SPI Frequency Here
00010 #define SPI_MODE        0                       // SPI Mode can be 0 or 3 . see data sheet
00011 #define SPI_NBIT        8                       // Number of bits 8.
00012 
00013 
00014 
00015 #define DUMMY_ADDR      0x00
00016 #define WAIT_TIME       1
00017 
00018 #define ADDR_BMASK3     0xff000000
00019 #define ADDR_BMASK2     0x00ff0000
00020 #define ADDR_BMASK1     0x0000ff00
00021 #define ADDR_BMASK0     0x000000ff
00022 
00023 #define ADDR_BSHIFT3    24
00024 #define ADDR_BSHIFT2    16
00025 #define ADDR_BSHIFT1    8
00026 #define ADDR_BSHIFT0    0
00027 
00028 #define RDSR1               0x05                // 6th bit P_ERR  Program Error-->1, NO error 0
00029                                                 //5th bit E_ERR  Program Error-->1, No ERROR 0
00030                                                 //0th  WIP --> 1 indicates Busy Writing, 0--> Free, Done
00031                                                 // read Bits 6,5,0
00032 #define READ_ID             0x90                // Read Electronic Manufacturer Signature
00033 #define RDID                0x9F                //Read ID (JEDEC Manufacturer ID and JEDEC CFI)
00034 #define RES                 0xAB                // Read Electronic Signature
00035 
00036 //4 Byte  Address4PP 12h)
00037 
00038 #define FOUR_FAST_READ      0x0C                //Read Fast (4-byte Address) 0C
00039 #define FOUR_READ           0x13                //Read (4-byte Address)
00040 #define FOUR_DOR            0x3C                //Read Dual Out (FOUR_-byte Address) 3C
00041 #define FOUR_QOR            0x6C                //Read Quad Out (FOUR_-byte Address)
00042 #define FOUR_DIOR           0xBC                // Dual I/O Read (FOUR_-byte Address) BC
00043 #define FOUR_QIOR           0xEC                //FOUR_QIOR Quad I/O Read (FOUR_-byte Address) EC
00044 #define FOUR_DDRFR          0x0E                //Read DDR Fast (FOUR_-byte Address) 
00045 #define FOUR_DDRDIOR        0xBE                // DDR Dual I/O Read (FOUR_-byte Address) BE
00046 #define FOUR_DDRQIOR        0xEE  
00047 #define FOUR_PP             0x12                // FOUR_PP Page Program (FOUR_-byte Address) 12
00048 #define FOUR_QPP            0x34                //Quad Page Program (FOUR_-byte Address)  
00049 #define FOUR_P4E            0x21                // Parameter 4-kB Erase (4-byte Address) 21
00050 #define FOUR_SE             0xDC                // Erase 64/256 kB (4-byte Address) DC
00051 
00052 //3 Byte Address
00053 
00054 #define READ            0x03                    //READ Read (3-byte Address) 03
00055 #define FAST_READ       0x0B                    //FAST_READ Read Fast (3-byte Address) 0B
00056 #define DOR             0x3B                    //DOR Read Dual Out (3-byte Address) 3B
00057 #define Q0R             0x6B                    //QOR Read Quad Out (3-byte Address) 6B   
00058 #define DIOR            0xBB                    //DIOR Dual I/O Read (3-byte Address) BB  
00059 #define QIOR            0xEB                    //QIOR Quad I/O Read (3-byte Address) EB
00060 #define DDRFR           0x0D                    //DDRFR Read DDR Fast (3-byte Address) 0D
00061 #define DDRDIOR         0xBD                    //DDRDIOR DDR Dual I/O Read (3-byte Address) BD
00062 #define DDRQIOR         0xED                    //DDRQIOR DDR Quad I/O Read (3-byte Address) ED
00063 #define PP              0x02                    //PP Page Program (3-byte Address) 02
00064 #define Qpp             0x32                    //QPP Quad Page Program (3-byte Address) 32
00065 #define P4E             0x20                    //P4E Parameter 4-kB Erase (3-byte Address) 20
00066 #define SE              0xD8                    //SE Erase 64 / 256 kB (3-byte Address) D8
00067 #define BE              0x60                    // Erase Entire Chip.
00068 
00069 #define RDSR1           0x05                    //RDSR1 Read Status Register-1 05 
00070 #define RDSR2           0x07                    //RDSR2 Read Status Register-2 07 
00071 #define RDCR            0x35                    //RDCR Read Configuration Register-1 35 
00072 #define WRR             0x01                    //Write Register (Status-1, Configuration-1)  
00073 #define WRDI            0x04                    //Write Disable 04 
00074 #define WREN            0x06                    //WREN Write Enable 06 
00075 #define CLSR            0x30                    //CLSR Clear Status Register-1 - Erase/Prog. Fail Reset 30 
00076 #define ECCRD           0x18                    //ECCRD ECC Read (4-byte address) 18 
00077 #define ABRD            0x14                    //ABRD AutoBoot Register Read 14
00078 #define ABWR            0x15                    //AutoBoot Register Write 15 
00079 #define BRRD            0x16                    //Bank Register Read 16 
00080 #define BRWR            0x17                    //Bank Register Write 17 
00081 #define BRAC            0xB9                    //BRAC Bank Register Access (Legacy Command formerly used for Deep Power Down) B9
00082 #define DLPRD           0x41                    //DLPRD Data Learning Pattern Read 41 
00083 #define PNVDLR          0x43                    //PNVDLR Program NV Data Learning Register 43   
00084 #define WVDLR           0x4A                    //Write Volatile Data Learning Register 4A 
00085 #define PGSP            0x85                    //Program Suspend 85 
00086 #define PGRS            0x8A                    //Program Resume 8A 
00087 #define ERSP            0x75                    //Erase Suspend 75 
00088 #define ERRS            0x7A                    //Erase Resume 7A 
00089 #define OTPP            0x42                    //OTP Program 42
00090 #define OTPR            0x4B                    //OTP Read 4B 
00091 
00092 //Advanced Sector Protection
00093 
00094 #define DYBRD           0xE0                    //DYB Read E0 133
00095 #define DYBWR           0xE1                    //DYB Write E1 133
00096 #define PPBRD           0xE2                    //PPB Read E2 133
00097 #define PPBP            0xE3                    //PPB Program E3 133
00098 #define PPBE            0xE4                    //PPB Erase E4 133
00099 #define ASPRD           0x2B                    //ASP Read 2B 133
00100 #define ASPP            0x2F                    //ASP Program 2F 133
00101 #define PLBRD           0xA7                    //PPB Lock Bit Read A7 133
00102 #define PLBWR           0xA6                    //PPB Lock Bit Write A6 133
00103 #define PASSRD          0xE7                    //Password Read E7 133
00104 #define PASSP           0xE8                    //Password Program E8 133
00105 #define PASSU           0xE9                    //Password Unlock E9 133
00106 #define DUMMY           0x00                    // Dummy write to read
00107 //Reset
00108 
00109 #define RESET           0xF0                    //Software Reset F0 133
00110 #define MBR             0xFF                    //Mode Bit Reset FF 133
00111 #define DUMMYBYTE       0x00                    //Dummy byte for Read Operation
00112 
00113 class S70FL01GS: public SPI {
00114 public:
00115     S70FL01GS(PinName mosi, PinName miso, PinName sclk, PinName cs);
00116     
00117     int readByte(int addr);                                 // takes a 32-bit (4 bytes) address and returns the data (1 byte) at that location                   
00118     void readStream(int addr, char* buf, int count);        // takes a 32-bit address, reads count bytes, and stores results in buf
00119     
00120     void writeByte(int addr, int data);                     // takes a 32-bit (4 bytes) address and a byte of data to write at that location
00121     void writeStream(int addr, char* buf, int count);       // write count bytes of data from buf to memory, starting at addr  
00122     void writeString(int add, string str);
00123     void sectorErase(int addr);
00124     void chipErase();                                       //erase all data on chip
00125     uint8_t readRegister();  
00126     uint8_t checkIfBusy();                                  // Check if IC is bury writing or erasing 
00127     void writeRegister(uint8_t regValue);                   // Write status register or configuration register
00128     void reset(void);                                       // Reset Chip
00129     void clearRegister();                                   // Clear Status Register
00130     void Read_Identification(uint8_t *buf);
00131     long raedLong(int address);                             // Read long int number
00132     void writeLong(int addr, long value);                   // Write Long Integer Number
00133 private:
00134     void writeEnable();                                     // write enable
00135     void writeDisable();                                    // write disable
00136     void chipEnable();                                      // chip enable
00137     void chipDisable();  
00138                                       // chip disable
00139     
00140    // SPI _spi;
00141     DigitalOut _cs;
00142 };
00143 
00144 #endif