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S25FL256S.cpp@8:9f5a31575cdd, 2018-10-23 (annotated)
- Committer:
- shivanandgowdakr
- Date:
- Tue Oct 23 10:22:44 2018 +0000
- Revision:
- 8:9f5a31575cdd
- Parent:
- 6:ef894010def4
OK
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
shivanandgowdakr | 4:8c463abb67d5 | 1 | // S25FL256S.cpp |
shivanandgowdakr | 4:8c463abb67d5 | 2 | |
shivanandgowdakr | 4:8c463abb67d5 | 3 | #include"S25FL256S.h" |
shivanandgowdakr | 4:8c463abb67d5 | 4 | |
shivanandgowdakr | 4:8c463abb67d5 | 5 | // CONSTRUCTOR |
shivanandgowdakr | 4:8c463abb67d5 | 6 | S25FL256S::S25FL256S(PinName mosi, PinName miso, PinName sclk, PinName cs) : SPI(mosi, miso, sclk), _cs(cs) |
shivanandgowdakr | 4:8c463abb67d5 | 7 | { |
shivanandgowdakr | 4:8c463abb67d5 | 8 | this->format(SPI_NBIT, SPI_MODE); |
shivanandgowdakr | 4:8c463abb67d5 | 9 | this->frequency(SPI_FREQ); |
shivanandgowdakr | 4:8c463abb67d5 | 10 | chipDisable(); |
shivanandgowdakr | 4:8c463abb67d5 | 11 | } |
shivanandgowdakr | 4:8c463abb67d5 | 12 | // READING |
shivanandgowdakr | 4:8c463abb67d5 | 13 | int S25FL256S::readByte(int addr) |
shivanandgowdakr | 4:8c463abb67d5 | 14 | { |
shivanandgowdakr | 4:8c463abb67d5 | 15 | chipEnable(); |
shivanandgowdakr | 4:8c463abb67d5 | 16 | this->write(FOUR_READ); |
shivanandgowdakr | 4:8c463abb67d5 | 17 | this->write((addr & ADDR_BMASK3) >> ADDR_BSHIFT3); |
shivanandgowdakr | 4:8c463abb67d5 | 18 | this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2); |
shivanandgowdakr | 4:8c463abb67d5 | 19 | this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1); |
shivanandgowdakr | 4:8c463abb67d5 | 20 | this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0); |
shivanandgowdakr | 4:8c463abb67d5 | 21 | int response = this->write(DUMMY_ADDR); |
shivanandgowdakr | 4:8c463abb67d5 | 22 | chipDisable(); |
shivanandgowdakr | 4:8c463abb67d5 | 23 | return response; |
shivanandgowdakr | 4:8c463abb67d5 | 24 | } |
shivanandgowdakr | 4:8c463abb67d5 | 25 | |
shivanandgowdakr | 4:8c463abb67d5 | 26 | void S25FL256S::readStream(int addr, char* buf, int count) |
shivanandgowdakr | 4:8c463abb67d5 | 27 | { |
shivanandgowdakr | 8:9f5a31575cdd | 28 | int i; |
shivanandgowdakr | 4:8c463abb67d5 | 29 | if (count < 1) |
shivanandgowdakr | 4:8c463abb67d5 | 30 | return; |
shivanandgowdakr | 4:8c463abb67d5 | 31 | chipEnable(); |
shivanandgowdakr | 4:8c463abb67d5 | 32 | this->write(FOUR_READ); |
shivanandgowdakr | 4:8c463abb67d5 | 33 | this->write((addr & ADDR_BMASK3) >> ADDR_BSHIFT3); |
shivanandgowdakr | 4:8c463abb67d5 | 34 | this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2); |
shivanandgowdakr | 4:8c463abb67d5 | 35 | this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1); |
shivanandgowdakr | 4:8c463abb67d5 | 36 | this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0); |
shivanandgowdakr | 8:9f5a31575cdd | 37 | for ( i = 0; i < count; i++) { |
shivanandgowdakr | 4:8c463abb67d5 | 38 | buf[i] = this->write(DUMMY_ADDR); |
shivanandgowdakr | 8:9f5a31575cdd | 39 | // printf("i= %d :%c \r\n",i,buf[i]); |
shivanandgowdakr | 4:8c463abb67d5 | 40 | } |
shivanandgowdakr | 8:9f5a31575cdd | 41 | buf[i]='\0'; |
shivanandgowdakr | 4:8c463abb67d5 | 42 | chipDisable(); |
shivanandgowdakr | 4:8c463abb67d5 | 43 | } |
shivanandgowdakr | 4:8c463abb67d5 | 44 | |
shivanandgowdakr | 4:8c463abb67d5 | 45 | // WRITING |
shivanandgowdakr | 4:8c463abb67d5 | 46 | void S25FL256S::writeByte(int addr, int data) |
shivanandgowdakr | 4:8c463abb67d5 | 47 | { |
shivanandgowdakr | 4:8c463abb67d5 | 48 | writeEnable(); |
shivanandgowdakr | 4:8c463abb67d5 | 49 | chipEnable(); |
shivanandgowdakr | 4:8c463abb67d5 | 50 | this->write(FOUR_PP); |
shivanandgowdakr | 4:8c463abb67d5 | 51 | this->write((addr & ADDR_BMASK3) >> ADDR_BSHIFT3); |
shivanandgowdakr | 4:8c463abb67d5 | 52 | this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2); |
shivanandgowdakr | 4:8c463abb67d5 | 53 | this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1); |
shivanandgowdakr | 4:8c463abb67d5 | 54 | this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0); |
shivanandgowdakr | 4:8c463abb67d5 | 55 | this->write(data); |
shivanandgowdakr | 4:8c463abb67d5 | 56 | chipDisable(); |
shivanandgowdakr | 4:8c463abb67d5 | 57 | writeDisable(); |
shivanandgowdakr | 4:8c463abb67d5 | 58 | // wait(WAIT_TIME);//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails |
shivanandgowdakr | 4:8c463abb67d5 | 59 | } |
shivanandgowdakr | 4:8c463abb67d5 | 60 | |
shivanandgowdakr | 4:8c463abb67d5 | 61 | void S25FL256S::writeStream(int addr, char* buf, int count) |
shivanandgowdakr | 4:8c463abb67d5 | 62 | { |
shivanandgowdakr | 4:8c463abb67d5 | 63 | if (count < 1) |
shivanandgowdakr | 4:8c463abb67d5 | 64 | return; |
shivanandgowdakr | 4:8c463abb67d5 | 65 | writeEnable(); |
shivanandgowdakr | 4:8c463abb67d5 | 66 | wait(0.1); |
shivanandgowdakr | 4:8c463abb67d5 | 67 | chipEnable(); |
shivanandgowdakr | 4:8c463abb67d5 | 68 | this->write(FOUR_PP); |
shivanandgowdakr | 4:8c463abb67d5 | 69 | this->write((addr & ADDR_BMASK3) >> ADDR_BSHIFT3); |
shivanandgowdakr | 4:8c463abb67d5 | 70 | this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2); |
shivanandgowdakr | 4:8c463abb67d5 | 71 | this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1); |
shivanandgowdakr | 4:8c463abb67d5 | 72 | this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0); |
shivanandgowdakr | 4:8c463abb67d5 | 73 | for (int i = 0; i < count; i++) { |
shivanandgowdakr | 4:8c463abb67d5 | 74 | this->write(buf[i]); |
shivanandgowdakr | 4:8c463abb67d5 | 75 | } |
shivanandgowdakr | 8:9f5a31575cdd | 76 | |
shivanandgowdakr | 4:8c463abb67d5 | 77 | chipDisable(); |
shivanandgowdakr | 4:8c463abb67d5 | 78 | writeDisable(); |
shivanandgowdakr | 8:9f5a31575cdd | 79 | uint8_t busy=checkIfBusy(); |
shivanandgowdakr | 8:9f5a31575cdd | 80 | while(busy) |
shivanandgowdakr | 8:9f5a31575cdd | 81 | { |
shivanandgowdakr | 8:9f5a31575cdd | 82 | busy=checkIfBusy(); |
shivanandgowdakr | 8:9f5a31575cdd | 83 | } |
shivanandgowdakr | 8:9f5a31575cdd | 84 | |
shivanandgowdakr | 8:9f5a31575cdd | 85 | |
shivanandgowdakr | 4:8c463abb67d5 | 86 | } |
shivanandgowdakr | 4:8c463abb67d5 | 87 | |
shivanandgowdakr | 4:8c463abb67d5 | 88 | void S25FL256S::writeString(int addr, string str) |
shivanandgowdakr | 4:8c463abb67d5 | 89 | { |
shivanandgowdakr | 4:8c463abb67d5 | 90 | if (str.length() < 1) |
shivanandgowdakr | 4:8c463abb67d5 | 91 | return; |
shivanandgowdakr | 4:8c463abb67d5 | 92 | writeEnable(); |
shivanandgowdakr | 4:8c463abb67d5 | 93 | chipEnable(); |
shivanandgowdakr | 4:8c463abb67d5 | 94 | this->write(FOUR_PP); |
shivanandgowdakr | 4:8c463abb67d5 | 95 | this->write((addr & ADDR_BMASK3) >> ADDR_BSHIFT3); |
shivanandgowdakr | 4:8c463abb67d5 | 96 | this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2); |
shivanandgowdakr | 4:8c463abb67d5 | 97 | this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1); |
shivanandgowdakr | 4:8c463abb67d5 | 98 | this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0); |
shivanandgowdakr | 4:8c463abb67d5 | 99 | for (int i = 0; i < str.length(); i++) |
shivanandgowdakr | 4:8c463abb67d5 | 100 | this->write(str.at(i)); |
shivanandgowdakr | 4:8c463abb67d5 | 101 | chipDisable(); |
shivanandgowdakr | 4:8c463abb67d5 | 102 | writeDisable(); |
shivanandgowdakr | 4:8c463abb67d5 | 103 | wait(WAIT_TIME);//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails |
shivanandgowdakr | 4:8c463abb67d5 | 104 | } |
shivanandgowdakr | 4:8c463abb67d5 | 105 | |
shivanandgowdakr | 4:8c463abb67d5 | 106 | |
shivanandgowdakr | 4:8c463abb67d5 | 107 | |
shivanandgowdakr | 4:8c463abb67d5 | 108 | uint8_t S25FL256S::readRegister() |
shivanandgowdakr | 4:8c463abb67d5 | 109 | { |
shivanandgowdakr | 4:8c463abb67d5 | 110 | |
shivanandgowdakr | 4:8c463abb67d5 | 111 | chipEnable(); |
shivanandgowdakr | 4:8c463abb67d5 | 112 | this->write(RDSR1); |
shivanandgowdakr | 4:8c463abb67d5 | 113 | uint8_t val=this->write(DUMMY_ADDR); |
shivanandgowdakr | 4:8c463abb67d5 | 114 | chipDisable(); |
shivanandgowdakr | 8:9f5a31575cdd | 115 | if(val&0x01==0x01) |
shivanandgowdakr | 8:9f5a31575cdd | 116 | return 1; |
shivanandgowdakr | 8:9f5a31575cdd | 117 | else |
shivanandgowdakr | 8:9f5a31575cdd | 118 | return 0; |
shivanandgowdakr | 4:8c463abb67d5 | 119 | |
shivanandgowdakr | 4:8c463abb67d5 | 120 | } |
shivanandgowdakr | 4:8c463abb67d5 | 121 | //ERASING |
shivanandgowdakr | 4:8c463abb67d5 | 122 | void S25FL256S::chipErase() |
shivanandgowdakr | 4:8c463abb67d5 | 123 | { |
shivanandgowdakr | 4:8c463abb67d5 | 124 | writeEnable(); |
shivanandgowdakr | 4:8c463abb67d5 | 125 | chipEnable(); |
shivanandgowdakr | 4:8c463abb67d5 | 126 | this->write(BE); |
shivanandgowdakr | 4:8c463abb67d5 | 127 | chipDisable(); |
shivanandgowdakr | 4:8c463abb67d5 | 128 | writeDisable(); |
shivanandgowdakr | 4:8c463abb67d5 | 129 | wait(WAIT_TIME);//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails |
shivanandgowdakr | 4:8c463abb67d5 | 130 | } |
shivanandgowdakr | 4:8c463abb67d5 | 131 | |
shivanandgowdakr | 4:8c463abb67d5 | 132 | void S25FL256S::Read_Identification(uint8_t *buf) |
shivanandgowdakr | 4:8c463abb67d5 | 133 | { |
shivanandgowdakr | 4:8c463abb67d5 | 134 | |
shivanandgowdakr | 4:8c463abb67d5 | 135 | |
shivanandgowdakr | 4:8c463abb67d5 | 136 | chipEnable(); |
shivanandgowdakr | 4:8c463abb67d5 | 137 | this->write(RDID); |
shivanandgowdakr | 4:8c463abb67d5 | 138 | for(int i=0; i<80; i++) |
shivanandgowdakr | 4:8c463abb67d5 | 139 | buf[i]=this->write(DUMMY_ADDR); |
shivanandgowdakr | 4:8c463abb67d5 | 140 | chipDisable(); |
shivanandgowdakr | 4:8c463abb67d5 | 141 | wait(WAIT_TIME);//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails |
shivanandgowdakr | 4:8c463abb67d5 | 142 | } |
shivanandgowdakr | 4:8c463abb67d5 | 143 | |
shivanandgowdakr | 8:9f5a31575cdd | 144 | int S25FL256S::sectorErase(int addr) |
shivanandgowdakr | 4:8c463abb67d5 | 145 | { |
shivanandgowdakr | 4:8c463abb67d5 | 146 | writeEnable(); |
shivanandgowdakr | 4:8c463abb67d5 | 147 | chipEnable(); |
shivanandgowdakr | 4:8c463abb67d5 | 148 | this->write(FOUR_SE); |
shivanandgowdakr | 4:8c463abb67d5 | 149 | this->write((addr & ADDR_BMASK3) >> ADDR_BSHIFT3); |
shivanandgowdakr | 4:8c463abb67d5 | 150 | this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2); |
shivanandgowdakr | 4:8c463abb67d5 | 151 | this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1); |
shivanandgowdakr | 4:8c463abb67d5 | 152 | this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0); |
shivanandgowdakr | 4:8c463abb67d5 | 153 | chipDisable(); |
shivanandgowdakr | 4:8c463abb67d5 | 154 | writeDisable(); |
shivanandgowdakr | 8:9f5a31575cdd | 155 | uint8_t busy=checkIfBusy(); |
shivanandgowdakr | 8:9f5a31575cdd | 156 | while(busy) |
shivanandgowdakr | 8:9f5a31575cdd | 157 | { |
shivanandgowdakr | 8:9f5a31575cdd | 158 | busy=checkIfBusy(); |
shivanandgowdakr | 8:9f5a31575cdd | 159 | |
shivanandgowdakr | 8:9f5a31575cdd | 160 | printf(" Am Here \r\n\r\n"); |
shivanandgowdakr | 8:9f5a31575cdd | 161 | }//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails |
shivanandgowdakr | 8:9f5a31575cdd | 162 | |
shivanandgowdakr | 8:9f5a31575cdd | 163 | return 1; |
shivanandgowdakr | 4:8c463abb67d5 | 164 | } |
shivanandgowdakr | 4:8c463abb67d5 | 165 | void S25FL256S::reset() |
shivanandgowdakr | 4:8c463abb67d5 | 166 | { |
shivanandgowdakr | 4:8c463abb67d5 | 167 | writeEnable(); |
shivanandgowdakr | 4:8c463abb67d5 | 168 | chipEnable(); |
shivanandgowdakr | 4:8c463abb67d5 | 169 | this->write(RESET); |
shivanandgowdakr | 4:8c463abb67d5 | 170 | chipDisable(); |
shivanandgowdakr | 4:8c463abb67d5 | 171 | writeDisable(); |
shivanandgowdakr | 4:8c463abb67d5 | 172 | } |
shivanandgowdakr | 4:8c463abb67d5 | 173 | |
shivanandgowdakr | 4:8c463abb67d5 | 174 | uint8_t S25FL256S::checkIfBusy() |
shivanandgowdakr | 4:8c463abb67d5 | 175 | { |
shivanandgowdakr | 4:8c463abb67d5 | 176 | uint8_t value=readRegister(); |
shivanandgowdakr | 8:9f5a31575cdd | 177 | // printf("Value of Status Reg=%X\r\n\r\n",value); |
shivanandgowdakr | 4:8c463abb67d5 | 178 | if((value&0x01)==0x01) |
shivanandgowdakr | 4:8c463abb67d5 | 179 | return 1; |
shivanandgowdakr | 4:8c463abb67d5 | 180 | else |
shivanandgowdakr | 4:8c463abb67d5 | 181 | return 0; |
shivanandgowdakr | 4:8c463abb67d5 | 182 | |
shivanandgowdakr | 4:8c463abb67d5 | 183 | } |
shivanandgowdakr | 4:8c463abb67d5 | 184 | void S25FL256S::writeRegister(uint8_t regValue) |
shivanandgowdakr | 4:8c463abb67d5 | 185 | { |
shivanandgowdakr | 4:8c463abb67d5 | 186 | writeEnable(); |
shivanandgowdakr | 4:8c463abb67d5 | 187 | chipEnable(); |
shivanandgowdakr | 4:8c463abb67d5 | 188 | this->write(WRR); |
shivanandgowdakr | 4:8c463abb67d5 | 189 | this->write(regValue); |
shivanandgowdakr | 4:8c463abb67d5 | 190 | chipDisable(); |
shivanandgowdakr | 4:8c463abb67d5 | 191 | writeDisable(); |
shivanandgowdakr | 4:8c463abb67d5 | 192 | wait(WAIT_TIME);//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails |
shivanandgowdakr | 4:8c463abb67d5 | 193 | |
shivanandgowdakr | 4:8c463abb67d5 | 194 | } |
shivanandgowdakr | 4:8c463abb67d5 | 195 | |
shivanandgowdakr | 4:8c463abb67d5 | 196 | void S25FL256S::clearRegister(void) |
shivanandgowdakr | 4:8c463abb67d5 | 197 | { |
shivanandgowdakr | 4:8c463abb67d5 | 198 | writeEnable(); |
shivanandgowdakr | 4:8c463abb67d5 | 199 | chipEnable(); |
shivanandgowdakr | 4:8c463abb67d5 | 200 | this->write(CLSR); |
shivanandgowdakr | 4:8c463abb67d5 | 201 | chipDisable(); |
shivanandgowdakr | 4:8c463abb67d5 | 202 | writeDisable(); |
shivanandgowdakr | 4:8c463abb67d5 | 203 | wait(WAIT_TIME);//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails |
shivanandgowdakr | 4:8c463abb67d5 | 204 | |
shivanandgowdakr | 4:8c463abb67d5 | 205 | } |
shivanandgowdakr | 4:8c463abb67d5 | 206 | |
shivanandgowdakr | 4:8c463abb67d5 | 207 | |
shivanandgowdakr | 4:8c463abb67d5 | 208 | void S25FL256S::writeLong(int addr, long value) |
shivanandgowdakr | 4:8c463abb67d5 | 209 | { |
shivanandgowdakr | 4:8c463abb67d5 | 210 | //Decomposition from a long to 4 bytes by using bitshift. |
shivanandgowdakr | 4:8c463abb67d5 | 211 | //One = Most significant -> Four = Least significant byte |
shivanandgowdakr | 4:8c463abb67d5 | 212 | uint8_t four = (value & 0xFF); |
shivanandgowdakr | 4:8c463abb67d5 | 213 | uint8_t three = ((value >> 8) & 0xFF); |
shivanandgowdakr | 4:8c463abb67d5 | 214 | uint8_t two = ((value >> 16) & 0xFF); |
shivanandgowdakr | 4:8c463abb67d5 | 215 | uint8_t one = ((value >> 24) & 0xFF); |
shivanandgowdakr | 4:8c463abb67d5 | 216 | |
shivanandgowdakr | 4:8c463abb67d5 | 217 | writeEnable(); |
shivanandgowdakr | 4:8c463abb67d5 | 218 | chipEnable(); |
shivanandgowdakr | 4:8c463abb67d5 | 219 | this->write(FOUR_PP); |
shivanandgowdakr | 4:8c463abb67d5 | 220 | this->write((addr & ADDR_BMASK3) >> ADDR_BSHIFT3); |
shivanandgowdakr | 4:8c463abb67d5 | 221 | this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2); |
shivanandgowdakr | 4:8c463abb67d5 | 222 | this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1); |
shivanandgowdakr | 4:8c463abb67d5 | 223 | this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0); |
shivanandgowdakr | 4:8c463abb67d5 | 224 | this->write(four); |
shivanandgowdakr | 4:8c463abb67d5 | 225 | this->write(three); |
shivanandgowdakr | 4:8c463abb67d5 | 226 | this->write(two); |
shivanandgowdakr | 4:8c463abb67d5 | 227 | this->write(one); |
shivanandgowdakr | 4:8c463abb67d5 | 228 | chipDisable(); |
shivanandgowdakr | 4:8c463abb67d5 | 229 | writeDisable(); |
shivanandgowdakr | 4:8c463abb67d5 | 230 | wait(0.1); |
shivanandgowdakr | 4:8c463abb67d5 | 231 | } |
shivanandgowdakr | 4:8c463abb67d5 | 232 | |
shivanandgowdakr | 4:8c463abb67d5 | 233 | long S25FL256S::raedLong(int addr) |
shivanandgowdakr | 4:8c463abb67d5 | 234 | { |
shivanandgowdakr | 4:8c463abb67d5 | 235 | //Read the 4 bytes from the eeprom memory. |
shivanandgowdakr | 6:ef894010def4 | 236 | |
shivanandgowdakr | 4:8c463abb67d5 | 237 | chipEnable(); |
shivanandgowdakr | 4:8c463abb67d5 | 238 | this->write(FOUR_READ); |
shivanandgowdakr | 4:8c463abb67d5 | 239 | this->write((addr & ADDR_BMASK3) >> ADDR_BSHIFT3); |
shivanandgowdakr | 4:8c463abb67d5 | 240 | this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2); |
shivanandgowdakr | 4:8c463abb67d5 | 241 | this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1); |
shivanandgowdakr | 4:8c463abb67d5 | 242 | this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0); |
shivanandgowdakr | 4:8c463abb67d5 | 243 | |
shivanandgowdakr | 4:8c463abb67d5 | 244 | long four = this->write(DUMMY_ADDR); |
shivanandgowdakr | 4:8c463abb67d5 | 245 | long three = this->write(DUMMY_ADDR); |
shivanandgowdakr | 4:8c463abb67d5 | 246 | long two = this->write(DUMMY_ADDR); |
shivanandgowdakr | 4:8c463abb67d5 | 247 | long one = this->write(DUMMY_ADDR); |
shivanandgowdakr | 6:ef894010def4 | 248 | chipDisable(); |
shivanandgowdakr | 4:8c463abb67d5 | 249 | //Return the recomposed long by using bitshift. |
shivanandgowdakr | 4:8c463abb67d5 | 250 | return ((four << 0) & 0xFF) + ((three << 8) & 0xFFFF) + ((two << 16) & 0xFFFFFF) + ((one << 24) & 0xFFFFFFFF); |
shivanandgowdakr | 4:8c463abb67d5 | 251 | } |
shivanandgowdakr | 4:8c463abb67d5 | 252 | |
shivanandgowdakr | 4:8c463abb67d5 | 253 | |
shivanandgowdakr | 4:8c463abb67d5 | 254 | //ENABLE/DISABLE (private functions) |
shivanandgowdakr | 4:8c463abb67d5 | 255 | void S25FL256S::writeEnable() |
shivanandgowdakr | 4:8c463abb67d5 | 256 | { |
shivanandgowdakr | 4:8c463abb67d5 | 257 | chipEnable(); |
shivanandgowdakr | 4:8c463abb67d5 | 258 | this->write(WREN); |
shivanandgowdakr | 4:8c463abb67d5 | 259 | chipDisable(); |
shivanandgowdakr | 4:8c463abb67d5 | 260 | } |
shivanandgowdakr | 4:8c463abb67d5 | 261 | void S25FL256S::writeDisable() |
shivanandgowdakr | 4:8c463abb67d5 | 262 | { |
shivanandgowdakr | 4:8c463abb67d5 | 263 | chipEnable(); |
shivanandgowdakr | 4:8c463abb67d5 | 264 | this->write(WRDI); |
shivanandgowdakr | 4:8c463abb67d5 | 265 | chipDisable(); |
shivanandgowdakr | 4:8c463abb67d5 | 266 | } |
shivanandgowdakr | 4:8c463abb67d5 | 267 | void S25FL256S::chipEnable() |
shivanandgowdakr | 4:8c463abb67d5 | 268 | { |
shivanandgowdakr | 4:8c463abb67d5 | 269 | _cs = 0; |
shivanandgowdakr | 4:8c463abb67d5 | 270 | } |
shivanandgowdakr | 4:8c463abb67d5 | 271 | void S25FL256S::chipDisable() |
shivanandgowdakr | 4:8c463abb67d5 | 272 | { |
shivanandgowdakr | 4:8c463abb67d5 | 273 | _cs = 1; |
shivanandgowdakr | 4:8c463abb67d5 | 274 | } |
shivanandgowdakr | 4:8c463abb67d5 | 275 |