Shivanand Gowda / EE25LC1024

128K Serial EEPROM read write erase chip erase functions SPI EEPROM Nucleo F767ZI

Dependents:   SPI_EEPROM

EE25LC1024.cpp@2:156c427681f0, 2018-10-23 (annotated)

Committer:
shivanandgowdakr
Date:
Tue Oct 23 10:22:19 2018 +0000
Revision:
2:156c427681f0
Parent:
0:81848bf6dd4a 
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Who changed what in which revision?

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shivanandgowdakr 0:81848bf6dd4a 1 // EE25LC1024.cpp
shivanandgowdakr 2:156c427681f0 2 #include "mbed.h"
shivanandgowdakr 0:81848bf6dd4a 3 #include"EE25LC1024.h"
shivanandgowdakr 0:81848bf6dd4a 4
shivanandgowdakr 0:81848bf6dd4a 5 // CONSTRUCTOR
shivanandgowdakr 0:81848bf6dd4a 6 EE25LC1024::EE25LC1024(PinName mosi, PinName miso, PinName sclk, PinName cs) : SPI(mosi, miso, sclk), _cs(cs)
shivanandgowdakr 0:81848bf6dd4a 7 {
shivanandgowdakr 0:81848bf6dd4a 8 this->format(SPI_NBIT, SPI_MODE);
shivanandgowdakr 2:156c427681f0 9 this->frequency(SPI_Freq);
shivanandgowdakr 0:81848bf6dd4a 10 chipDisable();
shivanandgowdakr 2:156c427681f0 11
shivanandgowdakr 0:81848bf6dd4a 12 }
shivanandgowdakr 0:81848bf6dd4a 13 // READING
shivanandgowdakr 0:81848bf6dd4a 14
shivanandgowdakr 0:81848bf6dd4a 15
shivanandgowdakr 0:81848bf6dd4a 16 void EE25LC1024::deepPowerDown(void)
shivanandgowdakr 0:81848bf6dd4a 17 {
shivanandgowdakr 0:81848bf6dd4a 18 chipEnable();
shivanandgowdakr 0:81848bf6dd4a 19 this->write(DPD);
shivanandgowdakr 0:81848bf6dd4a 20 chipDisable();
shivanandgowdakr 0:81848bf6dd4a 21 }
shivanandgowdakr 0:81848bf6dd4a 22
shivanandgowdakr 0:81848bf6dd4a 23 int EE25LC1024::ReleaseDPD_ReadSign(void)
shivanandgowdakr 0:81848bf6dd4a 24 {
shivanandgowdakr 0:81848bf6dd4a 25 chipEnable();
shivanandgowdakr 2:156c427681f0 26 this->write(Readid);
shivanandgowdakr 0:81848bf6dd4a 27 this->write(DUMMY_ADDR);
shivanandgowdakr 0:81848bf6dd4a 28 this->write(DUMMY_ADDR);
shivanandgowdakr 0:81848bf6dd4a 29 this->write(DUMMY_ADDR);
shivanandgowdakr 0:81848bf6dd4a 30 int response = this->write(DUMMY_ADDR);
shivanandgowdakr 0:81848bf6dd4a 31 chipDisable();
shivanandgowdakr 0:81848bf6dd4a 32 return response;
shivanandgowdakr 0:81848bf6dd4a 33 }
shivanandgowdakr 0:81848bf6dd4a 34
shivanandgowdakr 0:81848bf6dd4a 35
shivanandgowdakr 0:81848bf6dd4a 36 int EE25LC1024::readByte(int addr)
shivanandgowdakr 0:81848bf6dd4a 37 {
shivanandgowdakr 0:81848bf6dd4a 38 chipEnable();
shivanandgowdakr 0:81848bf6dd4a 39 this->write(READ);
shivanandgowdakr 0:81848bf6dd4a 40 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 0:81848bf6dd4a 41 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 0:81848bf6dd4a 42 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 0:81848bf6dd4a 43 int response = this->write(DUMMY_ADDR);
shivanandgowdakr 0:81848bf6dd4a 44 chipDisable();
shivanandgowdakr 0:81848bf6dd4a 45 return response;
shivanandgowdakr 0:81848bf6dd4a 46 }
shivanandgowdakr 0:81848bf6dd4a 47
shivanandgowdakr 0:81848bf6dd4a 48 void EE25LC1024::readStream(int addr, char* buf, int count)
shivanandgowdakr 0:81848bf6dd4a 49 {
shivanandgowdakr 0:81848bf6dd4a 50 if (count < 1)
shivanandgowdakr 0:81848bf6dd4a 51 return;
shivanandgowdakr 0:81848bf6dd4a 52 chipEnable();
shivanandgowdakr 0:81848bf6dd4a 53 this->write(READ);
shivanandgowdakr 0:81848bf6dd4a 54 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 0:81848bf6dd4a 55 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 0:81848bf6dd4a 56 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 0:81848bf6dd4a 57 for (int i = 0; i < count; i++) {
shivanandgowdakr 0:81848bf6dd4a 58 buf[i] = this->write(DUMMY_ADDR);
shivanandgowdakr 2:156c427681f0 59 // printf("i= %d :%c \r\n",i,buf[i]);
shivanandgowdakr 0:81848bf6dd4a 60 }
shivanandgowdakr 0:81848bf6dd4a 61 chipDisable();
shivanandgowdakr 2:156c427681f0 62 // wait_ms(2);
shivanandgowdakr 0:81848bf6dd4a 63 }
shivanandgowdakr 0:81848bf6dd4a 64
shivanandgowdakr 0:81848bf6dd4a 65 // WRITING
shivanandgowdakr 0:81848bf6dd4a 66 void EE25LC1024::writeByte(int addr, int data)
shivanandgowdakr 0:81848bf6dd4a 67 {
shivanandgowdakr 0:81848bf6dd4a 68 writeEnable();
shivanandgowdakr 0:81848bf6dd4a 69 chipEnable();
shivanandgowdakr 0:81848bf6dd4a 70 this->write(WRITE);
shivanandgowdakr 0:81848bf6dd4a 71 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 0:81848bf6dd4a 72 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 0:81848bf6dd4a 73 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 0:81848bf6dd4a 74 this->write(data);
shivanandgowdakr 0:81848bf6dd4a 75 chipDisable();
shivanandgowdakr 0:81848bf6dd4a 76 writeDisable();
shivanandgowdakr 0:81848bf6dd4a 77 wait_ms(6);
shivanandgowdakr 0:81848bf6dd4a 78 // wait(WAIT_TIME);//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails
shivanandgowdakr 0:81848bf6dd4a 79 }
shivanandgowdakr 0:81848bf6dd4a 80
shivanandgowdakr 0:81848bf6dd4a 81 void EE25LC1024::writeStream(int addr, char* buf, int count)
shivanandgowdakr 0:81848bf6dd4a 82 {
shivanandgowdakr 2:156c427681f0 83
shivanandgowdakr 0:81848bf6dd4a 84 if (count < 1)
shivanandgowdakr 0:81848bf6dd4a 85 return;
shivanandgowdakr 2:156c427681f0 86
shivanandgowdakr 0:81848bf6dd4a 87 writeEnable();
shivanandgowdakr 2:156c427681f0 88
shivanandgowdakr 2:156c427681f0 89
shivanandgowdakr 2:156c427681f0 90
shivanandgowdakr 0:81848bf6dd4a 91 chipEnable();
shivanandgowdakr 0:81848bf6dd4a 92 this->write(WRITE);
shivanandgowdakr 0:81848bf6dd4a 93 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 0:81848bf6dd4a 94 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 0:81848bf6dd4a 95 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 0:81848bf6dd4a 96 for (int i = 0; i < count; i++) {
shivanandgowdakr 0:81848bf6dd4a 97 this->write(buf[i]);
shivanandgowdakr 0:81848bf6dd4a 98 }
shivanandgowdakr 0:81848bf6dd4a 99 chipDisable();
shivanandgowdakr 0:81848bf6dd4a 100 writeDisable();
shivanandgowdakr 2:156c427681f0 101 wait_ms(2);
shivanandgowdakr 2:156c427681f0 102 uint8_t busy= checkIfBusy();
shivanandgowdakr 2:156c427681f0 103 while(busy==1)
shivanandgowdakr 2:156c427681f0 104 {
shivanandgowdakr 2:156c427681f0 105 //printf("Busy :%d\r\n",busy);
shivanandgowdakr 2:156c427681f0 106 wait_ms(1);
shivanandgowdakr 2:156c427681f0 107 busy= checkIfBusy();
shivanandgowdakr 2:156c427681f0 108 }
shivanandgowdakr 2:156c427681f0 109 }
shivanandgowdakr 0:81848bf6dd4a 110
shivanandgowdakr 0:81848bf6dd4a 111 void EE25LC1024::writeString(int addr, string str)
shivanandgowdakr 0:81848bf6dd4a 112 {
shivanandgowdakr 0:81848bf6dd4a 113 if (str.length() < 1)
shivanandgowdakr 0:81848bf6dd4a 114 return;
shivanandgowdakr 0:81848bf6dd4a 115 writeEnable();
shivanandgowdakr 0:81848bf6dd4a 116 chipEnable();
shivanandgowdakr 0:81848bf6dd4a 117 this->write(WRITE);
shivanandgowdakr 0:81848bf6dd4a 118 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 0:81848bf6dd4a 119 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 0:81848bf6dd4a 120 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 0:81848bf6dd4a 121 for (int i = 0; i < str.length(); i++)
shivanandgowdakr 0:81848bf6dd4a 122 this->write(str.at(i));
shivanandgowdakr 0:81848bf6dd4a 123 chipDisable();
shivanandgowdakr 0:81848bf6dd4a 124 writeDisable();
shivanandgowdakr 0:81848bf6dd4a 125 wait_ms(6);//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails
shivanandgowdakr 0:81848bf6dd4a 126 }
shivanandgowdakr 0:81848bf6dd4a 127
shivanandgowdakr 0:81848bf6dd4a 128
shivanandgowdakr 0:81848bf6dd4a 129
shivanandgowdakr 0:81848bf6dd4a 130 uint8_t EE25LC1024::readRegister()
shivanandgowdakr 0:81848bf6dd4a 131 {
shivanandgowdakr 0:81848bf6dd4a 132
shivanandgowdakr 0:81848bf6dd4a 133 chipEnable();
shivanandgowdakr 0:81848bf6dd4a 134 this->write(RDSR);
shivanandgowdakr 0:81848bf6dd4a 135 uint8_t val=this->write(DUMMY_ADDR);
shivanandgowdakr 0:81848bf6dd4a 136 chipDisable();
shivanandgowdakr 0:81848bf6dd4a 137 //wait(WAIT_TIME);//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails
shivanandgowdakr 0:81848bf6dd4a 138 //printf("value of reg is %X \r\n",val);
shivanandgowdakr 0:81848bf6dd4a 139 return(val);
shivanandgowdakr 0:81848bf6dd4a 140 }
shivanandgowdakr 0:81848bf6dd4a 141 //ERASING
shivanandgowdakr 0:81848bf6dd4a 142 void EE25LC1024::chipErase()
shivanandgowdakr 0:81848bf6dd4a 143 {
shivanandgowdakr 0:81848bf6dd4a 144 writeEnable();
shivanandgowdakr 0:81848bf6dd4a 145 chipEnable();
shivanandgowdakr 0:81848bf6dd4a 146 this->write(CE);
shivanandgowdakr 0:81848bf6dd4a 147 chipDisable();
shivanandgowdakr 0:81848bf6dd4a 148 writeDisable();
shivanandgowdakr 0:81848bf6dd4a 149 wait_ms(10);//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails
shivanandgowdakr 0:81848bf6dd4a 150 }
shivanandgowdakr 0:81848bf6dd4a 151
shivanandgowdakr 0:81848bf6dd4a 152
shivanandgowdakr 0:81848bf6dd4a 153 void EE25LC1024::sectorErase(int addr)
shivanandgowdakr 0:81848bf6dd4a 154 {
shivanandgowdakr 0:81848bf6dd4a 155 writeEnable();
shivanandgowdakr 0:81848bf6dd4a 156 chipEnable();
shivanandgowdakr 0:81848bf6dd4a 157 this->write(SE);
shivanandgowdakr 0:81848bf6dd4a 158 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 0:81848bf6dd4a 159 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 0:81848bf6dd4a 160 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 0:81848bf6dd4a 161 chipDisable();
shivanandgowdakr 0:81848bf6dd4a 162 writeDisable();
shivanandgowdakr 0:81848bf6dd4a 163 wait_ms(10);//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails
shivanandgowdakr 0:81848bf6dd4a 164 }
shivanandgowdakr 0:81848bf6dd4a 165
shivanandgowdakr 0:81848bf6dd4a 166 void EE25LC1024::pageErase(int addr)
shivanandgowdakr 0:81848bf6dd4a 167 {
shivanandgowdakr 0:81848bf6dd4a 168
shivanandgowdakr 0:81848bf6dd4a 169 writeEnable();
shivanandgowdakr 2:156c427681f0 170
shivanandgowdakr 0:81848bf6dd4a 171 chipEnable();
shivanandgowdakr 2:156c427681f0 172
shivanandgowdakr 0:81848bf6dd4a 173 this->write(SE);
shivanandgowdakr 0:81848bf6dd4a 174 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 0:81848bf6dd4a 175 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 0:81848bf6dd4a 176 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 0:81848bf6dd4a 177 chipDisable();
shivanandgowdakr 0:81848bf6dd4a 178 writeDisable();
shivanandgowdakr 0:81848bf6dd4a 179 wait_ms(6);//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails
shivanandgowdakr 0:81848bf6dd4a 180
shivanandgowdakr 0:81848bf6dd4a 181
shivanandgowdakr 0:81848bf6dd4a 182 }
shivanandgowdakr 0:81848bf6dd4a 183
shivanandgowdakr 0:81848bf6dd4a 184
shivanandgowdakr 0:81848bf6dd4a 185 uint8_t EE25LC1024::checkIfBusy()
shivanandgowdakr 0:81848bf6dd4a 186 {
shivanandgowdakr 0:81848bf6dd4a 187 uint8_t value=readRegister();
shivanandgowdakr 2:156c427681f0 188 // printf("\r\n Value of Status Reg=%X\r\n\r\n",value);
shivanandgowdakr 2:156c427681f0 189 if((value & 0x01)==0x01 )
shivanandgowdakr 2:156c427681f0 190 {
shivanandgowdakr 2:156c427681f0 191 wait_ms(1);
shivanandgowdakr 0:81848bf6dd4a 192 return 1;
shivanandgowdakr 2:156c427681f0 193 }
shivanandgowdakr 0:81848bf6dd4a 194 else
shivanandgowdakr 2:156c427681f0 195 {
shivanandgowdakr 2:156c427681f0 196 wait_ms(1);
shivanandgowdakr 0:81848bf6dd4a 197 return 0;
shivanandgowdakr 2:156c427681f0 198 }
shivanandgowdakr 0:81848bf6dd4a 199 }
shivanandgowdakr 0:81848bf6dd4a 200
shivanandgowdakr 0:81848bf6dd4a 201 void EE25LC1024::writeRegister(uint8_t regValue)
shivanandgowdakr 0:81848bf6dd4a 202 {
shivanandgowdakr 0:81848bf6dd4a 203 writeEnable();
shivanandgowdakr 0:81848bf6dd4a 204 chipEnable();
shivanandgowdakr 0:81848bf6dd4a 205 this->write(WRSR);
shivanandgowdakr 0:81848bf6dd4a 206 this->write(regValue);
shivanandgowdakr 0:81848bf6dd4a 207 chipDisable();
shivanandgowdakr 0:81848bf6dd4a 208 writeDisable();
shivanandgowdakr 0:81848bf6dd4a 209 wait(WAIT_TIME);//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails
shivanandgowdakr 0:81848bf6dd4a 210
shivanandgowdakr 0:81848bf6dd4a 211 }
shivanandgowdakr 0:81848bf6dd4a 212
shivanandgowdakr 0:81848bf6dd4a 213
shivanandgowdakr 0:81848bf6dd4a 214 void EE25LC1024::writeLong(int addr, long value)
shivanandgowdakr 0:81848bf6dd4a 215 {
shivanandgowdakr 0:81848bf6dd4a 216 //Decomposition from a long to 4 bytes by using bitshift.
shivanandgowdakr 0:81848bf6dd4a 217 //One = Most significant -> Four = Least significant byte
shivanandgowdakr 0:81848bf6dd4a 218 uint8_t four = (value & 0xFF);
shivanandgowdakr 0:81848bf6dd4a 219 uint8_t three = ((value >> 8) & 0xFF);
shivanandgowdakr 0:81848bf6dd4a 220 uint8_t two = ((value >> 16) & 0xFF);
shivanandgowdakr 0:81848bf6dd4a 221 uint8_t one = ((value >> 24) & 0xFF);
shivanandgowdakr 0:81848bf6dd4a 222
shivanandgowdakr 0:81848bf6dd4a 223 writeEnable();
shivanandgowdakr 0:81848bf6dd4a 224 chipEnable();
shivanandgowdakr 0:81848bf6dd4a 225 this->write(WRITE);
shivanandgowdakr 0:81848bf6dd4a 226 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 0:81848bf6dd4a 227 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 0:81848bf6dd4a 228 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 0:81848bf6dd4a 229 this->write(four);
shivanandgowdakr 0:81848bf6dd4a 230 this->write(three);
shivanandgowdakr 0:81848bf6dd4a 231 this->write(two);
shivanandgowdakr 0:81848bf6dd4a 232 this->write(one);
shivanandgowdakr 0:81848bf6dd4a 233 chipDisable();
shivanandgowdakr 0:81848bf6dd4a 234 writeDisable();
shivanandgowdakr 0:81848bf6dd4a 235 wait_ms(6);
shivanandgowdakr 0:81848bf6dd4a 236 }
shivanandgowdakr 0:81848bf6dd4a 237
shivanandgowdakr 2:156c427681f0 238 long EE25LC1024::readLong(int addr)
shivanandgowdakr 0:81848bf6dd4a 239 {
shivanandgowdakr 0:81848bf6dd4a 240 //Read the 4 bytes from the eeprom memory.
shivanandgowdakr 0:81848bf6dd4a 241 chipEnable();
shivanandgowdakr 0:81848bf6dd4a 242 this->write(READ);
shivanandgowdakr 0:81848bf6dd4a 243 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 0:81848bf6dd4a 244 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 0:81848bf6dd4a 245 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 0:81848bf6dd4a 246
shivanandgowdakr 0:81848bf6dd4a 247 long four = this->write(DUMMY_ADDR);
shivanandgowdakr 0:81848bf6dd4a 248 long three = this->write(DUMMY_ADDR);
shivanandgowdakr 0:81848bf6dd4a 249 long two = this->write(DUMMY_ADDR);
shivanandgowdakr 0:81848bf6dd4a 250 long one = this->write(DUMMY_ADDR);
shivanandgowdakr 0:81848bf6dd4a 251 chipDisable();
shivanandgowdakr 0:81848bf6dd4a 252 //Return the recomposed long by using bitshift.
shivanandgowdakr 0:81848bf6dd4a 253 return ((four << 0) & 0xFF) + ((three << 8) & 0xFFFF) + ((two << 16) & 0xFFFFFF) + ((one << 24) & 0xFFFFFFFF);
shivanandgowdakr 0:81848bf6dd4a 254
shivanandgowdakr 0:81848bf6dd4a 255 }
shivanandgowdakr 0:81848bf6dd4a 256
shivanandgowdakr 0:81848bf6dd4a 257
shivanandgowdakr 0:81848bf6dd4a 258 //ENABLE/DISABLE (private functions)
shivanandgowdakr 0:81848bf6dd4a 259 void EE25LC1024::writeEnable()
shivanandgowdakr 0:81848bf6dd4a 260 {
shivanandgowdakr 0:81848bf6dd4a 261 chipEnable();
shivanandgowdakr 0:81848bf6dd4a 262 this->write(WREN);
shivanandgowdakr 0:81848bf6dd4a 263 chipDisable();
shivanandgowdakr 0:81848bf6dd4a 264 }
shivanandgowdakr 0:81848bf6dd4a 265 void EE25LC1024::writeDisable()
shivanandgowdakr 0:81848bf6dd4a 266 {
shivanandgowdakr 0:81848bf6dd4a 267 chipEnable();
shivanandgowdakr 0:81848bf6dd4a 268 this->write(WRDI);
shivanandgowdakr 0:81848bf6dd4a 269 chipDisable();
shivanandgowdakr 0:81848bf6dd4a 270 }
shivanandgowdakr 0:81848bf6dd4a 271 void EE25LC1024::chipEnable()
shivanandgowdakr 0:81848bf6dd4a 272 {
shivanandgowdakr 0:81848bf6dd4a 273 _cs = 0;
shivanandgowdakr 0:81848bf6dd4a 274 }
shivanandgowdakr 0:81848bf6dd4a 275 void EE25LC1024::chipDisable()
shivanandgowdakr 0:81848bf6dd4a 276 {
shivanandgowdakr 0:81848bf6dd4a 277 _cs = 1;
shivanandgowdakr 0:81848bf6dd4a 278 }
shivanandgowdakr 0:81848bf6dd4a 279