This is a demonstration of two Choro Q Hybrid cars.

Committer:
shintamainjp
Date:
Mon Nov 22 12:23:23 2010 +0000
Revision:
0:d825f8dae2be
Initial version.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
shintamainjp 0:d825f8dae2be 1 /*
shintamainjp 0:d825f8dae2be 2 * WiiNunchuckReader. A program allowing the output of one or two
shintamainjp 0:d825f8dae2be 3 * Wii Nunchucks to be read via I2C and decoded for use, using the mbed
shintamainjp 0:d825f8dae2be 4 * microcontroller and its associated libraries.
shintamainjp 0:d825f8dae2be 5 *
shintamainjp 0:d825f8dae2be 6 * Copyright (C) <2009> Petras Saduikis <petras@petras.co.uk>
shintamainjp 0:d825f8dae2be 7 *
shintamainjp 0:d825f8dae2be 8 * This file is part of WiiNunchuckReader.
shintamainjp 0:d825f8dae2be 9 *
shintamainjp 0:d825f8dae2be 10 * WiiNunchuckReader is free software: you can redistribute it and/or modify
shintamainjp 0:d825f8dae2be 11 * it under the terms of the GNU General Public License as published by
shintamainjp 0:d825f8dae2be 12 * the Free Software Foundation, either version 3 of the License, or
shintamainjp 0:d825f8dae2be 13 * (at your option) any later version.
shintamainjp 0:d825f8dae2be 14 *
shintamainjp 0:d825f8dae2be 15 * WiiNunchuckReader is distributed in the hope that it will be useful,
shintamainjp 0:d825f8dae2be 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
shintamainjp 0:d825f8dae2be 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
shintamainjp 0:d825f8dae2be 18 * GNU General Public License for more details.
shintamainjp 0:d825f8dae2be 19 *
shintamainjp 0:d825f8dae2be 20 * You should have received a copy of the GNU General Public License
shintamainjp 0:d825f8dae2be 21 * along with WiiNunchuckReader. If not, see <http://www.gnu.org/licenses/>.
shintamainjp 0:d825f8dae2be 22 */
shintamainjp 0:d825f8dae2be 23
shintamainjp 0:d825f8dae2be 24 #ifndef SNATCH59_WIINUNCHUCKDEFS_H
shintamainjp 0:d825f8dae2be 25 #define SNATCH59_WIINUNCHUCKDEFS_H
shintamainjp 0:d825f8dae2be 26
shintamainjp 0:d825f8dae2be 27 // I2C
shintamainjp 0:d825f8dae2be 28 #define NUNCHUCK_ADDR 0xA4 // I2C library doesn't right shift the address, so provided shifted
shintamainjp 0:d825f8dae2be 29 #define NUNCHUCK_REGADDR 0x40 // relevant register address
shintamainjp 0:d825f8dae2be 30 #define NUNCHUCK_READLEN 0x06 // always read this many bytes back
shintamainjp 0:d825f8dae2be 31
shintamainjp 0:d825f8dae2be 32 // received byte position
shintamainjp 0:d825f8dae2be 33 #define JOY_X 0
shintamainjp 0:d825f8dae2be 34 #define JOY_Y 1
shintamainjp 0:d825f8dae2be 35 #define ACCEL_X 2
shintamainjp 0:d825f8dae2be 36 #define ACCEL_Y 3
shintamainjp 0:d825f8dae2be 37 #define ACCEL_Z 4
shintamainjp 0:d825f8dae2be 38 #define ADDITIONAL 5
shintamainjp 0:d825f8dae2be 39
shintamainjp 0:d825f8dae2be 40 // bitmasks for addition info byte
shintamainjp 0:d825f8dae2be 41 #define MASK_CZ 0x03
shintamainjp 0:d825f8dae2be 42 #define MASK_ACCLX1 0x04
shintamainjp 0:d825f8dae2be 43 #define MASK_ACCLX2 0x08
shintamainjp 0:d825f8dae2be 44 #define MASK_ACCLY1 0x10
shintamainjp 0:d825f8dae2be 45 #define MASK_ACCLY2 0x20
shintamainjp 0:d825f8dae2be 46 #define MASK_ACCLZ1 0x40
shintamainjp 0:d825f8dae2be 47 #define MASK_ACCLZ2 0x80
shintamainjp 0:d825f8dae2be 48
shintamainjp 0:d825f8dae2be 49 // timing
shintamainjp 0:d825f8dae2be 50 #define I2C_READ_DELAY 0.01
shintamainjp 0:d825f8dae2be 51
shintamainjp 0:d825f8dae2be 52 // I2C status
shintamainjp 0:d825f8dae2be 53 #define I2C_OK 0 // zero on success (ACK), non-zero on fail (NACK) for read or write
shintamainjp 0:d825f8dae2be 54
shintamainjp 0:d825f8dae2be 55 #endif