pradeep shekhar / Mbed 2 deprecated dec8_fsk_rx

rfm22 receive code for BAE

Dependencies:   mbed

main.cpp@1:0aa0c0b64f0c, 2014-12-26 (annotated)

Committer:
shekhar
Date:
Fri Dec 26 11:01:43 2014 +0000
Revision:
1:0aa0c0b64f0c
Parent:
0:7031cc82d88a 
rfm22 rx for BAE;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
shekhar 0:7031cc82d88a 1 #include "beacon.h"
shekhar 0:7031cc82d88a 2 Serial pc(USBTX, USBRX); // tx, rx
shekhar 0:7031cc82d88a 3 SPI spi(D11, D12, D13); // mosi, miso, sclk
shekhar 0:7031cc82d88a 4 DigitalOut cs(D10); //slave select or chip select
shekhar 0:7031cc82d88a 5
shekhar 0:7031cc82d88a 6 void writereg(uint8_t reg,uint8_t val)
shekhar 0:7031cc82d88a 7 {
shekhar 0:7031cc82d88a 8 cs = 0;__disable_irq();spi.write(reg | 0x80);spi.write(val);__enable_irq();cs = 1;
shekhar 0:7031cc82d88a 9 }
shekhar 0:7031cc82d88a 10 uint8_t readreg(uint8_t reg)
shekhar 0:7031cc82d88a 11 {
shekhar 0:7031cc82d88a 12 int val;cs = 0;__disable_irq();spi.write(reg & ~0x80);val = spi.write(0);__enable_irq();cs = 1;return val;
shekhar 0:7031cc82d88a 13 }
shekhar 0:7031cc82d88a 14 void clearTxBuf()
shekhar 0:7031cc82d88a 15 {
shekhar 0:7031cc82d88a 16 writereg(RF22_REG_08_OPERATING_MODE2,0x01);
shekhar 0:7031cc82d88a 17 writereg(RF22_REG_08_OPERATING_MODE2,0x00);
shekhar 0:7031cc82d88a 18 }
shekhar 0:7031cc82d88a 19 void clearRxBuf()
shekhar 0:7031cc82d88a 20 {
shekhar 0:7031cc82d88a 21 writereg(RF22_REG_08_OPERATING_MODE2,0x02);
shekhar 0:7031cc82d88a 22 writereg(RF22_REG_08_OPERATING_MODE2,0x00);
shekhar 0:7031cc82d88a 23 }
shekhar 0:7031cc82d88a 24 int setFrequency(float centre,float afcPullInRange)
shekhar 0:7031cc82d88a 25 {
shekhar 0:7031cc82d88a 26 //freq setting begins
shekhar 0:7031cc82d88a 27 uint8_t fbsel = 0x40;
shekhar 0:7031cc82d88a 28 uint8_t afclimiter;
shekhar 0:7031cc82d88a 29 if (centre >= 480.0) {
shekhar 0:7031cc82d88a 30 centre /= 2;
shekhar 0:7031cc82d88a 31 fbsel |= 0x20;
shekhar 0:7031cc82d88a 32 afclimiter = afcPullInRange * 1000000.0 / 1250.0;
shekhar 0:7031cc82d88a 33 } else {
shekhar 0:7031cc82d88a 34 if (afcPullInRange < 0.0 || afcPullInRange > 0.159375)
shekhar 0:7031cc82d88a 35 return false;
shekhar 0:7031cc82d88a 36 afclimiter = afcPullInRange * 1000000.0 / 625.0;
shekhar 0:7031cc82d88a 37 }
shekhar 0:7031cc82d88a 38 centre /= 10.0;
shekhar 0:7031cc82d88a 39 float integerPart = floor(centre);
shekhar 0:7031cc82d88a 40 float fractionalPart = centre - integerPart;
shekhar 0:7031cc82d88a 41
shekhar 0:7031cc82d88a 42 uint8_t fb = (uint8_t)integerPart - 24; // Range 0 to 23
shekhar 0:7031cc82d88a 43 fbsel |= fb;
shekhar 0:7031cc82d88a 44 uint16_t fc = fractionalPart * 64000;
shekhar 0:7031cc82d88a 45 writereg(RF22_REG_73_FREQUENCY_OFFSET1, 0); // REVISIT
shekhar 0:7031cc82d88a 46 writereg(RF22_REG_74_FREQUENCY_OFFSET2, 0);
shekhar 0:7031cc82d88a 47 writereg(RF22_REG_75_FREQUENCY_BAND_SELECT, fbsel);
shekhar 0:7031cc82d88a 48 writereg(RF22_REG_76_NOMINAL_CARRIER_FREQUENCY1, fc >> 8);
shekhar 0:7031cc82d88a 49 writereg(RF22_REG_77_NOMINAL_CARRIER_FREQUENCY0, fc & 0xff);
shekhar 0:7031cc82d88a 50 writereg(RF22_REG_2A_AFC_LIMITER, afclimiter);
shekhar 0:7031cc82d88a 51 return 0;
shekhar 0:7031cc82d88a 52 }
shekhar 0:7031cc82d88a 53
shekhar 0:7031cc82d88a 54 void init()
shekhar 0:7031cc82d88a 55 {
shekhar 0:7031cc82d88a 56 //reset()
shekhar 0:7031cc82d88a 57 writereg(RF22_REG_07_OPERATING_MODE1,0x80); //sw_reset
shekhar 0:7031cc82d88a 58 wait(1); //takes time to reset
shekhar 0:7031cc82d88a 59
shekhar 0:7031cc82d88a 60 clearTxBuf();
shekhar 0:7031cc82d88a 61 clearRxBuf();
shekhar 0:7031cc82d88a 62 //txfifoalmostempty
shekhar 0:7031cc82d88a 63 writereg(RF22_REG_7D_TX_FIFO_CONTROL2,10);
shekhar 0:7031cc82d88a 64 //rxfifoalmostfull
shekhar 0:7031cc82d88a 65 writereg(RF22_REG_7E_RX_FIFO_CONTROL,20);
shekhar 0:7031cc82d88a 66 //Packet-engine registers
shekhar 0:7031cc82d88a 67 writereg(RF22_REG_30_DATA_ACCESS_CONTROL,0x8E); //RF22_REG_30_DATA_ACCESS_CONTROL, RF22_ENPACRX | RF22_ENPACTX | RF22_ENCRC | RF22_CRC_CRC_16_IBM
shekhar 0:7031cc82d88a 68 //&0x77 = diasable packet rx-tx handling
shekhar 0:7031cc82d88a 69 writereg(RF22_REG_32_HEADER_CONTROL1,0x88); //RF22_REG_32_HEADER_CONTROL1, RF22_BCEN_HEADER3 | RF22_HDCH_HEADER3
shekhar 0:7031cc82d88a 70 writereg(RF22_REG_33_HEADER_CONTROL2,0x42); //RF22_REG_33_HEADER_CONTROL2, RF22_HDLEN_4 | RF22_SYNCLEN_2
shekhar 0:7031cc82d88a 71 writereg(RF22_REG_34_PREAMBLE_LENGTH,8); //RF22_REG_34_PREAMBLE_LENGTH, nibbles); preamble length = 8;
shekhar 0:7031cc82d88a 72 writereg(RF22_REG_36_SYNC_WORD3,0x2D); //syncword3=2D
shekhar 0:7031cc82d88a 73 writereg(RF22_REG_37_SYNC_WORD2,0xD4); //syncword2=D4
shekhar 0:7031cc82d88a 74 writereg(RF22_REG_3F_CHECK_HEADER3,0); //RF22_REG_3F_CHECK_HEADER3, RF22_DEFAULT_NODE_ADDRESS
shekhar 0:7031cc82d88a 75 writereg(RF22_REG_3A_TRANSMIT_HEADER3,0xab); //header_to
shekhar 0:7031cc82d88a 76 writereg(RF22_REG_3B_TRANSMIT_HEADER2,0xbc); //header_from
shekhar 0:7031cc82d88a 77 writereg(RF22_REG_3C_TRANSMIT_HEADER1,0xcd); //header_ids
shekhar 0:7031cc82d88a 78 writereg(RF22_REG_3D_TRANSMIT_HEADER0,0xde); //header_flags
shekhar 0:7031cc82d88a 79 writereg(RF22_REG_3F_CHECK_HEADER3,0xab);
shekhar 0:7031cc82d88a 80 writereg(RF22_REG_40_CHECK_HEADER2,0xbc);
shekhar 0:7031cc82d88a 81 writereg(RF22_REG_41_CHECK_HEADER1,0xcd);
shekhar 0:7031cc82d88a 82 writereg(RF22_REG_42_CHECK_HEADER0,0xde);
shekhar 0:7031cc82d88a 83
shekhar 0:7031cc82d88a 84 //RSSI threshold for clear channel indicator
shekhar 0:7031cc82d88a 85 writereg(RF22_REG_27_RSSI_THRESHOLD,0xA5); //55 for -80dBm, 2D for -100dBm, 7D for -60dBm, A5 for -40dBm, CD for -20 dBm
shekhar 0:7031cc82d88a 86
shekhar 0:7031cc82d88a 87 writereg(RF22_REG_0B_GPIO_CONFIGURATION0,0x15); // TX state ??
shekhar 0:7031cc82d88a 88 writereg(RF22_REG_0C_GPIO_CONFIGURATION1,0x12); // RX state ??
shekhar 0:7031cc82d88a 89
shekhar 0:7031cc82d88a 90 //interrupts
shekhar 0:7031cc82d88a 91 // spiWrite(RF22_REG_05_INTERRUPT_ENABLE1, RF22_ENTXFFAEM |RF22_ENRXFFAFULL | RF22_ENPKSENT |RF22_ENPKVALID| RF22_ENCRCERROR);
shekhar 0:7031cc82d88a 92 // spiWrite(RF22_REG_06_INTERRUPT_ENABLE2, RF22_ENPREAVAL);
shekhar 0:7031cc82d88a 93
shekhar 0:7031cc82d88a 94 setFrequency(435.0, 0.05);
shekhar 0:7031cc82d88a 95
shekhar 0:7031cc82d88a 96 //return !(statusRead() & RF22_FREQERR);
shekhar 0:7031cc82d88a 97 if((readreg(RF22_REG_02_DEVICE_STATUS)& 0x08)!= 0x00)
shekhar 0:7031cc82d88a 98 pc.printf("frequency not set properly\n");
shekhar 0:7031cc82d88a 99 //frequency set
shekhar 0:7031cc82d88a 100
shekhar 0:7031cc82d88a 101 //setModemConfig(FSK_Rb2_4Fd36); FSK_Rb2_4Fd36, ///< FSK, No Manchester, Rb = 2.4kbs, Fd = 36kHz
shekhar 0:7031cc82d88a 102 //setmodemregisters
shekhar 0:7031cc82d88a 103 //0x1b, 0x03, 0x41, 0x60, 0x27, 0x52, 0x00, 0x07, 0x40, 0x0a, 0x1e, 0x80, 0x60, 0x13, 0xa9, 0x2c, 0x22, 0x3a = FSK_RB2_4FD36
shekhar 0:7031cc82d88a 104 //0xc8, 0x03, 0x39, 0x20, 0x68, 0xdc, 0x00, 0x6b, 0x2a, 0x08, 0x2a, 0x80, 0x60, 0x13, 0xa9, 0x2c, 0x21, 0x08 = OOK,2.4, 335
shekhar 0:7031cc82d88a 105 writereg(RF22_REG_1C_IF_FILTER_BANDWIDTH,0x2B);
shekhar 0:7031cc82d88a 106 writereg(RF22_REG_1F_CLOCK_RECOVERY_GEARSHIFT_OVERRIDE,0x03);
shekhar 0:7031cc82d88a 107 writereg(RF22_REG_20_CLOCK_RECOVERY_OVERSAMPLING_RATE,0x41);
shekhar 0:7031cc82d88a 108 writereg(RF22_REG_21_CLOCK_RECOVERY_OFFSET2,0x60);
shekhar 0:7031cc82d88a 109 writereg(RF22_REG_22_CLOCK_RECOVERY_OFFSET1,0x27); //updated 20 to 25 reg values from excel sheet for 1.2 Khz freq. deviation,fsk
shekhar 0:7031cc82d88a 110 writereg(RF22_REG_23_CLOCK_RECOVERY_OFFSET0,0x52);
shekhar 0:7031cc82d88a 111 writereg(RF22_REG_24_CLOCK_RECOVERY_TIMING_LOOP_GAIN1,0x00);
shekhar 0:7031cc82d88a 112 writereg(RF22_REG_25_CLOCK_RECOVERY_TIMING_LOOP_GAIN0,0x51);
shekhar 0:7031cc82d88a 113 /*writereg(RF22_REG_2C_OOK_COUNTER_VALUE_1,0x2a);
shekhar 0:7031cc82d88a 114 writereg(RF22_REG_2D_OOK_COUNTER_VALUE_2,0x08);*/ //not required for fsk (OOK counter value)
shekhar 0:7031cc82d88a 115 writereg(RF22_REG_2E_SLICER_PEAK_HOLD,0x1e); //??
shekhar 0:7031cc82d88a 116 writereg(RF22_REG_58,0x80);
shekhar 0:7031cc82d88a 117 writereg(RF22_REG_69_AGC_OVERRIDE1,0x60);
shekhar 0:7031cc82d88a 118 writereg(RF22_REG_6E_TX_DATA_RATE1,0x09);
shekhar 0:7031cc82d88a 119 writereg(RF22_REG_6F_TX_DATA_RATE0,0xd5);
shekhar 0:7031cc82d88a 120 writereg(RF22_REG_70_MODULATION_CONTROL1,0x2c);
shekhar 0:7031cc82d88a 121 writereg(RF22_REG_71_MODULATION_CONTROL2,0x22);//ook = 0x21 //fsk = 0x22
shekhar 0:7031cc82d88a 122 writereg(RF22_REG_72_FREQUENCY_DEVIATION,0x02);
shekhar 0:7031cc82d88a 123 //set tx power
shekhar 0:7031cc82d88a 124 writereg(RF22_REG_6D_TX_POWER,0x07); //20dbm
shekhar 0:7031cc82d88a 125 writereg(RF22_REG_3E_PACKET_LENGTH,RX_DATA); //packet length
shekhar 0:7031cc82d88a 126
shekhar 0:7031cc82d88a 127 }
shekhar 0:7031cc82d88a 128 int main()
shekhar 0:7031cc82d88a 129 {
shekhar 0:7031cc82d88a 130 wait(1); // wait for POR to complete //change the timing later
shekhar 0:7031cc82d88a 131 cs=1; // chip must be deselected
shekhar 0:7031cc82d88a 132 wait(1); //change the time later
shekhar 0:7031cc82d88a 133 spi.format(8,0);
shekhar 0:7031cc82d88a 134 spi.frequency(10000000); //10MHz SCLK
shekhar 0:7031cc82d88a 135 if (readreg(RF22_REG_00_DEVICE_TYPE) == 0x08) pc.printf("spi connection valid\n");
shekhar 0:7031cc82d88a 136 else pc.printf("error in spi connection\n");
shekhar 0:7031cc82d88a 137
shekhar 0:7031cc82d88a 138 init();
shekhar 0:7031cc82d88a 139
shekhar 0:7031cc82d88a 140 //init complete
shekhar 1:0aa0c0b64f0c 141 pc.printf("init complete....\n");
shekhar 0:7031cc82d88a 142
shekhar 0:7031cc82d88a 143 //********
shekhar 0:7031cc82d88a 144
shekhar 0:7031cc82d88a 145 while(1)//pc.getc()=='r')
shekhar 0:7031cc82d88a 146 {
shekhar 0:7031cc82d88a 147 uint8_t data[255]; // for filling the received data
shekhar 0:7031cc82d88a 148 int u=0,i=0;
shekhar 0:7031cc82d88a 149 int bar = TIMES;
shekhar 0:7031cc82d88a 150 //rf22.waitAvailable();
shekhar 0:7031cc82d88a 151 clearTxBuf();
shekhar 0:7031cc82d88a 152 clearRxBuf();
shekhar 0:7031cc82d88a 153 //setModeRx();
shekhar 0:7031cc82d88a 154 writereg(RF22_REG_07_OPERATING_MODE1,0x04);//rxon
shekhar 1:0aa0c0b64f0c 155 while((readreg(RF22_REG_04_INTERRUPT_STATUS2)& 0x10) != 0x10) ;
shekhar 1:0aa0c0b64f0c 156 //pc.printf("rssi?\n");
shekhar 0:7031cc82d88a 157 //preamble??
shekhar 0:7031cc82d88a 158 while(!(readreg(0x04)&0x40))
shekhar 0:7031cc82d88a 159 pc.printf("detecting preamble\n");
shekhar 0:7031cc82d88a 160 //checking syncword
shekhar 0:7031cc82d88a 161 while(!(readreg(RF22_REG_04_INTERRUPT_STATUS2)& 0x80))
shekhar 0:7031cc82d88a 162 pc.printf("sync?\n");
shekhar 0:7031cc82d88a 163 //check for fifothreshold
shekhar 0:7031cc82d88a 164 //while((readreg(0x03)& 0x10) != 0x10)
shekhar 0:7031cc82d88a 165 // pc.printf("fifo1?\n");
shekhar 0:7031cc82d88a 166 while(u != RX_DATA)//fifo_thresh
shekhar 0:7031cc82d88a 167 {
shekhar 0:7031cc82d88a 168 pc.printf("1 \n");
shekhar 0:7031cc82d88a 169 if((RX_DATA - u) > TIMES)
shekhar 0:7031cc82d88a 170 {
shekhar 0:7031cc82d88a 171 //check for fifo_thresh
shekhar 0:7031cc82d88a 172 while((readreg(RF22_REG_03_INTERRUPT_STATUS1)& 0x10) != 0x10)
shekhar 0:7031cc82d88a 173 pc.printf("fifo2?\n");
shekhar 0:7031cc82d88a 174 bar = TIMES;
shekhar 0:7031cc82d88a 175 //reading
shekhar 0:7031cc82d88a 176 cs = 0;
shekhar 0:7031cc82d88a 177 spi.write(0x7F);
shekhar 0:7031cc82d88a 178 for(i=0; i<bar;i++){
shekhar 0:7031cc82d88a 179 data[u+i] = spi.write(0);
shekhar 0:7031cc82d88a 180 //pc.printf("0x%X \n",data[u+i]);
shekhar 0:7031cc82d88a 181 }
shekhar 0:7031cc82d88a 182 u=u+i;
shekhar 0:7031cc82d88a 183 pc.printf("u= %d \n",u);
shekhar 0:7031cc82d88a 184 cs = 1;
shekhar 0:7031cc82d88a 185 }
shekhar 0:7031cc82d88a 186 else
shekhar 0:7031cc82d88a 187 {
shekhar 0:7031cc82d88a 188 pc.printf("2\n");
shekhar 0:7031cc82d88a 189 wait(0.15);
shekhar 0:7031cc82d88a 190 bar = RX_DATA - u;
shekhar 0:7031cc82d88a 191 //reading
shekhar 0:7031cc82d88a 192 cs = 0;
shekhar 0:7031cc82d88a 193 spi.write(0x7F);
shekhar 0:7031cc82d88a 194 for(i=0; i<bar;i++){
shekhar 0:7031cc82d88a 195 data[u+i] = spi.write(0);
shekhar 0:7031cc82d88a 196 //pc.printf("0x%X \n",data[u+i]);
shekhar 0:7031cc82d88a 197 }
shekhar 0:7031cc82d88a 198 u=u+i;
shekhar 0:7031cc82d88a 199 cs = 1;
shekhar 0:7031cc82d88a 200 pc.printf("u= %d \n",u);
shekhar 0:7031cc82d88a 201 }
shekhar 0:7031cc82d88a 202 }
shekhar 0:7031cc82d88a 203 //packet valid??
shekhar 0:7031cc82d88a 204 while(!(readreg(RF22_REG_03_INTERRUPT_STATUS1)& 0x02))
shekhar 0:7031cc82d88a 205 pc.printf("checking if packet is valid\n");
shekhar 0:7031cc82d88a 206
shekhar 0:7031cc82d88a 207 //while(1)
shekhar 0:7031cc82d88a 208 // pc.printf("0x%X 0x%X *** ",readreg(0x03),readreg(0x04));
shekhar 0:7031cc82d88a 209 pc.printf("packet valid\n");
shekhar 0:7031cc82d88a 210 //4Breceived packet length
shekhar 0:7031cc82d88a 211 //while(0x)
shekhar 0:7031cc82d88a 212
shekhar 0:7031cc82d88a 213 /*//Printing data
shekhar 0:7031cc82d88a 214 for(int i=0; i<RX_DATA; i++)
shekhar 0:7031cc82d88a 215 pc.printf("0x%X \n",data[i]);
shekhar 0:7031cc82d88a 216 //for(int i = 0; i<12; i++)
shekhar 0:7031cc82d88a 217 // pc.printf("%c ",data[i]);
shekhar 0:7031cc82d88a 218 //while(!(readreg(0x04)&0x40))
shekhar 0:7031cc82d88a 219 //pc.printf("detecting preamble\n"); */
shekhar 0:7031cc82d88a 220 pc.printf("Received data:\n");
shekhar 0:7031cc82d88a 221 //for(int i=0;i<240;i++) pc.printf("0x%X",hk[i]);
shekhar 0:7031cc82d88a 222 // converting uint_8 to bool
shekhar 0:7031cc82d88a 223 bool shortbeacon[120];
shekhar 0:7031cc82d88a 224 for(int i = 0; i<120; i++)
shekhar 0:7031cc82d88a 225 data[2*i] == 0xFF ? shortbeacon[i] = 1 :shortbeacon[i] = 0;
shekhar 0:7031cc82d88a 226 /*for(int i = 0; i<120 ; i++)
shekhar 0:7031cc82d88a 227 pc.printf(" %d \n",shortbeacon[i]);*/
shekhar 0:7031cc82d88a 228
shekhar 0:7031cc82d88a 229 //converting bool to uint_8
shekhar 0:7031cc82d88a 230 uint8_t s_beacon[15];
shekhar 0:7031cc82d88a 231 for(int i = 0, m =0 ; i < 15 ; i++ )
shekhar 0:7031cc82d88a 232 for(int n = 0; n < 8; n++,m++)
shekhar 0:7031cc82d88a 233 {
shekhar 0:7031cc82d88a 234 if(shortbeacon[m])
shekhar 0:7031cc82d88a 235 {
shekhar 0:7031cc82d88a 236 s_beacon[i]<<=1;
shekhar 0:7031cc82d88a 237 s_beacon[i] |= 0x01;
shekhar 0:7031cc82d88a 238 }
shekhar 0:7031cc82d88a 239 else
shekhar 0:7031cc82d88a 240 s_beacon[i] <<= 1;
shekhar 0:7031cc82d88a 241 }
shekhar 0:7031cc82d88a 242
shekhar 0:7031cc82d88a 243
shekhar 0:7031cc82d88a 244 pc.printf("Call Sign : ");
shekhar 0:7031cc82d88a 245 for(int i = 0; i<7 ; i++)
shekhar 0:7031cc82d88a 246 pc.printf(" %X ",s_beacon[i]);
shekhar 0:7031cc82d88a 247
shekhar 0:7031cc82d88a 248 pc.printf("\n\nVoltage[0] : ");
shekhar 0:7031cc82d88a 249 pc.printf(" 0x%X \n\n",s_beacon[7]);
shekhar 0:7031cc82d88a 250
shekhar 0:7031cc82d88a 251 pc.printf("AngularSpeed[0] : ");
shekhar 0:7031cc82d88a 252 pc.printf(" 0x%X \n\n",s_beacon[8]);
shekhar 0:7031cc82d88a 253
shekhar 0:7031cc82d88a 254 pc.printf("AngularSpeed[1] : ");
shekhar 0:7031cc82d88a 255 pc.printf(" 0x%X \n\n",s_beacon[9]);
shekhar 0:7031cc82d88a 256
shekhar 0:7031cc82d88a 257 pc.printf("SubsystemStatus[0] : ");
shekhar 0:7031cc82d88a 258 pc.printf(" 0x%X \n\n",s_beacon[10]);
shekhar 0:7031cc82d88a 259
shekhar 0:7031cc82d88a 260 pc.printf("Temp[0] : ");
shekhar 0:7031cc82d88a 261 pc.printf(" 0x%X \n\n",s_beacon[11]);
shekhar 0:7031cc82d88a 262
shekhar 0:7031cc82d88a 263 pc.printf("Temp[1] : ");
shekhar 0:7031cc82d88a 264 pc.printf(" 0x%X \n\n",s_beacon[12]);
shekhar 0:7031cc82d88a 265
shekhar 0:7031cc82d88a 266 pc.printf("Temp[2] : ");
shekhar 0:7031cc82d88a 267 pc.printf(" 0x%X \n\n",s_beacon[13]);
shekhar 0:7031cc82d88a 268
shekhar 0:7031cc82d88a 269 pc.printf("ErrorFlag[0] : ");
shekhar 0:7031cc82d88a 270 pc.printf(" 0x%X \n\n",s_beacon[14]);
shekhar 0:7031cc82d88a 271 pc.printf("received headers : \n");
shekhar 0:7031cc82d88a 272 pc.printf("header1 = 0x%X , header2 = 0x%X , header3 = 0x%X , header4 = 0x%X \n",readreg(0x47),readreg(0x48),readreg(0x49),readreg(0x4A));
shekhar 0:7031cc82d88a 273 }
shekhar 0:7031cc82d88a 274
shekhar 0:7031cc82d88a 275 }