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Repo for ook demod
main.cpp@0:c3e85e9c3fa8, 2015-11-01 (annotated)
- Committer:
- shekhar
- Date:
- Sun Nov 01 17:09:49 2015 +0000
- Revision:
- 0:c3e85e9c3fa8
try this for bug fixing
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
shekhar | 0:c3e85e9c3fa8 | 1 | #include "beacon.h" |
shekhar | 0:c3e85e9c3fa8 | 2 | Serial pc(USBTX, USBRX); // tx, rx |
shekhar | 0:c3e85e9c3fa8 | 3 | SPI spi(D11, D12, D13); // mosi, miso, sclk |
shekhar | 0:c3e85e9c3fa8 | 4 | DigitalOut cs(D10); //slave select or chip select |
shekhar | 0:c3e85e9c3fa8 | 5 | |
shekhar | 0:c3e85e9c3fa8 | 6 | void writereg(uint8_t reg,uint8_t val) |
shekhar | 0:c3e85e9c3fa8 | 7 | { |
shekhar | 0:c3e85e9c3fa8 | 8 | cs = 0;__disable_irq();spi.write(reg | 0x80);spi.write(val);__enable_irq();cs = 1; |
shekhar | 0:c3e85e9c3fa8 | 9 | } |
shekhar | 0:c3e85e9c3fa8 | 10 | uint8_t readreg(uint8_t reg) |
shekhar | 0:c3e85e9c3fa8 | 11 | { |
shekhar | 0:c3e85e9c3fa8 | 12 | int val;cs = 0;__disable_irq();spi.write(reg & ~0x80);val = spi.write(0);__enable_irq();cs = 1;return val; |
shekhar | 0:c3e85e9c3fa8 | 13 | } |
shekhar | 0:c3e85e9c3fa8 | 14 | void clearTxBuf() |
shekhar | 0:c3e85e9c3fa8 | 15 | { |
shekhar | 0:c3e85e9c3fa8 | 16 | writereg(RF22_REG_08_OPERATING_MODE2,0x01); |
shekhar | 0:c3e85e9c3fa8 | 17 | writereg(RF22_REG_08_OPERATING_MODE2,0x00); |
shekhar | 0:c3e85e9c3fa8 | 18 | } |
shekhar | 0:c3e85e9c3fa8 | 19 | void clearRxBuf() |
shekhar | 0:c3e85e9c3fa8 | 20 | { |
shekhar | 0:c3e85e9c3fa8 | 21 | writereg(RF22_REG_08_OPERATING_MODE2,0x02); |
shekhar | 0:c3e85e9c3fa8 | 22 | writereg(RF22_REG_08_OPERATING_MODE2,0x00); |
shekhar | 0:c3e85e9c3fa8 | 23 | } |
shekhar | 0:c3e85e9c3fa8 | 24 | int setFrequency(float centre,float afcPullInRange) |
shekhar | 0:c3e85e9c3fa8 | 25 | { |
shekhar | 0:c3e85e9c3fa8 | 26 | //freq setting begins |
shekhar | 0:c3e85e9c3fa8 | 27 | uint8_t fbsel = 0x40; |
shekhar | 0:c3e85e9c3fa8 | 28 | uint8_t afclimiter; |
shekhar | 0:c3e85e9c3fa8 | 29 | if (centre >= 480.0) { |
shekhar | 0:c3e85e9c3fa8 | 30 | centre /= 2; |
shekhar | 0:c3e85e9c3fa8 | 31 | fbsel |= 0x20; |
shekhar | 0:c3e85e9c3fa8 | 32 | afclimiter = afcPullInRange * 1000000.0 / 1250.0; |
shekhar | 0:c3e85e9c3fa8 | 33 | } else { |
shekhar | 0:c3e85e9c3fa8 | 34 | if (afcPullInRange < 0.0 || afcPullInRange > 0.159375) |
shekhar | 0:c3e85e9c3fa8 | 35 | return false; |
shekhar | 0:c3e85e9c3fa8 | 36 | afclimiter = afcPullInRange * 1000000.0 / 625.0; |
shekhar | 0:c3e85e9c3fa8 | 37 | } |
shekhar | 0:c3e85e9c3fa8 | 38 | centre /= 10.0; |
shekhar | 0:c3e85e9c3fa8 | 39 | float integerPart = floor(centre); |
shekhar | 0:c3e85e9c3fa8 | 40 | float fractionalPart = centre - integerPart; |
shekhar | 0:c3e85e9c3fa8 | 41 | |
shekhar | 0:c3e85e9c3fa8 | 42 | uint8_t fb = (uint8_t)integerPart - 24; // Range 0 to 23 |
shekhar | 0:c3e85e9c3fa8 | 43 | fbsel |= fb; |
shekhar | 0:c3e85e9c3fa8 | 44 | uint16_t fc = fractionalPart * 64000; |
shekhar | 0:c3e85e9c3fa8 | 45 | writereg(RF22_REG_73_FREQUENCY_OFFSET1, 0); // REVISIT |
shekhar | 0:c3e85e9c3fa8 | 46 | writereg(RF22_REG_74_FREQUENCY_OFFSET2, 0); |
shekhar | 0:c3e85e9c3fa8 | 47 | writereg(RF22_REG_75_FREQUENCY_BAND_SELECT, fbsel); |
shekhar | 0:c3e85e9c3fa8 | 48 | writereg(RF22_REG_76_NOMINAL_CARRIER_FREQUENCY1, fc >> 8); |
shekhar | 0:c3e85e9c3fa8 | 49 | writereg(RF22_REG_77_NOMINAL_CARRIER_FREQUENCY0, fc & 0xff); |
shekhar | 0:c3e85e9c3fa8 | 50 | writereg(RF22_REG_2A_AFC_LIMITER, afclimiter); |
shekhar | 0:c3e85e9c3fa8 | 51 | return 0; |
shekhar | 0:c3e85e9c3fa8 | 52 | } |
shekhar | 0:c3e85e9c3fa8 | 53 | |
shekhar | 0:c3e85e9c3fa8 | 54 | void init_short() |
shekhar | 0:c3e85e9c3fa8 | 55 | { |
shekhar | 0:c3e85e9c3fa8 | 56 | //reset() |
shekhar | 0:c3e85e9c3fa8 | 57 | writereg(RF22_REG_07_OPERATING_MODE1,0x80); //sw_reset |
shekhar | 0:c3e85e9c3fa8 | 58 | wait(1); //takes time to reset |
shekhar | 0:c3e85e9c3fa8 | 59 | |
shekhar | 0:c3e85e9c3fa8 | 60 | clearTxBuf(); |
shekhar | 0:c3e85e9c3fa8 | 61 | clearRxBuf(); |
shekhar | 0:c3e85e9c3fa8 | 62 | //txfifoalmostempty |
shekhar | 0:c3e85e9c3fa8 | 63 | writereg(RF22_REG_7D_TX_FIFO_CONTROL2,10); |
shekhar | 0:c3e85e9c3fa8 | 64 | //rxfifoalmostfull |
shekhar | 0:c3e85e9c3fa8 | 65 | writereg(RF22_REG_7E_RX_FIFO_CONTROL,20); |
shekhar | 0:c3e85e9c3fa8 | 66 | //Packet-engine registers |
shekhar | 0:c3e85e9c3fa8 | 67 | writereg(RF22_REG_30_DATA_ACCESS_CONTROL,0x8E); //RF22_REG_30_DATA_ACCESS_CONTROL, RF22_ENPACRX | RF22_ENPACTX | RF22_ENCRC | RF22_CRC_CRC_16_IBM |
shekhar | 0:c3e85e9c3fa8 | 68 | //&0x77 = diasable packet rx-tx handling |
shekhar | 0:c3e85e9c3fa8 | 69 | writereg(RF22_REG_32_HEADER_CONTROL1,0x88); //RF22_REG_32_HEADER_CONTROL1, RF22_BCEN_HEADER3 | RF22_HDCH_HEADER3 |
shekhar | 0:c3e85e9c3fa8 | 70 | writereg(RF22_REG_33_HEADER_CONTROL2,0x42); //RF22_REG_33_HEADER_CONTROL2, RF22_HDLEN_4 | RF22_SYNCLEN_2 |
shekhar | 0:c3e85e9c3fa8 | 71 | writereg(RF22_REG_34_PREAMBLE_LENGTH,8); //RF22_REG_34_PREAMBLE_LENGTH, nibbles); preamble length = 8; |
shekhar | 0:c3e85e9c3fa8 | 72 | writereg(RF22_REG_36_SYNC_WORD3,0x2D); //syncword3=2D |
shekhar | 0:c3e85e9c3fa8 | 73 | writereg(RF22_REG_37_SYNC_WORD2,0xD4); //syncword2=D4 |
shekhar | 0:c3e85e9c3fa8 | 74 | writereg(RF22_REG_3F_CHECK_HEADER3,0); //RF22_REG_3F_CHECK_HEADER3, RF22_DEFAULT_NODE_ADDRESS |
shekhar | 0:c3e85e9c3fa8 | 75 | writereg(RF22_REG_3A_TRANSMIT_HEADER3,0xab); //header_to |
shekhar | 0:c3e85e9c3fa8 | 76 | writereg(RF22_REG_3B_TRANSMIT_HEADER2,0xbc); //header_from |
shekhar | 0:c3e85e9c3fa8 | 77 | writereg(RF22_REG_3C_TRANSMIT_HEADER1,0xcd); //header_ids |
shekhar | 0:c3e85e9c3fa8 | 78 | writereg(RF22_REG_3D_TRANSMIT_HEADER0,0xde); //header_flags |
shekhar | 0:c3e85e9c3fa8 | 79 | writereg(RF22_REG_3F_CHECK_HEADER3,0xab); |
shekhar | 0:c3e85e9c3fa8 | 80 | writereg(RF22_REG_40_CHECK_HEADER2,0xbc); |
shekhar | 0:c3e85e9c3fa8 | 81 | writereg(RF22_REG_41_CHECK_HEADER1,0xcd); |
shekhar | 0:c3e85e9c3fa8 | 82 | writereg(RF22_REG_42_CHECK_HEADER0,0xde); |
shekhar | 0:c3e85e9c3fa8 | 83 | |
shekhar | 0:c3e85e9c3fa8 | 84 | //RSSI threshold for clear channel indicator |
shekhar | 0:c3e85e9c3fa8 | 85 | writereg(RF22_REG_27_RSSI_THRESHOLD,0xA5); //55 for -80dBm, 2D for -100dBm, 7D for -60dBm, A5 for -40dBm, CD for -20 dBm |
shekhar | 0:c3e85e9c3fa8 | 86 | |
shekhar | 0:c3e85e9c3fa8 | 87 | writereg(RF22_REG_0B_GPIO_CONFIGURATION0,0x15); // TX state ?? |
shekhar | 0:c3e85e9c3fa8 | 88 | writereg(RF22_REG_0C_GPIO_CONFIGURATION1,0x12); // RX state ?? |
shekhar | 0:c3e85e9c3fa8 | 89 | |
shekhar | 0:c3e85e9c3fa8 | 90 | //interrupts |
shekhar | 0:c3e85e9c3fa8 | 91 | // spiWrite(RF22_REG_05_INTERRUPT_ENABLE1, RF22_ENTXFFAEM |RF22_ENRXFFAFULL | RF22_ENPKSENT |RF22_ENPKVALID| RF22_ENCRCERROR); |
shekhar | 0:c3e85e9c3fa8 | 92 | // spiWrite(RF22_REG_06_INTERRUPT_ENABLE2, RF22_ENPREAVAL); |
shekhar | 0:c3e85e9c3fa8 | 93 | |
shekhar | 0:c3e85e9c3fa8 | 94 | setFrequency(435.0, 0.05); |
shekhar | 0:c3e85e9c3fa8 | 95 | |
shekhar | 0:c3e85e9c3fa8 | 96 | //return !(statusRead() & RF22_FREQERR); |
shekhar | 0:c3e85e9c3fa8 | 97 | if((readreg(RF22_REG_02_DEVICE_STATUS)& 0x08)!= 0x00) |
shekhar | 0:c3e85e9c3fa8 | 98 | pc.printf("frequency not set properly\n"); |
shekhar | 0:c3e85e9c3fa8 | 99 | //frequency set |
shekhar | 0:c3e85e9c3fa8 | 100 | |
shekhar | 0:c3e85e9c3fa8 | 101 | //setModemConfig(FSK_Rb2_4Fd36); FSK_Rb2_4Fd36, ///< FSK, No Manchester, Rb = 2.4kbs, Fd = 36kHz |
shekhar | 0:c3e85e9c3fa8 | 102 | //setmodemregisters |
shekhar | 0:c3e85e9c3fa8 | 103 | //0x1b, 0x03, 0x41, 0x60, 0x27, 0x52, 0x00, 0x07, 0x40, 0x0a, 0x1e, 0x80, 0x60, 0x13, 0xa9, 0x2c, 0x22, 0x3a = FSK_RB2_4FD36 |
shekhar | 0:c3e85e9c3fa8 | 104 | //0xc8, 0x03, 0x39, 0x20, 0x68, 0xdc, 0x00, 0x6b, 0x2a, 0x08, 0x2a, 0x80, 0x60, 0x13, 0xa9, 0x2c, 0x21, 0x08 = OOK,2.4, 335 |
shekhar | 0:c3e85e9c3fa8 | 105 | writereg(RF22_REG_1C_IF_FILTER_BANDWIDTH,0xdf); |
shekhar | 0:c3e85e9c3fa8 | 106 | writereg(RF22_REG_1F_CLOCK_RECOVERY_GEARSHIFT_OVERRIDE,0x03); |
shekhar | 0:c3e85e9c3fa8 | 107 | writereg(RF22_REG_20_CLOCK_RECOVERY_OVERSAMPLING_RATE,0x39); |
shekhar | 0:c3e85e9c3fa8 | 108 | writereg(RF22_REG_21_CLOCK_RECOVERY_OFFSET2,0x20); |
shekhar | 0:c3e85e9c3fa8 | 109 | writereg(RF22_REG_22_CLOCK_RECOVERY_OFFSET1,0x68); //updated 20 to 25 reg values from excel sheet for 1.2 Khz freq. deviation,fsk |
shekhar | 0:c3e85e9c3fa8 | 110 | writereg(RF22_REG_23_CLOCK_RECOVERY_OFFSET0,0xdc); |
shekhar | 0:c3e85e9c3fa8 | 111 | writereg(RF22_REG_24_CLOCK_RECOVERY_TIMING_LOOP_GAIN1,0x00); |
shekhar | 0:c3e85e9c3fa8 | 112 | writereg(RF22_REG_25_CLOCK_RECOVERY_TIMING_LOOP_GAIN0,0x6B); |
shekhar | 0:c3e85e9c3fa8 | 113 | writereg(RF22_REG_2C_OOK_COUNTER_VALUE_1,0x2C); |
shekhar | 0:c3e85e9c3fa8 | 114 | writereg(RF22_REG_2D_OOK_COUNTER_VALUE_2,0x11); //not required for fsk (OOK counter value) |
shekhar | 0:c3e85e9c3fa8 | 115 | writereg(RF22_REG_2E_SLICER_PEAK_HOLD,0x2A); //?? |
shekhar | 0:c3e85e9c3fa8 | 116 | writereg(RF22_REG_58,0x80); |
shekhar | 0:c3e85e9c3fa8 | 117 | writereg(RF22_REG_69_AGC_OVERRIDE1,0x60); |
shekhar | 0:c3e85e9c3fa8 | 118 | writereg(RF22_REG_6E_TX_DATA_RATE1,0x09); |
shekhar | 0:c3e85e9c3fa8 | 119 | writereg(RF22_REG_6F_TX_DATA_RATE0,0xd5); |
shekhar | 0:c3e85e9c3fa8 | 120 | writereg(RF22_REG_70_MODULATION_CONTROL1,0x2c); |
shekhar | 0:c3e85e9c3fa8 | 121 | writereg(RF22_REG_71_MODULATION_CONTROL2,0x21);//ook = 0x21 //fsk = 0x22 |
shekhar | 0:c3e85e9c3fa8 | 122 | writereg(RF22_REG_72_FREQUENCY_DEVIATION,0x50); |
shekhar | 0:c3e85e9c3fa8 | 123 | //set tx power |
shekhar | 0:c3e85e9c3fa8 | 124 | writereg(RF22_REG_6D_TX_POWER,0x07); //20dbm |
shekhar | 0:c3e85e9c3fa8 | 125 | writereg(RF22_REG_3E_PACKET_LENGTH,TX_DATA_SHORT); //packet length |
shekhar | 0:c3e85e9c3fa8 | 126 | } |
shekhar | 0:c3e85e9c3fa8 | 127 | void init_long() |
shekhar | 0:c3e85e9c3fa8 | 128 | { |
shekhar | 0:c3e85e9c3fa8 | 129 | //modem config |
shekhar | 0:c3e85e9c3fa8 | 130 | writereg(RF22_REG_1C_IF_FILTER_BANDWIDTH,0xDF); |
shekhar | 0:c3e85e9c3fa8 | 131 | writereg(RF22_REG_1F_CLOCK_RECOVERY_GEARSHIFT_OVERRIDE,0x03); |
shekhar | 0:c3e85e9c3fa8 | 132 | writereg(RF22_REG_20_CLOCK_RECOVERY_OVERSAMPLING_RATE,0x71); |
shekhar | 0:c3e85e9c3fa8 | 133 | writereg(RF22_REG_21_CLOCK_RECOVERY_OFFSET2,0x40); |
shekhar | 0:c3e85e9c3fa8 | 134 | writereg(RF22_REG_22_CLOCK_RECOVERY_OFFSET1,0x34); //updated 20 to 25 reg values from excel sheet for 1.2 Khz freq. deviation,fsk |
shekhar | 0:c3e85e9c3fa8 | 135 | writereg(RF22_REG_23_CLOCK_RECOVERY_OFFSET0,0x6E); |
shekhar | 0:c3e85e9c3fa8 | 136 | writereg(RF22_REG_24_CLOCK_RECOVERY_TIMING_LOOP_GAIN1,0x00); |
shekhar | 0:c3e85e9c3fa8 | 137 | writereg(RF22_REG_25_CLOCK_RECOVERY_TIMING_LOOP_GAIN0,0x36); |
shekhar | 0:c3e85e9c3fa8 | 138 | writereg(RF22_REG_2C_OOK_COUNTER_VALUE_1,0x30); |
shekhar | 0:c3e85e9c3fa8 | 139 | writereg(RF22_REG_2D_OOK_COUNTER_VALUE_2,0x23); //not required for fsk (OOK counter value) |
shekhar | 0:c3e85e9c3fa8 | 140 | writereg(RF22_REG_2E_SLICER_PEAK_HOLD,0x2B); //?? |
shekhar | 0:c3e85e9c3fa8 | 141 | writereg(RF22_REG_58,0x80); |
shekhar | 0:c3e85e9c3fa8 | 142 | writereg(RF22_REG_69_AGC_OVERRIDE1,0x60); |
shekhar | 0:c3e85e9c3fa8 | 143 | writereg(RF22_REG_6E_TX_DATA_RATE1,0x04); |
shekhar | 0:c3e85e9c3fa8 | 144 | writereg(RF22_REG_6F_TX_DATA_RATE0,0xEA); |
shekhar | 0:c3e85e9c3fa8 | 145 | writereg(RF22_REG_70_MODULATION_CONTROL1,0x2c); |
shekhar | 0:c3e85e9c3fa8 | 146 | writereg(RF22_REG_71_MODULATION_CONTROL2,0x21);//ook = 0x21 //fsk = 0x22 |
shekhar | 0:c3e85e9c3fa8 | 147 | writereg(RF22_REG_72_FREQUENCY_DEVIATION,0x02); |
shekhar | 0:c3e85e9c3fa8 | 148 | writereg(RF22_REG_3E_PACKET_LENGTH,TX_DATA_LONG); //packet length |
shekhar | 0:c3e85e9c3fa8 | 149 | } |
shekhar | 0:c3e85e9c3fa8 | 150 | int main() |
shekhar | 0:c3e85e9c3fa8 | 151 | { |
shekhar | 0:c3e85e9c3fa8 | 152 | wait(1); // wait for POR to complete //change the timing later |
shekhar | 0:c3e85e9c3fa8 | 153 | cs=1; // chip must be deselected |
shekhar | 0:c3e85e9c3fa8 | 154 | wait(1); //change the time later |
shekhar | 0:c3e85e9c3fa8 | 155 | spi.format(8,0); |
shekhar | 0:c3e85e9c3fa8 | 156 | spi.frequency(10000000); //10MHz SCLK |
shekhar | 0:c3e85e9c3fa8 | 157 | if (readreg(RF22_REG_00_DEVICE_TYPE) == 0x08) pc.printf("spi connection valid\n"); |
shekhar | 0:c3e85e9c3fa8 | 158 | else pc.printf("error in spi connection\n"); |
shekhar | 0:c3e85e9c3fa8 | 159 | |
shekhar | 0:c3e85e9c3fa8 | 160 | init_short(); |
shekhar | 0:c3e85e9c3fa8 | 161 | |
shekhar | 0:c3e85e9c3fa8 | 162 | |
shekhar | 0:c3e85e9c3fa8 | 163 | //init complete |
shekhar | 0:c3e85e9c3fa8 | 164 | pc.printf("init complete.....\n"); |
shekhar | 0:c3e85e9c3fa8 | 165 | while(1) |
shekhar | 0:c3e85e9c3fa8 | 166 | { |
shekhar | 0:c3e85e9c3fa8 | 167 | pc.printf("press t to send or r to receive....\n"); |
shekhar | 0:c3e85e9c3fa8 | 168 | if(pc.getc()=='t') |
shekhar | 0:c3e85e9c3fa8 | 169 | { |
shekhar | 0:c3e85e9c3fa8 | 170 | wait(0.02); // pl. update this value or even avoid it!!! |
shekhar | 0:c3e85e9c3fa8 | 171 | //extract values from short_beacon[] |
shekhar | 0:c3e85e9c3fa8 | 172 | uint8_t byte_counter = 0; |
shekhar | 0:c3e85e9c3fa8 | 173 | struct Short_beacon{ |
shekhar | 0:c3e85e9c3fa8 | 174 | uint8_t Voltage[1]; |
shekhar | 0:c3e85e9c3fa8 | 175 | uint8_t AngularSpeed[2]; |
shekhar | 0:c3e85e9c3fa8 | 176 | uint8_t SubsystemStatus[1]; |
shekhar | 0:c3e85e9c3fa8 | 177 | uint8_t Temp[3]; |
shekhar | 0:c3e85e9c3fa8 | 178 | uint8_t ErrorFlag[1]; |
shekhar | 0:c3e85e9c3fa8 | 179 | }Shortbeacon = { {0x88}, {0x99, 0xAA} , {0xAA},{0xAA,0xDD,0xEE}, {0x00} }; |
shekhar | 0:c3e85e9c3fa8 | 180 | |
shekhar | 0:c3e85e9c3fa8 | 181 | //filling hk data |
shekhar | 0:c3e85e9c3fa8 | 182 | uint8_t short_beacon[] = { 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77,Shortbeacon.Voltage[0],Shortbeacon.AngularSpeed[0], Shortbeacon.AngularSpeed[1],Shortbeacon.SubsystemStatus[0],Shortbeacon.Temp[0],Shortbeacon.Temp[1],Shortbeacon.Temp[2],Shortbeacon.ErrorFlag[0]}; |
shekhar | 0:c3e85e9c3fa8 | 183 | //tx settings begin |
shekhar | 0:c3e85e9c3fa8 | 184 | //setModeIdle(); |
shekhar | 0:c3e85e9c3fa8 | 185 | writereg(RF22_REG_07_OPERATING_MODE1,0x01); //ready mode |
shekhar | 0:c3e85e9c3fa8 | 186 | //fillTxBuf(data, len); |
shekhar | 0:c3e85e9c3fa8 | 187 | clearTxBuf(); |
shekhar | 0:c3e85e9c3fa8 | 188 | |
shekhar | 0:c3e85e9c3fa8 | 189 | //Set to Tx mode |
shekhar | 0:c3e85e9c3fa8 | 190 | writereg(RF22_REG_07_OPERATING_MODE1,0x09); |
shekhar | 0:c3e85e9c3fa8 | 191 | |
shekhar | 0:c3e85e9c3fa8 | 192 | while(byte_counter!=15){ |
shekhar | 0:c3e85e9c3fa8 | 193 | //Check for fifoThresh |
shekhar | 0:c3e85e9c3fa8 | 194 | while((readreg(RF22_REG_03_INTERRUPT_STATUS1) & 0x20) != 0x20); |
shekhar | 0:c3e85e9c3fa8 | 195 | //writing again |
shekhar | 0:c3e85e9c3fa8 | 196 | cs = 0; |
shekhar | 0:c3e85e9c3fa8 | 197 | spi.write(0xFF); |
shekhar | 0:c3e85e9c3fa8 | 198 | for(int i=7; i>=0 ;i--) |
shekhar | 0:c3e85e9c3fa8 | 199 | { |
shekhar | 0:c3e85e9c3fa8 | 200 | //pc.printf("%d\n",byte_counter); |
shekhar | 0:c3e85e9c3fa8 | 201 | if((short_beacon[byte_counter] & (uint8_t) pow(2.0,i))!=0) |
shekhar | 0:c3e85e9c3fa8 | 202 | //if((short_beacon[byte_counter] & mask[i]) != 0) |
shekhar | 0:c3e85e9c3fa8 | 203 | { |
shekhar | 0:c3e85e9c3fa8 | 204 | spi.write(0xFF); |
shekhar | 0:c3e85e9c3fa8 | 205 | spi.write(0xFF); |
shekhar | 0:c3e85e9c3fa8 | 206 | } |
shekhar | 0:c3e85e9c3fa8 | 207 | else |
shekhar | 0:c3e85e9c3fa8 | 208 | { |
shekhar | 0:c3e85e9c3fa8 | 209 | spi.write(0x00); |
shekhar | 0:c3e85e9c3fa8 | 210 | spi.write(0x00); |
shekhar | 0:c3e85e9c3fa8 | 211 | |
shekhar | 0:c3e85e9c3fa8 | 212 | } |
shekhar | 0:c3e85e9c3fa8 | 213 | } |
shekhar | 0:c3e85e9c3fa8 | 214 | cs = 1; |
shekhar | 0:c3e85e9c3fa8 | 215 | byte_counter++; |
shekhar | 0:c3e85e9c3fa8 | 216 | |
shekhar | 0:c3e85e9c3fa8 | 217 | } |
shekhar | 0:c3e85e9c3fa8 | 218 | //rf22.waitPacketSent(); |
shekhar | 0:c3e85e9c3fa8 | 219 | while((readreg(RF22_REG_03_INTERRUPT_STATUS1) & 0x04) != 0x04)pc.printf(" chck short pkt sent!\n"); |
shekhar | 0:c3e85e9c3fa8 | 220 | pc.printf("short packet sent...\n"); |
shekhar | 0:c3e85e9c3fa8 | 221 | |
shekhar | 0:c3e85e9c3fa8 | 222 | wait(0.1); |
shekhar | 0:c3e85e9c3fa8 | 223 | //long tx starts |
shekhar | 0:c3e85e9c3fa8 | 224 | int i = 0; //for loops |
shekhar | 0:c3e85e9c3fa8 | 225 | int u = 0; //universal count for hk array |
shekhar | 0:c3e85e9c3fa8 | 226 | int bar = 0; |
shekhar | 0:c3e85e9c3fa8 | 227 | init_long(); |
shekhar | 0:c3e85e9c3fa8 | 228 | uint8_t long_beacon_data[TX_DATA_LONG]; |
shekhar | 0:c3e85e9c3fa8 | 229 | for(int i=0;i<TX_DATA_LONG;i++) |
shekhar | 0:c3e85e9c3fa8 | 230 | long_beacon_data[i]=i; |
shekhar | 0:c3e85e9c3fa8 | 231 | clearTxBuf(); |
shekhar | 0:c3e85e9c3fa8 | 232 | clearRxBuf(); |
shekhar | 0:c3e85e9c3fa8 | 233 | /* //Filling Data into FIFO for the first time |
shekhar | 0:c3e85e9c3fa8 | 234 | cs = 0; |
shekhar | 0:c3e85e9c3fa8 | 235 | spi.write(0xFF); //fifo write access |
shekhar | 0:c3e85e9c3fa8 | 236 | for(i=0; i< 20; i++) |
shekhar | 0:c3e85e9c3fa8 | 237 | { |
shekhar | 0:c3e85e9c3fa8 | 238 | spi.write(long_beacon_data[i]); |
shekhar | 0:c3e85e9c3fa8 | 239 | //pc.printf("0x%X \n",long_beacon_data[u+i]); |
shekhar | 0:c3e85e9c3fa8 | 240 | } |
shekhar | 0:c3e85e9c3fa8 | 241 | u=i; |
shekhar | 0:c3e85e9c3fa8 | 242 | cs = 1; */ |
shekhar | 0:c3e85e9c3fa8 | 243 | //Set to Tx mode |
shekhar | 0:c3e85e9c3fa8 | 244 | writereg(RF22_REG_07_OPERATING_MODE1,0x09); |
shekhar | 0:c3e85e9c3fa8 | 245 | |
shekhar | 0:c3e85e9c3fa8 | 246 | //Check for fifoempty Thresh |
shekhar | 0:c3e85e9c3fa8 | 247 | while((readreg(RF22_REG_03_INTERRUPT_STATUS1) & 0x20) != 0x20); |
shekhar | 0:c3e85e9c3fa8 | 248 | |
shekhar | 0:c3e85e9c3fa8 | 249 | while(u!=TX_DATA_LONG) { |
shekhar | 0:c3e85e9c3fa8 | 250 | if((TX_DATA_LONG - u) >= TIMES) |
shekhar | 0:c3e85e9c3fa8 | 251 | bar = TIMES; |
shekhar | 0:c3e85e9c3fa8 | 252 | else |
shekhar | 0:c3e85e9c3fa8 | 253 | bar = (TX_DATA_LONG - u); |
shekhar | 0:c3e85e9c3fa8 | 254 | |
shekhar | 0:c3e85e9c3fa8 | 255 | //writing again |
shekhar | 0:c3e85e9c3fa8 | 256 | cs = 0; |
shekhar | 0:c3e85e9c3fa8 | 257 | spi.write(0xFF); //FIFO write access |
shekhar | 0:c3e85e9c3fa8 | 258 | for(i=0; i<bar; i++){ |
shekhar | 0:c3e85e9c3fa8 | 259 | spi.write(long_beacon_data[u + i]); |
shekhar | 0:c3e85e9c3fa8 | 260 | //pc.printf("0x%X \n",long_beacon_data[u+i]); |
shekhar | 0:c3e85e9c3fa8 | 261 | } |
shekhar | 0:c3e85e9c3fa8 | 262 | printf("u=%d\n",u); |
shekhar | 0:c3e85e9c3fa8 | 263 | u = u + i; |
shekhar | 0:c3e85e9c3fa8 | 264 | cs = 1; |
shekhar | 0:c3e85e9c3fa8 | 265 | //Check for fifoThresh |
shekhar | 0:c3e85e9c3fa8 | 266 | while((readreg(RF22_REG_03_INTERRUPT_STATUS1) & 0x20) != 0x20); |
shekhar | 0:c3e85e9c3fa8 | 267 | } |
shekhar | 0:c3e85e9c3fa8 | 268 | //rf22.waitPacketSent(); |
shekhar | 0:c3e85e9c3fa8 | 269 | while((readreg(RF22_REG_03_INTERRUPT_STATUS1) & 0x04) != 0x04)pc.printf(" chck long pkt sent!\n"); |
shekhar | 0:c3e85e9c3fa8 | 270 | pc.printf("long packet sent "); |
shekhar | 0:c3e85e9c3fa8 | 271 | |
shekhar | 0:c3e85e9c3fa8 | 272 | } |
shekhar | 0:c3e85e9c3fa8 | 273 | else if(pc.getc()=='r') |
shekhar | 0:c3e85e9c3fa8 | 274 | { |
shekhar | 0:c3e85e9c3fa8 | 275 | uint8_t short_rx_data[RX_DATA_SHORT]; // for filling the received short data |
shekhar | 0:c3e85e9c3fa8 | 276 | uint8_t long_rx_data[RX_DATA_LONG]; // for filling the received long data |
shekhar | 0:c3e85e9c3fa8 | 277 | int u=0,i=0; |
shekhar | 0:c3e85e9c3fa8 | 278 | int bar = TIMES; |
shekhar | 0:c3e85e9c3fa8 | 279 | //rf22.waitAvailable(); |
shekhar | 0:c3e85e9c3fa8 | 280 | clearTxBuf(); |
shekhar | 0:c3e85e9c3fa8 | 281 | clearRxBuf(); |
shekhar | 0:c3e85e9c3fa8 | 282 | //setModeRx(); |
shekhar | 0:c3e85e9c3fa8 | 283 | writereg(RF22_REG_07_OPERATING_MODE1,0x04);//rxon |
shekhar | 0:c3e85e9c3fa8 | 284 | while((readreg(RF22_REG_04_INTERRUPT_STATUS2)& 0x10) != 0x10) |
shekhar | 0:c3e85e9c3fa8 | 285 | pc.printf("rssi?\n"); |
shekhar | 0:c3e85e9c3fa8 | 286 | //preamble?? |
shekhar | 0:c3e85e9c3fa8 | 287 | while(!(readreg(0x04)&0x40)) |
shekhar | 0:c3e85e9c3fa8 | 288 | pc.printf("detecting preamble\n"); |
shekhar | 0:c3e85e9c3fa8 | 289 | //checking syncword |
shekhar | 0:c3e85e9c3fa8 | 290 | while(!(readreg(RF22_REG_04_INTERRUPT_STATUS2)& 0x80)) |
shekhar | 0:c3e85e9c3fa8 | 291 | pc.printf("sync?\n"); |
shekhar | 0:c3e85e9c3fa8 | 292 | //check for fifothreshold |
shekhar | 0:c3e85e9c3fa8 | 293 | while(u != RX_DATA_SHORT)//fifo_thresh |
shekhar | 0:c3e85e9c3fa8 | 294 | { |
shekhar | 0:c3e85e9c3fa8 | 295 | pc.printf("1 \n"); |
shekhar | 0:c3e85e9c3fa8 | 296 | if((RX_DATA_SHORT - u) > TIMES) |
shekhar | 0:c3e85e9c3fa8 | 297 | { |
shekhar | 0:c3e85e9c3fa8 | 298 | //check for fifo_thresh |
shekhar | 0:c3e85e9c3fa8 | 299 | while((readreg(RF22_REG_03_INTERRUPT_STATUS1)& 0x10) != 0x10) |
shekhar | 0:c3e85e9c3fa8 | 300 | pc.printf("fifo2?\n"); |
shekhar | 0:c3e85e9c3fa8 | 301 | bar = TIMES; |
shekhar | 0:c3e85e9c3fa8 | 302 | //reading |
shekhar | 0:c3e85e9c3fa8 | 303 | cs = 0; |
shekhar | 0:c3e85e9c3fa8 | 304 | spi.write(0x7F); |
shekhar | 0:c3e85e9c3fa8 | 305 | for(i=0; i<bar;i++){ |
shekhar | 0:c3e85e9c3fa8 | 306 | short_rx_data[u+i] = spi.write(0); |
shekhar | 0:c3e85e9c3fa8 | 307 | //pc.printf("0x%X \n",short_rx_data[u+i]); |
shekhar | 0:c3e85e9c3fa8 | 308 | } |
shekhar | 0:c3e85e9c3fa8 | 309 | u=u+i; |
shekhar | 0:c3e85e9c3fa8 | 310 | pc.printf("u= %d \n",u); |
shekhar | 0:c3e85e9c3fa8 | 311 | cs = 1; |
shekhar | 0:c3e85e9c3fa8 | 312 | } |
shekhar | 0:c3e85e9c3fa8 | 313 | else |
shekhar | 0:c3e85e9c3fa8 | 314 | { |
shekhar | 0:c3e85e9c3fa8 | 315 | pc.printf("2\n"); |
shekhar | 0:c3e85e9c3fa8 | 316 | wait(0.2); |
shekhar | 0:c3e85e9c3fa8 | 317 | bar = RX_DATA_SHORT- u; |
shekhar | 0:c3e85e9c3fa8 | 318 | //reading |
shekhar | 0:c3e85e9c3fa8 | 319 | cs = 0; |
shekhar | 0:c3e85e9c3fa8 | 320 | spi.write(0x7F); |
shekhar | 0:c3e85e9c3fa8 | 321 | for(i=0; i<bar;i++){ |
shekhar | 0:c3e85e9c3fa8 | 322 | short_rx_data[u+i] = spi.write(0); |
shekhar | 0:c3e85e9c3fa8 | 323 | //pc.printf("0x%X \n",short_rx_data[u+i]); |
shekhar | 0:c3e85e9c3fa8 | 324 | } |
shekhar | 0:c3e85e9c3fa8 | 325 | u=u+i; |
shekhar | 0:c3e85e9c3fa8 | 326 | cs = 1; |
shekhar | 0:c3e85e9c3fa8 | 327 | pc.printf("u= %d \n",u); |
shekhar | 0:c3e85e9c3fa8 | 328 | } |
shekhar | 0:c3e85e9c3fa8 | 329 | } |
shekhar | 0:c3e85e9c3fa8 | 330 | //packet valid?? |
shekhar | 0:c3e85e9c3fa8 | 331 | while(!(readreg(RF22_REG_03_INTERRUPT_STATUS1)& 0x02)) |
shekhar | 0:c3e85e9c3fa8 | 332 | pc.printf("checking if short beacon packet is valid\n"); |
shekhar | 0:c3e85e9c3fa8 | 333 | pc.printf("short packet valid\n"); |
shekhar | 0:c3e85e9c3fa8 | 334 | |
shekhar | 0:c3e85e9c3fa8 | 335 | init_long(); |
shekhar | 0:c3e85e9c3fa8 | 336 | u=0; i=0; |
shekhar | 0:c3e85e9c3fa8 | 337 | bar = TIMES; |
shekhar | 0:c3e85e9c3fa8 | 338 | clearTxBuf(); |
shekhar | 0:c3e85e9c3fa8 | 339 | clearRxBuf(); |
shekhar | 0:c3e85e9c3fa8 | 340 | //setModeRx(); |
shekhar | 0:c3e85e9c3fa8 | 341 | writereg(RF22_REG_07_OPERATING_MODE1,0x04); //rxon |
shekhar | 0:c3e85e9c3fa8 | 342 | while((readreg(RF22_REG_04_INTERRUPT_STATUS2)& 0x10) != 0x10) |
shekhar | 0:c3e85e9c3fa8 | 343 | pc.printf("rssi?\n"); |
shekhar | 0:c3e85e9c3fa8 | 344 | //preamble?? |
shekhar | 0:c3e85e9c3fa8 | 345 | while(!(readreg(0x04)&0x40)) |
shekhar | 0:c3e85e9c3fa8 | 346 | pc.printf("detecting preamble\n"); |
shekhar | 0:c3e85e9c3fa8 | 347 | //checking syncword |
shekhar | 0:c3e85e9c3fa8 | 348 | while(!(readreg(RF22_REG_04_INTERRUPT_STATUS2)& 0x80)) |
shekhar | 0:c3e85e9c3fa8 | 349 | pc.printf("sync?\n"); |
shekhar | 0:c3e85e9c3fa8 | 350 | |
shekhar | 0:c3e85e9c3fa8 | 351 | while(u != RX_DATA_LONG)//fifo_thresh |
shekhar | 0:c3e85e9c3fa8 | 352 | { |
shekhar | 0:c3e85e9c3fa8 | 353 | pc.printf("1 \n"); |
shekhar | 0:c3e85e9c3fa8 | 354 | if((RX_DATA_LONG - u) > TIMES) |
shekhar | 0:c3e85e9c3fa8 | 355 | { |
shekhar | 0:c3e85e9c3fa8 | 356 | //check for fifo_thresh |
shekhar | 0:c3e85e9c3fa8 | 357 | while((readreg(RF22_REG_03_INTERRUPT_STATUS1)& 0x10) != 0x10) |
shekhar | 0:c3e85e9c3fa8 | 358 | pc.printf("fifo2?\n"); |
shekhar | 0:c3e85e9c3fa8 | 359 | bar = TIMES; |
shekhar | 0:c3e85e9c3fa8 | 360 | //reading |
shekhar | 0:c3e85e9c3fa8 | 361 | cs = 0; |
shekhar | 0:c3e85e9c3fa8 | 362 | spi.write(0x7F); |
shekhar | 0:c3e85e9c3fa8 | 363 | for(i=0; i<bar;i++){ |
shekhar | 0:c3e85e9c3fa8 | 364 | long_rx_data[u+i] = spi.write(0); |
shekhar | 0:c3e85e9c3fa8 | 365 | //pc.printf("0x%X \n",long_rx_data[u+i]); |
shekhar | 0:c3e85e9c3fa8 | 366 | } |
shekhar | 0:c3e85e9c3fa8 | 367 | u=u+i; |
shekhar | 0:c3e85e9c3fa8 | 368 | pc.printf("u= %d \n",u); |
shekhar | 0:c3e85e9c3fa8 | 369 | cs = 1; |
shekhar | 0:c3e85e9c3fa8 | 370 | } |
shekhar | 0:c3e85e9c3fa8 | 371 | else |
shekhar | 0:c3e85e9c3fa8 | 372 | { |
shekhar | 0:c3e85e9c3fa8 | 373 | pc.printf("2\n"); |
shekhar | 0:c3e85e9c3fa8 | 374 | wait(0.2); |
shekhar | 0:c3e85e9c3fa8 | 375 | bar = RX_DATA_LONG- u; |
shekhar | 0:c3e85e9c3fa8 | 376 | //reading |
shekhar | 0:c3e85e9c3fa8 | 377 | cs = 0; |
shekhar | 0:c3e85e9c3fa8 | 378 | spi.write(0x7F); |
shekhar | 0:c3e85e9c3fa8 | 379 | for(i=0; i<bar;i++){ |
shekhar | 0:c3e85e9c3fa8 | 380 | long_rx_data[u+i] = spi.write(0); |
shekhar | 0:c3e85e9c3fa8 | 381 | //pc.printf("0x%X \n",long_rx_data[u+i]); |
shekhar | 0:c3e85e9c3fa8 | 382 | } |
shekhar | 0:c3e85e9c3fa8 | 383 | u=u+i; |
shekhar | 0:c3e85e9c3fa8 | 384 | cs = 1; |
shekhar | 0:c3e85e9c3fa8 | 385 | pc.printf("u= %d \n",u); |
shekhar | 0:c3e85e9c3fa8 | 386 | } |
shekhar | 0:c3e85e9c3fa8 | 387 | } |
shekhar | 0:c3e85e9c3fa8 | 388 | //packet valid?? |
shekhar | 0:c3e85e9c3fa8 | 389 | while(!(readreg(RF22_REG_03_INTERRUPT_STATUS1)& 0x02)) |
shekhar | 0:c3e85e9c3fa8 | 390 | pc.printf("checking if long beacon packet is valid\n"); |
shekhar | 0:c3e85e9c3fa8 | 391 | pc.printf("long packet valid\n"); |
shekhar | 0:c3e85e9c3fa8 | 392 | |
shekhar | 0:c3e85e9c3fa8 | 393 | bool shortbeacon[120]; |
shekhar | 0:c3e85e9c3fa8 | 394 | for(int i = 0; i<120; i++) |
shekhar | 0:c3e85e9c3fa8 | 395 | short_rx_data[2*i] == 0xFF ? shortbeacon[i] = 1 :shortbeacon[i] = 0; |
shekhar | 0:c3e85e9c3fa8 | 396 | |
shekhar | 0:c3e85e9c3fa8 | 397 | //converting bool to uint_8 |
shekhar | 0:c3e85e9c3fa8 | 398 | uint8_t s_beacon[15]; |
shekhar | 0:c3e85e9c3fa8 | 399 | for(int i = 0, m =0 ; i < 15 ; i++ ) |
shekhar | 0:c3e85e9c3fa8 | 400 | for(int n = 0; n < 8; n++,m++) |
shekhar | 0:c3e85e9c3fa8 | 401 | { |
shekhar | 0:c3e85e9c3fa8 | 402 | if(shortbeacon[m]) |
shekhar | 0:c3e85e9c3fa8 | 403 | { |
shekhar | 0:c3e85e9c3fa8 | 404 | s_beacon[i]<<=1; |
shekhar | 0:c3e85e9c3fa8 | 405 | s_beacon[i] |= 0x01; |
shekhar | 0:c3e85e9c3fa8 | 406 | } |
shekhar | 0:c3e85e9c3fa8 | 407 | else |
shekhar | 0:c3e85e9c3fa8 | 408 | s_beacon[i] <<= 1; |
shekhar | 0:c3e85e9c3fa8 | 409 | } |
shekhar | 0:c3e85e9c3fa8 | 410 | |
shekhar | 0:c3e85e9c3fa8 | 411 | //Printing short beacon data |
shekhar | 0:c3e85e9c3fa8 | 412 | pc.printf("Received short beacon data:\n"); |
shekhar | 0:c3e85e9c3fa8 | 413 | pc.printf("Call Sign : "); |
shekhar | 0:c3e85e9c3fa8 | 414 | for(int i = 0; i<7 ; i++) |
shekhar | 0:c3e85e9c3fa8 | 415 | pc.printf(" %X ",s_beacon[i]); |
shekhar | 0:c3e85e9c3fa8 | 416 | |
shekhar | 0:c3e85e9c3fa8 | 417 | pc.printf("\n\nVoltage[0] : "); |
shekhar | 0:c3e85e9c3fa8 | 418 | pc.printf(" 0x%X \n\n",s_beacon[7]); |
shekhar | 0:c3e85e9c3fa8 | 419 | |
shekhar | 0:c3e85e9c3fa8 | 420 | pc.printf("AngularSpeed[0] : "); |
shekhar | 0:c3e85e9c3fa8 | 421 | pc.printf(" 0x%X \n\n",s_beacon[8]); |
shekhar | 0:c3e85e9c3fa8 | 422 | |
shekhar | 0:c3e85e9c3fa8 | 423 | pc.printf("AngularSpeed[1] : "); |
shekhar | 0:c3e85e9c3fa8 | 424 | pc.printf(" 0x%X \n\n",s_beacon[9]); |
shekhar | 0:c3e85e9c3fa8 | 425 | |
shekhar | 0:c3e85e9c3fa8 | 426 | pc.printf("SubsystemStatus[0] : "); |
shekhar | 0:c3e85e9c3fa8 | 427 | pc.printf(" 0x%X \n\n",s_beacon[10]); |
shekhar | 0:c3e85e9c3fa8 | 428 | |
shekhar | 0:c3e85e9c3fa8 | 429 | pc.printf("Temp[0] : "); |
shekhar | 0:c3e85e9c3fa8 | 430 | pc.printf(" 0x%X \n\n",s_beacon[11]); |
shekhar | 0:c3e85e9c3fa8 | 431 | |
shekhar | 0:c3e85e9c3fa8 | 432 | pc.printf("Temp[1] : "); |
shekhar | 0:c3e85e9c3fa8 | 433 | pc.printf(" 0x%X \n\n",s_beacon[12]); |
shekhar | 0:c3e85e9c3fa8 | 434 | |
shekhar | 0:c3e85e9c3fa8 | 435 | pc.printf("Temp[2] : "); |
shekhar | 0:c3e85e9c3fa8 | 436 | pc.printf(" 0x%X \n\n",s_beacon[13]); |
shekhar | 0:c3e85e9c3fa8 | 437 | |
shekhar | 0:c3e85e9c3fa8 | 438 | pc.printf("ErrorFlag[0] : "); |
shekhar | 0:c3e85e9c3fa8 | 439 | pc.printf(" 0x%X \n\n",s_beacon[14]); |
shekhar | 0:c3e85e9c3fa8 | 440 | pc.printf("received headers : \n"); |
shekhar | 0:c3e85e9c3fa8 | 441 | pc.printf("header1 = 0x%X , header2 = 0x%X , header3 = 0x%X , header4 = 0x%X \n",readreg(0x47),readreg(0x48),readreg(0x49),readreg(0x4A)); |
shekhar | 0:c3e85e9c3fa8 | 442 | |
shekhar | 0:c3e85e9c3fa8 | 443 | pc.printf("Received long beacon data:\n"); |
shekhar | 0:c3e85e9c3fa8 | 444 | for(int i=0;i<RX_DATA_LONG;i++) pc.printf("0x%X \n",long_rx_data[i]); |
shekhar | 0:c3e85e9c3fa8 | 445 | } |
shekhar | 0:c3e85e9c3fa8 | 446 | } |
shekhar | 0:c3e85e9c3fa8 | 447 | } |