pradeep shekhar / Mbed 2 deprecated dec26_test

This is final Standalone code tested on Beacon. #FSK

Dependencies:   mbed

main.cpp@0:4cedb9211b8e, 2015-04-15 (annotated)

Committer:
shekhar
Date:
Wed Apr 15 10:14:15 2015 +0000
Revision:
0:4cedb9211b8e
This is Final Standalone code tested on Beacon.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
shekhar 0:4cedb9211b8e 1 /*#include "beacon.h"
shekhar 0:4cedb9211b8e 2 #include "HK.h"
shekhar 0:4cedb9211b8e 3 Serial chavan(USBTX, USBRX); // tx, rx
shekhar 0:4cedb9211b8e 4 SPI spi(PTD6,PTD7,PTD5); // mosi, miso, sclk
shekhar 0:4cedb9211b8e 5 DigitalOut cs(PTC11); //slave select or chip select
shekhar 0:4cedb9211b8e 6
shekhar 0:4cedb9211b8e 7 extern ShortBeacy Shortbeacon;*/
shekhar 0:4cedb9211b8e 8 #include "beacon.h"
shekhar 0:4cedb9211b8e 9 Serial pc(USBTX, USBRX); // tx, rx
shekhar 0:4cedb9211b8e 10 SPI spi(D11, D12, D13); // mosi, miso, sclk
shekhar 0:4cedb9211b8e 11 DigitalOut cs(D10); //slave select or chip select
shekhar 0:4cedb9211b8e 12 Serial chavan(USBTX, USBRX); // tx, rx
shekhar 0:4cedb9211b8e 13
shekhar 0:4cedb9211b8e 14 void writereg(uint8_t reg,uint8_t val)
shekhar 0:4cedb9211b8e 15 {
shekhar 0:4cedb9211b8e 16 cs = 0;__disable_irq();spi.write(reg | 0x80);spi.write(val);__enable_irq();cs = 1;
shekhar 0:4cedb9211b8e 17 }
shekhar 0:4cedb9211b8e 18 uint8_t readreg(uint8_t reg)
shekhar 0:4cedb9211b8e 19 {
shekhar 0:4cedb9211b8e 20 int val;cs = 0;__disable_irq();spi.write(reg & ~0x80);val = spi.write(0);__enable_irq();cs = 1;return val;
shekhar 0:4cedb9211b8e 21 }
shekhar 0:4cedb9211b8e 22 void clearTxBuf()
shekhar 0:4cedb9211b8e 23 {
shekhar 0:4cedb9211b8e 24 writereg(RF22_REG_08_OPERATING_MODE2,0x01);
shekhar 0:4cedb9211b8e 25 writereg(RF22_REG_08_OPERATING_MODE2,0x00);
shekhar 0:4cedb9211b8e 26 }
shekhar 0:4cedb9211b8e 27 void clearRxBuf()
shekhar 0:4cedb9211b8e 28 {
shekhar 0:4cedb9211b8e 29 writereg(RF22_REG_08_OPERATING_MODE2,0x02);
shekhar 0:4cedb9211b8e 30 writereg(RF22_REG_08_OPERATING_MODE2,0x00);
shekhar 0:4cedb9211b8e 31 }
shekhar 0:4cedb9211b8e 32 int setFrequency(float centre,float afcPullInRange)
shekhar 0:4cedb9211b8e 33 {
shekhar 0:4cedb9211b8e 34 //freq setting begins
shekhar 0:4cedb9211b8e 35 uint8_t fbsel = 0x40;
shekhar 0:4cedb9211b8e 36 uint8_t afclimiter;
shekhar 0:4cedb9211b8e 37 if (centre >= 480.0) {
shekhar 0:4cedb9211b8e 38 centre /= 2;
shekhar 0:4cedb9211b8e 39 fbsel |= 0x20;
shekhar 0:4cedb9211b8e 40 afclimiter = afcPullInRange * 1000000.0 / 1250.0;
shekhar 0:4cedb9211b8e 41 } else {
shekhar 0:4cedb9211b8e 42 if (afcPullInRange < 0.0 || afcPullInRange > 0.159375)
shekhar 0:4cedb9211b8e 43 return false;
shekhar 0:4cedb9211b8e 44 afclimiter = afcPullInRange * 1000000.0 / 625.0;
shekhar 0:4cedb9211b8e 45 }
shekhar 0:4cedb9211b8e 46 centre /= 10.0;
shekhar 0:4cedb9211b8e 47 float integerPart = floor(centre);
shekhar 0:4cedb9211b8e 48 float fractionalPart = centre - integerPart;
shekhar 0:4cedb9211b8e 49
shekhar 0:4cedb9211b8e 50 uint8_t fb = (uint8_t)integerPart - 24; // Range 0 to 23
shekhar 0:4cedb9211b8e 51 fbsel |= fb;
shekhar 0:4cedb9211b8e 52 uint16_t fc = fractionalPart * 64000;
shekhar 0:4cedb9211b8e 53 writereg(RF22_REG_73_FREQUENCY_OFFSET1, 0); // REVISIT
shekhar 0:4cedb9211b8e 54 writereg(RF22_REG_74_FREQUENCY_OFFSET2, 0);
shekhar 0:4cedb9211b8e 55 writereg(RF22_REG_75_FREQUENCY_BAND_SELECT, fbsel);
shekhar 0:4cedb9211b8e 56 writereg(RF22_REG_76_NOMINAL_CARRIER_FREQUENCY1, fc >> 8);
shekhar 0:4cedb9211b8e 57 writereg(RF22_REG_77_NOMINAL_CARRIER_FREQUENCY0, fc & 0xff);
shekhar 0:4cedb9211b8e 58 writereg(RF22_REG_2A_AFC_LIMITER, afclimiter);
shekhar 0:4cedb9211b8e 59 return 0;
shekhar 0:4cedb9211b8e 60 }
shekhar 0:4cedb9211b8e 61
shekhar 0:4cedb9211b8e 62 void init()
shekhar 0:4cedb9211b8e 63 {
shekhar 0:4cedb9211b8e 64 //reset()
shekhar 0:4cedb9211b8e 65 writereg(RF22_REG_07_OPERATING_MODE1,0x80); //sw_reset
shekhar 0:4cedb9211b8e 66 wait(1); //takes time to reset
shekhar 0:4cedb9211b8e 67
shekhar 0:4cedb9211b8e 68 clearTxBuf();
shekhar 0:4cedb9211b8e 69 clearRxBuf();
shekhar 0:4cedb9211b8e 70 //txfifoalmostempty
shekhar 0:4cedb9211b8e 71 writereg(RF22_REG_7D_TX_FIFO_CONTROL2,5);
shekhar 0:4cedb9211b8e 72 //rxfifoalmostfull
shekhar 0:4cedb9211b8e 73 writereg(RF22_REG_7E_RX_FIFO_CONTROL,20);
shekhar 0:4cedb9211b8e 74 //Packet-engine registers
shekhar 0:4cedb9211b8e 75 writereg(RF22_REG_30_DATA_ACCESS_CONTROL,0x8E); //RF22_REG_30_DATA_ACCESS_CONTROL, RF22_ENPACRX | RF22_ENPACTX | RF22_ENCRC | RF22_CRC_CRC_16_IBM
shekhar 0:4cedb9211b8e 76 //&0x77 = diasable packet rx-tx handling
shekhar 0:4cedb9211b8e 77 writereg(RF22_REG_32_HEADER_CONTROL1,0x88); //RF22_REG_32_HEADER_CONTROL1, RF22_BCEN_HEADER3 | RF22_HDCH_HEADER3
shekhar 0:4cedb9211b8e 78 writereg(RF22_REG_33_HEADER_CONTROL2,0x42); //RF22_REG_33_HEADER_CONTROL2, RF22_HDLEN_4 | RF22_SYNCLEN_2
shekhar 0:4cedb9211b8e 79 writereg(RF22_REG_34_PREAMBLE_LENGTH,8); //RF22_REG_34_PREAMBLE_LENGTH, nibbles); preamble length = 8;
shekhar 0:4cedb9211b8e 80 writereg(RF22_REG_36_SYNC_WORD3,0x2D); //syncword3=2D
shekhar 0:4cedb9211b8e 81 writereg(RF22_REG_37_SYNC_WORD2,0xD4); //syncword2=D4
shekhar 0:4cedb9211b8e 82 writereg(RF22_REG_3F_CHECK_HEADER3,0); //RF22_REG_3F_CHECK_HEADER3, RF22_DEFAULT_NODE_ADDRESS
shekhar 0:4cedb9211b8e 83 writereg(RF22_REG_3A_TRANSMIT_HEADER3,0xab); //header_to
shekhar 0:4cedb9211b8e 84 writereg(RF22_REG_3B_TRANSMIT_HEADER2,0xbc); //header_from
shekhar 0:4cedb9211b8e 85 writereg(RF22_REG_3C_TRANSMIT_HEADER1,0xcd); //header_ids
shekhar 0:4cedb9211b8e 86 writereg(RF22_REG_3D_TRANSMIT_HEADER0,0xde); //header_flags
shekhar 0:4cedb9211b8e 87 writereg(RF22_REG_3F_CHECK_HEADER3,0xab);
shekhar 0:4cedb9211b8e 88 writereg(RF22_REG_40_CHECK_HEADER2,0xbc);
shekhar 0:4cedb9211b8e 89 writereg(RF22_REG_41_CHECK_HEADER1,0xcd);
shekhar 0:4cedb9211b8e 90 writereg(RF22_REG_42_CHECK_HEADER0,0xde);
shekhar 0:4cedb9211b8e 91
shekhar 0:4cedb9211b8e 92 //RSSI threshold for clear channel indicator
shekhar 0:4cedb9211b8e 93 writereg(RF22_REG_27_RSSI_THRESHOLD,0xA5); //55 for -80dBm, 2D for -100dBm, 7D for -60dBm, A5 for -40dBm, CD for -20 dBm
shekhar 0:4cedb9211b8e 94
shekhar 0:4cedb9211b8e 95 writereg(RF22_REG_0B_GPIO_CONFIGURATION0,0x15); // TX state ??
shekhar 0:4cedb9211b8e 96 writereg(RF22_REG_0C_GPIO_CONFIGURATION1,0x12); // RX state ??
shekhar 0:4cedb9211b8e 97
shekhar 0:4cedb9211b8e 98 //interrupts
shekhar 0:4cedb9211b8e 99 // spiWrite(RF22_REG_05_INTERRUPT_ENABLE1, RF22_ENTXFFAEM |RF22_ENRXFFAFULL | RF22_ENPKSENT |RF22_ENPKVALID| RF22_ENCRCERROR);
shekhar 0:4cedb9211b8e 100 // spiWrite(RF22_REG_06_INTERRUPT_ENABLE2, RF22_ENPREAVAL);
shekhar 0:4cedb9211b8e 101
shekhar 0:4cedb9211b8e 102 setFrequency(435.0, 0.05);
shekhar 0:4cedb9211b8e 103
shekhar 0:4cedb9211b8e 104 //return !(statusRead() & RF22_FREQERR);
shekhar 0:4cedb9211b8e 105 if((readreg(RF22_REG_02_DEVICE_STATUS)& 0x08)!= 0x00)
shekhar 0:4cedb9211b8e 106 pc.printf("frequency not set properly\n");
shekhar 0:4cedb9211b8e 107 //frequency set
shekhar 0:4cedb9211b8e 108
shekhar 0:4cedb9211b8e 109 //setModemConfig(FSK_Rb2_4Fd36); FSK_Rb2_4Fd36, ///< FSK, No Manchester, Rb = 2.4kbs, Fd = 36kHz
shekhar 0:4cedb9211b8e 110 //setmodemregisters
shekhar 0:4cedb9211b8e 111 //0x1b, 0x03, 0x41, 0x60, 0x27, 0x52, 0x00, 0x07, 0x40, 0x0a, 0x1e, 0x80, 0x60, 0x13, 0xa9, 0x2c, 0x22, 0x3a = FSK_RB2_4FD36
shekhar 0:4cedb9211b8e 112 //0xc8, 0x03, 0x39, 0x20, 0x68, 0xdc, 0x00, 0x6b, 0x2a, 0x08, 0x2a, 0x80, 0x60, 0x13, 0xa9, 0x2c, 0x21, 0x08 = OOK,2.4, 335
shekhar 0:4cedb9211b8e 113 writereg(RF22_REG_1C_IF_FILTER_BANDWIDTH,0x2B);
shekhar 0:4cedb9211b8e 114 writereg(RF22_REG_1F_CLOCK_RECOVERY_GEARSHIFT_OVERRIDE,0x03);
shekhar 0:4cedb9211b8e 115 writereg(RF22_REG_20_CLOCK_RECOVERY_OVERSAMPLING_RATE,0x41);
shekhar 0:4cedb9211b8e 116 writereg(RF22_REG_21_CLOCK_RECOVERY_OFFSET2,0x60);
shekhar 0:4cedb9211b8e 117 writereg(RF22_REG_22_CLOCK_RECOVERY_OFFSET1,0x27); //updated 20 to 25 reg values from excel sheet for 1.2 Khz freq. deviation,fsk
shekhar 0:4cedb9211b8e 118 writereg(RF22_REG_23_CLOCK_RECOVERY_OFFSET0,0x52);
shekhar 0:4cedb9211b8e 119 writereg(RF22_REG_24_CLOCK_RECOVERY_TIMING_LOOP_GAIN1,0x00);
shekhar 0:4cedb9211b8e 120 writereg(RF22_REG_25_CLOCK_RECOVERY_TIMING_LOOP_GAIN0,0x51);
shekhar 0:4cedb9211b8e 121 /*writereg(RF22_REG_2C_OOK_COUNTER_VALUE_1,0x2a);
shekhar 0:4cedb9211b8e 122 writereg(RF22_REG_2D_OOK_COUNTER_VALUE_2,0x08);*/ //not required for fsk (OOK counter value)
shekhar 0:4cedb9211b8e 123 writereg(RF22_REG_2E_SLICER_PEAK_HOLD,0x1e); //??
shekhar 0:4cedb9211b8e 124 writereg(RF22_REG_58,0x80);
shekhar 0:4cedb9211b8e 125 writereg(RF22_REG_69_AGC_OVERRIDE1,0x60);
shekhar 0:4cedb9211b8e 126 writereg(RF22_REG_6E_TX_DATA_RATE1,0x09);
shekhar 0:4cedb9211b8e 127 writereg(RF22_REG_6F_TX_DATA_RATE0,0xd5);
shekhar 0:4cedb9211b8e 128 writereg(RF22_REG_70_MODULATION_CONTROL1,0x2c);
shekhar 0:4cedb9211b8e 129 writereg(RF22_REG_71_MODULATION_CONTROL2,0x22);//ook = 0x21 //fsk = 0x22
shekhar 0:4cedb9211b8e 130 writereg(RF22_REG_72_FREQUENCY_DEVIATION,0x02);
shekhar 0:4cedb9211b8e 131 //set tx power
shekhar 0:4cedb9211b8e 132 writereg(RF22_REG_6D_TX_POWER,0x07); //20dbm
shekhar 0:4cedb9211b8e 133 writereg(RF22_REG_3E_PACKET_LENGTH,TX_DATA); //packet length
shekhar 0:4cedb9211b8e 134 }
shekhar 0:4cedb9211b8e 135 int main()
shekhar 0:4cedb9211b8e 136 {
shekhar 0:4cedb9211b8e 137 printf("\nBeacon function entered\n");
shekhar 0:4cedb9211b8e 138 wait(1); // wait for POR to complete //change the timing later
shekhar 0:4cedb9211b8e 139 cs=1; // chip must be deselected
shekhar 0:4cedb9211b8e 140 wait(1); //change the time later
shekhar 0:4cedb9211b8e 141 spi.format(8,0);
shekhar 0:4cedb9211b8e 142 spi.frequency(10000000); //10MHz SCLK
shekhar 0:4cedb9211b8e 143 if (readreg(RF22_REG_00_DEVICE_TYPE) == 0x08) pc.printf("spi connection valid\n");
shekhar 0:4cedb9211b8e 144 else pc.printf("error in spi connection\n");
shekhar 0:4cedb9211b8e 145
shekhar 0:4cedb9211b8e 146 init();
shekhar 0:4cedb9211b8e 147
shekhar 0:4cedb9211b8e 148 //********
shekhar 0:4cedb9211b8e 149 //button.rise(&interrupt_func); //interrupt enabled ( rising edge of pin 9)
shekhar 0:4cedb9211b8e 150 wait(0.02); // pl. update this value or even avoid it!!!
shekhar 0:4cedb9211b8e 151 //extract values from short_beacon[]
shekhar 0:4cedb9211b8e 152 uint8_t byte_counter = 0;
shekhar 0:4cedb9211b8e 153 struct Short_beacon{
shekhar 0:4cedb9211b8e 154 uint8_t Voltage[1];
shekhar 0:4cedb9211b8e 155 uint8_t AngularSpeed[2];
shekhar 0:4cedb9211b8e 156 uint8_t SubsystemStatus[1];
shekhar 0:4cedb9211b8e 157 uint8_t Temp[3];
shekhar 0:4cedb9211b8e 158 uint8_t ErrorFlag[1];
shekhar 0:4cedb9211b8e 159 }Shortbeacon = { {0x88}, {0x99, 0xAA} , {0xAA},{0xAA,0xDD,0xEE}, {0x00} };
shekhar 0:4cedb9211b8e 160
shekhar 0:4cedb9211b8e 161 //filling hk data
shekhar 0:4cedb9211b8e 162 uint8_t short_beacon[] = { 0xAB, 0x8A, 0xE2, 0xBB, 0xB8, 0xA2, 0x8E,Shortbeacon.Voltage[0],Shortbeacon.AngularSpeed[0], Shortbeacon.AngularSpeed[1],Shortbeacon.SubsystemStatus[0],Shortbeacon.Temp[0],Shortbeacon.Temp[1],Shortbeacon.Temp[2],Shortbeacon.ErrorFlag[0]};
shekhar 0:4cedb9211b8e 163
shekhar 0:4cedb9211b8e 164 for(int i = 0; i < 15 ; i++)
shekhar 0:4cedb9211b8e 165 {
shekhar 0:4cedb9211b8e 166 chavan.printf("0x%X\n",(short_beacon[i]));
shekhar 0:4cedb9211b8e 167 }
shekhar 0:4cedb9211b8e 168 //tx settings begin
shekhar 0:4cedb9211b8e 169 //setModeIdle();
shekhar 0:4cedb9211b8e 170 writereg(RF22_REG_07_OPERATING_MODE1,0x01); //ready mode
shekhar 0:4cedb9211b8e 171 //fillTxBuf(data, len);
shekhar 0:4cedb9211b8e 172 clearTxBuf();
shekhar 0:4cedb9211b8e 173
shekhar 0:4cedb9211b8e 174 //Set to Tx mode
shekhar 0:4cedb9211b8e 175 writereg(RF22_REG_07_OPERATING_MODE1,0x09);
shekhar 0:4cedb9211b8e 176
shekhar 0:4cedb9211b8e 177 while(byte_counter!=15){
shekhar 0:4cedb9211b8e 178 //Check for fifoThresh
shekhar 0:4cedb9211b8e 179 while((readreg(RF22_REG_03_INTERRUPT_STATUS1) & 0x20) != 0x20);
shekhar 0:4cedb9211b8e 180 //writing again
shekhar 0:4cedb9211b8e 181 cs = 0;
shekhar 0:4cedb9211b8e 182 spi.write(0xFF);
shekhar 0:4cedb9211b8e 183 for(int i=7; i>=0 ;i--)
shekhar 0:4cedb9211b8e 184 {
shekhar 0:4cedb9211b8e 185 //pc.printf("%d\n",byte_counter);
shekhar 0:4cedb9211b8e 186 if((short_beacon[byte_counter] & (uint8_t) pow(2.0,i))!=0)
shekhar 0:4cedb9211b8e 187 {
shekhar 0:4cedb9211b8e 188 spi.write(0xFF);
shekhar 0:4cedb9211b8e 189 spi.write(0xFF);
shekhar 0:4cedb9211b8e 190 }
shekhar 0:4cedb9211b8e 191 else
shekhar 0:4cedb9211b8e 192 {
shekhar 0:4cedb9211b8e 193 spi.write(0x00);
shekhar 0:4cedb9211b8e 194 spi.write(0x00);
shekhar 0:4cedb9211b8e 195
shekhar 0:4cedb9211b8e 196 }
shekhar 0:4cedb9211b8e 197 }
shekhar 0:4cedb9211b8e 198 cs = 1;
shekhar 0:4cedb9211b8e 199 byte_counter++;
shekhar 0:4cedb9211b8e 200
shekhar 0:4cedb9211b8e 201 }
shekhar 0:4cedb9211b8e 202 //rf22.waitPacketSent();
shekhar 0:4cedb9211b8e 203 while((readreg(RF22_REG_03_INTERRUPT_STATUS1) & 0x04) != 0x04)pc.printf(" chck pkt sent!\n");
shekhar 0:4cedb9211b8e 204 printf("\nBeacon function exiting\n");
shekhar 0:4cedb9211b8e 205
shekhar 0:4cedb9211b8e 206 }