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Repository for testing ADF code of COM_TMTC_SIMPLE
Fork of COM_MNG_TMTC_SIMPLE by
DefinitionsAndGlobals.h@4:e37674541504, 2015-12-24 (annotated)
- Committer:
- shekhar
- Date:
- Thu Dec 24 18:38:12 2015 +0000
- Revision:
- 4:e37674541504
- Parent:
- 3:6c81fc8834e2
ADF code to be tested
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
shreeshas95 | 0:f016e9e8d48b | 1 | // **************DEFINITIONS********************* |
shreeshas95 | 0:f016e9e8d48b | 2 | // COM_RX |
shreeshas95 | 1:a0055b3280c8 | 3 | #define RX_TIMEOUT_LIMIT 1.0 |
shreeshas95 | 2:2caf2a9a13aa | 4 | #define COM_RX_UART_TX PTE20 |
shreeshas95 | 2:2caf2a9a13aa | 5 | #define COM_RX_UART_RX PTE21 |
shreeshas95 | 0:f016e9e8d48b | 6 | |
shreeshas95 | 0:f016e9e8d48b | 7 | // COMMON SPI |
shreeshas95 | 0:f016e9e8d48b | 8 | #define SPI_MOSI PTE1 |
shreeshas95 | 0:f016e9e8d48b | 9 | #define SPI_MISO PTE3 |
shreeshas95 | 0:f016e9e8d48b | 10 | #define SPI_CLK PTE2 |
shreeshas95 | 1:a0055b3280c8 | 11 | #define SPI_CS_ADF PTA15 |
shreeshas95 | 2:2caf2a9a13aa | 12 | #define SPI_CS_SDC PTE22 |
shreeshas95 | 2:2caf2a9a13aa | 13 | #define SPI_CS_RTC PTE29 |
shreeshas95 | 2:2caf2a9a13aa | 14 | |
shreeshas95 | 2:2caf2a9a13aa | 15 | // ADF INTERRUPUT |
shreeshas95 | 2:2caf2a9a13aa | 16 | #define ADF_IRQ PTA14 |
shreeshas95 | 0:f016e9e8d48b | 17 | |
shreeshas95 | 0:f016e9e8d48b | 18 | // TC LIST |
shreeshas95 | 2:2caf2a9a13aa | 19 | #define TCL_STATE_INCOMPLETE 0x00 |
shreeshas95 | 0:f016e9e8d48b | 20 | #define TCL_STATE_EXECUTING 0x01 |
shreeshas95 | 0:f016e9e8d48b | 21 | #define TCL_STATE_COMPLETED 0x03 |
shreeshas95 | 0:f016e9e8d48b | 22 | #define TCL_STATE_ABORTED 0x02 |
shreeshas95 | 0:f016e9e8d48b | 23 | /* |
shreeshas95 | 0:f016e9e8d48b | 24 | 0: IDLE OR WAITING FOR TCL COMPLETION |
shreeshas95 | 0:f016e9e8d48b | 25 | 1: EXECUTING AFTER COMPLETION OF TCL |
shreeshas95 | 0:f016e9e8d48b | 26 | 2: COMPLETED EXECUTION OF TCL |
shreeshas95 | 0:f016e9e8d48b | 27 | 3: IDLE DUE TO ABORT ON NACK |
shreeshas95 | 0:f016e9e8d48b | 28 | */ |
shreeshas95 | 0:f016e9e8d48b | 29 | |
shreeshas95 | 0:f016e9e8d48b | 30 | // LIST OF FLAGS |
shreeshas95 | 2:2caf2a9a13aa | 31 | #define UART_INT_FLAG 0x0001 |
shreeshas95 | 2:2caf2a9a13aa | 32 | #define NEW_TC_RECEIVED 0x0002 |
shreeshas95 | 2:2caf2a9a13aa | 33 | #define COM_SESSION_FLAG 0x0004 |
shreeshas95 | 2:2caf2a9a13aa | 34 | #define COM_RX_FLAG 0x0008 |
shreeshas95 | 2:2caf2a9a13aa | 35 | #define COM_MNG_TMTC_RUNNING_FLAG 0x0010 |
shreeshas95 | 2:2caf2a9a13aa | 36 | #define COM_SESSION_VALIDITY 0x0020 |
shreeshas95 | 2:2caf2a9a13aa | 37 | #define ALL_CRC_PASS_FLAG 0x0040 |
shreeshas95 | 2:2caf2a9a13aa | 38 | #define COM_PA_HOT_FLAG 0x0080 |
shreeshas95 | 2:2caf2a9a13aa | 39 | #define COM_TX_FLAG 0x0100 |
shreeshas95 | 0:f016e9e8d48b | 40 | |
shreeshas95 | 0:f016e9e8d48b | 41 | // COM_MNG_TMTC THREAD |
shreeshas95 | 0:f016e9e8d48b | 42 | #define SESSION_TIME_LIMIT 1200 |
shreeshas95 | 0:f016e9e8d48b | 43 | #define COM_MNG_TMTC_SIGNAL_UART_INT 0x01 |
shreeshas95 | 0:f016e9e8d48b | 44 | #define COM_MNG_TMTC_SIGNAL_ADF_NSD 0x02 |
shreeshas95 | 0:f016e9e8d48b | 45 | #define COM_MNG_TMTC_SIGNAL_ADF_SD 0x03 |
shreeshas95 | 0:f016e9e8d48b | 46 | |
shreeshas95 | 0:f016e9e8d48b | 47 | // COM_MNG_TMTC |
shreeshas95 | 2:2caf2a9a13aa | 48 | #define COM_PA_COOLING_TIME_LIMIT 20 |
shreeshas95 | 2:2caf2a9a13aa | 49 | |
shreeshas95 | 2:2caf2a9a13aa | 50 | // call sign |
shreeshas95 | 2:2caf2a9a13aa | 51 | #define PSC_CALLSIGN 0x00 |
shreeshas95 | 2:2caf2a9a13aa | 52 | #define APID_CALLSIGN 0x00 |
shreeshas95 | 2:2caf2a9a13aa | 53 | |
shreeshas95 | 2:2caf2a9a13aa | 54 | // max value of telecommands in a tcl |
shreeshas95 | 2:2caf2a9a13aa | 55 | #define TCL_OVERFLOW_CONSTANT 256 |
shreeshas95 | 2:2caf2a9a13aa | 56 | |
shreeshas95 | 0:f016e9e8d48b | 57 | // starting value of packet sequence count at each pass |
shreeshas95 | 0:f016e9e8d48b | 58 | #define PSC_START_VALUE 1 |
shreeshas95 | 0:f016e9e8d48b | 59 | |
shreeshas95 | 0:f016e9e8d48b | 60 | // APID list |
shreeshas95 | 0:f016e9e8d48b | 61 | #define APID_BAE 1 |
shreeshas95 | 0:f016e9e8d48b | 62 | #define APID_CDMS 2 |
shreeshas95 | 0:f016e9e8d48b | 63 | #define APID_SPEED 3 |
shreeshas95 | 0:f016e9e8d48b | 64 | |
shreeshas95 | 0:f016e9e8d48b | 65 | // HIGH PRIORITY TC - priority list |
shreeshas95 | 0:f016e9e8d48b | 66 | // not correct values here |
shreeshas95 | 0:f016e9e8d48b | 67 | #define HPTC1 5 |
shreeshas95 | 0:f016e9e8d48b | 68 | #define HPTC2 6 |
shreeshas95 | 0:f016e9e8d48b | 69 | // Add more entries above |
shreeshas95 | 0:f016e9e8d48b | 70 | |
shreeshas95 | 0:f016e9e8d48b | 71 | // SIZE of tc in bytes |
shreeshas95 | 0:f016e9e8d48b | 72 | #define TC_SHORT_SIZE 11 |
shreeshas95 | 0:f016e9e8d48b | 73 | #define TC_LONG_SIZE 135 |
shreeshas95 | 0:f016e9e8d48b | 74 | |
shreeshas95 | 0:f016e9e8d48b | 75 | // TMID list |
shreeshas95 | 0:f016e9e8d48b | 76 | #define TMID_ACK_L1 0xA |
shreeshas95 | 0:f016e9e8d48b | 77 | |
shreeshas95 | 0:f016e9e8d48b | 78 | // OBOSC SERVICE SUBTYPE |
shreeshas95 | 0:f016e9e8d48b | 79 | #define OBOSC_SUB_DISABLE 0x01 |
shreeshas95 | 0:f016e9e8d48b | 80 | #define OBOSC_SUB_RETRY 0x05 |
shreeshas95 | 0:f016e9e8d48b | 81 | #define OBOSC_SUB_REP_TCL_D 0x06 |
shreeshas95 | 0:f016e9e8d48b | 82 | #define OBOSC_SUB_REP_TCL 0x08 |
shreeshas95 | 0:f016e9e8d48b | 83 | #define OBOSC_SUB_REP_LE 0x0F |
shreeshas95 | 0:f016e9e8d48b | 84 | #define OBOSC_SUB_RESET 0x07 |
shreeshas95 | 0:f016e9e8d48b | 85 | |
shreeshas95 | 3:6c81fc8834e2 | 86 | // PAYLOAD |
shreeshas95 | 3:6c81fc8834e2 | 87 | #define PAYLOAD_BUFFER_LENGTH 2190 |
shreeshas95 | 3:6c81fc8834e2 | 88 | |
shreeshas95 | 0:f016e9e8d48b | 89 | // ****************GLOBAL VARIABLES****************** |
shreeshas95 | 0:f016e9e8d48b | 90 | // DEBUG |
shreeshas95 | 0:f016e9e8d48b | 91 | Serial gPC( USBTX, USBRX ); |
shreeshas95 | 2:2caf2a9a13aa | 92 | //DigitalOut gLEDR(LED_RED); |
shreeshas95 | 2:2caf2a9a13aa | 93 | //DigitalOut gLEDG(LED_GREEN); |
shreeshas95 | 0:f016e9e8d48b | 94 | |
shreeshas95 | 0:f016e9e8d48b | 95 | // COM_RX |
shreeshas95 | 0:f016e9e8d48b | 96 | RawSerial RX1M( COM_RX_UART_TX, COM_RX_UART_RX ); |
shreeshas95 | 0:f016e9e8d48b | 97 | COM_RX_DATA_NODE *gRX_HEAD_DATA_NODE = NULL; |
shreeshas95 | 0:f016e9e8d48b | 98 | COM_RX_DATA_NODE *gRX_CURRENT_DATA_NODE = NULL; |
shreeshas95 | 2:2caf2a9a13aa | 99 | // uint8_t *gRX_CURRENT_PTR = NULL; |
shreeshas95 | 0:f016e9e8d48b | 100 | uint32_t gRX_COUNT = 0; |
shreeshas95 | 0:f016e9e8d48b | 101 | uint16_t gTOTAL_INCORRECT_SIZE_TC = 0x00; |
shreeshas95 | 0:f016e9e8d48b | 102 | uint16_t gTOTAL_CRC_FAIL_TC = 0x00; |
shreeshas95 | 2:2caf2a9a13aa | 103 | uint16_t gTOTAL_REPEATED_TC = 0x00; |
shreeshas95 | 0:f016e9e8d48b | 104 | |
shreeshas95 | 0:f016e9e8d48b | 105 | // COMMON SPI |
shreeshas95 | 0:f016e9e8d48b | 106 | SPI spi( SPI_MOSI, SPI_MISO, SPI_CLK ); |
shreeshas95 | 1:a0055b3280c8 | 107 | DigitalOut gCS_ADF(SPI_CS_ADF); |
shreeshas95 | 1:a0055b3280c8 | 108 | DigitalOut gCS_SDC(SPI_CS_SDC); |
shreeshas95 | 2:2caf2a9a13aa | 109 | DigitalOut gCS_RTC(SPI_CS_RTC); |
shreeshas95 | 0:f016e9e8d48b | 110 | Mutex SPI_mutex; |
shreeshas95 | 0:f016e9e8d48b | 111 | |
shreeshas95 | 0:f016e9e8d48b | 112 | // TC LIST |
shreeshas95 | 0:f016e9e8d48b | 113 | Base_tc* gHEAD_NODE_TCL = NULL; |
shreeshas95 | 0:f016e9e8d48b | 114 | Base_tc* gLAST_NODE_TCL = NULL; |
shreeshas95 | 2:2caf2a9a13aa | 115 | uint8_t gMASTER_STATE = TCL_STATE_INCOMPLETE; |
shreeshas95 | 2:2caf2a9a13aa | 116 | uint16_t gFLAGS = 0x0000; |
shreeshas95 | 0:f016e9e8d48b | 117 | |
shreeshas95 | 0:f016e9e8d48b | 118 | // COM_MNG_TMTC THREAD |
shreeshas95 | 0:f016e9e8d48b | 119 | Thread* gCOM_MNG_TMTC_THREAD = NULL; |
shreeshas95 | 0:f016e9e8d48b | 120 | Timeout gRX_TIMEOUT; |
shreeshas95 | 0:f016e9e8d48b | 121 | Timeout gSESSION_TIMEOUT; |
shreeshas95 | 0:f016e9e8d48b | 122 | |
shreeshas95 | 0:f016e9e8d48b | 123 | // COM_MNG_TMTC |
shreeshas95 | 2:2caf2a9a13aa | 124 | |
shreeshas95 | 2:2caf2a9a13aa | 125 | // PA cooling timeout |
shreeshas95 | 2:2caf2a9a13aa | 126 | Timeout gCOM_PA_COOLING_TIMER; |
shreeshas95 | 2:2caf2a9a13aa | 127 | |
shreeshas95 | 2:2caf2a9a13aa | 128 | // GS code for verification |
shreeshas95 | 2:2caf2a9a13aa | 129 | const uint8_t gGSCODE[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; |
shreeshas95 | 2:2caf2a9a13aa | 130 | |
shreeshas95 | 0:f016e9e8d48b | 131 | uint8_t gTOTAL_VALID_TC = 0x00; |
shreeshas95 | 0:f016e9e8d48b | 132 | // USE LAST_L1_ACK FOR GENERATING REPORT |
shreeshas95 | 0:f016e9e8d48b | 133 | uint8_t gLAST_L1_ACK[TM_SHORT_SIZE]; |
shreeshas95 | 0:f016e9e8d48b | 134 | uint8_t gLAST_L1_ACK_BUFFER[TM_SHORT_SIZE]; |
shreeshas95 | 0:f016e9e8d48b | 135 | uint8_t gOBOSC_PSC = PSC_START_VALUE; |
shreeshas95 | 3:6c81fc8834e2 | 136 | Base_tc* gOBOSC_HEAD = NULL; |
shreeshas95 | 3:6c81fc8834e2 | 137 | |
shreeshas95 | 3:6c81fc8834e2 | 138 | // SCIENCE_THREAD |
shreeshas95 | 3:6c81fc8834e2 | 139 | Thread* gSCIENCE_THREAD = NULL; |
shreeshas95 | 3:6c81fc8834e2 | 140 | uint8_t gPAYLOAD_BUFFER[PAYLOAD_BUFFER_LENGTH]; |