pradeep shekhar
/
Beacon_BAE_intergration_test
General testings
Diff: BCN.cpp
- Revision:
- 2:5b000925d960
- Parent:
- 1:e4b70669ae61
diff -r e4b70669ae61 -r 5b000925d960 BCN.cpp --- a/BCN.cpp Mon Nov 02 14:22:50 2015 +0000 +++ b/BCN.cpp Fri Apr 01 19:09:54 2016 +0000 @@ -6,6 +6,7 @@ SPI spi(D11, D12, D13); // mosi, miso, sclk DigitalOut cs(D10); //slave select or chip select Timer t_i; +Timer t_ii; Timeout rf_sl_timeout; Ticker loop; @@ -23,7 +24,7 @@ pc.printf("FCTN_BCN_INIT\n"); BCN_INIT_STATUS = 1; if(BCN_FEN == 0) - rf_sl_timeout.attach(&FCTN_BCN_FEN, 30); + rf_sl_timeout.attach(&FCTN_BCN_FEN, RF_SILENCE_TIME); Init_BEACON_HW(); BCN_INIT_STATUS = 0; } @@ -165,13 +166,17 @@ //Set to Tx mode writereg(RF22_REG_07_OPERATING_MODE1,0x08);//* wait(0.1); + //Check for fifoThresh - while(timeout_count--)if((readreg(RF22_REG_03_INTERRUPT_STATUS1) & 0x20) == 0x20)break; - timeout_count=10e5; + while(1)if((readreg(RF22_REG_03_INTERRUPT_STATUS1) & 0x20) == 0x20)break; + //timeout of 1310800 us req. //Check for packet_sent - while(timeout_count--)if((readreg(RF22_REG_03_INTERRUPT_STATUS1) & 0x04) == 0x04)break; + while(1)if((readreg(RF22_REG_03_INTERRUPT_STATUS1) & 0x04) == 0x04)break; + t_ii.stop(); + //timeout of 1622796 us req. + pc.printf("The time required is %d useconds\r\n",t_ii.read_us()); //pc.printf("Short packet sent\r\n"); writereg(RF22_REG_07_OPERATING_MODE1,0x00); //standby mode @@ -179,29 +184,26 @@ } void LONG_BCN_TX() { - writereg(RF22_REG_6E_TX_DATA_RATE,0x04); - writereg(RF22_REG_6F_TX_DATA_RATE,0xEA);//600 bps + writereg(RF22_REG_6E_TX_DATA_RATE,0x08); + writereg(RF22_REG_6F_TX_DATA_RATE,0x31);//1000 bps writereg(RF22_REG_3E_PACKET_LENGTH,LONG_TX_DATA); //long packet length wait(0.02); uint32_t timeout_count=10e5; //get long_beacon array - uint8_t Long_beacon[75]; - for(int i = 0;i<75;) + uint8_t Long_beacon[125]; + for(int i = 0;i<125;) { Long_beacon[i++] = 0xAA; } - - - //setModeIdle(); clearTxBuf(); //writing data first time cs = 0; spi.write(0xFF); - for(int i=0; i<60;i++) + for(int i=0; i<64;i++) { spi.write(Long_beacon[i]); } @@ -212,25 +214,24 @@ wait(0.1); //Check for fifoThresh - while(timeout_count--)if((readreg(RF22_REG_03_INTERRUPT_STATUS1) & 0x20) == 0x20)break; - timeout_count=10e5; + while(1)if((readreg(RF22_REG_03_INTERRUPT_STATUS1) & 0x20) == 0x20)break; + //timeout of 158236 us req. cs = 0; spi.write(0xFF); - for(int i=60; i<75;i++) + for(int i=60; i<125;i++) { spi.write(Long_beacon[i]); } cs = 1; wait(0.1); + //Check for fifoThresh - while(timeout_count--)if((readreg(RF22_REG_03_INTERRUPT_STATUS1) & 0x20) == 0x20)break; - timeout_count=10e5; - + while(1)if((readreg(RF22_REG_03_INTERRUPT_STATUS1) & 0x20) == 0x20)break; + //timeout of 7 us req. //Check for packetsent interrupt - while(timeout_count--)if((readreg(RF22_REG_03_INTERRUPT_STATUS1) & 0x04) == 0x04)break; - - //pc.printf("Long packet sent\r\n"); + while(1)if((readreg(RF22_REG_03_INTERRUPT_STATUS1) & 0x04) == 0x04)break; + //timeout of 679883 us req. writereg(RF22_REG_07_OPERATING_MODE1,0x00); //standby mode }