pradeep shekhar / Mbed 2 deprecated 31_12_15_COM_MNG_TMTC_SIMPLE

Repo for COM_MNG_TMTC_SIMPLE for integration with adf

Dependencies:   mbed-rtos mbed

Fork of COM_MNG_TMTC_SIMPLE by Shreesha S

adf.h@7:4e744637b2e8, 2015-12-31 (annotated)

Committer:
shekhar
Date:
Thu Dec 31 08:25:11 2015 +0000
Revision:
7:4e744637b2e8
Parent:
3:6c81fc8834e2
Child:
8:d1951bbdcdd8
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
shekhar 7:4e744637b2e8 1 ///without reset feature , with state checks.
shreeshas95 2:2caf2a9a13aa 2 InterruptIn IRQ(ADF_IRQ);
shreeshas95 1:a0055b3280c8 3 Ticker ticker;
shreeshas95 1:a0055b3280c8 4
shreeshas95 1:a0055b3280c8 5 bool sent_tmfrom_SDcard;
shreeshas95 1:a0055b3280c8 6 bool loop_on;
shreeshas95 1:a0055b3280c8 7 bool ADF_off;
shreeshas95 1:a0055b3280c8 8 bool buffer_state;
shreeshas95 1:a0055b3280c8 9 uint8_t signal = 0x00;
shreeshas95 1:a0055b3280c8 10 unsigned char bbram_buffer[66]={0x19,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x33,0x00,0xF4,0xC2,0x10,0xC0,0x00,0x30,0x31,0x07,0x00,0x01,0x00,0x7F,0x00,0x0B,0x37,0x00,0x00,0x40,0x0C,0x00,0x05,0x00,0x00,0x18,0x12,0x34,0x56,0x10,0x10,0xC4,0x14,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x00};
shreeshas95 1:a0055b3280c8 11
shreeshas95 2:2caf2a9a13aa 12 //int initialise_card();
shreeshas95 2:2caf2a9a13aa 13 //int disk_initialize();
shreeshas95 1:a0055b3280c8 14
shreeshas95 1:a0055b3280c8 15 #define bbram_write {\
shreeshas95 1:a0055b3280c8 16 SPI_mutex.lock();\
shreeshas95 1:a0055b3280c8 17 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 18 spi.write(0xB0);\
shreeshas95 1:a0055b3280c8 19 wait_us(300);\
shreeshas95 1:a0055b3280c8 20 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 21 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 22 for(int i=0;i<66;i++){\
shreeshas95 1:a0055b3280c8 23 spi.write(bbram_buffer[i]);\
shreeshas95 1:a0055b3280c8 24 }\
shreeshas95 1:a0055b3280c8 25 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 26 SPI_mutex.unlock();\
shreeshas95 1:a0055b3280c8 27 }
shreeshas95 1:a0055b3280c8 28 //------------------------------------------------------------------------
shreeshas95 1:a0055b3280c8 29 // state checking functions
shreeshas95 1:a0055b3280c8 30 //bool assrt_phy_off( int, int, int);
shreeshas95 1:a0055b3280c8 31 //bool assrt_phy_on( int,int,int);
shreeshas95 1:a0055b3280c8 32 //bool assrt_phy_tx(int,int,int);
shreeshas95 1:a0055b3280c8 33
shreeshas95 1:a0055b3280c8 34 #define START_ADDRESS 0x020;
shreeshas95 1:a0055b3280c8 35 #define MISO_PIN PTE3
shreeshas95 1:a0055b3280c8 36 /**************Defining Counter Limits**************/
shreeshas95 1:a0055b3280c8 37 #define THRS 20
shreeshas95 1:a0055b3280c8 38 #define STATE_ERR_THRS 20
shreeshas95 1:a0055b3280c8 39 #define PHY_OFF_EXEC_TIME 300
shreeshas95 1:a0055b3280c8 40 #define PHY_ON_EXEC_TIME 300
shreeshas95 1:a0055b3280c8 41 #define PHY_TX_EXEC_TIME 600
shreeshas95 1:a0055b3280c8 42 /******DEFINING COMMANDS*********/
shreeshas95 1:a0055b3280c8 43 #define CMD_HW_RESET 0xC8
shreeshas95 1:a0055b3280c8 44 #define CMD_PHY_ON 0xB1
shreeshas95 1:a0055b3280c8 45 #define CMD_PHY_OFF 0xB0
shreeshas95 1:a0055b3280c8 46 #define CMD_PHY_TX 0xB5
shreeshas95 1:a0055b3280c8 47 #define CMD_CONFIG_DEV 0xBB
shreeshas95 1:a0055b3280c8 48
shreeshas95 1:a0055b3280c8 49 #define check_status {\
shreeshas95 1:a0055b3280c8 50 unsigned char stat=0;\
shreeshas95 1:a0055b3280c8 51 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 52 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 53 stat = spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 54 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 55 status = stat;\
shreeshas95 1:a0055b3280c8 56 }
shreeshas95 1:a0055b3280c8 57
shreeshas95 1:a0055b3280c8 58 // all three arguments are int
shreeshas95 1:a0055b3280c8 59 #define assrt_phy_off(return_this) {\
shreeshas95 1:a0055b3280c8 60 int cmd_err_cnt = 0;\
shreeshas95 1:a0055b3280c8 61 int spi_err_cnt = 0;\
shreeshas95 1:a0055b3280c8 62 int state_err_cnt = 0;\
shreeshas95 1:a0055b3280c8 63 for(int i = 0 ; i < 40 ;i++){\
shreeshas95 1:a0055b3280c8 64 check_status;\
shreeshas95 1:a0055b3280c8 65 if(status == 0xB1){\
shreeshas95 1:a0055b3280c8 66 return_this = 0;\
shreeshas95 1:a0055b3280c8 67 break;\
shreeshas95 1:a0055b3280c8 68 }\
shreeshas95 1:a0055b3280c8 69 else if(cmd_err_cnt>THRS||spi_err_cnt>THRS){\
shreeshas95 1:a0055b3280c8 70 return_this = 1;\
shreeshas95 1:a0055b3280c8 71 break;\
shreeshas95 1:a0055b3280c8 72 }\
shreeshas95 1:a0055b3280c8 73 else if(state_err_cnt>STATE_ERR_THRS){\
shreeshas95 1:a0055b3280c8 74 return_this = 1;\
shreeshas95 1:a0055b3280c8 75 break;\
shreeshas95 1:a0055b3280c8 76 }\
shreeshas95 1:a0055b3280c8 77 else if( (status & 0xA0) == 0xA0 ){\
shreeshas95 1:a0055b3280c8 78 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 79 spi.write(CMD_PHY_OFF);\
shreeshas95 1:a0055b3280c8 80 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 81 wait_us(PHY_OFF_EXEC_TIME);\
shreeshas95 1:a0055b3280c8 82 state_err_cnt++;\
shreeshas95 1:a0055b3280c8 83 }\
shreeshas95 1:a0055b3280c8 84 else if(status&0x80==0x00){\
shreeshas95 1:a0055b3280c8 85 wait_ms(5);\
shreeshas95 1:a0055b3280c8 86 spi_err_cnt++;\
shreeshas95 1:a0055b3280c8 87 }\
shreeshas95 1:a0055b3280c8 88 else {\
shreeshas95 1:a0055b3280c8 89 wait_ms(1);\
shreeshas95 1:a0055b3280c8 90 cmd_err_cnt++;\
shreeshas95 1:a0055b3280c8 91 }\
shreeshas95 1:a0055b3280c8 92 }\
shreeshas95 1:a0055b3280c8 93 }
shreeshas95 1:a0055b3280c8 94
shreeshas95 1:a0055b3280c8 95
shreeshas95 1:a0055b3280c8 96 //#define assrt_phy_on(cmd_err_cnt, spi_err_cnt, state_err_cnt, return_this){\
shreeshas95 1:a0055b3280c8 97 // status=check_status();\
shreeshas95 1:a0055b3280c8 98 // if((status&0x1F)==0x12){\
shreeshas95 1:a0055b3280c8 99 // return 0;\
shreeshas95 1:a0055b3280c8 100 // }\
shreeshas95 1:a0055b3280c8 101 // else if(cmd_err_cnt>THRS||spi_err_cnt>THRS){\
shreeshas95 1:a0055b3280c8 102 // return 1;\
shreeshas95 1:a0055b3280c8 103 // }\
shreeshas95 1:a0055b3280c8 104 // else if(state_err_cnt>STATE_ERR_THRS){\
shreeshas95 1:a0055b3280c8 105 // return 1;\
shreeshas95 1:a0055b3280c8 106 // }\
shreeshas95 1:a0055b3280c8 107 // else if((status&0xA0)==0xA0){\
shreeshas95 1:a0055b3280c8 108 // cs_adf=0;\
shreeshas95 1:a0055b3280c8 109 // spi.write(0xB1);\
shreeshas95 1:a0055b3280c8 110 // cs_adf=1;\
shreeshas95 1:a0055b3280c8 111 // wait_us(PHY_ON_EXEC_TIME);\
shreeshas95 1:a0055b3280c8 112 // return assrt_phy_on(cmd_err_cnt,spi_err_cnt,state_err_cnt+1);\
shreeshas95 1:a0055b3280c8 113 // }\
shreeshas95 1:a0055b3280c8 114 // else if(status&0x80==0x00){\
shreeshas95 1:a0055b3280c8 115 // wait_ms(5);\
shreeshas95 1:a0055b3280c8 116 // //Error: SPI=0 Not ready CMD= Dont care
shreeshas95 1:a0055b3280c8 117 // return assrt_phy_on(cmd_err_cnt,spi_err_cnt+1,state_err_cnt);\
shreeshas95 1:a0055b3280c8 118 // }\
shreeshas95 1:a0055b3280c8 119 // else{\
shreeshas95 1:a0055b3280c8 120 // if(status&0xA0==0x80){\
shreeshas95 1:a0055b3280c8 121 // wait_ms(1);\
shreeshas95 1:a0055b3280c8 122 // //Error: Command Not ready SPI Ready cmd_err_cnt is a global variable
shreeshas95 1:a0055b3280c8 123 // return assrt_phy_on(cmd_err_cnt+1,spi_err_cnt,state_err_cnt);\
shreeshas95 1:a0055b3280c8 124 // }\
shreeshas95 1:a0055b3280c8 125 // }\
shreeshas95 1:a0055b3280c8 126 //}
shreeshas95 1:a0055b3280c8 127
shreeshas95 1:a0055b3280c8 128
shreeshas95 1:a0055b3280c8 129
shreeshas95 1:a0055b3280c8 130
shreeshas95 1:a0055b3280c8 131 #define initial_adf_check {\
shreeshas95 1:a0055b3280c8 132 spi.write(CMD_PHY_OFF);\
shreeshas95 1:a0055b3280c8 133 int tempReturn = 0;\
shreeshas95 2:2caf2a9a13aa 134 bool flag = false;\
shreeshas95 1:a0055b3280c8 135 while( hw_reset_err_cnt < 2 ){\
shreeshas95 1:a0055b3280c8 136 assrt_phy_off( tempReturn);\
shreeshas95 1:a0055b3280c8 137 if( !tempReturn ){\
shreeshas95 1:a0055b3280c8 138 bbram_write;\
shreeshas95 1:a0055b3280c8 139 bbram_flag=1;\
shreeshas95 2:2caf2a9a13aa 140 flag = true;\
shreeshas95 1:a0055b3280c8 141 break;\
shreeshas95 1:a0055b3280c8 142 }\
shreeshas95 1:a0055b3280c8 143 else{\
shreeshas95 1:a0055b3280c8 144 hardware_reset(0);\
shreeshas95 1:a0055b3280c8 145 hw_reset_err_cnt++;\
shreeshas95 2:2caf2a9a13aa 146 gPC.puts("Resetting hardware\r\n");\
shreeshas95 1:a0055b3280c8 147 }\
shreeshas95 1:a0055b3280c8 148 }\
shreeshas95 2:2caf2a9a13aa 149 if( flag == false ){\
shreeshas95 2:2caf2a9a13aa 150 gPC.puts("Seems to be SPI problem\r\n");\
shreeshas95 2:2caf2a9a13aa 151 }\
shreeshas95 1:a0055b3280c8 152 assrt_phy_off(tempReturn);\
shreeshas95 1:a0055b3280c8 153 if(!bbram_flag){\
shreeshas95 1:a0055b3280c8 154 bcn_flag=1;\
shreeshas95 1:a0055b3280c8 155 }\
shreeshas95 1:a0055b3280c8 156 }
shreeshas95 1:a0055b3280c8 157
shreeshas95 1:a0055b3280c8 158 unsigned char status =0;
shreeshas95 1:a0055b3280c8 159 unsigned int cmd_err_cnt=0;
shreeshas95 1:a0055b3280c8 160 unsigned int state_err_cnt=0;
shreeshas95 1:a0055b3280c8 161 unsigned int miso_err_cnt=0;
shreeshas95 1:a0055b3280c8 162 unsigned int hw_reset_err_cnt=0;
shreeshas95 1:a0055b3280c8 163 bool bcn_flag=0;
shreeshas95 1:a0055b3280c8 164 bool bbram_flag=0;
shreeshas95 1:a0055b3280c8 165
shreeshas95 1:a0055b3280c8 166 //bool assrt_phy_off(int cmd_err_cnt,int spi_err_cnt,int state_err_cnt){
shreeshas95 1:a0055b3280c8 167 // status=check_status();
shreeshas95 1:a0055b3280c8 168 // if(status==0xB1){
shreeshas95 1:a0055b3280c8 169 // return 0;
shreeshas95 1:a0055b3280c8 170 // }
shreeshas95 1:a0055b3280c8 171 // else if(cmd_err_cnt>THRS||spi_err_cnt>THRS){
shreeshas95 1:a0055b3280c8 172 // return 1;//You need to Reset the hardware
shreeshas95 1:a0055b3280c8 173 // }
shreeshas95 1:a0055b3280c8 174 // else if(state_err_cnt>STATE_ERR_THRS){
shreeshas95 1:a0055b3280c8 175 // return 1;//Again reset the hardware
shreeshas95 1:a0055b3280c8 176 // }
shreeshas95 1:a0055b3280c8 177 // else if((status&0xA0)==0xA0){ //If Status' first three bit ore 0b1X1 =>SPI ready, Dont care interrupt and CMD Ready.
shreeshas95 1:a0055b3280c8 178 // cs_adf=0;
shreeshas95 1:a0055b3280c8 179 // spi.write(CMD_PHY_OFF); //CMD_PHY_OFF=0xB0
shreeshas95 1:a0055b3280c8 180 // cs_adf=1;
shreeshas95 1:a0055b3280c8 181 // wait_us(PHY_OFF_EXEC_TIME);// Typical = 24us We are giving 300us
shreeshas95 1:a0055b3280c8 182 // return assrt_phy_off(cmd_err_cnt,spi_err_cnt,state_err_cnt+1);
shreeshas95 1:a0055b3280c8 183 // }
shreeshas95 1:a0055b3280c8 184 // else if(status&0x80==0x00){
shreeshas95 1:a0055b3280c8 185 // wait_ms(5);
shreeshas95 1:a0055b3280c8 186 // //Error: SPI=0 Not ready CMD= Dont care
shreeshas95 1:a0055b3280c8 187 // return assrt_phy_off(cmd_err_cnt,spi_err_cnt+1,state_err_cnt);
shreeshas95 1:a0055b3280c8 188 // }
shreeshas95 1:a0055b3280c8 189 // else {//if(status&0xA0==0x80){
shreeshas95 1:a0055b3280c8 190 // wait_ms(1);
shreeshas95 1:a0055b3280c8 191 // //Error: Command Not ready SPI Ready cmd_err_cnt is a global variable
shreeshas95 1:a0055b3280c8 192 // return assrt_phy_off(cmd_err_cnt+1,spi_err_cnt,state_err_cnt);
shreeshas95 1:a0055b3280c8 193 // }
shreeshas95 1:a0055b3280c8 194 //}
shreeshas95 1:a0055b3280c8 195
shreeshas95 1:a0055b3280c8 196 //bool assrt_phy_on(int cmd_err_cnt,int spi_err_cnt,int state_err_cnt){
shreeshas95 1:a0055b3280c8 197 // status=check_status();
shreeshas95 1:a0055b3280c8 198 // if((status&0x1F)==0x12){
shreeshas95 1:a0055b3280c8 199 // return 0;
shreeshas95 1:a0055b3280c8 200 // }
shreeshas95 1:a0055b3280c8 201 // else if(cmd_err_cnt>THRS||spi_err_cnt>THRS){
shreeshas95 1:a0055b3280c8 202 // return 1;//You need to Reset the hardware
shreeshas95 1:a0055b3280c8 203 // }
shreeshas95 1:a0055b3280c8 204 // else if(state_err_cnt>STATE_ERR_THRS){
shreeshas95 1:a0055b3280c8 205 // return 1;//Again reset the hardware
shreeshas95 1:a0055b3280c8 206 // }
shreeshas95 1:a0055b3280c8 207 // else if((status&0xA0)==0xA0){ //If Status' first three bit ore 0b1X1 =>SPI ready, Dont care interrupt and CMD Ready.
shreeshas95 1:a0055b3280c8 208 // cs_adf=0;
shreeshas95 1:a0055b3280c8 209 // spi.write(0xB1); //CMD_PHY_OFF
shreeshas95 1:a0055b3280c8 210 // cs_adf=1;
shreeshas95 1:a0055b3280c8 211 // wait_us(PHY_ON_EXEC_TIME);// Typical = 24us We are giving 300us
shreeshas95 1:a0055b3280c8 212 // return assrt_phy_on(cmd_err_cnt,spi_err_cnt,state_err_cnt+1);
shreeshas95 1:a0055b3280c8 213 // }
shreeshas95 1:a0055b3280c8 214 // else if(status&0x80==0x00){
shreeshas95 1:a0055b3280c8 215 // wait_ms(5);
shreeshas95 1:a0055b3280c8 216 // //Error: SPI=0 Not ready CMD= Dont care
shreeshas95 1:a0055b3280c8 217 // return assrt_phy_on(cmd_err_cnt,spi_err_cnt+1,state_err_cnt);
shreeshas95 1:a0055b3280c8 218 // }
shreeshas95 1:a0055b3280c8 219 // else{
shreeshas95 1:a0055b3280c8 220 // if(status&0xA0==0x80){
shreeshas95 1:a0055b3280c8 221 // wait_ms(1);
shreeshas95 1:a0055b3280c8 222 // //Error: Command Not ready SPI Ready cmd_err_cnt is a global variable
shreeshas95 1:a0055b3280c8 223 // return assrt_phy_on(cmd_err_cnt+1,spi_err_cnt,state_err_cnt);
shreeshas95 1:a0055b3280c8 224 // }
shreeshas95 1:a0055b3280c8 225 // }
shreeshas95 1:a0055b3280c8 226 //}
shreeshas95 1:a0055b3280c8 227
shreeshas95 1:a0055b3280c8 228
shreeshas95 1:a0055b3280c8 229 // bool assrt_phy_tx(int cmd_err_cnt,int spi_err_cnt,int state_err_cnt){
shreeshas95 1:a0055b3280c8 230 // status=check_status();
shreeshas95 1:a0055b3280c8 231 // if((status & 0x1F) == 0x14){
shreeshas95 1:a0055b3280c8 232 // return 0;
shreeshas95 1:a0055b3280c8 233 // }
shreeshas95 1:a0055b3280c8 234 // else if(cmd_err_cnt>THRS||spi_err_cnt>THRS){
shreeshas95 1:a0055b3280c8 235 // return 1;//You need to Reset the hardware
shreeshas95 1:a0055b3280c8 236 // }
shreeshas95 1:a0055b3280c8 237 // else if(state_err_cnt>STATE_ERR_THRS){
shreeshas95 1:a0055b3280c8 238 // return 1;//Again reset the hardware
shreeshas95 1:a0055b3280c8 239 // }
shreeshas95 1:a0055b3280c8 240 // else if((status&0xA0)==0xA0){ //If Status' first three bit ore 0b1X1 =>SPI ready, Dont care interrupt and CMD Ready.
shreeshas95 1:a0055b3280c8 241 // cs_adf=0;
shreeshas95 1:a0055b3280c8 242 // spi.write(0xB1); //CMD_PHY_OFF
shreeshas95 1:a0055b3280c8 243 // cs_adf=1;
shreeshas95 1:a0055b3280c8 244 // wait_us(PHY_TX_EXEC_TIME);// Typical = 24us We are giving 300us
shreeshas95 1:a0055b3280c8 245 // return assrt_phy_tx(cmd_err_cnt,spi_err_cnt,state_err_cnt+1);
shreeshas95 1:a0055b3280c8 246 // }
shreeshas95 1:a0055b3280c8 247 // else if(status&0x80==0x00){
shreeshas95 1:a0055b3280c8 248 // wait_ms(1);
shreeshas95 1:a0055b3280c8 249 // //Error: SPI=0 Not ready CMD= Dont care
shreeshas95 1:a0055b3280c8 250 // return assrt_phy_tx(cmd_err_cnt,spi_err_cnt+1,state_err_cnt);
shreeshas95 1:a0055b3280c8 251 // }
shreeshas95 1:a0055b3280c8 252 // else {
shreeshas95 1:a0055b3280c8 253 // if(status&0xA0==0x80){
shreeshas95 1:a0055b3280c8 254 // wait_us(50);
shreeshas95 1:a0055b3280c8 255 // //Error: Command Not ready SPI Ready cmd_err_cnt is a global variable
shreeshas95 1:a0055b3280c8 256 // return assrt_phy_tx(cmd_err_cnt+1,spi_err_cnt,state_err_cnt);
shreeshas95 1:a0055b3280c8 257 // }
shreeshas95 1:a0055b3280c8 258 // }
shreeshas95 1:a0055b3280c8 259 //}
shreeshas95 1:a0055b3280c8 260
shreeshas95 1:a0055b3280c8 261 bool hardware_reset(int bcn_call){
shreeshas95 1:a0055b3280c8 262 for(int i= 0; i < 20 ; i++){
shreeshas95 1:a0055b3280c8 263 gCS_ADF=0;
shreeshas95 1:a0055b3280c8 264 spi.write(CMD_HW_RESET);
shreeshas95 1:a0055b3280c8 265 gCS_ADF=1;
shreeshas95 1:a0055b3280c8 266 wait_ms(2);// Typically 1 ms
shreeshas95 1:a0055b3280c8 267 int count=0;
shreeshas95 1:a0055b3280c8 268 int temp_return = 0;
shreeshas95 1:a0055b3280c8 269 while(count<10 && miso_err_cnt<10){
shreeshas95 1:a0055b3280c8 270 if(MISO_PIN){
shreeshas95 1:a0055b3280c8 271 assrt_phy_off(temp_return);
shreeshas95 1:a0055b3280c8 272 if(!temp_return){
shreeshas95 1:a0055b3280c8 273 return 0;
shreeshas95 1:a0055b3280c8 274 }
shreeshas95 1:a0055b3280c8 275 count++;
shreeshas95 1:a0055b3280c8 276 }
shreeshas95 1:a0055b3280c8 277 else{
shreeshas95 1:a0055b3280c8 278 wait_us(50);
shreeshas95 1:a0055b3280c8 279 miso_err_cnt++;
shreeshas95 1:a0055b3280c8 280 }
shreeshas95 1:a0055b3280c8 281 }
shreeshas95 1:a0055b3280c8 282 }
shreeshas95 1:a0055b3280c8 283 return 1;
shreeshas95 1:a0055b3280c8 284 }
shreeshas95 1:a0055b3280c8 285
shreeshas95 1:a0055b3280c8 286 //bool hardware_reset(int bcn_call){
shreeshas95 1:a0055b3280c8 287 // if (bcn_call>20){//Worst Case 20seconds will be lost !
shreeshas95 1:a0055b3280c8 288 // return 1;
shreeshas95 1:a0055b3280c8 289 // }
shreeshas95 1:a0055b3280c8 290 // int count=0;
shreeshas95 1:a0055b3280c8 291 // cs_adf=0;
shreeshas95 1:a0055b3280c8 292 // spi.write(CMD_HW_RESET);
shreeshas95 1:a0055b3280c8 293 // cs_adf=1;
shreeshas95 1:a0055b3280c8 294 // wait_ms(2);// Typically 1 ms
shreeshas95 1:a0055b3280c8 295 // while(count<10 && miso_err_cnt<10){
shreeshas95 1:a0055b3280c8 296 // if(MISO_PIN){
shreeshas95 1:a0055b3280c8 297 // int temp_return;
shreeshas95 1:a0055b3280c8 298 // assrt_phy_off(0,0,0,temp_return);
shreeshas95 1:a0055b3280c8 299 // if(!temp_return){
shreeshas95 1:a0055b3280c8 300 // break;
shreeshas95 1:a0055b3280c8 301 // }
shreeshas95 1:a0055b3280c8 302 // count++;
shreeshas95 1:a0055b3280c8 303 // }
shreeshas95 1:a0055b3280c8 304 // else{
shreeshas95 1:a0055b3280c8 305 // wait_us(50);
shreeshas95 1:a0055b3280c8 306 // miso_err_cnt++;
shreeshas95 1:a0055b3280c8 307 // }
shreeshas95 1:a0055b3280c8 308 // }
shreeshas95 1:a0055b3280c8 309 // if(count==10 ||miso_err_cnt==10){
shreeshas95 1:a0055b3280c8 310 // return hardware_reset(bcn_call+1);
shreeshas95 1:a0055b3280c8 311 // }
shreeshas95 1:a0055b3280c8 312 // else
shreeshas95 1:a0055b3280c8 313 // return 0;
shreeshas95 1:a0055b3280c8 314 //
shreeshas95 1:a0055b3280c8 315 //}
shreeshas95 1:a0055b3280c8 316
shreeshas95 1:a0055b3280c8 317
shreeshas95 1:a0055b3280c8 318
shreeshas95 1:a0055b3280c8 319
shreeshas95 1:a0055b3280c8 320 //void initial_adf_check(){
shreeshas95 1:a0055b3280c8 321 // spi.write(CMD_PHY_OFF); //0xB0
shreeshas95 1:a0055b3280c8 322 // while(hw_reset_err_cnt<2){
shreeshas95 1:a0055b3280c8 323 //
shreeshas95 1:a0055b3280c8 324 // if(!assrt_phy_off(0,0,0)){ //assrt_phy_off () returns 0 if state is PHY_OFF , returns 1 if couldn't go to PHY_OFF
shreeshas95 1:a0055b3280c8 325 // bbram_write();
shreeshas95 1:a0055b3280c8 326 // bbram_flag=1;
shreeshas95 1:a0055b3280c8 327 // break;
shreeshas95 1:a0055b3280c8 328 // }
shreeshas95 1:a0055b3280c8 329 // else{
shreeshas95 1:a0055b3280c8 330 // hardware_reset(0); // Asserts Hardware for 20sec(20times). PHY_OFF for 20,000 times
shreeshas95 1:a0055b3280c8 331 // hw_reset_err_cnt++;
shreeshas95 1:a0055b3280c8 332 // }
shreeshas95 1:a0055b3280c8 333 // }
shreeshas95 1:a0055b3280c8 334 // assrt_phy_off(0,0,0);// We actually do not need this but make sure "we do not need this"
shreeshas95 1:a0055b3280c8 335 // if(!bbram_flag){
shreeshas95 1:a0055b3280c8 336 // //Switch to beacon
shreeshas95 1:a0055b3280c8 337 // bcn_flag=1;
shreeshas95 1:a0055b3280c8 338 // }
shreeshas95 1:a0055b3280c8 339 //}
shreeshas95 1:a0055b3280c8 340
shreeshas95 1:a0055b3280c8 341 //for reseting the transmission call assert function after b5 and b1. after b1 assert_phi_on and after b5 assert_phi_tx.
shreeshas95 1:a0055b3280c8 342 //----------------------------------------------------------------------------
shreeshas95 1:a0055b3280c8 343
shreeshas95 1:a0055b3280c8 344 # define initiate {\
shreeshas95 1:a0055b3280c8 345 SPI_mutex.lock();\
shreeshas95 1:a0055b3280c8 346 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 347 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 348 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 349 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 350 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 351 spi.write(0x08);\
shreeshas95 1:a0055b3280c8 352 spi.write(0x14);\
shreeshas95 1:a0055b3280c8 353 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 354 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 355 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 356 spi.write(0x08);\
shreeshas95 1:a0055b3280c8 357 spi.write(0x15);\
shreeshas95 1:a0055b3280c8 358 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 359 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 360 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 361 spi.write(0x09);\
shreeshas95 1:a0055b3280c8 362 spi.write(0x24);\
shreeshas95 1:a0055b3280c8 363 spi.write(0x20);\
shreeshas95 1:a0055b3280c8 364 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 365 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 366 spi.write(0x09);\
shreeshas95 1:a0055b3280c8 367 spi.write(0x37);\
shreeshas95 1:a0055b3280c8 368 spi.write(0xE0);\
shreeshas95 1:a0055b3280c8 369 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 370 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 371 spi.write(0x09);\
shreeshas95 1:a0055b3280c8 372 spi.write(0x36);\
shreeshas95 1:a0055b3280c8 373 spi.write(0x70);\
shreeshas95 1:a0055b3280c8 374 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 375 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 376 spi.write(0x09);\
shreeshas95 1:a0055b3280c8 377 spi.write(0x39);\
shreeshas95 1:a0055b3280c8 378 spi.write(0x10);\
shreeshas95 1:a0055b3280c8 379 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 380 SPI_mutex.unlock();\
shreeshas95 1:a0055b3280c8 381 }
shreeshas95 1:a0055b3280c8 382
shreeshas95 1:a0055b3280c8 383
shreeshas95 1:a0055b3280c8 384 #define write_data {\
shreeshas95 1:a0055b3280c8 385 SPI_mutex.lock();\
shreeshas95 1:a0055b3280c8 386 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 387 spi.write(0x0B);\
shreeshas95 1:a0055b3280c8 388 spi.write(0x36);\
shreeshas95 1:a0055b3280c8 389 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 390 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 391 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 392 if(buffer_state){\
shreeshas95 1:a0055b3280c8 393 spi.write(0x18);\
shreeshas95 1:a0055b3280c8 394 spi.write(0x20);\
shreeshas95 1:a0055b3280c8 395 for(unsigned char i=0; i<112;i++){\
shreeshas95 1:a0055b3280c8 396 spi.write(buffer_112[i]);\
shreeshas95 1:a0055b3280c8 397 }\
shreeshas95 1:a0055b3280c8 398 }\
shreeshas95 1:a0055b3280c8 399 else{\
shreeshas95 1:a0055b3280c8 400 spi.write(0x18);\
shreeshas95 1:a0055b3280c8 401 spi.write(0x90);\
shreeshas95 1:a0055b3280c8 402 for(unsigned char i=0; i<112;i++){\
shreeshas95 1:a0055b3280c8 403 spi.write(buffer_112[i]);\
shreeshas95 1:a0055b3280c8 404 }\
shreeshas95 1:a0055b3280c8 405 }\
shreeshas95 1:a0055b3280c8 406 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 407 SPI_mutex.unlock();\
shreeshas95 1:a0055b3280c8 408 buffer_state = !buffer_state;\
shreeshas95 1:a0055b3280c8 409 if(last_buffer){\
shreeshas95 1:a0055b3280c8 410 ADF_off = true;\
shreeshas95 1:a0055b3280c8 411 gPC.puts("adf_off\r\n");\
shreeshas95 1:a0055b3280c8 412 }\
shreeshas95 1:a0055b3280c8 413 }
shreeshas95 1:a0055b3280c8 414
shreeshas95 1:a0055b3280c8 415
shreeshas95 1:a0055b3280c8 416 void check(){
shreeshas95 1:a0055b3280c8 417 if(IRQ){
shreeshas95 1:a0055b3280c8 418 gCOM_MNG_TMTC_THREAD->signal_set(signal);
shreeshas95 1:a0055b3280c8 419 }
shreeshas95 1:a0055b3280c8 420 }
shreeshas95 1:a0055b3280c8 421
shreeshas95 1:a0055b3280c8 422
shreeshas95 1:a0055b3280c8 423 #define send_data {\
shreeshas95 1:a0055b3280c8 424 SPI_mutex.lock();\
shreeshas95 1:a0055b3280c8 425 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 426 spi.write(0xBB);\
shreeshas95 1:a0055b3280c8 427 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 428 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 429 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 430 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 431 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 432 SPI_mutex.unlock();\
shreeshas95 1:a0055b3280c8 433 if(sent_tmfrom_SDcard){\
shreeshas95 1:a0055b3280c8 434 send_tm_from_SD_card();\
shreeshas95 1:a0055b3280c8 435 }else{\
shreeshas95 1:a0055b3280c8 436 snd_tm.transmit_data(buffer_112,&last_buffer);\
shreeshas95 1:a0055b3280c8 437 }\
shreeshas95 1:a0055b3280c8 438 write_data;\
shreeshas95 1:a0055b3280c8 439 if(sent_tmfrom_SDcard){\
shreeshas95 1:a0055b3280c8 440 send_tm_from_SD_card();\
shreeshas95 1:a0055b3280c8 441 }else{\
shreeshas95 1:a0055b3280c8 442 snd_tm.transmit_data(buffer_112,&last_buffer);\
shreeshas95 1:a0055b3280c8 443 }\
shreeshas95 1:a0055b3280c8 444 write_data;\
shreeshas95 1:a0055b3280c8 445 if(sent_tmfrom_SDcard){\
shreeshas95 1:a0055b3280c8 446 send_tm_from_SD_card();\
shreeshas95 1:a0055b3280c8 447 }else{\
shreeshas95 1:a0055b3280c8 448 snd_tm.transmit_data(buffer_112,&last_buffer);\
shreeshas95 1:a0055b3280c8 449 }\
shreeshas95 1:a0055b3280c8 450 SPI_mutex.lock();\
shreeshas95 1:a0055b3280c8 451 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 452 spi.write(0xB1);\
shreeshas95 1:a0055b3280c8 453 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 454 wait_us(300);\
shreeshas95 1:a0055b3280c8 455 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 456 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 457 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 458 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 459 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 460 spi.write(0xB5);\
shreeshas95 1:a0055b3280c8 461 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 462 wait_us(300);\
shreeshas95 1:a0055b3280c8 463 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 464 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 465 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 466 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 467 SPI_mutex.unlock();\
shreeshas95 1:a0055b3280c8 468 ticker.attach_us(&check,32000);\
shreeshas95 1:a0055b3280c8 469 }
shreeshas95 1:a0055b3280c8 470
shreeshas95 1:a0055b3280c8 471
shreeshas95 1:a0055b3280c8 472
shreeshas95 1:a0055b3280c8 473 #define adf_SND_SDCard {\
shreeshas95 1:a0055b3280c8 474 buffer_state = true;\
shreeshas95 1:a0055b3280c8 475 last_buffer = false;\
shreeshas95 1:a0055b3280c8 476 loop_on = true;\
shreeshas95 1:a0055b3280c8 477 ADF_off = false;\
shreeshas95 1:a0055b3280c8 478 sent_tmfrom_SDcard = true;\
shreeshas95 1:a0055b3280c8 479 signal = COM_MNG_TMTC_SIGNAL_ADF_SD;\
shreeshas95 1:a0055b3280c8 480 start_block_num = starting_add;\
shreeshas95 1:a0055b3280c8 481 end_block_num = ending_add;\
shreeshas95 1:a0055b3280c8 482 initial_adf_check;\
shreeshas95 1:a0055b3280c8 483 initiate;\
shreeshas95 1:a0055b3280c8 484 send_data;\
shreeshas95 1:a0055b3280c8 485 while(loop_on){\
shreeshas95 2:2caf2a9a13aa 486 /*led2=!led2;*/\
shreeshas95 3:6c81fc8834e2 487 gCOM_MNG_TMTC_THREAD->signal_wait(COM_MNG_TMTC_SIGNAL_ADF_SD);\
shreeshas95 1:a0055b3280c8 488 if(ADF_off){\
shreeshas95 1:a0055b3280c8 489 SPI_mutex.lock();\
shreeshas95 1:a0055b3280c8 490 ticker.detach();\
shreeshas95 1:a0055b3280c8 491 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 492 spi.write(0xB1);\
shreeshas95 1:a0055b3280c8 493 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 494 SPI_mutex.unlock();\
shreeshas95 1:a0055b3280c8 495 gPC.puts("transmission done\r\n");\
shreeshas95 1:a0055b3280c8 496 loop_on = false;\
shreeshas95 1:a0055b3280c8 497 }else{\
shreeshas95 1:a0055b3280c8 498 write_data;\
shreeshas95 1:a0055b3280c8 499 if(!last_buffer)\
shreeshas95 1:a0055b3280c8 500 send_tm_from_SD_card();\
shreeshas95 1:a0055b3280c8 501 }\
shreeshas95 1:a0055b3280c8 502 }\
shreeshas95 1:a0055b3280c8 503 }
shreeshas95 1:a0055b3280c8 504
shreeshas95 1:a0055b3280c8 505 void read_TC(Base_tc* TC_ptr){
shreeshas95 1:a0055b3280c8 506 gPC.puts("Inside sd card sending\r\n");
shreeshas95 1:a0055b3280c8 507 unsigned char service_subtype = 0;
shreeshas95 1:a0055b3280c8 508 uint64_t starting_add = 0, ending_add = 0;
shreeshas95 1:a0055b3280c8 509 service_subtype = (TC_ptr->TC_string[2])&0x0f;
shreeshas95 1:a0055b3280c8 510 starting_add = (TC_ptr->TC_string[5]) + ( (TC_ptr->TC_string[4])<<8 ) + ( (TC_ptr->TC_string[3]) <<16);
shreeshas95 1:a0055b3280c8 511 ending_add = (TC_ptr->TC_string[8]) + ( (TC_ptr->TC_string[7])<<8 ) + ( (TC_ptr->TC_string[6]) <<16);
shreeshas95 1:a0055b3280c8 512 starting_add = 10; // for now
shreeshas95 1:a0055b3280c8 513 ending_add = 20;
shreeshas95 1:a0055b3280c8 514 // adf_SND_SDCard(starting_add , ending_add);
shreeshas95 1:a0055b3280c8 515 gPC.puts("sending from sd card\r\n");
shreeshas95 1:a0055b3280c8 516 adf_SND_SDCard;
shreeshas95 1:a0055b3280c8 517 }
shreeshas95 2:2caf2a9a13aa 518
shreeshas95 2:2caf2a9a13aa 519 //Timeout ADF_non_responsive_timeout;
shreeshas95 2:2caf2a9a13aa 520 //bool ADF_non_responsive_flag = false;
shreeshas95 2:2caf2a9a13aa 521 //
shreeshas95 2:2caf2a9a13aa 522 //void ADF_non_responsive_fun(){
shreeshas95 2:2caf2a9a13aa 523 // ADF_non_responsive_flag = true;
shreeshas95 2:2caf2a9a13aa 524 // gCOM_MNG_TMTC_THREAD->signal_set(signal);
shreeshas95 2:2caf2a9a13aa 525 //}
shreeshas95 1:a0055b3280c8 526
shreeshas95 1:a0055b3280c8 527 void adf_not_SDcard(){
shreeshas95 1:a0055b3280c8 528 buffer_state = true;
shreeshas95 1:a0055b3280c8 529 last_buffer = false;
shreeshas95 1:a0055b3280c8 530 loop_on = true;
shreeshas95 1:a0055b3280c8 531 ADF_off = false;
shreeshas95 1:a0055b3280c8 532 sent_tmfrom_SDcard = false;
shreeshas95 1:a0055b3280c8 533
shreeshas95 1:a0055b3280c8 534 signal = COM_MNG_TMTC_SIGNAL_ADF_NSD;
shreeshas95 1:a0055b3280c8 535 initial_adf_check;
shreeshas95 1:a0055b3280c8 536 initiate;
shreeshas95 1:a0055b3280c8 537 send_data;
shreeshas95 2:2caf2a9a13aa 538
shreeshas95 2:2caf2a9a13aa 539 // gPC.puts("Inside adf transmission\r\n");
shreeshas95 2:2caf2a9a13aa 540 // ADF_non_responsive_timeout.attach(&ADF_non_responsive_fun, 10);
shreeshas95 1:a0055b3280c8 541
shreeshas95 1:a0055b3280c8 542 while(loop_on){
shreeshas95 3:6c81fc8834e2 543 gCOM_MNG_TMTC_THREAD->signal_wait(COM_MNG_TMTC_SIGNAL_ADF_NSD);
shreeshas95 2:2caf2a9a13aa 544 // if( ADF_non_responsive_flag == false ){
shreeshas95 2:2caf2a9a13aa 545 if(ADF_off){
shreeshas95 2:2caf2a9a13aa 546 SPI_mutex.lock();
shreeshas95 2:2caf2a9a13aa 547 ticker.detach();
shreeshas95 2:2caf2a9a13aa 548 // wait_ms(35);
shreeshas95 2:2caf2a9a13aa 549 gCS_ADF=0;
shreeshas95 2:2caf2a9a13aa 550 spi.write(0xB1);
shreeshas95 2:2caf2a9a13aa 551 gCS_ADF=1;
shreeshas95 2:2caf2a9a13aa 552 SPI_mutex.unlock();
shreeshas95 2:2caf2a9a13aa 553 loop_on = false;
shreeshas95 2:2caf2a9a13aa 554 }else{
shreeshas95 2:2caf2a9a13aa 555 write_data;
shreeshas95 2:2caf2a9a13aa 556 snd_tm.transmit_data(buffer_112,&last_buffer);
shreeshas95 2:2caf2a9a13aa 557 }
shreeshas95 2:2caf2a9a13aa 558 // }
shreeshas95 2:2caf2a9a13aa 559 // else{
shreeshas95 2:2caf2a9a13aa 560 // gPC.puts("ADF non responsive\r\n");
shreeshas95 2:2caf2a9a13aa 561 // break;
shreeshas95 2:2caf2a9a13aa 562 // }
shreeshas95 1:a0055b3280c8 563 }
shreeshas95 1:a0055b3280c8 564 }
shreeshas95 1:a0055b3280c8 565