pradeep shekhar
/
14-8-15_beacon_testing
Repo for beacon testing
Diff: main.cpp
- Revision:
- 3:b2acafb06072
- Parent:
- 2:298924eb2b41
- Child:
- 4:b51ca6ee9136
--- a/main.cpp Sat Aug 15 14:12:27 2015 +0000 +++ b/main.cpp Sat Aug 15 17:04:45 2015 +0000 @@ -131,14 +131,14 @@ writereg(RF22_REG_69_AGC_OVERRIDE1,0x60); //check...//also depends on 0x70[5] - writereg(RF22_REG_6E_TX_DATA_RATE1,0x09);//TX at 0.123kbps=:6E=0x01; 6F=0x02 - writereg(RF22_REG_6F_TX_DATA_RATE0,0xd5);//TX at 1.2kbps: 6E=0x09; 6F=0xd5 //Formula: tx_datarate*(2^21)/10^6 + writereg(RF22_REG_6E_TX_DATA_RATE1,0x01);//TX at 0.123kbps=:6E=0x01; 6F=0x02 + writereg(RF22_REG_6F_TX_DATA_RATE0,0x06);//TX at 1.2kbps: 6E=0x09; 6F=0xd5 //Formula: tx_datarate*(2^21)/10^6 // writereg(RF22_REG_70_MODULATION_CONTROL1,0x2c); writereg(RF22_REG_71_MODULATION_CONTROL2,0x21);//ook = 0x21 //fsk = 0x22 - //writereg(RF22_REG_72_FREQUENCY_DEVIATION,0x50); + writereg(RF22_REG_72_FREQUENCY_DEVIATION,0x50); //required for OOK??? //set tx power @@ -146,7 +146,7 @@ //why 0x06?? 0x07 is for max//is the previous bits required? //writereg(RF22_REG_6D_TX_POWER,0x00); //-1dbm - //writereg(RF22_REG_3E_PACKET_LENGTH,TX_DATA); //packet length + writereg(RF22_REG_3E_PACKET_LENGTH,TX_DATA); //packet length //packet length not required } @@ -238,8 +238,9 @@ writereg(RF22_REG_07_OPERATING_MODE1,0x09); //Check for fifoempty Thresh - while((readreg(RF22_REG_03_INTERRUPT_STATUS1) & 0x20) != 0x20); + //while((readreg(RF22_REG_03_INTERRUPT_STATUS1) & 0x20) != 0x20); + u = 0; while(u!=TX_DATA) { if((TX_DATA - u) >= TIMES) bar = TIMES; @@ -254,8 +255,8 @@ //spi.write(data[i]); spi.write(0xAA) ; - //pc.printf("0x%X 0x%X \r\n",data[i],u); - } + pc.printf("%d\n",u); + } //u = u + i; cs = 1; //Check for fifoThresh