mbed library sources

Dependents:   frdm_kl05z_gpio_test

Fork of mbed-src by mbed official

Revision:
227:7bd0639b8911
Parent:
64:7b352733b00a
Child:
250:a49055e7a707
diff -r b062af740e40 -r 7bd0639b8911 targets/hal/TARGET_NXP/TARGET_LPC81X/serial_api.c
--- a/targets/hal/TARGET_NXP/TARGET_LPC81X/serial_api.c	Wed Jun 11 09:45:09 2014 +0100
+++ b/targets/hal/TARGET_NXP/TARGET_LPC81X/serial_api.c	Wed Jun 11 16:00:09 2014 +0100
@@ -14,6 +14,7 @@
  * limitations under the License.
  */
 // math.h required for floating point operations for baud rate calculation
+#include "mbed_assert.h"
 #include <math.h>
 #include <string.h>
 
@@ -180,15 +181,10 @@
 
 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
     // 0: 1 stop bits, 1: 2 stop bits
-    if (stop_bits != 1 && stop_bits != 2) {
-        error("Invalid stop bits specified");
-    }
+    MBED_ASSERT((stop_bits == 1) || (stop_bits == 2));
+    MBED_ASSERT((data_bits > 6) && (data_bits < 10)); // 0: 7 data bits ... 2: 9 data bits
+    MBED_ASSERT((parity == ParityNone) || (parity == ParityEven) || (parity == ParityOdd));
     stop_bits -= 1;
-    
-    // 0: 7 data bits ... 2: 9 data bits
-    if (data_bits < 7 || data_bits > 9) {
-        error("Invalid number of bits (%d) in serial format, should be 7..9", data_bits);
-    }
     data_bits -= 7;
     
     int paritysel;
@@ -197,8 +193,7 @@
         case ParityEven: paritysel = 2; break;
         case ParityOdd : paritysel = 3; break;
         default:
-            error("Invalid serial parity setting");
-            return;
+            break;
     }
     
     obj->uart->CFG = (data_bits << 2)
@@ -296,7 +291,7 @@
     uint32_t regVal_rts, regVal_cts;
     
     swm_rts = &SWM_UART_RTS[obj->index];
-    swm_cts = &SWM_UART_CTS[obj->index];    
+    swm_cts = &SWM_UART_CTS[obj->index];
     regVal_rts = LPC_SWM->PINASSIGN[swm_rts->n] & ~(0xFF << swm_rts->offset);
     regVal_cts = LPC_SWM->PINASSIGN[swm_cts->n] & ~(0xFF << swm_cts->offset);
     
@@ -310,15 +305,15 @@
         LPC_SWM->PINASSIGN[swm_rts->n] = regVal_rts | (rxflow << swm_rts->offset);
         if (FlowControlRTS == type) {
             LPC_SWM->PINASSIGN[swm_cts->n] = regVal_cts | (0xFF << swm_cts->offset);
-            obj->uart->CFG &= ~CTSEN;           
+            obj->uart->CFG &= ~CTSEN;
         }
     }
     if ((FlowControlCTS == type || FlowControlRTSCTS == type) && (txflow != NC)) {
         LPC_SWM->PINASSIGN[swm_cts->n] = regVal_cts | (txflow << swm_cts->offset);
         obj->uart->CFG |= CTSEN;
         if (FlowControlCTS == type) {
-            LPC_SWM->PINASSIGN[swm_rts->n] = regVal_rts | (0xFF << swm_rts->offset);        
+            LPC_SWM->PINASSIGN[swm_rts->n] = regVal_rts | (0xFF << swm_rts->offset);
         }
-    }    
+    }
 }