Diff: targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/gpio_irq_api.c

Revision:

35:371630885ad6

Parent:

30:91c1d09ada54

Child:

93:80910ff1aebe

diff -r a3c7023e45de -r 371630885ad6 targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/gpio_irq_api.c
--- a/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/gpio_irq_api.c	Fri Oct 11 13:30:08 2013 +0100
+++ b/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/gpio_irq_api.c	Mon Oct 21 11:45:04 2013 +0100
@@ -174,3 +174,43 @@
     }
 
 }
+
+void gpio_irq_enable(gpio_irq_t *obj) {
+    uint32_t port_num = ((obj->pin & 0xF000) >> PORT_SHIFT);
+    switch (port_num) {
+        case 0:
+            NVIC_EnableIRQ(EINT0_IRQn);
+            break;
+        case 1:
+            NVIC_EnableIRQ(EINT1_IRQn);
+            break;
+        case 2:
+            NVIC_EnableIRQ(EINT2_IRQn);
+            break;
+        case 3:
+            NVIC_EnableIRQ(EINT3_IRQn);
+            break;
+        default:
+            break;
+    }
+}
+
+void gpio_irq_disable(gpio_irq_t *obj) {
+    uint32_t port_num = ((obj->pin & 0xF000) >> PORT_SHIFT);
+    switch (port_num) {
+        case 0:
+            NVIC_DisableIRQ(EINT0_IRQn);
+            break;
+        case 1:
+            NVIC_DisableIRQ(EINT1_IRQn);
+            break;
+        case 2:
+            NVIC_DisableIRQ(EINT2_IRQn);
+            break;
+        case 3:
+            NVIC_DisableIRQ(EINT3_IRQn);
+            break;
+        default:
+            break;
+    }
+}