shao ziyang / mbed-src-kl05

mbed library sources

Dependents:   frdm_kl05z_gpio_test

Fork of mbed-src by mbed official

targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/pwmout_api.c@167:d5744491c362, 2014-04-23 (annotated)

Committer:
mbed_official
Date:
Wed Apr 23 11:00:08 2014 +0100
Revision:
167:d5744491c362
Parent:
84:f54042cbc282
Child:
174:8bb9f3a33240
Synchronized with git revision 6cf73e2e267b625c71cbf586a1d74e7e4972a369



Full URL: https://github.com/mbedmicro/mbed/commit/6cf73e2e267b625c71cbf586a1d74e7e4972a369/



[NUCLEO_F030R8/F302R8] Move back SetSysClock() call in SystemInit()

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 52:a51c77007319 1 /* mbed Microcontroller Library
mbed_official 70:c1fbde68b492 2 *******************************************************************************
mbed_official 70:c1fbde68b492 3 * Copyright (c) 2014, STMicroelectronics
mbed_official 70:c1fbde68b492 4 * All rights reserved.
mbed_official 52:a51c77007319 5 *
mbed_official 70:c1fbde68b492 6 * Redistribution and use in source and binary forms, with or without
mbed_official 70:c1fbde68b492 7 * modification, are permitted provided that the following conditions are met:
mbed_official 52:a51c77007319 8 *
mbed_official 70:c1fbde68b492 9 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 70:c1fbde68b492 10 * this list of conditions and the following disclaimer.
mbed_official 70:c1fbde68b492 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 70:c1fbde68b492 12 * this list of conditions and the following disclaimer in the documentation
mbed_official 70:c1fbde68b492 13 * and/or other materials provided with the distribution.
mbed_official 70:c1fbde68b492 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 70:c1fbde68b492 15 * may be used to endorse or promote products derived from this software
mbed_official 70:c1fbde68b492 16 * without specific prior written permission.
mbed_official 52:a51c77007319 17 *
mbed_official 70:c1fbde68b492 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 70:c1fbde68b492 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 70:c1fbde68b492 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 70:c1fbde68b492 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 70:c1fbde68b492 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 70:c1fbde68b492 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 70:c1fbde68b492 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 70:c1fbde68b492 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 70:c1fbde68b492 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 70:c1fbde68b492 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 70:c1fbde68b492 28 *******************************************************************************
mbed_official 52:a51c77007319 29 */
mbed_official 52:a51c77007319 30 #include "pwmout_api.h"
mbed_official 52:a51c77007319 31
mbed_official 52:a51c77007319 32 #include "cmsis.h"
mbed_official 52:a51c77007319 33 #include "pinmap.h"
mbed_official 52:a51c77007319 34 #include "error.h"
mbed_official 52:a51c77007319 35
mbed_official 167:d5744491c362 36 // TIM4 cannot be used because already used by the us_ticker
mbed_official 52:a51c77007319 37 static const PinMap PinMap_PWM[] = {
mbed_official 167:d5744491c362 38 {PA_1, PWM_2, STM_PIN_DATA(GPIO_Mode_AF_PP, 0)}, // TIM2_CH2 - Default
mbed_official 167:d5744491c362 39 {PA_2, PWM_2, STM_PIN_DATA(GPIO_Mode_AF_PP, 0)}, // TIM2_CH3 - Default (warning: not connected on D1 per default)
mbed_official 167:d5744491c362 40 {PA_3, PWM_2, STM_PIN_DATA(GPIO_Mode_AF_PP, 0)}, // TIM2_CH4 - Default (warning: not connected on D0 per default)
mbed_official 167:d5744491c362 41 {PA_6, PWM_3, STM_PIN_DATA(GPIO_Mode_AF_PP, 0)}, // TIM3_CH1 - Default
mbed_official 167:d5744491c362 42 {PA_7, PWM_3, STM_PIN_DATA(GPIO_Mode_AF_PP, 0)}, // TIM3_CH2 - Default
mbed_official 167:d5744491c362 43 //{PA_7, PWM_1, STM_PIN_DATA(GPIO_Mode_AF_PP, 6)}, // TIM1_CH1N - GPIO_PartialRemap_TIM1
mbed_official 167:d5744491c362 44 {PA_8, PWM_1, STM_PIN_DATA(GPIO_Mode_AF_PP, 0)}, // TIM1_CH1 - Default
mbed_official 167:d5744491c362 45 {PA_9, PWM_1, STM_PIN_DATA(GPIO_Mode_AF_PP, 0)}, // TIM1_CH2 - Default
mbed_official 167:d5744491c362 46 {PA_10, PWM_1, STM_PIN_DATA(GPIO_Mode_AF_PP, 0)}, // TIM1_CH3 - Default
mbed_official 167:d5744491c362 47 {PA_11, PWM_1, STM_PIN_DATA(GPIO_Mode_AF_PP, 0)}, // TIM1_CH4 - Default
mbed_official 167:d5744491c362 48 {PA_15, PWM_2, STM_PIN_DATA(GPIO_Mode_AF_PP, 8)}, // TIM2_CH1_ETR - GPIO_FullRemap_TIM2
mbed_official 167:d5744491c362 49
mbed_official 167:d5744491c362 50 {PB_0, PWM_3, STM_PIN_DATA(GPIO_Mode_AF_PP, 0)}, // TIM3_CH3 - Default
mbed_official 167:d5744491c362 51 //{PB_0, PWM_1, STM_PIN_DATA(GPIO_Mode_AF_PP, 6)}, // TIM1_CH2N - GPIO_PartialRemap_TIM1
mbed_official 167:d5744491c362 52 {PB_1, PWM_3, STM_PIN_DATA(GPIO_Mode_AF_PP, 0)}, // TIM3_CH4 - Default
mbed_official 167:d5744491c362 53 //{PB_1, PWM_1, STM_PIN_DATA(GPIO_Mode_AF_PP, 6)}, // TIM1_CH3N - GPIO_PartialRemap_TIM1
mbed_official 167:d5744491c362 54 {PB_3, PWM_2, STM_PIN_DATA(GPIO_Mode_AF_PP, 8)}, // TIM2_CH2 - GPIO_FullRemap_TIM2
mbed_official 167:d5744491c362 55 {PB_4, PWM_3, STM_PIN_DATA(GPIO_Mode_AF_PP, 7)}, // TIM3_CH1 - GPIO_PartialRemap_TIM3
mbed_official 167:d5744491c362 56 {PB_5, PWM_3, STM_PIN_DATA(GPIO_Mode_AF_PP, 7)}, // TIM3_CH2 - GPIO_PartialRemap_TIM3
mbed_official 167:d5744491c362 57 //{PB_6, PWM_4, STM_PIN_DATA(GPIO_Mode_AF_PP, 0)}, // TIM4_CH1 - Default (used by ticker)
mbed_official 167:d5744491c362 58 //{PB_7, PWM_4, STM_PIN_DATA(GPIO_Mode_AF_PP, 0)}, // TIM4_CH2 - Default (used by ticker)
mbed_official 167:d5744491c362 59 //{PB_8, PWM_4, STM_PIN_DATA(GPIO_Mode_AF_PP, 0)}, // TIM4_CH3 - Default (used by ticker)
mbed_official 167:d5744491c362 60 //{PB_9, PWM_4, STM_PIN_DATA(GPIO_Mode_AF_PP, 0)}, // TIM4_CH4 - Default (used by ticker)
mbed_official 167:d5744491c362 61 {PB_10, PWM_2, STM_PIN_DATA(GPIO_Mode_AF_PP, 8)}, // TIM2_CH3 - GPIO_FullRemap_TIM2
mbed_official 167:d5744491c362 62 {PB_11, PWM_2, STM_PIN_DATA(GPIO_Mode_AF_PP, 8)}, // TIM2_CH4 - GPIO_FullRemap_TIM2
mbed_official 167:d5744491c362 63 {PB_13, PWM_1, STM_PIN_DATA(GPIO_Mode_AF_PP, 0)}, // TIM1_CH1N - Default
mbed_official 167:d5744491c362 64 {PB_14, PWM_1, STM_PIN_DATA(GPIO_Mode_AF_PP, 0)}, // TIM1_CH2N - Default
mbed_official 167:d5744491c362 65 {PB_15, PWM_1, STM_PIN_DATA(GPIO_Mode_AF_PP, 0)}, // TIM1_CH3N - Default
mbed_official 167:d5744491c362 66
mbed_official 167:d5744491c362 67 {PC_6, PWM_3, STM_PIN_DATA(GPIO_Mode_AF_PP, 9)}, // TIM3_CH1 - GPIO_FullRemap_TIM3
mbed_official 167:d5744491c362 68 {PC_7, PWM_3, STM_PIN_DATA(GPIO_Mode_AF_PP, 9)}, // TIM3_CH2 - GPIO_FullRemap_TIM3
mbed_official 167:d5744491c362 69 {PC_8, PWM_3, STM_PIN_DATA(GPIO_Mode_AF_PP, 9)}, // TIM3_CH3 - GPIO_FullRemap_TIM3
mbed_official 167:d5744491c362 70 {PC_9, PWM_3, STM_PIN_DATA(GPIO_Mode_AF_PP, 9)}, // TIM3_CH4 - GPIO_FullRemap_TIM3
mbed_official 52:a51c77007319 71 {NC, NC, 0}
mbed_official 52:a51c77007319 72 };
mbed_official 52:a51c77007319 73
mbed_official 52:a51c77007319 74 void pwmout_init(pwmout_t* obj, PinName pin) {
mbed_official 52:a51c77007319 75 // Get the peripheral name from the pin and assign it to the object
mbed_official 52:a51c77007319 76 obj->pwm = (PWMName)pinmap_peripheral(pin, PinMap_PWM);
mbed_official 52:a51c77007319 77
mbed_official 52:a51c77007319 78 if (obj->pwm == (PWMName)NC) {
mbed_official 52:a51c77007319 79 error("PWM pinout mapping failed");
mbed_official 52:a51c77007319 80 }
mbed_official 52:a51c77007319 81
mbed_official 52:a51c77007319 82 // Enable TIM clock
mbed_official 167:d5744491c362 83 if (obj->pwm == PWM_1) RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE);
mbed_official 52:a51c77007319 84 if (obj->pwm == PWM_2) RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
mbed_official 52:a51c77007319 85 if (obj->pwm == PWM_3) RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE);
mbed_official 84:f54042cbc282 86 if (obj->pwm == PWM_4) RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE);
mbed_official 84:f54042cbc282 87
mbed_official 52:a51c77007319 88 // Configure GPIO
mbed_official 52:a51c77007319 89 pinmap_pinout(pin, PinMap_PWM);
mbed_official 52:a51c77007319 90
mbed_official 52:a51c77007319 91 obj->pin = pin;
mbed_official 52:a51c77007319 92 obj->period = 0;
mbed_official 52:a51c77007319 93 obj->pulse = 0;
mbed_official 52:a51c77007319 94
mbed_official 52:a51c77007319 95 pwmout_period_us(obj, 20000); // 20 ms per default
mbed_official 52:a51c77007319 96 }
mbed_official 52:a51c77007319 97
mbed_official 52:a51c77007319 98 void pwmout_free(pwmout_t* obj) {
mbed_official 52:a51c77007319 99 TIM_TypeDef *tim = (TIM_TypeDef *)(obj->pwm);
mbed_official 52:a51c77007319 100 TIM_DeInit(tim);
mbed_official 52:a51c77007319 101 }
mbed_official 52:a51c77007319 102
mbed_official 52:a51c77007319 103 void pwmout_write(pwmout_t* obj, float value) {
mbed_official 52:a51c77007319 104 TIM_TypeDef *tim = (TIM_TypeDef *)(obj->pwm);
mbed_official 52:a51c77007319 105 TIM_OCInitTypeDef TIM_OCInitStructure;
mbed_official 52:a51c77007319 106
mbed_official 52:a51c77007319 107 if (value < 0.0) {
mbed_official 52:a51c77007319 108 value = 0.0;
mbed_official 52:a51c77007319 109 } else if (value > 1.0) {
mbed_official 52:a51c77007319 110 value = 1.0;
mbed_official 52:a51c77007319 111 }
mbed_official 84:f54042cbc282 112
mbed_official 52:a51c77007319 113 obj->pulse = (uint32_t)((float)obj->period * value);
mbed_official 52:a51c77007319 114
mbed_official 167:d5744491c362 115 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
mbed_official 167:d5744491c362 116 TIM_OCInitStructure.TIM_Pulse = obj->pulse;
mbed_official 167:d5744491c362 117 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
mbed_official 167:d5744491c362 118 TIM_OCInitStructure.TIM_OCNPolarity = TIM_OCNPolarity_High;
mbed_official 167:d5744491c362 119 TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Reset;
mbed_official 167:d5744491c362 120 TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCNIdleState_Reset;
mbed_official 52:a51c77007319 121
mbed_official 167:d5744491c362 122 // Configure channels
mbed_official 167:d5744491c362 123 switch (obj->pin) {
mbed_official 167:d5744491c362 124 // Channels 1
mbed_official 167:d5744491c362 125 case PA_6:
mbed_official 167:d5744491c362 126 case PA_8:
mbed_official 167:d5744491c362 127 case PA_15:
mbed_official 167:d5744491c362 128 case PB_4:
mbed_official 167:d5744491c362 129 //case PB_6:
mbed_official 167:d5744491c362 130 case PC_6:
mbed_official 167:d5744491c362 131 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
mbed_official 167:d5744491c362 132 TIM_OC1PreloadConfig(tim, TIM_OCPreload_Enable);
mbed_official 167:d5744491c362 133 TIM_OC1Init(tim, &TIM_OCInitStructure);
mbed_official 167:d5744491c362 134 break;
mbed_official 167:d5744491c362 135 // Channels 1N
mbed_official 167:d5744491c362 136 //case PA_7:
mbed_official 167:d5744491c362 137 case PB_13:
mbed_official 167:d5744491c362 138 TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable;
mbed_official 167:d5744491c362 139 TIM_OC1PreloadConfig(tim, TIM_OCPreload_Enable);
mbed_official 167:d5744491c362 140 TIM_OC1Init(tim, &TIM_OCInitStructure);
mbed_official 167:d5744491c362 141 break;
mbed_official 167:d5744491c362 142 // Channels 2
mbed_official 167:d5744491c362 143 case PA_1:
mbed_official 167:d5744491c362 144 case PA_7:
mbed_official 167:d5744491c362 145 case PA_9:
mbed_official 167:d5744491c362 146 case PB_3:
mbed_official 167:d5744491c362 147 case PB_5:
mbed_official 167:d5744491c362 148 //case PB_7:
mbed_official 167:d5744491c362 149 case PC_7:
mbed_official 167:d5744491c362 150 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
mbed_official 167:d5744491c362 151 TIM_OC2PreloadConfig(tim, TIM_OCPreload_Enable);
mbed_official 167:d5744491c362 152 TIM_OC2Init(tim, &TIM_OCInitStructure);
mbed_official 167:d5744491c362 153 break;
mbed_official 167:d5744491c362 154 // Channels 2N
mbed_official 167:d5744491c362 155 //case PB_0:
mbed_official 167:d5744491c362 156 case PB_14:
mbed_official 167:d5744491c362 157 TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable;
mbed_official 167:d5744491c362 158 TIM_OC2PreloadConfig(tim, TIM_OCPreload_Enable);
mbed_official 167:d5744491c362 159 TIM_OC2Init(tim, &TIM_OCInitStructure);
mbed_official 167:d5744491c362 160 break;
mbed_official 167:d5744491c362 161 // Channels 3
mbed_official 167:d5744491c362 162 case PA_2:
mbed_official 167:d5744491c362 163 case PA_10:
mbed_official 167:d5744491c362 164 case PB_0:
mbed_official 167:d5744491c362 165 //case PB_8:
mbed_official 167:d5744491c362 166 case PB_10:
mbed_official 167:d5744491c362 167 case PC_8:
mbed_official 167:d5744491c362 168 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
mbed_official 167:d5744491c362 169 TIM_OC3PreloadConfig(tim, TIM_OCPreload_Enable);
mbed_official 167:d5744491c362 170 TIM_OC3Init(tim, &TIM_OCInitStructure);
mbed_official 167:d5744491c362 171 break;
mbed_official 167:d5744491c362 172 // Channels 3N
mbed_official 167:d5744491c362 173 //case PB_1:
mbed_official 167:d5744491c362 174 case PB_15:
mbed_official 167:d5744491c362 175 TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable;
mbed_official 167:d5744491c362 176 TIM_OC3PreloadConfig(tim, TIM_OCPreload_Enable);
mbed_official 167:d5744491c362 177 TIM_OC3Init(tim, &TIM_OCInitStructure);
mbed_official 167:d5744491c362 178 break;
mbed_official 167:d5744491c362 179 // Channels 4
mbed_official 167:d5744491c362 180 case PA_3:
mbed_official 167:d5744491c362 181 case PA_11:
mbed_official 167:d5744491c362 182 case PB_1:
mbed_official 167:d5744491c362 183 //case PB_9:
mbed_official 167:d5744491c362 184 case PB_11:
mbed_official 167:d5744491c362 185 case PC_9:
mbed_official 167:d5744491c362 186 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
mbed_official 167:d5744491c362 187 TIM_OC4PreloadConfig(tim, TIM_OCPreload_Enable);
mbed_official 167:d5744491c362 188 TIM_OC4Init(tim, &TIM_OCInitStructure);
mbed_official 167:d5744491c362 189 break;
mbed_official 167:d5744491c362 190 default:
mbed_official 167:d5744491c362 191 return;
mbed_official 52:a51c77007319 192 }
mbed_official 167:d5744491c362 193
mbed_official 167:d5744491c362 194 TIM_CtrlPWMOutputs(tim, ENABLE);
mbed_official 52:a51c77007319 195 }
mbed_official 52:a51c77007319 196
mbed_official 52:a51c77007319 197 float pwmout_read(pwmout_t* obj) {
mbed_official 52:a51c77007319 198 float value = 0;
mbed_official 52:a51c77007319 199 if (obj->period > 0) {
mbed_official 52:a51c77007319 200 value = (float)(obj->pulse) / (float)(obj->period);
mbed_official 52:a51c77007319 201 }
mbed_official 52:a51c77007319 202 return ((value > 1.0) ? (1.0) : (value));
mbed_official 52:a51c77007319 203 }
mbed_official 52:a51c77007319 204
mbed_official 52:a51c77007319 205 void pwmout_period(pwmout_t* obj, float seconds) {
mbed_official 52:a51c77007319 206 pwmout_period_us(obj, seconds * 1000000.0f);
mbed_official 52:a51c77007319 207 }
mbed_official 52:a51c77007319 208
mbed_official 52:a51c77007319 209 void pwmout_period_ms(pwmout_t* obj, int ms) {
mbed_official 52:a51c77007319 210 pwmout_period_us(obj, ms * 1000);
mbed_official 52:a51c77007319 211 }
mbed_official 52:a51c77007319 212
mbed_official 52:a51c77007319 213 void pwmout_period_us(pwmout_t* obj, int us) {
mbed_official 52:a51c77007319 214 TIM_TypeDef *tim = (TIM_TypeDef *)(obj->pwm);
mbed_official 52:a51c77007319 215 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
mbed_official 52:a51c77007319 216 float dc = pwmout_read(obj);
mbed_official 52:a51c77007319 217
mbed_official 52:a51c77007319 218 TIM_Cmd(tim, DISABLE);
mbed_official 52:a51c77007319 219
mbed_official 52:a51c77007319 220 obj->period = us;
mbed_official 52:a51c77007319 221
mbed_official 52:a51c77007319 222 TIM_TimeBaseStructure.TIM_Period = obj->period - 1;
mbed_official 52:a51c77007319 223 TIM_TimeBaseStructure.TIM_Prescaler = (uint16_t)(SystemCoreClock / 1000000) - 1; // 1 µs tick
mbed_official 52:a51c77007319 224 TIM_TimeBaseStructure.TIM_ClockDivision = 0;
mbed_official 52:a51c77007319 225 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
mbed_official 52:a51c77007319 226 TIM_TimeBaseInit(tim, &TIM_TimeBaseStructure);
mbed_official 52:a51c77007319 227
mbed_official 52:a51c77007319 228 // Set duty cycle again
mbed_official 52:a51c77007319 229 pwmout_write(obj, dc);
mbed_official 52:a51c77007319 230
mbed_official 52:a51c77007319 231 TIM_ARRPreloadConfig(tim, ENABLE);
mbed_official 52:a51c77007319 232 TIM_Cmd(tim, ENABLE);
mbed_official 52:a51c77007319 233 }
mbed_official 52:a51c77007319 234
mbed_official 52:a51c77007319 235 void pwmout_pulsewidth(pwmout_t* obj, float seconds) {
mbed_official 52:a51c77007319 236 pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
mbed_official 52:a51c77007319 237 }
mbed_official 52:a51c77007319 238
mbed_official 52:a51c77007319 239 void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
mbed_official 52:a51c77007319 240 pwmout_pulsewidth_us(obj, ms * 1000);
mbed_official 52:a51c77007319 241 }
mbed_official 52:a51c77007319 242
mbed_official 52:a51c77007319 243 void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
mbed_official 52:a51c77007319 244 float value = (float)us / (float)obj->period;
mbed_official 52:a51c77007319 245 pwmout_write(obj, value);
mbed_official 52:a51c77007319 246 }