mbed library sources
Dependents: frdm_kl05z_gpio_test
Fork of mbed-src by
targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_K64F/gpio_irq_api.c@250:a49055e7a707, 2014-07-08 (annotated)
- Committer:
- mbed_official
- Date:
- Tue Jul 08 11:15:08 2014 +0100
- Revision:
- 250:a49055e7a707
- Parent:
- 158:3121b9889f7b
- Child:
- 251:de9a1e4ffd79
Synchronized with git revision 3197042b65f8d28e856e1a7812d45e2fbe80e3f1
Full URL: https://github.com/mbedmicro/mbed/commit/3197042b65f8d28e856e1a7812d45e2fbe80e3f1/
error.h -> mbed_error.h
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 146:f64d43ff0c18 | 1 | /* mbed Microcontroller Library |
mbed_official | 146:f64d43ff0c18 | 2 | * Copyright (c) 2006-2013 ARM Limited |
mbed_official | 146:f64d43ff0c18 | 3 | * |
mbed_official | 146:f64d43ff0c18 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
mbed_official | 146:f64d43ff0c18 | 5 | * you may not use this file except in compliance with the License. |
mbed_official | 146:f64d43ff0c18 | 6 | * You may obtain a copy of the License at |
mbed_official | 146:f64d43ff0c18 | 7 | * |
mbed_official | 146:f64d43ff0c18 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
mbed_official | 146:f64d43ff0c18 | 9 | * |
mbed_official | 146:f64d43ff0c18 | 10 | * Unless required by applicable law or agreed to in writing, software |
mbed_official | 146:f64d43ff0c18 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
mbed_official | 146:f64d43ff0c18 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
mbed_official | 146:f64d43ff0c18 | 13 | * See the License for the specific language governing permissions and |
mbed_official | 146:f64d43ff0c18 | 14 | * limitations under the License. |
mbed_official | 146:f64d43ff0c18 | 15 | */ |
mbed_official | 146:f64d43ff0c18 | 16 | #include <stddef.h> |
mbed_official | 146:f64d43ff0c18 | 17 | #include "cmsis.h" |
mbed_official | 146:f64d43ff0c18 | 18 | |
mbed_official | 146:f64d43ff0c18 | 19 | #include "gpio_irq_api.h" |
mbed_official | 146:f64d43ff0c18 | 20 | #include "gpio_api.h" |
mbed_official | 146:f64d43ff0c18 | 21 | #include "fsl_gpio_hal.h" |
mbed_official | 146:f64d43ff0c18 | 22 | #include "fsl_port_hal.h" |
mbed_official | 250:a49055e7a707 | 23 | #include "mbed_error.h" |
mbed_official | 146:f64d43ff0c18 | 24 | |
mbed_official | 146:f64d43ff0c18 | 25 | #define CHANNEL_NUM 160 |
mbed_official | 146:f64d43ff0c18 | 26 | |
mbed_official | 146:f64d43ff0c18 | 27 | static uint32_t channel_ids[CHANNEL_NUM] = {0}; |
mbed_official | 146:f64d43ff0c18 | 28 | static gpio_irq_handler irq_handler; |
mbed_official | 146:f64d43ff0c18 | 29 | |
mbed_official | 146:f64d43ff0c18 | 30 | #define IRQ_DISABLED (0) |
mbed_official | 146:f64d43ff0c18 | 31 | #define IRQ_RAISING_EDGE (9) |
mbed_official | 146:f64d43ff0c18 | 32 | #define IRQ_FALLING_EDGE (10) |
mbed_official | 146:f64d43ff0c18 | 33 | #define IRQ_EITHER_EDGE (11) |
mbed_official | 146:f64d43ff0c18 | 34 | |
mbed_official | 146:f64d43ff0c18 | 35 | static void handle_interrupt_in(PortName port, int ch_base) { |
mbed_official | 146:f64d43ff0c18 | 36 | uint32_t i; |
mbed_official | 146:f64d43ff0c18 | 37 | |
mbed_official | 146:f64d43ff0c18 | 38 | for (i = 0; i < 32; i++) { |
mbed_official | 146:f64d43ff0c18 | 39 | if (port_hal_read_pin_interrupt_flag(port, i)) { |
mbed_official | 146:f64d43ff0c18 | 40 | uint32_t id = channel_ids[ch_base + i]; |
mbed_official | 146:f64d43ff0c18 | 41 | if (id == 0) { |
mbed_official | 146:f64d43ff0c18 | 42 | continue; |
mbed_official | 146:f64d43ff0c18 | 43 | } |
mbed_official | 146:f64d43ff0c18 | 44 | |
mbed_official | 146:f64d43ff0c18 | 45 | gpio_irq_event event = IRQ_NONE; |
mbed_official | 146:f64d43ff0c18 | 46 | switch (BR_PORT_PCRn_IRQC(port, i)) { |
mbed_official | 146:f64d43ff0c18 | 47 | case IRQ_RAISING_EDGE: |
mbed_official | 146:f64d43ff0c18 | 48 | event = IRQ_RISE; |
mbed_official | 146:f64d43ff0c18 | 49 | break; |
mbed_official | 146:f64d43ff0c18 | 50 | |
mbed_official | 146:f64d43ff0c18 | 51 | case IRQ_FALLING_EDGE: |
mbed_official | 146:f64d43ff0c18 | 52 | event = IRQ_FALL; |
mbed_official | 146:f64d43ff0c18 | 53 | break; |
mbed_official | 146:f64d43ff0c18 | 54 | |
mbed_official | 146:f64d43ff0c18 | 55 | case IRQ_EITHER_EDGE: |
mbed_official | 146:f64d43ff0c18 | 56 | event = (gpio_hal_read_pin_input(port, i)) ? (IRQ_RISE) : (IRQ_FALL); |
mbed_official | 146:f64d43ff0c18 | 57 | break; |
mbed_official | 146:f64d43ff0c18 | 58 | } |
mbed_official | 146:f64d43ff0c18 | 59 | if (event != IRQ_NONE) { |
mbed_official | 146:f64d43ff0c18 | 60 | irq_handler(id, event); |
mbed_official | 146:f64d43ff0c18 | 61 | } |
mbed_official | 146:f64d43ff0c18 | 62 | } |
mbed_official | 146:f64d43ff0c18 | 63 | } |
mbed_official | 146:f64d43ff0c18 | 64 | port_hal_clear_port_interrupt_flag(port); |
mbed_official | 146:f64d43ff0c18 | 65 | } |
mbed_official | 146:f64d43ff0c18 | 66 | |
mbed_official | 146:f64d43ff0c18 | 67 | void gpio_irqA(void) {handle_interrupt_in(PortA, 0);} |
mbed_official | 146:f64d43ff0c18 | 68 | void gpio_irqB(void) {handle_interrupt_in(PortB, 32);} |
mbed_official | 146:f64d43ff0c18 | 69 | void gpio_irqC(void) {handle_interrupt_in(PortC, 64);} |
mbed_official | 146:f64d43ff0c18 | 70 | void gpio_irqD(void) {handle_interrupt_in(PortD, 96);} |
mbed_official | 146:f64d43ff0c18 | 71 | void gpio_irqE(void) {handle_interrupt_in(PortE, 128);} |
mbed_official | 146:f64d43ff0c18 | 72 | |
mbed_official | 146:f64d43ff0c18 | 73 | int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) { |
mbed_official | 146:f64d43ff0c18 | 74 | if (pin == NC) { |
mbed_official | 146:f64d43ff0c18 | 75 | return -1; |
mbed_official | 146:f64d43ff0c18 | 76 | } |
mbed_official | 146:f64d43ff0c18 | 77 | |
mbed_official | 146:f64d43ff0c18 | 78 | irq_handler = handler; |
mbed_official | 146:f64d43ff0c18 | 79 | obj->port = pin >> GPIO_PORT_SHIFT; |
mbed_official | 146:f64d43ff0c18 | 80 | obj->pin = pin & 0x7F; |
mbed_official | 146:f64d43ff0c18 | 81 | |
mbed_official | 146:f64d43ff0c18 | 82 | uint32_t ch_base, vector; |
mbed_official | 146:f64d43ff0c18 | 83 | IRQn_Type irq_n; |
mbed_official | 146:f64d43ff0c18 | 84 | switch (obj->port) { |
mbed_official | 146:f64d43ff0c18 | 85 | case PortA: |
mbed_official | 146:f64d43ff0c18 | 86 | ch_base = 0; |
mbed_official | 146:f64d43ff0c18 | 87 | irq_n = PORTA_IRQn; |
mbed_official | 146:f64d43ff0c18 | 88 | vector = (uint32_t)gpio_irqA; |
mbed_official | 146:f64d43ff0c18 | 89 | break; |
mbed_official | 146:f64d43ff0c18 | 90 | case PortB: |
mbed_official | 146:f64d43ff0c18 | 91 | ch_base = 32; |
mbed_official | 146:f64d43ff0c18 | 92 | irq_n = PORTB_IRQn; |
mbed_official | 146:f64d43ff0c18 | 93 | vector = (uint32_t)gpio_irqB; |
mbed_official | 146:f64d43ff0c18 | 94 | break; |
mbed_official | 146:f64d43ff0c18 | 95 | case PortC: |
mbed_official | 146:f64d43ff0c18 | 96 | ch_base = 64; |
mbed_official | 146:f64d43ff0c18 | 97 | irq_n = PORTC_IRQn; |
mbed_official | 146:f64d43ff0c18 | 98 | vector = (uint32_t)gpio_irqC; |
mbed_official | 146:f64d43ff0c18 | 99 | break; |
mbed_official | 146:f64d43ff0c18 | 100 | case PortD: |
mbed_official | 146:f64d43ff0c18 | 101 | ch_base = 96; |
mbed_official | 146:f64d43ff0c18 | 102 | irq_n = PORTD_IRQn; |
mbed_official | 146:f64d43ff0c18 | 103 | vector = (uint32_t)gpio_irqD; |
mbed_official | 146:f64d43ff0c18 | 104 | break; |
mbed_official | 146:f64d43ff0c18 | 105 | case PortE: |
mbed_official | 146:f64d43ff0c18 | 106 | ch_base = 128; |
mbed_official | 146:f64d43ff0c18 | 107 | irq_n = PORTE_IRQn; |
mbed_official | 146:f64d43ff0c18 | 108 | vector = (uint32_t)gpio_irqE; |
mbed_official | 146:f64d43ff0c18 | 109 | break; |
mbed_official | 146:f64d43ff0c18 | 110 | |
mbed_official | 146:f64d43ff0c18 | 111 | default: |
mbed_official | 158:3121b9889f7b | 112 | error("gpio_irq only supported on port A-E."); |
mbed_official | 146:f64d43ff0c18 | 113 | break; |
mbed_official | 146:f64d43ff0c18 | 114 | } |
mbed_official | 146:f64d43ff0c18 | 115 | NVIC_SetVector(irq_n, vector); |
mbed_official | 146:f64d43ff0c18 | 116 | NVIC_EnableIRQ(irq_n); |
mbed_official | 146:f64d43ff0c18 | 117 | |
mbed_official | 146:f64d43ff0c18 | 118 | obj->ch = ch_base + obj->pin; |
mbed_official | 146:f64d43ff0c18 | 119 | channel_ids[obj->ch] = id; |
mbed_official | 146:f64d43ff0c18 | 120 | |
mbed_official | 146:f64d43ff0c18 | 121 | return 0; |
mbed_official | 146:f64d43ff0c18 | 122 | } |
mbed_official | 146:f64d43ff0c18 | 123 | |
mbed_official | 146:f64d43ff0c18 | 124 | void gpio_irq_free(gpio_irq_t *obj) { |
mbed_official | 146:f64d43ff0c18 | 125 | channel_ids[obj->ch] = 0; |
mbed_official | 146:f64d43ff0c18 | 126 | } |
mbed_official | 146:f64d43ff0c18 | 127 | |
mbed_official | 146:f64d43ff0c18 | 128 | void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) { |
mbed_official | 146:f64d43ff0c18 | 129 | port_interrupt_config_t irq_settings = kPortIntDisabled; |
mbed_official | 146:f64d43ff0c18 | 130 | |
mbed_official | 146:f64d43ff0c18 | 131 | switch (BR_PORT_PCRn_IRQC(obj->port, obj->pin)) { |
mbed_official | 146:f64d43ff0c18 | 132 | case IRQ_DISABLED: |
mbed_official | 146:f64d43ff0c18 | 133 | if (enable) |
mbed_official | 146:f64d43ff0c18 | 134 | irq_settings = (event == IRQ_RISE) ? (kPortIntRisingEdge) : (kPortIntFallingEdge); |
mbed_official | 146:f64d43ff0c18 | 135 | break; |
mbed_official | 146:f64d43ff0c18 | 136 | |
mbed_official | 146:f64d43ff0c18 | 137 | case IRQ_RAISING_EDGE: |
mbed_official | 146:f64d43ff0c18 | 138 | if (enable) { |
mbed_official | 146:f64d43ff0c18 | 139 | irq_settings = (event == IRQ_RISE) ? (kPortIntRisingEdge) : (kPortIntEitherEdge); |
mbed_official | 146:f64d43ff0c18 | 140 | } else { |
mbed_official | 146:f64d43ff0c18 | 141 | if (event == IRQ_FALL) |
mbed_official | 146:f64d43ff0c18 | 142 | irq_settings = kPortIntRisingEdge; |
mbed_official | 146:f64d43ff0c18 | 143 | } |
mbed_official | 146:f64d43ff0c18 | 144 | break; |
mbed_official | 146:f64d43ff0c18 | 145 | |
mbed_official | 146:f64d43ff0c18 | 146 | case IRQ_FALLING_EDGE: |
mbed_official | 146:f64d43ff0c18 | 147 | if (enable) { |
mbed_official | 146:f64d43ff0c18 | 148 | irq_settings = (event == IRQ_FALL) ? (kPortIntFallingEdge) : (kPortIntEitherEdge); |
mbed_official | 146:f64d43ff0c18 | 149 | } else { |
mbed_official | 146:f64d43ff0c18 | 150 | if (event == IRQ_RISE) |
mbed_official | 146:f64d43ff0c18 | 151 | irq_settings = kPortIntFallingEdge; |
mbed_official | 146:f64d43ff0c18 | 152 | } |
mbed_official | 146:f64d43ff0c18 | 153 | break; |
mbed_official | 146:f64d43ff0c18 | 154 | |
mbed_official | 146:f64d43ff0c18 | 155 | case IRQ_EITHER_EDGE: |
mbed_official | 146:f64d43ff0c18 | 156 | if (enable) { |
mbed_official | 146:f64d43ff0c18 | 157 | irq_settings = kPortIntEitherEdge; |
mbed_official | 146:f64d43ff0c18 | 158 | } else { |
mbed_official | 146:f64d43ff0c18 | 159 | irq_settings = (event == IRQ_RISE) ? (kPortIntFallingEdge) : (kPortIntRisingEdge); |
mbed_official | 146:f64d43ff0c18 | 160 | } |
mbed_official | 146:f64d43ff0c18 | 161 | break; |
mbed_official | 146:f64d43ff0c18 | 162 | } |
mbed_official | 146:f64d43ff0c18 | 163 | |
mbed_official | 146:f64d43ff0c18 | 164 | port_hal_configure_pin_interrupt(obj->port, obj->pin, irq_settings); |
mbed_official | 146:f64d43ff0c18 | 165 | port_hal_clear_pin_interrupt_flag(obj->port, obj->pin); |
mbed_official | 146:f64d43ff0c18 | 166 | } |
mbed_official | 146:f64d43ff0c18 | 167 | |
mbed_official | 146:f64d43ff0c18 | 168 | void gpio_irq_enable(gpio_irq_t *obj) { |
mbed_official | 146:f64d43ff0c18 | 169 | switch (obj->port) { |
mbed_official | 146:f64d43ff0c18 | 170 | case PortA: |
mbed_official | 146:f64d43ff0c18 | 171 | NVIC_EnableIRQ(PORTA_IRQn); |
mbed_official | 146:f64d43ff0c18 | 172 | break; |
mbed_official | 146:f64d43ff0c18 | 173 | case PortB: |
mbed_official | 146:f64d43ff0c18 | 174 | NVIC_EnableIRQ(PORTB_IRQn); |
mbed_official | 146:f64d43ff0c18 | 175 | break; |
mbed_official | 146:f64d43ff0c18 | 176 | case PortC: |
mbed_official | 146:f64d43ff0c18 | 177 | NVIC_EnableIRQ(PORTC_IRQn); |
mbed_official | 146:f64d43ff0c18 | 178 | break; |
mbed_official | 146:f64d43ff0c18 | 179 | case PortD: |
mbed_official | 146:f64d43ff0c18 | 180 | NVIC_EnableIRQ(PORTD_IRQn); |
mbed_official | 146:f64d43ff0c18 | 181 | break; |
mbed_official | 146:f64d43ff0c18 | 182 | case PortE: |
mbed_official | 146:f64d43ff0c18 | 183 | NVIC_EnableIRQ(PORTE_IRQn); |
mbed_official | 146:f64d43ff0c18 | 184 | break; |
mbed_official | 146:f64d43ff0c18 | 185 | } |
mbed_official | 146:f64d43ff0c18 | 186 | } |
mbed_official | 146:f64d43ff0c18 | 187 | |
mbed_official | 146:f64d43ff0c18 | 188 | void gpio_irq_disable(gpio_irq_t *obj) { |
mbed_official | 146:f64d43ff0c18 | 189 | switch (obj->port) { |
mbed_official | 146:f64d43ff0c18 | 190 | case PortA: |
mbed_official | 146:f64d43ff0c18 | 191 | NVIC_DisableIRQ(PORTA_IRQn); |
mbed_official | 146:f64d43ff0c18 | 192 | break; |
mbed_official | 146:f64d43ff0c18 | 193 | case PortB: |
mbed_official | 146:f64d43ff0c18 | 194 | NVIC_DisableIRQ(PORTB_IRQn); |
mbed_official | 146:f64d43ff0c18 | 195 | break; |
mbed_official | 146:f64d43ff0c18 | 196 | case PortC: |
mbed_official | 146:f64d43ff0c18 | 197 | NVIC_DisableIRQ(PORTC_IRQn); |
mbed_official | 146:f64d43ff0c18 | 198 | break; |
mbed_official | 146:f64d43ff0c18 | 199 | case PortD: |
mbed_official | 146:f64d43ff0c18 | 200 | NVIC_DisableIRQ(PORTD_IRQn); |
mbed_official | 146:f64d43ff0c18 | 201 | break; |
mbed_official | 146:f64d43ff0c18 | 202 | case PortE: |
mbed_official | 146:f64d43ff0c18 | 203 | NVIC_DisableIRQ(PORTE_IRQn); |
mbed_official | 146:f64d43ff0c18 | 204 | break; |
mbed_official | 146:f64d43ff0c18 | 205 | } |
mbed_official | 146:f64d43ff0c18 | 206 | } |
mbed_official | 146:f64d43ff0c18 | 207 |