shao ziyang / mbed-src-kl05

mbed library sources

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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_dma.c@323:9e901b0a5aa1, 2014-09-13 (annotated)

Committer:
shaoziyang
Date:
Sat Sep 13 14:25:46 2014 +0000
Revision:
323:9e901b0a5aa1
Parent:
235:685d5f11838f 
test with CLOCK_SETUP = 0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 235:685d5f11838f 1 /**
mbed_official 235:685d5f11838f 2 ******************************************************************************
mbed_official 235:685d5f11838f 3 * @file stm32f4xx_hal_dma.c
mbed_official 235:685d5f11838f 4 * @author MCD Application Team
mbed_official 235:685d5f11838f 5 * @version V1.1.0
mbed_official 235:685d5f11838f 6 * @date 19-June-2014
mbed_official 235:685d5f11838f 7 * @brief DMA HAL module driver.
mbed_official 235:685d5f11838f 8 *
mbed_official 235:685d5f11838f 9 * This file provides firmware functions to manage the following
mbed_official 235:685d5f11838f 10 * functionalities of the Direct Memory Access (DMA) peripheral:
mbed_official 235:685d5f11838f 11 * + Initialization and de-initialization functions
mbed_official 235:685d5f11838f 12 * + IO operation functions
mbed_official 235:685d5f11838f 13 * + Peripheral State and errors functions
mbed_official 235:685d5f11838f 14 @verbatim
mbed_official 235:685d5f11838f 15 ==============================================================================
mbed_official 235:685d5f11838f 16 ##### How to use this driver #####
mbed_official 235:685d5f11838f 17 ==============================================================================
mbed_official 235:685d5f11838f 18 [..]
mbed_official 235:685d5f11838f 19 (#) Enable and configure the peripheral to be connected to the DMA Stream
mbed_official 235:685d5f11838f 20 (except for internal SRAM/FLASH memories: no initialization is
mbed_official 235:685d5f11838f 21 necessary) please refer to Reference manual for connection between peripherals
mbed_official 235:685d5f11838f 22 and DMA requests .
mbed_official 235:685d5f11838f 23
mbed_official 235:685d5f11838f 24 (#) For a given Stream, program the required configuration through the following parameters:
mbed_official 235:685d5f11838f 25 Transfer Direction, Source and Destination data formats,
mbed_official 235:685d5f11838f 26 Circular, Normal or peripheral flow control mode, Stream Priority level,
mbed_official 235:685d5f11838f 27 Source and Destination Increment mode, FIFO mode and its Threshold (if needed),
mbed_official 235:685d5f11838f 28 Burst mode for Source and/or Destination (if needed) using HAL_DMA_Init() function.
mbed_official 235:685d5f11838f 29
mbed_official 235:685d5f11838f 30 *** Polling mode IO operation ***
mbed_official 235:685d5f11838f 31 =================================
mbed_official 235:685d5f11838f 32 [..]
mbed_official 235:685d5f11838f 33 (+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source
mbed_official 235:685d5f11838f 34 address and destination address and the Length of data to be transferred
mbed_official 235:685d5f11838f 35 (+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this
mbed_official 235:685d5f11838f 36 case a fixed Timeout can be configured by User depending from his application.
mbed_official 235:685d5f11838f 37
mbed_official 235:685d5f11838f 38 *** Interrupt mode IO operation ***
mbed_official 235:685d5f11838f 39 ===================================
mbed_official 235:685d5f11838f 40 [..]
mbed_official 235:685d5f11838f 41 (+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority()
mbed_official 235:685d5f11838f 42 (+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ()
mbed_official 235:685d5f11838f 43 (+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of
mbed_official 235:685d5f11838f 44 Source address and destination address and the Length of data to be transferred. In this
mbed_official 235:685d5f11838f 45 case the DMA interrupt is configured
mbed_official 235:685d5f11838f 46 (+) Use HAL_DMA_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine
mbed_official 235:685d5f11838f 47 (+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can
mbed_official 235:685d5f11838f 48 add his own function by customization of function pointer XferCpltCallback and
mbed_official 235:685d5f11838f 49 XferErrorCallback (i.e a member of DMA handle structure).
mbed_official 235:685d5f11838f 50 [..]
mbed_official 235:685d5f11838f 51 (#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of error
mbed_official 235:685d5f11838f 52 detection.
mbed_official 235:685d5f11838f 53
mbed_official 235:685d5f11838f 54 (#) Use HAL_DMA_Abort() function to abort the current transfer
mbed_official 235:685d5f11838f 55
mbed_official 235:685d5f11838f 56 -@- In Memory-to-Memory transfer mode, Circular mode is not allowed.
mbed_official 235:685d5f11838f 57
mbed_official 235:685d5f11838f 58 -@- The FIFO is used mainly to reduce bus usage and to allow data packing/unpacking: it is
mbed_official 235:685d5f11838f 59 possible to set different Data Sizes for the Peripheral and the Memory (ie. you can set
mbed_official 235:685d5f11838f 60 Half-Word data size for the peripheral to access its data register and set Word data size
mbed_official 235:685d5f11838f 61 for the Memory to gain in access time. Each two half words will be packed and written in
mbed_official 235:685d5f11838f 62 a single access to a Word in the Memory).
mbed_official 235:685d5f11838f 63
mbed_official 235:685d5f11838f 64 -@- When FIFO is disabled, it is not allowed to configure different Data Sizes for Source
mbed_official 235:685d5f11838f 65 and Destination. In this case the Peripheral Data Size will be applied to both Source
mbed_official 235:685d5f11838f 66 and Destination.
mbed_official 235:685d5f11838f 67
mbed_official 235:685d5f11838f 68 *** DMA HAL driver macros list ***
mbed_official 235:685d5f11838f 69 =============================================
mbed_official 235:685d5f11838f 70 [..]
mbed_official 235:685d5f11838f 71 Below the list of most used macros in DMA HAL driver.
mbed_official 235:685d5f11838f 72
mbed_official 235:685d5f11838f 73 (+) __HAL_DMA_ENABLE: Enable the specified DMA Stream.
mbed_official 235:685d5f11838f 74 (+) __HAL_DMA_DISABLE: Disable the specified DMA Stream.
mbed_official 235:685d5f11838f 75 (+) __HAL_DMA_GET_FS: Return the current DMA Stream FIFO filled level.
mbed_official 235:685d5f11838f 76 (+) __HAL_DMA_GET_FLAG: Get the DMA Stream pending flags.
mbed_official 235:685d5f11838f 77 (+) __HAL_DMA_CLEAR_FLAG: Clear the DMA Stream pending flags.
mbed_official 235:685d5f11838f 78 (+) __HAL_DMA_ENABLE_IT: Enable the specified DMA Stream interrupts.
mbed_official 235:685d5f11838f 79 (+) __HAL_DMA_DISABLE_IT: Disable the specified DMA Stream interrupts.
mbed_official 235:685d5f11838f 80 (+) __HAL_DMA_GET_IT_SOURCE: Check whether the specified DMA Stream interrupt has occurred or not.
mbed_official 235:685d5f11838f 81
mbed_official 235:685d5f11838f 82 [..]
mbed_official 235:685d5f11838f 83 (@) You can refer to the DMA HAL driver header file for more useful macros
mbed_official 235:685d5f11838f 84
mbed_official 235:685d5f11838f 85 @endverbatim
mbed_official 235:685d5f11838f 86 ******************************************************************************
mbed_official 235:685d5f11838f 87 * @attention
mbed_official 235:685d5f11838f 88 *
mbed_official 235:685d5f11838f 89 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 235:685d5f11838f 90 *
mbed_official 235:685d5f11838f 91 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 235:685d5f11838f 92 * are permitted provided that the following conditions are met:
mbed_official 235:685d5f11838f 93 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 235:685d5f11838f 94 * this list of conditions and the following disclaimer.
mbed_official 235:685d5f11838f 95 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 235:685d5f11838f 96 * this list of conditions and the following disclaimer in the documentation
mbed_official 235:685d5f11838f 97 * and/or other materials provided with the distribution.
mbed_official 235:685d5f11838f 98 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 235:685d5f11838f 99 * may be used to endorse or promote products derived from this software
mbed_official 235:685d5f11838f 100 * without specific prior written permission.
mbed_official 235:685d5f11838f 101 *
mbed_official 235:685d5f11838f 102 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 235:685d5f11838f 103 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 235:685d5f11838f 104 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 235:685d5f11838f 105 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 235:685d5f11838f 106 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 235:685d5f11838f 107 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 235:685d5f11838f 108 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 235:685d5f11838f 109 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 235:685d5f11838f 110 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 235:685d5f11838f 111 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 235:685d5f11838f 112 *
mbed_official 235:685d5f11838f 113 ******************************************************************************
mbed_official 235:685d5f11838f 114 */
mbed_official 235:685d5f11838f 115
mbed_official 235:685d5f11838f 116 /* Includes ------------------------------------------------------------------*/
mbed_official 235:685d5f11838f 117 #include "stm32f4xx_hal.h"
mbed_official 235:685d5f11838f 118
mbed_official 235:685d5f11838f 119 /** @addtogroup STM32F4xx_HAL_Driver
mbed_official 235:685d5f11838f 120 * @{
mbed_official 235:685d5f11838f 121 */
mbed_official 235:685d5f11838f 122
mbed_official 235:685d5f11838f 123 /** @defgroup DMA
mbed_official 235:685d5f11838f 124 * @brief DMA HAL module driver
mbed_official 235:685d5f11838f 125 * @{
mbed_official 235:685d5f11838f 126 */
mbed_official 235:685d5f11838f 127
mbed_official 235:685d5f11838f 128 #ifdef HAL_DMA_MODULE_ENABLED
mbed_official 235:685d5f11838f 129
mbed_official 235:685d5f11838f 130 /* Private typedef -----------------------------------------------------------*/
mbed_official 235:685d5f11838f 131 /* Private define ------------------------------------------------------------*/
mbed_official 235:685d5f11838f 132 #define HAL_TIMEOUT_DMA_ABORT ((uint32_t)1000) /* 1s */
mbed_official 235:685d5f11838f 133 /* Private macro -------------------------------------------------------------*/
mbed_official 235:685d5f11838f 134 /* Private variables ---------------------------------------------------------*/
mbed_official 235:685d5f11838f 135 /* Private function prototypes -----------------------------------------------*/
mbed_official 235:685d5f11838f 136 static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
mbed_official 235:685d5f11838f 137
mbed_official 235:685d5f11838f 138 /* Private functions ---------------------------------------------------------*/
mbed_official 235:685d5f11838f 139
mbed_official 235:685d5f11838f 140 /** @defgroup DMA_Private_Functions
mbed_official 235:685d5f11838f 141 * @{
mbed_official 235:685d5f11838f 142 */
mbed_official 235:685d5f11838f 143
mbed_official 235:685d5f11838f 144 /** @defgroup DMA_Group1 Initialization and de-initialization functions
mbed_official 235:685d5f11838f 145 * @brief Initialization and de-initialization functions
mbed_official 235:685d5f11838f 146 *
mbed_official 235:685d5f11838f 147 @verbatim
mbed_official 235:685d5f11838f 148 ===============================================================================
mbed_official 235:685d5f11838f 149 ##### Initialization and de-initialization functions #####
mbed_official 235:685d5f11838f 150 ===============================================================================
mbed_official 235:685d5f11838f 151 [..]
mbed_official 235:685d5f11838f 152 This section provides functions allowing to initialize the DMA Stream source
mbed_official 235:685d5f11838f 153 and destination addresses, incrementation and data sizes, transfer direction,
mbed_official 235:685d5f11838f 154 circular/normal mode selection, memory-to-memory mode selection and Stream priority value.
mbed_official 235:685d5f11838f 155 [..]
mbed_official 235:685d5f11838f 156 The HAL_DMA_Init() function follows the DMA configuration procedures as described in
mbed_official 235:685d5f11838f 157 reference manual.
mbed_official 235:685d5f11838f 158
mbed_official 235:685d5f11838f 159 @endverbatim
mbed_official 235:685d5f11838f 160 * @{
mbed_official 235:685d5f11838f 161 */
mbed_official 235:685d5f11838f 162
mbed_official 235:685d5f11838f 163 /**
mbed_official 235:685d5f11838f 164 * @brief Initializes the DMA according to the specified
mbed_official 235:685d5f11838f 165 * parameters in the DMA_InitTypeDef and create the associated handle.
mbed_official 235:685d5f11838f 166 * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 167 * the configuration information for the specified DMA Stream.
mbed_official 235:685d5f11838f 168 * @retval HAL status
mbed_official 235:685d5f11838f 169 */
mbed_official 235:685d5f11838f 170 HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
mbed_official 235:685d5f11838f 171 {
mbed_official 235:685d5f11838f 172 uint32_t tmp = 0;
mbed_official 235:685d5f11838f 173
mbed_official 235:685d5f11838f 174 /* Check the DMA peripheral state */
mbed_official 235:685d5f11838f 175 if(hdma == NULL)
mbed_official 235:685d5f11838f 176 {
mbed_official 235:685d5f11838f 177 return HAL_ERROR;
mbed_official 235:685d5f11838f 178 }
mbed_official 235:685d5f11838f 179
mbed_official 235:685d5f11838f 180 /* Check the parameters */
mbed_official 235:685d5f11838f 181 assert_param(IS_DMA_STREAM_ALL_INSTANCE(hdma->Instance));
mbed_official 235:685d5f11838f 182 assert_param(IS_DMA_CHANNEL(hdma->Init.Channel));
mbed_official 235:685d5f11838f 183 assert_param(IS_DMA_DIRECTION(hdma->Init.Direction));
mbed_official 235:685d5f11838f 184 assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc));
mbed_official 235:685d5f11838f 185 assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc));
mbed_official 235:685d5f11838f 186 assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment));
mbed_official 235:685d5f11838f 187 assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment));
mbed_official 235:685d5f11838f 188 assert_param(IS_DMA_MODE(hdma->Init.Mode));
mbed_official 235:685d5f11838f 189 assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));
mbed_official 235:685d5f11838f 190 assert_param(IS_DMA_FIFO_MODE_STATE(hdma->Init.FIFOMode));
mbed_official 235:685d5f11838f 191 /* Check the memory burst, peripheral burst and FIFO threshold parameters only
mbed_official 235:685d5f11838f 192 when FIFO mode is enabled */
mbed_official 235:685d5f11838f 193 if(hdma->Init.FIFOMode != DMA_FIFOMODE_DISABLE)
mbed_official 235:685d5f11838f 194 {
mbed_official 235:685d5f11838f 195 assert_param(IS_DMA_FIFO_THRESHOLD(hdma->Init.FIFOThreshold));
mbed_official 235:685d5f11838f 196 assert_param(IS_DMA_MEMORY_BURST(hdma->Init.MemBurst));
mbed_official 235:685d5f11838f 197 assert_param(IS_DMA_PERIPHERAL_BURST(hdma->Init.PeriphBurst));
mbed_official 235:685d5f11838f 198 }
mbed_official 235:685d5f11838f 199
mbed_official 235:685d5f11838f 200 /* Change DMA peripheral state */
mbed_official 235:685d5f11838f 201 hdma->State = HAL_DMA_STATE_BUSY;
mbed_official 235:685d5f11838f 202
mbed_official 235:685d5f11838f 203 /* Get the CR register value */
mbed_official 235:685d5f11838f 204 tmp = hdma->Instance->CR;
mbed_official 235:685d5f11838f 205
mbed_official 235:685d5f11838f 206 /* Clear CHSEL, MBURST, PBURST, PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR and CT bits */
mbed_official 235:685d5f11838f 207 tmp &= ((uint32_t)~(DMA_SxCR_CHSEL | DMA_SxCR_MBURST | DMA_SxCR_PBURST | \
mbed_official 235:685d5f11838f 208 DMA_SxCR_PL | DMA_SxCR_MSIZE | DMA_SxCR_PSIZE | \
mbed_official 235:685d5f11838f 209 DMA_SxCR_MINC | DMA_SxCR_PINC | DMA_SxCR_CIRC | \
mbed_official 235:685d5f11838f 210 DMA_SxCR_DIR | DMA_SxCR_CT ));
mbed_official 235:685d5f11838f 211
mbed_official 235:685d5f11838f 212 /* Prepare the DMA Stream configuration */
mbed_official 235:685d5f11838f 213 tmp |= hdma->Init.Channel | hdma->Init.Direction |
mbed_official 235:685d5f11838f 214 hdma->Init.PeriphInc | hdma->Init.MemInc |
mbed_official 235:685d5f11838f 215 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
mbed_official 235:685d5f11838f 216 hdma->Init.Mode | hdma->Init.Priority;
mbed_official 235:685d5f11838f 217
mbed_official 235:685d5f11838f 218 /* the Memory burst and peripheral burst are not used when the FIFO is disabled */
mbed_official 235:685d5f11838f 219 if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE)
mbed_official 235:685d5f11838f 220 {
mbed_official 235:685d5f11838f 221 /* Get memory burst and peripheral burst */
mbed_official 235:685d5f11838f 222 tmp |= hdma->Init.MemBurst | hdma->Init.PeriphBurst;
mbed_official 235:685d5f11838f 223 }
mbed_official 235:685d5f11838f 224
mbed_official 235:685d5f11838f 225 /* Write to DMA Stream CR register */
mbed_official 235:685d5f11838f 226 hdma->Instance->CR = tmp;
mbed_official 235:685d5f11838f 227
mbed_official 235:685d5f11838f 228 /* Get the FCR register value */
mbed_official 235:685d5f11838f 229 tmp = hdma->Instance->FCR;
mbed_official 235:685d5f11838f 230
mbed_official 235:685d5f11838f 231 /* Clear Direct mode and FIFO threshold bits */
mbed_official 235:685d5f11838f 232 tmp &= (uint32_t)~(DMA_SxFCR_DMDIS | DMA_SxFCR_FTH);
mbed_official 235:685d5f11838f 233
mbed_official 235:685d5f11838f 234 /* Prepare the DMA Stream FIFO configuration */
mbed_official 235:685d5f11838f 235 tmp |= hdma->Init.FIFOMode;
mbed_official 235:685d5f11838f 236
mbed_official 235:685d5f11838f 237 /* the FIFO threshold is not used when the FIFO mode is disabled */
mbed_official 235:685d5f11838f 238 if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE)
mbed_official 235:685d5f11838f 239 {
mbed_official 235:685d5f11838f 240 /* Get the FIFO threshold */
mbed_official 235:685d5f11838f 241 tmp |= hdma->Init.FIFOThreshold;
mbed_official 235:685d5f11838f 242 }
mbed_official 235:685d5f11838f 243
mbed_official 235:685d5f11838f 244 /* Write to DMA Stream FCR */
mbed_official 235:685d5f11838f 245 hdma->Instance->FCR = tmp;
mbed_official 235:685d5f11838f 246
mbed_official 235:685d5f11838f 247 /* Initialise the error code */
mbed_official 235:685d5f11838f 248 hdma->ErrorCode = HAL_DMA_ERROR_NONE;
mbed_official 235:685d5f11838f 249
mbed_official 235:685d5f11838f 250 /* Initialize the DMA state */
mbed_official 235:685d5f11838f 251 hdma->State = HAL_DMA_STATE_READY;
mbed_official 235:685d5f11838f 252
mbed_official 235:685d5f11838f 253 return HAL_OK;
mbed_official 235:685d5f11838f 254 }
mbed_official 235:685d5f11838f 255
mbed_official 235:685d5f11838f 256 /**
mbed_official 235:685d5f11838f 257 * @brief DeInitializes the DMA peripheral
mbed_official 235:685d5f11838f 258 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 259 * the configuration information for the specified DMA Stream.
mbed_official 235:685d5f11838f 260 * @retval HAL status
mbed_official 235:685d5f11838f 261 */
mbed_official 235:685d5f11838f 262 HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
mbed_official 235:685d5f11838f 263 {
mbed_official 235:685d5f11838f 264 /* Check the DMA peripheral state */
mbed_official 235:685d5f11838f 265 if(hdma == NULL)
mbed_official 235:685d5f11838f 266 {
mbed_official 235:685d5f11838f 267 return HAL_ERROR;
mbed_official 235:685d5f11838f 268 }
mbed_official 235:685d5f11838f 269
mbed_official 235:685d5f11838f 270 /* Check the DMA peripheral state */
mbed_official 235:685d5f11838f 271 if(hdma->State == HAL_DMA_STATE_BUSY)
mbed_official 235:685d5f11838f 272 {
mbed_official 235:685d5f11838f 273 return HAL_ERROR;
mbed_official 235:685d5f11838f 274 }
mbed_official 235:685d5f11838f 275
mbed_official 235:685d5f11838f 276 /* Disable the selected DMA Streamx */
mbed_official 235:685d5f11838f 277 __HAL_DMA_DISABLE(hdma);
mbed_official 235:685d5f11838f 278
mbed_official 235:685d5f11838f 279 /* Reset DMA Streamx control register */
mbed_official 235:685d5f11838f 280 hdma->Instance->CR = 0;
mbed_official 235:685d5f11838f 281
mbed_official 235:685d5f11838f 282 /* Reset DMA Streamx number of data to transfer register */
mbed_official 235:685d5f11838f 283 hdma->Instance->NDTR = 0;
mbed_official 235:685d5f11838f 284
mbed_official 235:685d5f11838f 285 /* Reset DMA Streamx peripheral address register */
mbed_official 235:685d5f11838f 286 hdma->Instance->PAR = 0;
mbed_official 235:685d5f11838f 287
mbed_official 235:685d5f11838f 288 /* Reset DMA Streamx memory 0 address register */
mbed_official 235:685d5f11838f 289 hdma->Instance->M0AR = 0;
mbed_official 235:685d5f11838f 290
mbed_official 235:685d5f11838f 291 /* Reset DMA Streamx memory 1 address register */
mbed_official 235:685d5f11838f 292 hdma->Instance->M1AR = 0;
mbed_official 235:685d5f11838f 293
mbed_official 235:685d5f11838f 294 /* Reset DMA Streamx FIFO control register */
mbed_official 235:685d5f11838f 295 hdma->Instance->FCR = (uint32_t)0x00000021;
mbed_official 235:685d5f11838f 296
mbed_official 235:685d5f11838f 297 /* Clear all flags */
mbed_official 235:685d5f11838f 298 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_DME_FLAG_INDEX(hdma));
mbed_official 235:685d5f11838f 299 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
mbed_official 235:685d5f11838f 300 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
mbed_official 235:685d5f11838f 301 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_FE_FLAG_INDEX(hdma));
mbed_official 235:685d5f11838f 302 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
mbed_official 235:685d5f11838f 303
mbed_official 235:685d5f11838f 304 /* Initialise the error code */
mbed_official 235:685d5f11838f 305 hdma->ErrorCode = HAL_DMA_ERROR_NONE;
mbed_official 235:685d5f11838f 306
mbed_official 235:685d5f11838f 307 /* Initialize the DMA state */
mbed_official 235:685d5f11838f 308 hdma->State = HAL_DMA_STATE_RESET;
mbed_official 235:685d5f11838f 309
mbed_official 235:685d5f11838f 310 /* Release Lock */
mbed_official 235:685d5f11838f 311 __HAL_UNLOCK(hdma);
mbed_official 235:685d5f11838f 312
mbed_official 235:685d5f11838f 313 return HAL_OK;
mbed_official 235:685d5f11838f 314 }
mbed_official 235:685d5f11838f 315
mbed_official 235:685d5f11838f 316 /**
mbed_official 235:685d5f11838f 317 * @}
mbed_official 235:685d5f11838f 318 */
mbed_official 235:685d5f11838f 319
mbed_official 235:685d5f11838f 320 /** @defgroup DMA_Group2 I/O operation functions
mbed_official 235:685d5f11838f 321 * @brief I/O operation functions
mbed_official 235:685d5f11838f 322 *
mbed_official 235:685d5f11838f 323 @verbatim
mbed_official 235:685d5f11838f 324 ===============================================================================
mbed_official 235:685d5f11838f 325 ##### IO operation functions #####
mbed_official 235:685d5f11838f 326 ===============================================================================
mbed_official 235:685d5f11838f 327 [..] This section provides functions allowing to:
mbed_official 235:685d5f11838f 328 (+) Configure the source, destination address and data length and Start DMA transfer
mbed_official 235:685d5f11838f 329 (+) Configure the source, destination address and data length and
mbed_official 235:685d5f11838f 330 Start DMA transfer with interrupt
mbed_official 235:685d5f11838f 331 (+) Abort DMA transfer
mbed_official 235:685d5f11838f 332 (+) Poll for transfer complete
mbed_official 235:685d5f11838f 333 (+) Handle DMA interrupt request
mbed_official 235:685d5f11838f 334
mbed_official 235:685d5f11838f 335 @endverbatim
mbed_official 235:685d5f11838f 336 * @{
mbed_official 235:685d5f11838f 337 */
mbed_official 235:685d5f11838f 338
mbed_official 235:685d5f11838f 339 /**
mbed_official 235:685d5f11838f 340 * @brief Starts the DMA Transfer.
mbed_official 235:685d5f11838f 341 * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 342 * the configuration information for the specified DMA Stream.
mbed_official 235:685d5f11838f 343 * @param SrcAddress: The source memory Buffer address
mbed_official 235:685d5f11838f 344 * @param DstAddress: The destination memory Buffer address
mbed_official 235:685d5f11838f 345 * @param DataLength: The length of data to be transferred from source to destination
mbed_official 235:685d5f11838f 346 * @retval HAL status
mbed_official 235:685d5f11838f 347 */
mbed_official 235:685d5f11838f 348 HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
mbed_official 235:685d5f11838f 349 {
mbed_official 235:685d5f11838f 350 /* Process locked */
mbed_official 235:685d5f11838f 351 __HAL_LOCK(hdma);
mbed_official 235:685d5f11838f 352
mbed_official 235:685d5f11838f 353 /* Change DMA peripheral state */
mbed_official 235:685d5f11838f 354 hdma->State = HAL_DMA_STATE_BUSY;
mbed_official 235:685d5f11838f 355
mbed_official 235:685d5f11838f 356 /* Check the parameters */
mbed_official 235:685d5f11838f 357 assert_param(IS_DMA_BUFFER_SIZE(DataLength));
mbed_official 235:685d5f11838f 358
mbed_official 235:685d5f11838f 359 /* Disable the peripheral */
mbed_official 235:685d5f11838f 360 __HAL_DMA_DISABLE(hdma);
mbed_official 235:685d5f11838f 361
mbed_official 235:685d5f11838f 362 /* Configure the source, destination address and the data length */
mbed_official 235:685d5f11838f 363 DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
mbed_official 235:685d5f11838f 364
mbed_official 235:685d5f11838f 365 /* Enable the Peripheral */
mbed_official 235:685d5f11838f 366 __HAL_DMA_ENABLE(hdma);
mbed_official 235:685d5f11838f 367
mbed_official 235:685d5f11838f 368 return HAL_OK;
mbed_official 235:685d5f11838f 369 }
mbed_official 235:685d5f11838f 370
mbed_official 235:685d5f11838f 371 /**
mbed_official 235:685d5f11838f 372 * @brief Start the DMA Transfer with interrupt enabled.
mbed_official 235:685d5f11838f 373 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 374 * the configuration information for the specified DMA Stream.
mbed_official 235:685d5f11838f 375 * @param SrcAddress: The source memory Buffer address
mbed_official 235:685d5f11838f 376 * @param DstAddress: The destination memory Buffer address
mbed_official 235:685d5f11838f 377 * @param DataLength: The length of data to be transferred from source to destination
mbed_official 235:685d5f11838f 378 * @retval HAL status
mbed_official 235:685d5f11838f 379 */
mbed_official 235:685d5f11838f 380 HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
mbed_official 235:685d5f11838f 381 {
mbed_official 235:685d5f11838f 382 /* Process locked */
mbed_official 235:685d5f11838f 383 __HAL_LOCK(hdma);
mbed_official 235:685d5f11838f 384
mbed_official 235:685d5f11838f 385 /* Change DMA peripheral state */
mbed_official 235:685d5f11838f 386 hdma->State = HAL_DMA_STATE_BUSY;
mbed_official 235:685d5f11838f 387
mbed_official 235:685d5f11838f 388 /* Check the parameters */
mbed_official 235:685d5f11838f 389 assert_param(IS_DMA_BUFFER_SIZE(DataLength));
mbed_official 235:685d5f11838f 390
mbed_official 235:685d5f11838f 391 /* Disable the peripheral */
mbed_official 235:685d5f11838f 392 __HAL_DMA_DISABLE(hdma);
mbed_official 235:685d5f11838f 393
mbed_official 235:685d5f11838f 394 /* Configure the source, destination address and the data length */
mbed_official 235:685d5f11838f 395 DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
mbed_official 235:685d5f11838f 396
mbed_official 235:685d5f11838f 397 /* Enable the transfer complete interrupt */
mbed_official 235:685d5f11838f 398 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_TC);
mbed_official 235:685d5f11838f 399
mbed_official 235:685d5f11838f 400 /* Enable the Half transfer complete interrupt */
mbed_official 235:685d5f11838f 401 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_HT);
mbed_official 235:685d5f11838f 402
mbed_official 235:685d5f11838f 403 /* Enable the transfer Error interrupt */
mbed_official 235:685d5f11838f 404 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_TE);
mbed_official 235:685d5f11838f 405
mbed_official 235:685d5f11838f 406 /* Enable the FIFO Error interrupt */
mbed_official 235:685d5f11838f 407 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_FE);
mbed_official 235:685d5f11838f 408
mbed_official 235:685d5f11838f 409 /* Enable the direct mode Error interrupt */
mbed_official 235:685d5f11838f 410 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_DME);
mbed_official 235:685d5f11838f 411
mbed_official 235:685d5f11838f 412 /* Enable the Peripheral */
mbed_official 235:685d5f11838f 413 __HAL_DMA_ENABLE(hdma);
mbed_official 235:685d5f11838f 414
mbed_official 235:685d5f11838f 415 return HAL_OK;
mbed_official 235:685d5f11838f 416 }
mbed_official 235:685d5f11838f 417
mbed_official 235:685d5f11838f 418 /**
mbed_official 235:685d5f11838f 419 * @brief Aborts the DMA Transfer.
mbed_official 235:685d5f11838f 420 * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 421 * the configuration information for the specified DMA Stream.
mbed_official 235:685d5f11838f 422 *
mbed_official 235:685d5f11838f 423 * @note After disabling a DMA Stream, a check for wait until the DMA Stream is
mbed_official 235:685d5f11838f 424 * effectively disabled is added. If a Stream is disabled
mbed_official 235:685d5f11838f 425 * while a data transfer is ongoing, the current data will be transferred
mbed_official 235:685d5f11838f 426 * and the Stream will be effectively disabled only after the transfer of
mbed_official 235:685d5f11838f 427 * this single data is finished.
mbed_official 235:685d5f11838f 428 * @retval HAL status
mbed_official 235:685d5f11838f 429 */
mbed_official 235:685d5f11838f 430 HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
mbed_official 235:685d5f11838f 431 {
mbed_official 235:685d5f11838f 432 uint32_t tickstart = 0;
mbed_official 235:685d5f11838f 433
mbed_official 235:685d5f11838f 434 /* Disable the stream */
mbed_official 235:685d5f11838f 435 __HAL_DMA_DISABLE(hdma);
mbed_official 235:685d5f11838f 436
mbed_official 235:685d5f11838f 437 /* Get tick */
mbed_official 235:685d5f11838f 438 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 439
mbed_official 235:685d5f11838f 440 /* Check if the DMA Stream is effectively disabled */
mbed_official 235:685d5f11838f 441 while((hdma->Instance->CR & DMA_SxCR_EN) != 0)
mbed_official 235:685d5f11838f 442 {
mbed_official 235:685d5f11838f 443 /* Check for the Timeout */
mbed_official 235:685d5f11838f 444 if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT)
mbed_official 235:685d5f11838f 445 {
mbed_official 235:685d5f11838f 446 /* Update error code */
mbed_official 235:685d5f11838f 447 hdma->ErrorCode |= HAL_DMA_ERROR_TIMEOUT;
mbed_official 235:685d5f11838f 448
mbed_official 235:685d5f11838f 449 /* Process Unlocked */
mbed_official 235:685d5f11838f 450 __HAL_UNLOCK(hdma);
mbed_official 235:685d5f11838f 451
mbed_official 235:685d5f11838f 452 /* Change the DMA state */
mbed_official 235:685d5f11838f 453 hdma->State = HAL_DMA_STATE_TIMEOUT;
mbed_official 235:685d5f11838f 454
mbed_official 235:685d5f11838f 455 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 456 }
mbed_official 235:685d5f11838f 457 }
mbed_official 235:685d5f11838f 458 /* Process Unlocked */
mbed_official 235:685d5f11838f 459 __HAL_UNLOCK(hdma);
mbed_official 235:685d5f11838f 460
mbed_official 235:685d5f11838f 461 /* Change the DMA state*/
mbed_official 235:685d5f11838f 462 hdma->State = HAL_DMA_STATE_READY;
mbed_official 235:685d5f11838f 463
mbed_official 235:685d5f11838f 464 return HAL_OK;
mbed_official 235:685d5f11838f 465 }
mbed_official 235:685d5f11838f 466
mbed_official 235:685d5f11838f 467 /**
mbed_official 235:685d5f11838f 468 * @brief Polling for transfer complete.
mbed_official 235:685d5f11838f 469 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 470 * the configuration information for the specified DMA Stream.
mbed_official 235:685d5f11838f 471 * @param CompleteLevel: Specifies the DMA level complete.
mbed_official 235:685d5f11838f 472 * @param Timeout: Timeout duration.
mbed_official 235:685d5f11838f 473 * @retval HAL status
mbed_official 235:685d5f11838f 474 */
mbed_official 235:685d5f11838f 475 HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout)
mbed_official 235:685d5f11838f 476 {
mbed_official 235:685d5f11838f 477 uint32_t temp, tmp, tmp1, tmp2;
mbed_official 235:685d5f11838f 478 uint32_t tickstart = 0;
mbed_official 235:685d5f11838f 479
mbed_official 235:685d5f11838f 480 /* Get the level transfer complete flag */
mbed_official 235:685d5f11838f 481 if(CompleteLevel == HAL_DMA_FULL_TRANSFER)
mbed_official 235:685d5f11838f 482 {
mbed_official 235:685d5f11838f 483 /* Transfer Complete flag */
mbed_official 235:685d5f11838f 484 temp = __HAL_DMA_GET_TC_FLAG_INDEX(hdma);
mbed_official 235:685d5f11838f 485 }
mbed_official 235:685d5f11838f 486 else
mbed_official 235:685d5f11838f 487 {
mbed_official 235:685d5f11838f 488 /* Half Transfer Complete flag */
mbed_official 235:685d5f11838f 489 temp = __HAL_DMA_GET_HT_FLAG_INDEX(hdma);
mbed_official 235:685d5f11838f 490 }
mbed_official 235:685d5f11838f 491
mbed_official 235:685d5f11838f 492 /* Get tick */
mbed_official 235:685d5f11838f 493 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 494
mbed_official 235:685d5f11838f 495 while(__HAL_DMA_GET_FLAG(hdma, temp) == RESET)
mbed_official 235:685d5f11838f 496 {
mbed_official 235:685d5f11838f 497 tmp = __HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
mbed_official 235:685d5f11838f 498 tmp1 = __HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_FE_FLAG_INDEX(hdma));
mbed_official 235:685d5f11838f 499 tmp2 = __HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_DME_FLAG_INDEX(hdma));
mbed_official 235:685d5f11838f 500 if((tmp != RESET) || (tmp1 != RESET) || (tmp2 != RESET))
mbed_official 235:685d5f11838f 501 {
mbed_official 235:685d5f11838f 502 if(tmp != RESET)
mbed_official 235:685d5f11838f 503 {
mbed_official 235:685d5f11838f 504 /* Update error code */
mbed_official 235:685d5f11838f 505 hdma->ErrorCode |= HAL_DMA_ERROR_TE;
mbed_official 235:685d5f11838f 506
mbed_official 235:685d5f11838f 507 /* Clear the transfer error flag */
mbed_official 235:685d5f11838f 508 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
mbed_official 235:685d5f11838f 509 }
mbed_official 235:685d5f11838f 510 if(tmp1 != RESET)
mbed_official 235:685d5f11838f 511 {
mbed_official 235:685d5f11838f 512 /* Update error code */
mbed_official 235:685d5f11838f 513 hdma->ErrorCode |= HAL_DMA_ERROR_FE;
mbed_official 235:685d5f11838f 514
mbed_official 235:685d5f11838f 515 /* Clear the FIFO error flag */
mbed_official 235:685d5f11838f 516 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_FE_FLAG_INDEX(hdma));
mbed_official 235:685d5f11838f 517 }
mbed_official 235:685d5f11838f 518 if(tmp2 != RESET)
mbed_official 235:685d5f11838f 519 {
mbed_official 235:685d5f11838f 520 /* Update error code */
mbed_official 235:685d5f11838f 521 hdma->ErrorCode |= HAL_DMA_ERROR_DME;
mbed_official 235:685d5f11838f 522
mbed_official 235:685d5f11838f 523 /* Clear the Direct Mode error flag */
mbed_official 235:685d5f11838f 524 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_DME_FLAG_INDEX(hdma));
mbed_official 235:685d5f11838f 525 }
mbed_official 235:685d5f11838f 526 /* Change the DMA state */
mbed_official 235:685d5f11838f 527 hdma->State= HAL_DMA_STATE_ERROR;
mbed_official 235:685d5f11838f 528
mbed_official 235:685d5f11838f 529 /* Process Unlocked */
mbed_official 235:685d5f11838f 530 __HAL_UNLOCK(hdma);
mbed_official 235:685d5f11838f 531
mbed_official 235:685d5f11838f 532 return HAL_ERROR;
mbed_official 235:685d5f11838f 533 }
mbed_official 235:685d5f11838f 534 /* Check for the Timeout */
mbed_official 235:685d5f11838f 535 if(Timeout != HAL_MAX_DELAY)
mbed_official 235:685d5f11838f 536 {
mbed_official 235:685d5f11838f 537 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
mbed_official 235:685d5f11838f 538 {
mbed_official 235:685d5f11838f 539 /* Update error code */
mbed_official 235:685d5f11838f 540 hdma->ErrorCode |= HAL_DMA_ERROR_TIMEOUT;
mbed_official 235:685d5f11838f 541
mbed_official 235:685d5f11838f 542 /* Change the DMA state */
mbed_official 235:685d5f11838f 543 hdma->State = HAL_DMA_STATE_TIMEOUT;
mbed_official 235:685d5f11838f 544
mbed_official 235:685d5f11838f 545 /* Process Unlocked */
mbed_official 235:685d5f11838f 546 __HAL_UNLOCK(hdma);
mbed_official 235:685d5f11838f 547
mbed_official 235:685d5f11838f 548 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 549 }
mbed_official 235:685d5f11838f 550 }
mbed_official 235:685d5f11838f 551 }
mbed_official 235:685d5f11838f 552
mbed_official 235:685d5f11838f 553 if(CompleteLevel == HAL_DMA_FULL_TRANSFER)
mbed_official 235:685d5f11838f 554 {
mbed_official 235:685d5f11838f 555 /* Multi_Buffering mode enabled */
mbed_official 235:685d5f11838f 556 if(((hdma->Instance->CR) & (uint32_t)(DMA_SxCR_DBM)) != 0)
mbed_official 235:685d5f11838f 557 {
mbed_official 235:685d5f11838f 558 /* Clear the half transfer complete flag */
mbed_official 235:685d5f11838f 559 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
mbed_official 235:685d5f11838f 560 /* Clear the transfer complete flag */
mbed_official 235:685d5f11838f 561 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
mbed_official 235:685d5f11838f 562
mbed_official 235:685d5f11838f 563 /* Current memory buffer used is Memory 0 */
mbed_official 235:685d5f11838f 564 if((hdma->Instance->CR & DMA_SxCR_CT) == 0)
mbed_official 235:685d5f11838f 565 {
mbed_official 235:685d5f11838f 566 /* Change DMA peripheral state */
mbed_official 235:685d5f11838f 567 hdma->State = HAL_DMA_STATE_READY_MEM0;
mbed_official 235:685d5f11838f 568 }
mbed_official 235:685d5f11838f 569 /* Current memory buffer used is Memory 1 */
mbed_official 235:685d5f11838f 570 else if((hdma->Instance->CR & DMA_SxCR_CT) != 0)
mbed_official 235:685d5f11838f 571 {
mbed_official 235:685d5f11838f 572 /* Change DMA peripheral state */
mbed_official 235:685d5f11838f 573 hdma->State = HAL_DMA_STATE_READY_MEM1;
mbed_official 235:685d5f11838f 574 }
mbed_official 235:685d5f11838f 575 }
mbed_official 235:685d5f11838f 576 else
mbed_official 235:685d5f11838f 577 {
mbed_official 235:685d5f11838f 578 /* Clear the half transfer complete flag */
mbed_official 235:685d5f11838f 579 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
mbed_official 235:685d5f11838f 580 /* Clear the transfer complete flag */
mbed_official 235:685d5f11838f 581 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
mbed_official 235:685d5f11838f 582
mbed_official 235:685d5f11838f 583 /* The selected Streamx EN bit is cleared (DMA is disabled and all transfers
mbed_official 235:685d5f11838f 584 are complete) */
mbed_official 235:685d5f11838f 585 hdma->State = HAL_DMA_STATE_READY_MEM0;
mbed_official 235:685d5f11838f 586 }
mbed_official 235:685d5f11838f 587 /* Process Unlocked */
mbed_official 235:685d5f11838f 588 __HAL_UNLOCK(hdma);
mbed_official 235:685d5f11838f 589 }
mbed_official 235:685d5f11838f 590 else
mbed_official 235:685d5f11838f 591 {
mbed_official 235:685d5f11838f 592 /* Multi_Buffering mode enabled */
mbed_official 235:685d5f11838f 593 if(((hdma->Instance->CR) & (uint32_t)(DMA_SxCR_DBM)) != 0)
mbed_official 235:685d5f11838f 594 {
mbed_official 235:685d5f11838f 595 /* Clear the half transfer complete flag */
mbed_official 235:685d5f11838f 596 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
mbed_official 235:685d5f11838f 597
mbed_official 235:685d5f11838f 598 /* Current memory buffer used is Memory 0 */
mbed_official 235:685d5f11838f 599 if((hdma->Instance->CR & DMA_SxCR_CT) == 0)
mbed_official 235:685d5f11838f 600 {
mbed_official 235:685d5f11838f 601 /* Change DMA peripheral state */
mbed_official 235:685d5f11838f 602 hdma->State = HAL_DMA_STATE_READY_HALF_MEM0;
mbed_official 235:685d5f11838f 603 }
mbed_official 235:685d5f11838f 604 /* Current memory buffer used is Memory 1 */
mbed_official 235:685d5f11838f 605 else if((hdma->Instance->CR & DMA_SxCR_CT) != 0)
mbed_official 235:685d5f11838f 606 {
mbed_official 235:685d5f11838f 607 /* Change DMA peripheral state */
mbed_official 235:685d5f11838f 608 hdma->State = HAL_DMA_STATE_READY_HALF_MEM1;
mbed_official 235:685d5f11838f 609 }
mbed_official 235:685d5f11838f 610 }
mbed_official 235:685d5f11838f 611 else
mbed_official 235:685d5f11838f 612 {
mbed_official 235:685d5f11838f 613 /* Clear the half transfer complete flag */
mbed_official 235:685d5f11838f 614 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
mbed_official 235:685d5f11838f 615
mbed_official 235:685d5f11838f 616 /* Change DMA peripheral state */
mbed_official 235:685d5f11838f 617 hdma->State = HAL_DMA_STATE_READY_HALF_MEM0;
mbed_official 235:685d5f11838f 618 }
mbed_official 235:685d5f11838f 619 }
mbed_official 235:685d5f11838f 620 return HAL_OK;
mbed_official 235:685d5f11838f 621 }
mbed_official 235:685d5f11838f 622
mbed_official 235:685d5f11838f 623 /**
mbed_official 235:685d5f11838f 624 * @brief Handles DMA interrupt request.
mbed_official 235:685d5f11838f 625 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 626 * the configuration information for the specified DMA Stream.
mbed_official 235:685d5f11838f 627 * @retval None
mbed_official 235:685d5f11838f 628 */
mbed_official 235:685d5f11838f 629 void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
mbed_official 235:685d5f11838f 630 {
mbed_official 235:685d5f11838f 631 /* Transfer Error Interrupt management ***************************************/
mbed_official 235:685d5f11838f 632 if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)) != RESET)
mbed_official 235:685d5f11838f 633 {
mbed_official 235:685d5f11838f 634 if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TE) != RESET)
mbed_official 235:685d5f11838f 635 {
mbed_official 235:685d5f11838f 636 /* Disable the transfer error interrupt */
mbed_official 235:685d5f11838f 637 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE);
mbed_official 235:685d5f11838f 638
mbed_official 235:685d5f11838f 639 /* Clear the transfer error flag */
mbed_official 235:685d5f11838f 640 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
mbed_official 235:685d5f11838f 641
mbed_official 235:685d5f11838f 642 /* Update error code */
mbed_official 235:685d5f11838f 643 hdma->ErrorCode |= HAL_DMA_ERROR_TE;
mbed_official 235:685d5f11838f 644
mbed_official 235:685d5f11838f 645 /* Change the DMA state */
mbed_official 235:685d5f11838f 646 hdma->State = HAL_DMA_STATE_ERROR;
mbed_official 235:685d5f11838f 647
mbed_official 235:685d5f11838f 648 /* Process Unlocked */
mbed_official 235:685d5f11838f 649 __HAL_UNLOCK(hdma);
mbed_official 235:685d5f11838f 650
mbed_official 235:685d5f11838f 651 if(hdma->XferErrorCallback != NULL)
mbed_official 235:685d5f11838f 652 {
mbed_official 235:685d5f11838f 653 /* Transfer error callback */
mbed_official 235:685d5f11838f 654 hdma->XferErrorCallback(hdma);
mbed_official 235:685d5f11838f 655 }
mbed_official 235:685d5f11838f 656 }
mbed_official 235:685d5f11838f 657 }
mbed_official 235:685d5f11838f 658 /* FIFO Error Interrupt management ******************************************/
mbed_official 235:685d5f11838f 659 if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_FE_FLAG_INDEX(hdma)) != RESET)
mbed_official 235:685d5f11838f 660 {
mbed_official 235:685d5f11838f 661 if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_FE) != RESET)
mbed_official 235:685d5f11838f 662 {
mbed_official 235:685d5f11838f 663 /* Disable the FIFO Error interrupt */
mbed_official 235:685d5f11838f 664 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_FE);
mbed_official 235:685d5f11838f 665
mbed_official 235:685d5f11838f 666 /* Clear the FIFO error flag */
mbed_official 235:685d5f11838f 667 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_FE_FLAG_INDEX(hdma));
mbed_official 235:685d5f11838f 668
mbed_official 235:685d5f11838f 669 /* Update error code */
mbed_official 235:685d5f11838f 670 hdma->ErrorCode |= HAL_DMA_ERROR_FE;
mbed_official 235:685d5f11838f 671
mbed_official 235:685d5f11838f 672 /* Change the DMA state */
mbed_official 235:685d5f11838f 673 hdma->State = HAL_DMA_STATE_ERROR;
mbed_official 235:685d5f11838f 674
mbed_official 235:685d5f11838f 675 /* Process Unlocked */
mbed_official 235:685d5f11838f 676 __HAL_UNLOCK(hdma);
mbed_official 235:685d5f11838f 677
mbed_official 235:685d5f11838f 678 if(hdma->XferErrorCallback != NULL)
mbed_official 235:685d5f11838f 679 {
mbed_official 235:685d5f11838f 680 /* Transfer error callback */
mbed_official 235:685d5f11838f 681 hdma->XferErrorCallback(hdma);
mbed_official 235:685d5f11838f 682 }
mbed_official 235:685d5f11838f 683 }
mbed_official 235:685d5f11838f 684 }
mbed_official 235:685d5f11838f 685 /* Direct Mode Error Interrupt management ***********************************/
mbed_official 235:685d5f11838f 686 if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_DME_FLAG_INDEX(hdma)) != RESET)
mbed_official 235:685d5f11838f 687 {
mbed_official 235:685d5f11838f 688 if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_DME) != RESET)
mbed_official 235:685d5f11838f 689 {
mbed_official 235:685d5f11838f 690 /* Disable the direct mode Error interrupt */
mbed_official 235:685d5f11838f 691 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_DME);
mbed_official 235:685d5f11838f 692
mbed_official 235:685d5f11838f 693 /* Clear the direct mode error flag */
mbed_official 235:685d5f11838f 694 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_DME_FLAG_INDEX(hdma));
mbed_official 235:685d5f11838f 695
mbed_official 235:685d5f11838f 696 /* Update error code */
mbed_official 235:685d5f11838f 697 hdma->ErrorCode |= HAL_DMA_ERROR_DME;
mbed_official 235:685d5f11838f 698
mbed_official 235:685d5f11838f 699 /* Change the DMA state */
mbed_official 235:685d5f11838f 700 hdma->State = HAL_DMA_STATE_ERROR;
mbed_official 235:685d5f11838f 701
mbed_official 235:685d5f11838f 702 /* Process Unlocked */
mbed_official 235:685d5f11838f 703 __HAL_UNLOCK(hdma);
mbed_official 235:685d5f11838f 704
mbed_official 235:685d5f11838f 705 if(hdma->XferErrorCallback != NULL)
mbed_official 235:685d5f11838f 706 {
mbed_official 235:685d5f11838f 707 /* Transfer error callback */
mbed_official 235:685d5f11838f 708 hdma->XferErrorCallback(hdma);
mbed_official 235:685d5f11838f 709 }
mbed_official 235:685d5f11838f 710 }
mbed_official 235:685d5f11838f 711 }
mbed_official 235:685d5f11838f 712 /* Half Transfer Complete Interrupt management ******************************/
mbed_official 235:685d5f11838f 713 if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)) != RESET)
mbed_official 235:685d5f11838f 714 {
mbed_official 235:685d5f11838f 715 if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_HT) != RESET)
mbed_official 235:685d5f11838f 716 {
mbed_official 235:685d5f11838f 717 /* Multi_Buffering mode enabled */
mbed_official 235:685d5f11838f 718 if(((hdma->Instance->CR) & (uint32_t)(DMA_SxCR_DBM)) != 0)
mbed_official 235:685d5f11838f 719 {
mbed_official 235:685d5f11838f 720 /* Clear the half transfer complete flag */
mbed_official 235:685d5f11838f 721 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
mbed_official 235:685d5f11838f 722
mbed_official 235:685d5f11838f 723 /* Current memory buffer used is Memory 0 */
mbed_official 235:685d5f11838f 724 if((hdma->Instance->CR & DMA_SxCR_CT) == 0)
mbed_official 235:685d5f11838f 725 {
mbed_official 235:685d5f11838f 726 /* Change DMA peripheral state */
mbed_official 235:685d5f11838f 727 hdma->State = HAL_DMA_STATE_READY_HALF_MEM0;
mbed_official 235:685d5f11838f 728 }
mbed_official 235:685d5f11838f 729 /* Current memory buffer used is Memory 1 */
mbed_official 235:685d5f11838f 730 else if((hdma->Instance->CR & DMA_SxCR_CT) != 0)
mbed_official 235:685d5f11838f 731 {
mbed_official 235:685d5f11838f 732 /* Change DMA peripheral state */
mbed_official 235:685d5f11838f 733 hdma->State = HAL_DMA_STATE_READY_HALF_MEM1;
mbed_official 235:685d5f11838f 734 }
mbed_official 235:685d5f11838f 735 }
mbed_official 235:685d5f11838f 736 else
mbed_official 235:685d5f11838f 737 {
mbed_official 235:685d5f11838f 738 /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
mbed_official 235:685d5f11838f 739 if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0)
mbed_official 235:685d5f11838f 740 {
mbed_official 235:685d5f11838f 741 /* Disable the half transfer interrupt */
mbed_official 235:685d5f11838f 742 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
mbed_official 235:685d5f11838f 743 }
mbed_official 235:685d5f11838f 744 /* Clear the half transfer complete flag */
mbed_official 235:685d5f11838f 745 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
mbed_official 235:685d5f11838f 746
mbed_official 235:685d5f11838f 747 /* Change DMA peripheral state */
mbed_official 235:685d5f11838f 748 hdma->State = HAL_DMA_STATE_READY_HALF_MEM0;
mbed_official 235:685d5f11838f 749 }
mbed_official 235:685d5f11838f 750
mbed_official 235:685d5f11838f 751 if(hdma->XferHalfCpltCallback != NULL)
mbed_official 235:685d5f11838f 752 {
mbed_official 235:685d5f11838f 753 /* Half transfer callback */
mbed_official 235:685d5f11838f 754 hdma->XferHalfCpltCallback(hdma);
mbed_official 235:685d5f11838f 755 }
mbed_official 235:685d5f11838f 756 }
mbed_official 235:685d5f11838f 757 }
mbed_official 235:685d5f11838f 758 /* Transfer Complete Interrupt management ***********************************/
mbed_official 235:685d5f11838f 759 if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)) != RESET)
mbed_official 235:685d5f11838f 760 {
mbed_official 235:685d5f11838f 761 if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TC) != RESET)
mbed_official 235:685d5f11838f 762 {
mbed_official 235:685d5f11838f 763 if(((hdma->Instance->CR) & (uint32_t)(DMA_SxCR_DBM)) != 0)
mbed_official 235:685d5f11838f 764 {
mbed_official 235:685d5f11838f 765 /* Clear the transfer complete flag */
mbed_official 235:685d5f11838f 766 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
mbed_official 235:685d5f11838f 767
mbed_official 235:685d5f11838f 768 /* Current memory buffer used is Memory 1 */
mbed_official 235:685d5f11838f 769 if((hdma->Instance->CR & DMA_SxCR_CT) == 0)
mbed_official 235:685d5f11838f 770 {
mbed_official 235:685d5f11838f 771 if(hdma->XferM1CpltCallback != NULL)
mbed_official 235:685d5f11838f 772 {
mbed_official 235:685d5f11838f 773 /* Transfer complete Callback for memory1 */
mbed_official 235:685d5f11838f 774 hdma->XferM1CpltCallback(hdma);
mbed_official 235:685d5f11838f 775 }
mbed_official 235:685d5f11838f 776 }
mbed_official 235:685d5f11838f 777 /* Current memory buffer used is Memory 0 */
mbed_official 235:685d5f11838f 778 else if((hdma->Instance->CR & DMA_SxCR_CT) != 0)
mbed_official 235:685d5f11838f 779 {
mbed_official 235:685d5f11838f 780 if(hdma->XferCpltCallback != NULL)
mbed_official 235:685d5f11838f 781 {
mbed_official 235:685d5f11838f 782 /* Transfer complete Callback for memory0 */
mbed_official 235:685d5f11838f 783 hdma->XferCpltCallback(hdma);
mbed_official 235:685d5f11838f 784 }
mbed_official 235:685d5f11838f 785 }
mbed_official 235:685d5f11838f 786 }
mbed_official 235:685d5f11838f 787 /* Disable the transfer complete interrupt if the DMA mode is not CIRCULAR */
mbed_official 235:685d5f11838f 788 else
mbed_official 235:685d5f11838f 789 {
mbed_official 235:685d5f11838f 790 if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0)
mbed_official 235:685d5f11838f 791 {
mbed_official 235:685d5f11838f 792 /* Disable the transfer complete interrupt */
mbed_official 235:685d5f11838f 793 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TC);
mbed_official 235:685d5f11838f 794 }
mbed_official 235:685d5f11838f 795 /* Clear the transfer complete flag */
mbed_official 235:685d5f11838f 796 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
mbed_official 235:685d5f11838f 797
mbed_official 235:685d5f11838f 798 /* Update error code */
mbed_official 235:685d5f11838f 799 hdma->ErrorCode |= HAL_DMA_ERROR_NONE;
mbed_official 235:685d5f11838f 800
mbed_official 235:685d5f11838f 801 /* Change the DMA state */
mbed_official 235:685d5f11838f 802 hdma->State = HAL_DMA_STATE_READY_MEM0;
mbed_official 235:685d5f11838f 803
mbed_official 235:685d5f11838f 804 /* Process Unlocked */
mbed_official 235:685d5f11838f 805 __HAL_UNLOCK(hdma);
mbed_official 235:685d5f11838f 806
mbed_official 235:685d5f11838f 807 if(hdma->XferCpltCallback != NULL)
mbed_official 235:685d5f11838f 808 {
mbed_official 235:685d5f11838f 809 /* Transfer complete callback */
mbed_official 235:685d5f11838f 810 hdma->XferCpltCallback(hdma);
mbed_official 235:685d5f11838f 811 }
mbed_official 235:685d5f11838f 812 }
mbed_official 235:685d5f11838f 813 }
mbed_official 235:685d5f11838f 814 }
mbed_official 235:685d5f11838f 815 }
mbed_official 235:685d5f11838f 816
mbed_official 235:685d5f11838f 817 /**
mbed_official 235:685d5f11838f 818 * @}
mbed_official 235:685d5f11838f 819 */
mbed_official 235:685d5f11838f 820
mbed_official 235:685d5f11838f 821 /** @defgroup DMA_Group3 Peripheral State functions
mbed_official 235:685d5f11838f 822 * @brief Peripheral State functions
mbed_official 235:685d5f11838f 823 *
mbed_official 235:685d5f11838f 824 @verbatim
mbed_official 235:685d5f11838f 825 ===============================================================================
mbed_official 235:685d5f11838f 826 ##### State and Errors functions #####
mbed_official 235:685d5f11838f 827 ===============================================================================
mbed_official 235:685d5f11838f 828 [..]
mbed_official 235:685d5f11838f 829 This subsection provides functions allowing to
mbed_official 235:685d5f11838f 830 (+) Check the DMA state
mbed_official 235:685d5f11838f 831 (+) Get error code
mbed_official 235:685d5f11838f 832
mbed_official 235:685d5f11838f 833 @endverbatim
mbed_official 235:685d5f11838f 834 * @{
mbed_official 235:685d5f11838f 835 */
mbed_official 235:685d5f11838f 836
mbed_official 235:685d5f11838f 837 /**
mbed_official 235:685d5f11838f 838 * @brief Returns the DMA state.
mbed_official 235:685d5f11838f 839 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 840 * the configuration information for the specified DMA Stream.
mbed_official 235:685d5f11838f 841 * @retval HAL state
mbed_official 235:685d5f11838f 842 */
mbed_official 235:685d5f11838f 843 HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma)
mbed_official 235:685d5f11838f 844 {
mbed_official 235:685d5f11838f 845 return hdma->State;
mbed_official 235:685d5f11838f 846 }
mbed_official 235:685d5f11838f 847
mbed_official 235:685d5f11838f 848 /**
mbed_official 235:685d5f11838f 849 * @brief Return the DMA error code
mbed_official 235:685d5f11838f 850 * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 851 * the configuration information for the specified DMA Stream.
mbed_official 235:685d5f11838f 852 * @retval DMA Error Code
mbed_official 235:685d5f11838f 853 */
mbed_official 235:685d5f11838f 854 uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma)
mbed_official 235:685d5f11838f 855 {
mbed_official 235:685d5f11838f 856 return hdma->ErrorCode;
mbed_official 235:685d5f11838f 857 }
mbed_official 235:685d5f11838f 858
mbed_official 235:685d5f11838f 859 /**
mbed_official 235:685d5f11838f 860 * @}
mbed_official 235:685d5f11838f 861 */
mbed_official 235:685d5f11838f 862
mbed_official 235:685d5f11838f 863 /**
mbed_official 235:685d5f11838f 864 * @brief Sets the DMA Transfer parameter.
mbed_official 235:685d5f11838f 865 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 866 * the configuration information for the specified DMA Stream.
mbed_official 235:685d5f11838f 867 * @param SrcAddress: The source memory Buffer address
mbed_official 235:685d5f11838f 868 * @param DstAddress: The destination memory Buffer address
mbed_official 235:685d5f11838f 869 * @param DataLength: The length of data to be transferred from source to destination
mbed_official 235:685d5f11838f 870 * @retval HAL status
mbed_official 235:685d5f11838f 871 */
mbed_official 235:685d5f11838f 872 static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
mbed_official 235:685d5f11838f 873 {
mbed_official 235:685d5f11838f 874 /* Configure DMA Stream data length */
mbed_official 235:685d5f11838f 875 hdma->Instance->NDTR = DataLength;
mbed_official 235:685d5f11838f 876
mbed_official 235:685d5f11838f 877 /* Peripheral to Memory */
mbed_official 235:685d5f11838f 878 if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
mbed_official 235:685d5f11838f 879 {
mbed_official 235:685d5f11838f 880 /* Configure DMA Stream destination address */
mbed_official 235:685d5f11838f 881 hdma->Instance->PAR = DstAddress;
mbed_official 235:685d5f11838f 882
mbed_official 235:685d5f11838f 883 /* Configure DMA Stream source address */
mbed_official 235:685d5f11838f 884 hdma->Instance->M0AR = SrcAddress;
mbed_official 235:685d5f11838f 885 }
mbed_official 235:685d5f11838f 886 /* Memory to Peripheral */
mbed_official 235:685d5f11838f 887 else
mbed_official 235:685d5f11838f 888 {
mbed_official 235:685d5f11838f 889 /* Configure DMA Stream source address */
mbed_official 235:685d5f11838f 890 hdma->Instance->PAR = SrcAddress;
mbed_official 235:685d5f11838f 891
mbed_official 235:685d5f11838f 892 /* Configure DMA Stream destination address */
mbed_official 235:685d5f11838f 893 hdma->Instance->M0AR = DstAddress;
mbed_official 235:685d5f11838f 894 }
mbed_official 235:685d5f11838f 895 }
mbed_official 235:685d5f11838f 896
mbed_official 235:685d5f11838f 897 /**
mbed_official 235:685d5f11838f 898 * @}
mbed_official 235:685d5f11838f 899 */
mbed_official 235:685d5f11838f 900
mbed_official 235:685d5f11838f 901 #endif /* HAL_DMA_MODULE_ENABLED */
mbed_official 235:685d5f11838f 902 /**
mbed_official 235:685d5f11838f 903 * @}
mbed_official 235:685d5f11838f 904 */
mbed_official 235:685d5f11838f 905
mbed_official 235:685d5f11838f 906 /**
mbed_official 235:685d5f11838f 907 * @}
mbed_official 235:685d5f11838f 908 */
mbed_official 235:685d5f11838f 909
mbed_official 235:685d5f11838f 910 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/