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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F334R8/stm32f3xx_hal_hrtim.h@323:9e901b0a5aa1, 2014-09-13 (annotated)

Committer:: shaoziyang
Date:: Sat Sep 13 14:25:46 2014 +0000
Revision:: 323:9e901b0a5aa1
Parent:: 237:f3da66175598

test with CLOCK_SETUP = 0

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User	Revision	Line number	New contents of line
mbed_official	237:f3da66175598	1	/**
mbed_official	237:f3da66175598	2	******************************************************************************
mbed_official	237:f3da66175598	3	* @file stm32f3xx_hal_hrtim.h
mbed_official	237:f3da66175598	4	* @author MCD Application Team
mbed_official	237:f3da66175598	5	* @version V1.0.1
mbed_official	237:f3da66175598	6	* @date 18-June-2014
mbed_official	237:f3da66175598	7	* @brief Header file of HRTIM HAL module.
mbed_official	237:f3da66175598	8	******************************************************************************
mbed_official	237:f3da66175598	9	* @attention
mbed_official	237:f3da66175598	10	*
mbed_official	237:f3da66175598	11	* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official	237:f3da66175598	12	*
mbed_official	237:f3da66175598	13	* Redistribution and use in source and binary forms, with or without modification,
mbed_official	237:f3da66175598	14	* are permitted provided that the following conditions are met:
mbed_official	237:f3da66175598	15	* 1. Redistributions of source code must retain the above copyright notice,
mbed_official	237:f3da66175598	16	* this list of conditions and the following disclaimer.
mbed_official	237:f3da66175598	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official	237:f3da66175598	18	* this list of conditions and the following disclaimer in the documentation
mbed_official	237:f3da66175598	19	* and/or other materials provided with the distribution.
mbed_official	237:f3da66175598	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official	237:f3da66175598	21	* may be used to endorse or promote products derived from this software
mbed_official	237:f3da66175598	22	* without specific prior written permission.
mbed_official	237:f3da66175598	23	*
mbed_official	237:f3da66175598	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official	237:f3da66175598	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official	237:f3da66175598	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official	237:f3da66175598	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official	237:f3da66175598	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official	237:f3da66175598	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official	237:f3da66175598	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official	237:f3da66175598	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official	237:f3da66175598	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official	237:f3da66175598	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official	237:f3da66175598	34	*
mbed_official	237:f3da66175598	35	******************************************************************************
mbed_official	237:f3da66175598	36	*/
mbed_official	237:f3da66175598	37
mbed_official	237:f3da66175598	38	/* Define to prevent recursive inclusion -------------------------------------*/
mbed_official	237:f3da66175598	39	#ifndef __STM32F3xx_HAL_HRTIM_H
mbed_official	237:f3da66175598	40	#define __STM32F3xx_HAL_HRTIM_H
mbed_official	237:f3da66175598	41
mbed_official	237:f3da66175598	42	#ifdef __cplusplus
mbed_official	237:f3da66175598	43	extern "C" {
mbed_official	237:f3da66175598	44	#endif
mbed_official	237:f3da66175598	45
mbed_official	237:f3da66175598	46	#if defined(STM32F334x8)
mbed_official	237:f3da66175598	47
mbed_official	237:f3da66175598	48	/* Includes ------------------------------------------------------------------*/
mbed_official	237:f3da66175598	49	#include "stm32f3xx_hal_def.h"
mbed_official	237:f3da66175598	50
mbed_official	237:f3da66175598	51	/** @addtogroup STM32F3xx_HAL_Driver
mbed_official	237:f3da66175598	52	* @{
mbed_official	237:f3da66175598	53	*/
mbed_official	237:f3da66175598	54
mbed_official	237:f3da66175598	55	/** @addtogroup HRTIM
mbed_official	237:f3da66175598	56	* @{
mbed_official	237:f3da66175598	57	*/
mbed_official	237:f3da66175598	58
mbed_official	237:f3da66175598	59	/* Exported types ------------------------------------------------------------*/
mbed_official	237:f3da66175598	60	#define MAX_HRTIM_TIMER 6
mbed_official	237:f3da66175598	61
mbed_official	237:f3da66175598	62	/**
mbed_official	237:f3da66175598	63	* @brief HRTIM Configuration Structure definition - Time base related parameters
mbed_official	237:f3da66175598	64	*/
mbed_official	237:f3da66175598	65	typedef struct
mbed_official	237:f3da66175598	66	{
mbed_official	237:f3da66175598	67	uint32_t HRTIMInterruptResquests; /*!< Specifies which interrupts requests must enabled for the HRTIM instance
mbed_official	237:f3da66175598	68	This parameter can be any combination of @ref HRTIM_Common_Interrupt_Enable */
mbed_official	237:f3da66175598	69	uint32_t SyncOptions; /*!< Specifies how the HRTIM instance handles the external synchronization signals
mbed_official	237:f3da66175598	70	This parameter can be a combination of @ref HRTIM_Synchronization_Options */
mbed_official	237:f3da66175598	71	uint32_t SyncInputSource; /*!< Specifies the external synchronization input source
mbed_official	237:f3da66175598	72	This parameter can be a value of @ref HRTIM_Synchronization_Input_Source */
mbed_official	237:f3da66175598	73	uint32_t SyncOutputSource; /*!< Specifies the source and event to be sent on the external synchronization outputs
mbed_official	237:f3da66175598	74	This parameter can be a value of @ref HRTIM_Synchronization_Output_Source */
mbed_official	237:f3da66175598	75	uint32_t SyncOutputPolarity; /*!< Specifies the conditionning of the event to be sent on the external synchronization outputs
mbed_official	237:f3da66175598	76	This parameter can be a value of @ref HRTIM_Synchronization_Output_Polarity */
mbed_official	237:f3da66175598	77	} HRTIM_InitTypeDef;
mbed_official	237:f3da66175598	78
mbed_official	237:f3da66175598	79	/**
mbed_official	237:f3da66175598	80	* @brief HAL State structures definition
mbed_official	237:f3da66175598	81	*/
mbed_official	237:f3da66175598	82	typedef enum
mbed_official	237:f3da66175598	83	{
mbed_official	237:f3da66175598	84	HAL_HRTIM_STATE_READY = 0x01, /!< Peripheral Initialized and ready for use /
mbed_official	237:f3da66175598	85	HAL_HRTIM_STATE_BUSY = 0x02, /!< an internal process is ongoing /
mbed_official	237:f3da66175598	86	HAL_HRTIM_STATE_TIMEOUT = 0x06, /!< Timeout state /
mbed_official	237:f3da66175598	87	HAL_HRTIM_STATE_ERROR = 0x07, /!< Error state /
mbed_official	237:f3da66175598	88	} HAL_HRTIM_StateTypeDef;
mbed_official	237:f3da66175598	89
mbed_official	237:f3da66175598	90	/**
mbed_official	237:f3da66175598	91	* @brief HRTIM Timer Structure definition
mbed_official	237:f3da66175598	92	*/
mbed_official	237:f3da66175598	93	typedef struct
mbed_official	237:f3da66175598	94	{
mbed_official	237:f3da66175598	95	uint32_t CaptureTrigger1; /!< Event(s) triggering capture unit 1 /
mbed_official	237:f3da66175598	96	uint32_t CaptureTrigger2; /!< Event(s) triggering capture unit 2 /
mbed_official	237:f3da66175598	97	uint32_t InterruptRequests; /!< Interrupts requests enabled for the timer /
mbed_official	237:f3da66175598	98	uint32_t DMARequests; /!< DMA requests enabled for the timer /
mbed_official	237:f3da66175598	99	uint32_t DMASrcAddress; /!< Address of the source address of the DMA transfer /
mbed_official	237:f3da66175598	100	uint32_t DMADstAddress; /!< Address of the destination address of the DMA transfer /
mbed_official	237:f3da66175598	101	uint32_t DMASize; /!< Ssize of the DMA transfer /
mbed_official	237:f3da66175598	102	} HRTIM_TimerParamTypeDef;
mbed_official	237:f3da66175598	103
mbed_official	237:f3da66175598	104	/**
mbed_official	237:f3da66175598	105	* @brief HRTIM Handle Structure definition
mbed_official	237:f3da66175598	106	*/
mbed_official	237:f3da66175598	107	typedef struct __HRTIM_HandleTypeDef
mbed_official	237:f3da66175598	108	{
mbed_official	237:f3da66175598	109	HRTIM_TypeDef * Instance; /!< Register base address /
mbed_official	237:f3da66175598	110
mbed_official	237:f3da66175598	111	HRTIM_InitTypeDef Init; /!< HRTIM required parameters /
mbed_official	237:f3da66175598	112
mbed_official	237:f3da66175598	113	HRTIM_TimerParamTypeDef TimerParam[MAX_HRTIM_TIMER]; /!< HRTIM timers - including the master - parameters /
mbed_official	237:f3da66175598	114
mbed_official	237:f3da66175598	115	HAL_LockTypeDef Lock; /!< Locking object /
mbed_official	237:f3da66175598	116
mbed_official	237:f3da66175598	117	__IO HAL_HRTIM_StateTypeDef State; /!< HRTIM communication state /
mbed_official	237:f3da66175598	118
mbed_official	237:f3da66175598	119	DMA_HandleTypeDef * hdmaMaster; /!< Master timer DMA handle parameters /
mbed_official	237:f3da66175598	120	DMA_HandleTypeDef * hdmaTimerA; /!< Timer A DMA handle parameters /
mbed_official	237:f3da66175598	121	DMA_HandleTypeDef * hdmaTimerB; /!< Timer B DMA handle parameters /
mbed_official	237:f3da66175598	122	DMA_HandleTypeDef * hdmaTimerC; /!< Timer C DMA handle parameters /
mbed_official	237:f3da66175598	123	DMA_HandleTypeDef * hdmaTimerD; /!< Timer D DMA handle parameters /
mbed_official	237:f3da66175598	124	DMA_HandleTypeDef * hdmaTimerE; /!< Timer E DMA handle parameters /
mbed_official	237:f3da66175598	125	} HRTIM_HandleTypeDef;
mbed_official	237:f3da66175598	126
mbed_official	237:f3da66175598	127	/**
mbed_official	237:f3da66175598	128	* @brief Simple output compare mode configuration definition
mbed_official	237:f3da66175598	129	*/
mbed_official	237:f3da66175598	130	typedef struct {
mbed_official	237:f3da66175598	131	uint32_t Period; /*!< Specifies the timer period
mbed_official	237:f3da66175598	132	The period value must be above 3 periods of the fHRTIM clock.
mbed_official	237:f3da66175598	133	Maximum value is = 0xFFDF */
mbed_official	237:f3da66175598	134	uint32_t RepetitionCounter; /*!< Specifies the timer repetition period
mbed_official	237:f3da66175598	135	This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
mbed_official	237:f3da66175598	136	uint32_t PrescalerRatio; /*!< Specifies the timer clock prescaler ratio.
mbed_official	237:f3da66175598	137	This parameter can be any value of @ref HRTIM_Prescaler_Ratio */
mbed_official	237:f3da66175598	138	uint32_t Mode; /*!< Specifies the counter operating mode
mbed_official	237:f3da66175598	139	This parameter can be any value of @ref HRTIM_Mode */
mbed_official	237:f3da66175598	140	} HRTIM_TimeBaseCfgTypeDef;
mbed_official	237:f3da66175598	141
mbed_official	237:f3da66175598	142	/**
mbed_official	237:f3da66175598	143	* @brief Simple output compare mode configuration definition
mbed_official	237:f3da66175598	144	*/
mbed_official	237:f3da66175598	145	typedef struct {
mbed_official	237:f3da66175598	146	uint32_t Mode; /*!< Specifies the output compare mode (toggle, active, inactive)
mbed_official	237:f3da66175598	147	This parameter can be any value of of @ref HRTIM_Simple_OC_Mode */
mbed_official	237:f3da66175598	148	uint32_t Pulse; /*!< Specifies the compare value to be loaded into the Compare Register.
mbed_official	237:f3da66175598	149	The compare value must be above or equal to 3 periods of the fHRTIM clock */
mbed_official	237:f3da66175598	150	uint32_t Polarity; /*!< Specifies the output polarity
mbed_official	237:f3da66175598	151	This parameter can be any value of @ref HRTIM_Output_Polarity */
mbed_official	237:f3da66175598	152	uint32_t IdleLevel; /*!< Specifies whether the output level is active or inactive when in IDLE state
mbed_official	237:f3da66175598	153	This parameter can be any value of @ref HRTIM_Output_IDLE_Level */
mbed_official	237:f3da66175598	154	} HRTIM_SimpleOCChannelCfgTypeDef;
mbed_official	237:f3da66175598	155
mbed_official	237:f3da66175598	156	/**
mbed_official	237:f3da66175598	157	* @brief Simple PWM output mode configuration definition
mbed_official	237:f3da66175598	158	*/
mbed_official	237:f3da66175598	159	typedef struct {
mbed_official	237:f3da66175598	160	uint32_t Pulse; /*!< Specifies the compare value to be loaded into the Compare Register.
mbed_official	237:f3da66175598	161	The compare value must be above or equal to 3 periods of the fHRTIM clock */
mbed_official	237:f3da66175598	162	uint32_t Polarity; /*!< Specifies the output polarity
mbed_official	237:f3da66175598	163	This parameter can be any value of @ref HRTIM_Output_Polarity */
mbed_official	237:f3da66175598	164	uint32_t IdleLevel; /*!< Specifies whether the output level is active or inactive when in IDLE state
mbed_official	237:f3da66175598	165	This parameter can be any value of @ref HRTIM_Output_IDLE_Level */
mbed_official	237:f3da66175598	166	} HRTIM_SimplePWMChannelCfgTypeDef;
mbed_official	237:f3da66175598	167
mbed_official	237:f3da66175598	168	/**
mbed_official	237:f3da66175598	169	* @brief Simple capture mode configuration definition
mbed_official	237:f3da66175598	170	*/
mbed_official	237:f3da66175598	171	typedef struct {
mbed_official	237:f3da66175598	172	uint32_t Event; /*!< Specifies the external event triggering the capture
mbed_official	237:f3da66175598	173	This parameter can be any 'EEVx' value of @ref HRTIM_External_Event_Channels */
mbed_official	237:f3da66175598	174	uint32_t EventPolarity; /*!< Specifies the polarity of the external event (in case of level sensitivity)
mbed_official	237:f3da66175598	175	This parameter can be a value of @ref HRTIM_External_Event_Polarity */
mbed_official	237:f3da66175598	176	uint32_t EventSensitivity; /*!< Specifies the sensitivity of the external event
mbed_official	237:f3da66175598	177	This parameter can be a value of @ref HRTIM_External_Event_Sensitivity */
mbed_official	237:f3da66175598	178	uint32_t EventFilter; /*!< Defines the frequency used to sample the External Event and the length of the digital filter
mbed_official	237:f3da66175598	179	This parameter can be a value of @ref HRTIM_External_Event_Filter */
mbed_official	237:f3da66175598	180	} HRTIM_SimpleCaptureChannelCfgTypeDef;
mbed_official	237:f3da66175598	181
mbed_official	237:f3da66175598	182	/**
mbed_official	237:f3da66175598	183	* @brief Simple One Pulse mode configuration definition
mbed_official	237:f3da66175598	184	*/
mbed_official	237:f3da66175598	185	typedef struct {
mbed_official	237:f3da66175598	186	uint32_t Pulse; /*!< Specifies the compare value to be loaded into the Compare Register.
mbed_official	237:f3da66175598	187	The compare value must be above or equal to 3 periods of the fHRTIM clock */
mbed_official	237:f3da66175598	188	uint32_t OutputPolarity; /*!< Specifies the output polarity
mbed_official	237:f3da66175598	189	This parameter can be any value of @ref HRTIM_Output_Polarity */
mbed_official	237:f3da66175598	190	uint32_t OutputIdleLevel; /*!< Specifies whether the output level is active or inactive when in IDLE state
mbed_official	237:f3da66175598	191	This parameter can be any value of @ref HRTIM_Output_IDLE_Level */
mbed_official	237:f3da66175598	192	uint32_t Event; /*!< Specifies the external event triggering the pulse generation
mbed_official	237:f3da66175598	193	This parameter can be any 'EEVx' value of @ref HRTIM_External_Event_Channels */
mbed_official	237:f3da66175598	194	uint32_t EventPolarity; /*!< Specifies the polarity of the external event (in case of level sensitivity)
mbed_official	237:f3da66175598	195	This parameter can be a value of @ref HRTIM_External_Event_Polarity */
mbed_official	237:f3da66175598	196	uint32_t EventSensitivity; /*!< Specifies the sensitivity of the external event
mbed_official	237:f3da66175598	197	This parameter can be a value of @ref HRTIM_External_Event_Sensitivity */
mbed_official	237:f3da66175598	198	uint32_t EventFilter; /*!< Defines the frequency used to sample the External Event and the length of the digital filter
mbed_official	237:f3da66175598	199	This parameter can be a value of @ref HRTIM_External_Event_Filter */
mbed_official	237:f3da66175598	200	} HRTIM_SimpleOnePulseChannelCfgTypeDef;
mbed_official	237:f3da66175598	201
mbed_official	237:f3da66175598	202	/**
mbed_official	237:f3da66175598	203	* @brief Timer configuration definition
mbed_official	237:f3da66175598	204	*/
mbed_official	237:f3da66175598	205	typedef struct {
mbed_official	237:f3da66175598	206	uint32_t InterruptRequests; /*!< Relevant for all HRTIM timers, including the master
mbed_official	237:f3da66175598	207	Specifies which interrupts requests must enabled for the timer
mbed_official	237:f3da66175598	208	This parameter can be any combination of @ref HRTIM_Master_Interrupt_Enable
mbed_official	237:f3da66175598	209	or HRTIM_Timing_Unit_Interrupt_Enable */
mbed_official	237:f3da66175598	210	uint32_t DMARequests; /*!< Relevant for all HRTIM timers, including the master
mbed_official	237:f3da66175598	211	Specifies which DMA requests must be enabled for the timer
mbed_official	237:f3da66175598	212	This parameter can be any combination of @ref HRTIM_Master_DMA_Request_Enable
mbed_official	237:f3da66175598	213	or HRTIM_Timing_Unit_DMA_Request_Enable */
mbed_official	237:f3da66175598	214	uint32_t DMASrcAddress; /*!< Relevant for all HRTIM timers, including the master
mbed_official	237:f3da66175598	215	Specifies the address of the source address of the DMA transfer */
mbed_official	237:f3da66175598	216	uint32_t DMADstAddress; /*!< Relevant for all HRTIM timers, including the master
mbed_official	237:f3da66175598	217	Specifies the address of the destination address of the DMA transfer */
mbed_official	237:f3da66175598	218	uint32_t DMASize; /*!< Relevant for all HRTIM timers, including the master
mbed_official	237:f3da66175598	219	Specifies the size of the DMA transfer */
mbed_official	237:f3da66175598	220	uint32_t HalfModeEnable; /*!< Relevant for all HRTIM timers, including the master
mbed_official	237:f3da66175598	221	Specifies whether or not hald mode is enabled
mbed_official	237:f3da66175598	222	This parameter can be any value of @ref HRTIM_Half_Mode_Enable */
mbed_official	237:f3da66175598	223	uint32_t StartOnSync; /*!< Relevant for all HRTIM timers, including the master
mbed_official	237:f3da66175598	224	Specifies whether or not timer is reset by a rising edge on the synchronization input (when enabled)
mbed_official	237:f3da66175598	225	This parameter can be any value of @ref HRTIM_Start_On_Sync_Input_Event */
mbed_official	237:f3da66175598	226	uint32_t ResetOnSync; /*!< Relevant for all HRTIM timers, including the master
mbed_official	237:f3da66175598	227	Specifies whether or not timer is reset by a rising edge on the synchronization input (when enabled)
mbed_official	237:f3da66175598	228	This parameter can be any value of @ref HRTIM_Reset_On_Sync_Input_Event */
mbed_official	237:f3da66175598	229	uint32_t DACSynchro; /*!< Relevant for all HRTIM timers, including the master
mbed_official	237:f3da66175598	230	Indicates whether or not the a DAC synchronization event is generated
mbed_official	237:f3da66175598	231	This parameter can be any value of @ref HRTIM_DAC_Synchronization */
mbed_official	237:f3da66175598	232	uint32_t PreloadEnable; /*!< Relevant for all HRTIM timers, including the master
mbed_official	237:f3da66175598	233	Specifies whether or not register preload is enabled
mbed_official	237:f3da66175598	234	This parameter can be any value of @ref HRTIM_Register_Preload_Enable */
mbed_official	237:f3da66175598	235	uint32_t UpdateGating; /*!< Relevant for all HRTIM timers, including the master
mbed_official	237:f3da66175598	236	Specifies how the update occurs with respect to a burst DMA transaction or
mbed_official	237:f3da66175598	237	update enable inputs (Slave timers only)
mbed_official	237:f3da66175598	238	This parameter can be any value of @ref HRTIM_Update_Gating */
mbed_official	237:f3da66175598	239	uint32_t BurstMode; /*!< Relevant for all HRTIM timers, including the master
mbed_official	237:f3da66175598	240	Specifies how the timer behaves during a burst mode operation
mbed_official	237:f3da66175598	241	This parameter can be any value of @ref HRTIM_Timer_Burst_Mode */
mbed_official	237:f3da66175598	242	uint32_t RepetitionUpdate; /*!< Relevant for all HRTIM timers, including the master
mbed_official	237:f3da66175598	243	Specifies whether or not registers update is triggered by the repetition event
mbed_official	237:f3da66175598	244	This parameter can be any valuen of @ref HRTIM_Timer_Repetition_Update */
mbed_official	237:f3da66175598	245	uint32_t PushPull; /*!< Relevant for Timer A to Timer E
mbed_official	237:f3da66175598	246	Specifies whether or not the push-pull mode is enabled
mbed_official	237:f3da66175598	247	This parameter can be any value of @ref HRTIM_Timer_Push_Pull_Mode */
mbed_official	237:f3da66175598	248	uint32_t FaultEnable; /*!< Relevant for Timer A to Timer E
mbed_official	237:f3da66175598	249	Specifies which fault channels are enabled for the timer
mbed_official	237:f3da66175598	250	This parameter can be a combination of @ref HRTIM_Timer_Fault_Enabling */
mbed_official	237:f3da66175598	251	uint32_t FaultLock; /*!< Relevant for Timer A to Timer E
mbed_official	237:f3da66175598	252	Specifies whether or not fault enabling status is write protected
mbed_official	237:f3da66175598	253	This parameter can be a value of @ref HRTIM_Timer_Fault_Lock */
mbed_official	237:f3da66175598	254	uint32_t DeadTimeInsertion; /*!< Relevant for Timer A to Timer E
mbed_official	237:f3da66175598	255	Specifies whether or not deadtime insertion is enabled for the timer
mbed_official	237:f3da66175598	256	This parameter can be a value of @ref HRTIM_Timer_Deadtime_Insertion */
mbed_official	237:f3da66175598	257	uint32_t DelayedProtectionMode; /*!< Relevant for Timer A to Timer E
mbed_official	237:f3da66175598	258	Specifies the delayed protection mode
mbed_official	237:f3da66175598	259	This parameter can be a value of @ref HRTIM_Timer_Delayed_Protection_Mode */
mbed_official	237:f3da66175598	260	uint32_t UpdateTrigger; /*!< Relevant for Timer A to Timer E
mbed_official	237:f3da66175598	261	Specifies source(s) triggering the timer registers update
mbed_official	237:f3da66175598	262	This parameter can be a combination of @ref HRTIM_Timer_Update_Trigger */
mbed_official	237:f3da66175598	263	uint32_t ResetTrigger; /*!< Relevant for Timer A to Timer E
mbed_official	237:f3da66175598	264	Specifies source(s) triggering the timer counter reset
mbed_official	237:f3da66175598	265	This parameter can be a combination of @ref HRTIM_Timer_Reset_Trigger */
mbed_official	237:f3da66175598	266	uint32_t ResetUpdate; /*!< Relevant for Timer A to Timer E
mbed_official	237:f3da66175598	267	Specifies whether or not registers update is triggered when the timer counter is reset
mbed_official	237:f3da66175598	268	This parameter can be a value of @ref HRTIM_Timer_Reset_Update */
mbed_official	237:f3da66175598	269	} HRTIM_TimerCfgTypeDef;
mbed_official	237:f3da66175598	270
mbed_official	237:f3da66175598	271	/**
mbed_official	237:f3da66175598	272	* @brief Compare unit configuration definition
mbed_official	237:f3da66175598	273	*/
mbed_official	237:f3da66175598	274	typedef struct {
mbed_official	237:f3da66175598	275	uint32_t CompareValue; /*!< Specifies the compare value of the timer compare unit
mbed_official	237:f3da66175598	276	the minimum value must be greater than or equal to 3 periods of the fHRTIM clock
mbed_official	237:f3da66175598	277	the maximum value must be less than or equal to 0xFFFF - 1 periods of the fHRTIM clock */
mbed_official	237:f3da66175598	278	uint32_t AutoDelayedMode; /*!< Specifies the auto delayed mode for compare unit 2 or 4
mbed_official	237:f3da66175598	279	This parameter can be a value of @ref HRTIM_Compare_Unit_Auto_Delayed_Mode */
mbed_official	237:f3da66175598	280	uint32_t AutoDelayedTimeout; /*!< Specifies compare value for timing unit 1 or 3 when auto delayed mode with time out is selected
mbed_official	237:f3da66175598	281	CompareValue + AutoDelayedTimeout must be less than 0xFFFF */
mbed_official	237:f3da66175598	282	} HRTIM_CompareCfgTypeDef;
mbed_official	237:f3da66175598	283
mbed_official	237:f3da66175598	284	/**
mbed_official	237:f3da66175598	285	* @brief Capture unit configuration definition
mbed_official	237:f3da66175598	286	*/
mbed_official	237:f3da66175598	287	typedef struct {
mbed_official	237:f3da66175598	288	uint32_t Trigger; /*!< Specifies source(s) triggering the capture
mbed_official	237:f3da66175598	289	This parameter can be a combination of @ref HRTIM_Capture_Unit_Trigger */
mbed_official	237:f3da66175598	290	} HRTIM_CaptureCfgTypeDef;
mbed_official	237:f3da66175598	291
mbed_official	237:f3da66175598	292	/**
mbed_official	237:f3da66175598	293	* @brief Output configuration definition
mbed_official	237:f3da66175598	294	*/
mbed_official	237:f3da66175598	295	typedef struct {
mbed_official	237:f3da66175598	296	uint32_t Polarity; /*!< Specifies the output polarity
mbed_official	237:f3da66175598	297	This parameter can be any value of @ref HRTIM_Output_Polarity */
mbed_official	237:f3da66175598	298	uint32_t SetSource; /*!< Specifies the event(s) transitioning the output from its inactive level to its active level
mbed_official	237:f3da66175598	299	This parameter can be a combination of @ref HRTIM_Output_Set_Source */
mbed_official	237:f3da66175598	300	uint32_t ResetSource; /*!< Specifies the event(s) transitioning the output from its active level to its inactive level
mbed_official	237:f3da66175598	301	This parameter can be a combination of @ref HRTIM_Output_Reset_Source */
mbed_official	237:f3da66175598	302	uint32_t IdleMode; /*!< Specifies whether or not the output is affected by a burst mode operation
mbed_official	237:f3da66175598	303	This parameter can be any value of @ref HRTIM_Output_Idle_Mode */
mbed_official	237:f3da66175598	304	uint32_t IdleLevel; /*!< Specifies whether the output level is active or inactive when in IDLE state
mbed_official	237:f3da66175598	305	This parameter can be any value of @ref HRTIM_Output_IDLE_Level */
mbed_official	237:f3da66175598	306	uint32_t FaultLevel; /*!< Specifies whether the output level is active or inactive when in FAULT state
mbed_official	237:f3da66175598	307	This parameter can be any value of @ref HRTIM_Output_FAULT_Level */
mbed_official	237:f3da66175598	308	uint32_t ChopperModeEnable; /*!< Indicates whether or not the chopper mode is enabled
mbed_official	237:f3da66175598	309	This parameter can be any value of @ref HRTIM_Output_Chopper_Mode_Enable */
mbed_official	237:f3da66175598	310	uint32_t BurstModeEntryDelayed; /* !<Indicates whether or not deadtime is inserted when entering the IDLE state
mbed_official	237:f3da66175598	311	during a burst mode operation
mbed_official	237:f3da66175598	312	This parameters can be any value of @ref HRTIM_Output_Burst_Mode_Entry_Delayed */
mbed_official	237:f3da66175598	313	} HRTIM_OutputCfgTypeDef;
mbed_official	237:f3da66175598	314
mbed_official	237:f3da66175598	315	/**
mbed_official	237:f3da66175598	316	* @brief External event filtering in timing units configuration definition
mbed_official	237:f3da66175598	317	*/
mbed_official	237:f3da66175598	318	typedef struct {
mbed_official	237:f3da66175598	319	uint32_t Filter; /*!< Specifies the type of event filtering within the timing unit
mbed_official	237:f3da66175598	320	This parameter can be a value of @ref HRTIM_Timer_External_Event_Filter */
mbed_official	237:f3da66175598	321	uint32_t Latch; /*!< Specifies whether or not the signal is latched
mbed_official	237:f3da66175598	322	This parameter can be a value of @ref HRTIM_Timer_External_Event_Latch */
mbed_official	237:f3da66175598	323	} HRTIM_TimerEventFilteringCfgTypeDef;
mbed_official	237:f3da66175598	324
mbed_official	237:f3da66175598	325	/**
mbed_official	237:f3da66175598	326	* @brief Dead time feature configuration definition
mbed_official	237:f3da66175598	327	*/
mbed_official	237:f3da66175598	328	typedef struct {
mbed_official	237:f3da66175598	329	uint32_t Prescaler; /*!< Specifies the Deadtime Prescaler
mbed_official	237:f3da66175598	330	This parameter can be a value of @ref HRTIM_Deadtime_Prescaler_Ratio */
mbed_official	237:f3da66175598	331	uint32_t RisingValue; /*!< Specifies the Deadtime following a rising edge
mbed_official	237:f3da66175598	332	This parameter can be a number between 0x0 and 0x1FF */
mbed_official	237:f3da66175598	333	uint32_t RisingSign; /*!< Specifies whether the deadtime is positive or negative on rising edge
mbed_official	237:f3da66175598	334	This parameter can be a value of @ref HRTIM_Deadtime_Rising_Sign */
mbed_official	237:f3da66175598	335	uint32_t RisingLock; /*!< Specifies whether or not deadtime rising settings (value and sign) are write protected
mbed_official	237:f3da66175598	336	This parameter can be a value of @ref HRTIM_Deadtime_Rising_Lock */
mbed_official	237:f3da66175598	337	uint32_t RisingSignLock; /*!< Specifies whether or not deadtime rising sign is write protected
mbed_official	237:f3da66175598	338	This parameter can be a value of @ref HRTIM_Deadtime_Rising_Sign_Lock */
mbed_official	237:f3da66175598	339	uint32_t FallingValue; /*!< Specifies the Deadtime following a falling edge
mbed_official	237:f3da66175598	340	This parameter can be a number between 0x0 and 0x1FF */
mbed_official	237:f3da66175598	341	uint32_t FallingSign; /*!< Specifies whether the deadtime is positive or negative on falling edge
mbed_official	237:f3da66175598	342	This parameter can be a value of @ref HRTIM_Deadtime_Falling_Sign */
mbed_official	237:f3da66175598	343	uint32_t FallingLock; /*!< Specifies whether or not deadtime falling settings (value and sign) are write protected
mbed_official	237:f3da66175598	344	This parameter can be a value of @ref HRTIM_Deadtime_Falling_Lock */
mbed_official	237:f3da66175598	345	uint32_t FallingSignLock; /*!< Specifies whether or not deadtime falling sign is write protected
mbed_official	237:f3da66175598	346	This parameter can be a value of @ref HRTIM_Deadtime_Falling_Sign_Lock */
mbed_official	237:f3da66175598	347	} HRTIM_DeadTimeCfgTypeDef ;
mbed_official	237:f3da66175598	348
mbed_official	237:f3da66175598	349	/**
mbed_official	237:f3da66175598	350	* @brief Chopper mode configuration definition
mbed_official	237:f3da66175598	351	*/
mbed_official	237:f3da66175598	352	typedef struct {
mbed_official	237:f3da66175598	353	uint32_t CarrierFreq; /*!< Specifies the Timer carrier frequency value.
mbed_official	237:f3da66175598	354	This parameter can be a value of @ref HRTIM_Chopper_Frequency */
mbed_official	237:f3da66175598	355	uint32_t DutyCycle; /*!< Specifies the Timer chopper duty cycle value.
mbed_official	237:f3da66175598	356	This parameter can be a value of @ref HRTIM_Chopper_Duty_Cycle */
mbed_official	237:f3da66175598	357	uint32_t StartPulse; /*!< Specifies the Timer pulse width value.
mbed_official	237:f3da66175598	358	This parameter can be a value of @ref HRTIM_Chopper_Start_Pulse_Width */
mbed_official	237:f3da66175598	359	} HRTIM_ChopperModeCfgTypeDef;
mbed_official	237:f3da66175598	360
mbed_official	237:f3da66175598	361	/**
mbed_official	237:f3da66175598	362	* @brief External event channel configuration definition
mbed_official	237:f3da66175598	363	*/
mbed_official	237:f3da66175598	364	typedef struct {
mbed_official	237:f3da66175598	365	uint32_t Source; /*!< Identifies the source of the external event
mbed_official	237:f3da66175598	366	This parameter can be a value of @ref HRTIM_External_Event_Sources */
mbed_official	237:f3da66175598	367	uint32_t Polarity; /*!< Specifies the polarity of the external event (in case of level sensitivity)
mbed_official	237:f3da66175598	368	This parameter can be a value of @ref HRTIM_External_Event_Polarity */
mbed_official	237:f3da66175598	369	uint32_t Sensitivity; /*!< Specifies the sensitivity of the external event
mbed_official	237:f3da66175598	370	This parameter can be a value of @ref HRTIM_External_Event_Sensitivity */
mbed_official	237:f3da66175598	371	uint32_t Filter; /*!< Defines the frequency used to sample the External Event and the length of the digital filter
mbed_official	237:f3da66175598	372	This parameter can be a value of @ref HRTIM_External_Event_Filter */
mbed_official	237:f3da66175598	373	uint32_t FastMode; /*!< Indicates whether or not low latency mode is enabled for the external event
mbed_official	237:f3da66175598	374	This parameter can be a value of @ref HRTIM_External_Event_Fast_Mode */
mbed_official	237:f3da66175598	375	} HRTIM_EventCfgTypeDef;
mbed_official	237:f3da66175598	376
mbed_official	237:f3da66175598	377	/**
mbed_official	237:f3da66175598	378	* @brief Fault channel configuration definition
mbed_official	237:f3da66175598	379	*/
mbed_official	237:f3da66175598	380	typedef struct {
mbed_official	237:f3da66175598	381	uint32_t Source; /*!< Identifies the source of the fault
mbed_official	237:f3da66175598	382	This parameter can be a value of @ref HRTIM_Fault_Sources */
mbed_official	237:f3da66175598	383	uint32_t Polarity; /*!< Specifies the polarity of the fault event
mbed_official	237:f3da66175598	384	This parameter can be a value of @ref HRTIM_Fault_Polarity */
mbed_official	237:f3da66175598	385	uint32_t Filter; /*!< Defines the frequency used to sample the Fault input and the length of the digital filter
mbed_official	237:f3da66175598	386	This parameter can be a value of @ref HRTIM_Fault_Filter */
mbed_official	237:f3da66175598	387	uint32_t Lock; /*!< Indicates whether or not fault programming bits are write protected
mbed_official	237:f3da66175598	388	This parameter can be a value of @ref HRTIM_Fault_Lock */
mbed_official	237:f3da66175598	389	} HRTIM_FaultCfgTypeDef;
mbed_official	237:f3da66175598	390
mbed_official	237:f3da66175598	391	/**
mbed_official	237:f3da66175598	392	* @brief Burst mode configuration definition
mbed_official	237:f3da66175598	393	*/
mbed_official	237:f3da66175598	394	typedef struct {
mbed_official	237:f3da66175598	395	uint32_t Mode; /*!< Specifies the burst mode operating mode
mbed_official	237:f3da66175598	396	This parameter can be a value of @ref HRTIM_Burst_Mode_Operating_mode */
mbed_official	237:f3da66175598	397	uint32_t ClockSource; /*!< Specifies the burst mode clock source
mbed_official	237:f3da66175598	398	This parameter can be a value of @ref HRTIM_Burst_Mode_Clock_Source */
mbed_official	237:f3da66175598	399	uint32_t Prescaler; /*!< Specifies the burst mode prescaler
mbed_official	237:f3da66175598	400	This parameter can be a value of @ref HRTIM_Burst_Mode_Prescaler */
mbed_official	237:f3da66175598	401	uint32_t PreloadEnable; /*!< Specifies whether or not preload is enabled for burst mode related registers (HRTIM_BMCMPR and HRTIM_BMPER)
mbed_official	237:f3da66175598	402	This parameter can be a combination of @ref HRTIM_Burst_Mode_Register_Preload_Enable */
mbed_official	237:f3da66175598	403	uint32_t Trigger; /*!< Specifies the event(s) trigering the burst operation
mbed_official	237:f3da66175598	404	This parameter can be a combination of @ref HRTIM_Burst_Mode_Trigger */
mbed_official	237:f3da66175598	405	uint32_t IdleDuration; /*!< Specifies number of periods during which the selected timers are in idle state
mbed_official	237:f3da66175598	406	This parameter can be a number between 0x0 and 0xFFFF */
mbed_official	237:f3da66175598	407	uint32_t Period; /*!< Specifies burst mode repetition period
mbed_official	237:f3da66175598	408	This parameter can be a number between 0x1 and 0xFFFF */
mbed_official	237:f3da66175598	409	} HRTIM_BurstModeCfgTypeDef;
mbed_official	237:f3da66175598	410
mbed_official	237:f3da66175598	411	/**
mbed_official	237:f3da66175598	412	* @brief ADC trigger configuration definition
mbed_official	237:f3da66175598	413	*/
mbed_official	237:f3da66175598	414	typedef struct {
mbed_official	237:f3da66175598	415	uint32_t UpdateSource; /*!< Specifies the ADC trigger update source
mbed_official	237:f3da66175598	416	This parameter can be a combination of @ref HRTIM_ADC_Trigger_Update_Source */
mbed_official	237:f3da66175598	417	uint32_t Trigger; /*!< Specifies the event(s) triggering the ADC conversion
mbed_official	237:f3da66175598	418	This parameter can be a value of @ref HRTIM_ADC_Trigger_Event */
mbed_official	237:f3da66175598	419	} HRTIM_ADCTriggerCfgTypeDef;
mbed_official	237:f3da66175598	420
mbed_official	237:f3da66175598	421
mbed_official	237:f3da66175598	422	/* Exported constants --------------------------------------------------------*/
mbed_official	237:f3da66175598	423	/** @defgroup HRTIM_Exported_Constants
mbed_official	237:f3da66175598	424	* @{
mbed_official	237:f3da66175598	425	*/
mbed_official	237:f3da66175598	426
mbed_official	237:f3da66175598	427	/** @defgroup HRTIM_Timer_Index
mbed_official	237:f3da66175598	428	* @{
mbed_official	237:f3da66175598	429	* @brief Constants defining the timer indexes
mbed_official	237:f3da66175598	430	*/
mbed_official	237:f3da66175598	431	#define HRTIM_TIMERINDEX_TIMER_A (uint32_t)0x0 /!< Index used to access timer A registers /
mbed_official	237:f3da66175598	432	#define HRTIM_TIMERINDEX_TIMER_B (uint32_t)0x1 /!< Index used to access timer B registers /
mbed_official	237:f3da66175598	433	#define HRTIM_TIMERINDEX_TIMER_C (uint32_t)0x2 /!< Index used to access timer C registers /
mbed_official	237:f3da66175598	434	#define HRTIM_TIMERINDEX_TIMER_D (uint32_t)0x3 /!< Index used to access timer D registers /
mbed_official	237:f3da66175598	435	#define HRTIM_TIMERINDEX_TIMER_E (uint32_t)0x4 /!< Index used to access timer E registers /
mbed_official	237:f3da66175598	436	#define HRTIM_TIMERINDEX_MASTER (uint32_t)0x5 /!< Index used to access master registers /
mbed_official	237:f3da66175598	437	#define HRTIM_TIMERINDEX_COMMON (uint32_t)0xFF /!< Index used to access HRTIM common registers /
mbed_official	237:f3da66175598	438
mbed_official	237:f3da66175598	439	#define IS_HRTIM_TIMERINDEX(TIMERINDEX)\
mbed_official	237:f3da66175598	440	(((TIMERINDEX) == HRTIM_TIMERINDEX_MASTER) \|\| \
mbed_official	237:f3da66175598	441	((TIMERINDEX) == HRTIM_TIMERINDEX_TIMER_A) \|\| \
mbed_official	237:f3da66175598	442	((TIMERINDEX) == HRTIM_TIMERINDEX_TIMER_B) \|\| \
mbed_official	237:f3da66175598	443	((TIMERINDEX) == HRTIM_TIMERINDEX_TIMER_C) \|\| \
mbed_official	237:f3da66175598	444	((TIMERINDEX) == HRTIM_TIMERINDEX_TIMER_D) \|\| \
mbed_official	237:f3da66175598	445	((TIMERINDEX) == HRTIM_TIMERINDEX_TIMER_E))
mbed_official	237:f3da66175598	446
mbed_official	237:f3da66175598	447	#define IS_HRTIM_TIMING_UNIT(TIMERINDEX)\
mbed_official	237:f3da66175598	448	(((TIMERINDEX) == HRTIM_TIMERINDEX_TIMER_A) \|\| \
mbed_official	237:f3da66175598	449	((TIMERINDEX) == HRTIM_TIMERINDEX_TIMER_B) \|\| \
mbed_official	237:f3da66175598	450	((TIMERINDEX) == HRTIM_TIMERINDEX_TIMER_C) \|\| \
mbed_official	237:f3da66175598	451	((TIMERINDEX) == HRTIM_TIMERINDEX_TIMER_D) \|\| \
mbed_official	237:f3da66175598	452	((TIMERINDEX) == HRTIM_TIMERINDEX_TIMER_E))
mbed_official	237:f3da66175598	453	/**
mbed_official	237:f3da66175598	454	* @}
mbed_official	237:f3da66175598	455	*/
mbed_official	237:f3da66175598	456
mbed_official	237:f3da66175598	457	/** @defgroup HRTIM_Timer_identifier
mbed_official	237:f3da66175598	458	* @{
mbed_official	237:f3da66175598	459	* @brief Constants defining timer identifiers
mbed_official	237:f3da66175598	460	*/
mbed_official	237:f3da66175598	461	#define HRTIM_TIMERID_MASTER (HRTIM_MCR_MCEN) /!< Master identifier/
mbed_official	237:f3da66175598	462	#define HRTIM_TIMERID_TIMER_A (HRTIM_MCR_TACEN) /!< Timer A identifier /
mbed_official	237:f3da66175598	463	#define HRTIM_TIMERID_TIMER_B (HRTIM_MCR_TBCEN) /!< Timer B identifier /
mbed_official	237:f3da66175598	464	#define HRTIM_TIMERID_TIMER_C (HRTIM_MCR_TCCEN) /!< Timer C identifier /
mbed_official	237:f3da66175598	465	#define HRTIM_TIMERID_TIMER_D (HRTIM_MCR_TDCEN) /!< Timer D identifier /
mbed_official	237:f3da66175598	466	#define HRTIM_TIMERID_TIMER_E (HRTIM_MCR_TECEN) /!< Timer E identifier /
mbed_official	237:f3da66175598	467
mbed_official	237:f3da66175598	468	#define IS_HRTIM_TIMERID(TIMERID) (((TIMERID) & 0xFFC0FFFF) == 0x00000000)
mbed_official	237:f3da66175598	469
mbed_official	237:f3da66175598	470	/**
mbed_official	237:f3da66175598	471	* @}
mbed_official	237:f3da66175598	472	*/
mbed_official	237:f3da66175598	473
mbed_official	237:f3da66175598	474	/** @defgroup HRTIM_Compare_Unit
mbed_official	237:f3da66175598	475	* @{
mbed_official	237:f3da66175598	476	* @brief Constants defining compare unit identifiers
mbed_official	237:f3da66175598	477	*/
mbed_official	237:f3da66175598	478	#define HRTIM_COMPAREUNIT_1 (uint32_t)0x00000001 /!< Compare unit 1 identifier /
mbed_official	237:f3da66175598	479	#define HRTIM_COMPAREUNIT_2 (uint32_t)0x00000002 /!< Compare unit 2 identifier /
mbed_official	237:f3da66175598	480	#define HRTIM_COMPAREUNIT_3 (uint32_t)0x00000004 /!< Compare unit 3 identifier /
mbed_official	237:f3da66175598	481	#define HRTIM_COMPAREUNIT_4 (uint32_t)0x00000008 /!< Compare unit 4 identifier /
mbed_official	237:f3da66175598	482
mbed_official	237:f3da66175598	483	#define IS_HRTIM_COMPAREUNIT(COMPAREUNIT)\
mbed_official	237:f3da66175598	484	(((COMPAREUNIT) == HRTIM_COMPAREUNIT_1) \|\| \
mbed_official	237:f3da66175598	485	((COMPAREUNIT) == HRTIM_COMPAREUNIT_2) \|\| \
mbed_official	237:f3da66175598	486	((COMPAREUNIT) == HRTIM_COMPAREUNIT_3) \|\| \
mbed_official	237:f3da66175598	487	((COMPAREUNIT) == HRTIM_COMPAREUNIT_4))
mbed_official	237:f3da66175598	488	/**
mbed_official	237:f3da66175598	489	* @}
mbed_official	237:f3da66175598	490	*/
mbed_official	237:f3da66175598	491
mbed_official	237:f3da66175598	492	/** @defgroup HRTIM_Capture_Unit
mbed_official	237:f3da66175598	493	* @{
mbed_official	237:f3da66175598	494	* @brief Constants defining capture unit identifiers
mbed_official	237:f3da66175598	495	*/
mbed_official	237:f3da66175598	496	#define HRTIM_CAPTUREUNIT_1 (uint32_t)0x00000001 /!< Capture unit 1 identifier /
mbed_official	237:f3da66175598	497	#define HRTIM_CAPTUREUNIT_2 (uint32_t)0x00000002 /!< Capture unit 2 identifier /
mbed_official	237:f3da66175598	498
mbed_official	237:f3da66175598	499	#define IS_HRTIM_CAPTUREUNIT(CAPTUREUNIT)\
mbed_official	237:f3da66175598	500	(((CAPTUREUNIT) == HRTIM_CAPTUREUNIT_1) \|\| \
mbed_official	237:f3da66175598	501	((CAPTUREUNIT) == HRTIM_CAPTUREUNIT_2))
mbed_official	237:f3da66175598	502	/**
mbed_official	237:f3da66175598	503	* @}
mbed_official	237:f3da66175598	504	*/
mbed_official	237:f3da66175598	505
mbed_official	237:f3da66175598	506	/** @defgroup HRTIM_Timer_Output
mbed_official	237:f3da66175598	507	* @{
mbed_official	237:f3da66175598	508	* @brief Constants defining timer output identifiers
mbed_official	237:f3da66175598	509	*/
mbed_official	237:f3da66175598	510	#define HRTIM_OUTPUT_TA1 (uint32_t)0x00000001 /!< Timer A - Ouput 1 identifier /
mbed_official	237:f3da66175598	511	#define HRTIM_OUTPUT_TA2 (uint32_t)0x00000002 /!< Timer A - Ouput 2 identifier /
mbed_official	237:f3da66175598	512	#define HRTIM_OUTPUT_TB1 (uint32_t)0x00000004 /!< Timer B - Ouput 1 identifier /
mbed_official	237:f3da66175598	513	#define HRTIM_OUTPUT_TB2 (uint32_t)0x00000008 /!< Timer B - Ouput 2 identifier /
mbed_official	237:f3da66175598	514	#define HRTIM_OUTPUT_TC1 (uint32_t)0x00000010 /!< Timer C - Ouput 1 identifier /
mbed_official	237:f3da66175598	515	#define HRTIM_OUTPUT_TC2 (uint32_t)0x00000020 /!< Timer C - Ouput 2 identifier /
mbed_official	237:f3da66175598	516	#define HRTIM_OUTPUT_TD1 (uint32_t)0x00000040 /!< Timer D - Ouput 1 identifier /
mbed_official	237:f3da66175598	517	#define HRTIM_OUTPUT_TD2 (uint32_t)0x00000080 /!< Timer D - Ouput 2 identifier /
mbed_official	237:f3da66175598	518	#define HRTIM_OUTPUT_TE1 (uint32_t)0x00000100 /!< Timer E - Ouput 1 identifier /
mbed_official	237:f3da66175598	519	#define HRTIM_OUTPUT_TE2 (uint32_t)0x00000200 /!< Timer E - Ouput 2 identifier /
mbed_official	237:f3da66175598	520
mbed_official	237:f3da66175598	521	#define IS_HRTIM_OUTPUT(OUTPUT) (((OUTPUT) & 0xFFFFFC00) == 0x00000000)
mbed_official	237:f3da66175598	522
mbed_official	237:f3da66175598	523	#define IS_HRTIM_TIMER_OUTPUT(TIMER, OUTPUT)\
mbed_official	237:f3da66175598	524	((((TIMER) == HRTIM_TIMERINDEX_TIMER_A) && \
mbed_official	237:f3da66175598	525	(((OUTPUT) == HRTIM_OUTPUT_TA1) \|\| \
mbed_official	237:f3da66175598	526	((OUTPUT) == HRTIM_OUTPUT_TA2))) \
mbed_official	237:f3da66175598	527	\|\| \
mbed_official	237:f3da66175598	528	(((TIMER) == HRTIM_TIMERINDEX_TIMER_B) && \
mbed_official	237:f3da66175598	529	(((OUTPUT) == HRTIM_OUTPUT_TB1) \|\| \
mbed_official	237:f3da66175598	530	((OUTPUT) == HRTIM_OUTPUT_TB2))) \
mbed_official	237:f3da66175598	531	\|\| \
mbed_official	237:f3da66175598	532	(((TIMER) == HRTIM_TIMERINDEX_TIMER_C) && \
mbed_official	237:f3da66175598	533	(((OUTPUT) == HRTIM_OUTPUT_TC1) \|\| \
mbed_official	237:f3da66175598	534	((OUTPUT) == HRTIM_OUTPUT_TC2))) \
mbed_official	237:f3da66175598	535	\|\| \
mbed_official	237:f3da66175598	536	(((TIMER) == HRTIM_TIMERINDEX_TIMER_D) && \
mbed_official	237:f3da66175598	537	(((OUTPUT) == HRTIM_OUTPUT_TD1) \|\| \
mbed_official	237:f3da66175598	538	((OUTPUT) == HRTIM_OUTPUT_TD2))) \
mbed_official	237:f3da66175598	539	\|\| \
mbed_official	237:f3da66175598	540	(((TIMER) == HRTIM_TIMERINDEX_TIMER_E) && \
mbed_official	237:f3da66175598	541	(((OUTPUT) == HRTIM_OUTPUT_TE1) \|\| \
mbed_official	237:f3da66175598	542	((OUTPUT) == HRTIM_OUTPUT_TE2))))
mbed_official	237:f3da66175598	543	/**
mbed_official	237:f3da66175598	544	* @}
mbed_official	237:f3da66175598	545	*/
mbed_official	237:f3da66175598	546
mbed_official	237:f3da66175598	547	/** @defgroup HRTIM_ADC_Trigger
mbed_official	237:f3da66175598	548	* @{
mbed_official	237:f3da66175598	549	* @brief Constants defining ADC triggers identifiers
mbed_official	237:f3da66175598	550	*/
mbed_official	237:f3da66175598	551	#define HRTIM_ADCTRIGGER_1 (uint32_t)0x00000001 /!< ADC trigger 1 identifier /
mbed_official	237:f3da66175598	552	#define HRTIM_ADCTRIGGER_2 (uint32_t)0x00000002 /!< ADC trigger 2 identifier /
mbed_official	237:f3da66175598	553	#define HRTIM_ADCTRIGGER_3 (uint32_t)0x00000004 /!< ADC trigger 3 identifier /
mbed_official	237:f3da66175598	554	#define HRTIM_ADCTRIGGER_4 (uint32_t)0x00000008 /!< ADC trigger 4 identifier /
mbed_official	237:f3da66175598	555
mbed_official	237:f3da66175598	556	#define IS_HRTIM_ADCTRIGGER(ADCTRIGGER)\
mbed_official	237:f3da66175598	557	(((ADCTRIGGER) == HRTIM_ADCTRIGGER_1) \|\| \
mbed_official	237:f3da66175598	558	((ADCTRIGGER) == HRTIM_ADCTRIGGER_2) \|\| \
mbed_official	237:f3da66175598	559	((ADCTRIGGER) == HRTIM_ADCTRIGGER_3) \|\| \
mbed_official	237:f3da66175598	560	((ADCTRIGGER) == HRTIM_ADCTRIGGER_4))
mbed_official	237:f3da66175598	561	/**
mbed_official	237:f3da66175598	562	* @}
mbed_official	237:f3da66175598	563	*/
mbed_official	237:f3da66175598	564
mbed_official	237:f3da66175598	565	/** @defgroup HRTIM_External_Event_Channels
mbed_official	237:f3da66175598	566	* @{
mbed_official	237:f3da66175598	567	* @brief Constants defining external event channel identifiers
mbed_official	237:f3da66175598	568	*/
mbed_official	237:f3da66175598	569	#define HRTIM_EVENT_NONE ((uint32_t)0x00000000) /!< Undefined event channel /
mbed_official	237:f3da66175598	570	#define HRTIM_EVENT_1 ((uint32_t)0x00000001) /!< External event channel 1 identifier /
mbed_official	237:f3da66175598	571	#define HRTIM_EVENT_2 ((uint32_t)0x00000002) /!< External event channel 2 identifier /
mbed_official	237:f3da66175598	572	#define HRTIM_EVENT_3 ((uint32_t)0x00000004) /!< External event channel 3 identifier /
mbed_official	237:f3da66175598	573	#define HRTIM_EVENT_4 ((uint32_t)0x00000008) /!< External event channel 4 identifier /
mbed_official	237:f3da66175598	574	#define HRTIM_EVENT_5 ((uint32_t)0x00000010) /!< External event channel 5 identifier /
mbed_official	237:f3da66175598	575	#define HRTIM_EVENT_6 ((uint32_t)0x00000020) /!< External event channel 6 identifier /
mbed_official	237:f3da66175598	576	#define HRTIM_EVENT_7 ((uint32_t)0x00000040) /!< External event channel 7 identifier /
mbed_official	237:f3da66175598	577	#define HRTIM_EVENT_8 ((uint32_t)0x00000080) /!< External event channel 8 identifier /
mbed_official	237:f3da66175598	578	#define HRTIM_EVENT_9 ((uint32_t)0x00000100) /!< External event channel 9 identifier /
mbed_official	237:f3da66175598	579	#define HRTIM_EVENT_10 ((uint32_t)0x00000200) /!< External event channel 10 identifier /
mbed_official	237:f3da66175598	580
mbed_official	237:f3da66175598	581	#define IS_HRTIM_EVENT(EVENT)\
mbed_official	237:f3da66175598	582	(((EVENT) == HRTIM_EVENT_1) \|\| \
mbed_official	237:f3da66175598	583	((EVENT) == HRTIM_EVENT_2) \|\| \
mbed_official	237:f3da66175598	584	((EVENT) == HRTIM_EVENT_3) \|\| \
mbed_official	237:f3da66175598	585	((EVENT) == HRTIM_EVENT_4) \|\| \
mbed_official	237:f3da66175598	586	((EVENT) == HRTIM_EVENT_5) \|\| \
mbed_official	237:f3da66175598	587	((EVENT) == HRTIM_EVENT_6) \|\| \
mbed_official	237:f3da66175598	588	((EVENT) == HRTIM_EVENT_7) \|\| \
mbed_official	237:f3da66175598	589	((EVENT) == HRTIM_EVENT_8) \|\| \
mbed_official	237:f3da66175598	590	((EVENT) == HRTIM_EVENT_9) \|\| \
mbed_official	237:f3da66175598	591	((EVENT) == HRTIM_EVENT_10))
mbed_official	237:f3da66175598	592	/**
mbed_official	237:f3da66175598	593	* @}
mbed_official	237:f3da66175598	594	*/
mbed_official	237:f3da66175598	595
mbed_official	237:f3da66175598	596	/** @defgroup HRTIM_Fault_Channel
mbed_official	237:f3da66175598	597	* @{
mbed_official	237:f3da66175598	598	* @brief Constants defining fault channel identifiers
mbed_official	237:f3da66175598	599	*/
mbed_official	237:f3da66175598	600	#define HRTIM_FAULT_1 ((uint32_t)0x01) /!< Fault channel 1 identifier /
mbed_official	237:f3da66175598	601	#define HRTIM_FAULT_2 ((uint32_t)0x02) /!< Fault channel 2 identifier /
mbed_official	237:f3da66175598	602	#define HRTIM_FAULT_3 ((uint32_t)0x04) /!< Fault channel 3 identifier /
mbed_official	237:f3da66175598	603	#define HRTIM_FAULT_4 ((uint32_t)0x08) /!< Fault channel 4 identifier /
mbed_official	237:f3da66175598	604	#define HRTIM_FAULT_5 ((uint32_t)0x10) /!< Fault channel 5 identifier /
mbed_official	237:f3da66175598	605
mbed_official	237:f3da66175598	606	#define IS_HRTIM_FAULT(FAULT)\
mbed_official	237:f3da66175598	607	(((FAULT) == HRTIM_FAULT_1) \|\| \
mbed_official	237:f3da66175598	608	((FAULT) == HRTIM_FAULT_2) \|\| \
mbed_official	237:f3da66175598	609	((FAULT) == HRTIM_FAULT_3) \|\| \
mbed_official	237:f3da66175598	610	((FAULT) == HRTIM_FAULT_4) \|\| \
mbed_official	237:f3da66175598	611	((FAULT) == HRTIM_FAULT_5))
mbed_official	237:f3da66175598	612	/**
mbed_official	237:f3da66175598	613	* @}
mbed_official	237:f3da66175598	614	*/
mbed_official	237:f3da66175598	615
mbed_official	237:f3da66175598	616
mbed_official	237:f3da66175598	617	/** @defgroup HRTIM_Prescaler_Ratio
mbed_official	237:f3da66175598	618	* @{
mbed_official	237:f3da66175598	619	* @brief Constants defining timer high-resolution clock prescaler ratio.
mbed_official	237:f3da66175598	620	*/
mbed_official	237:f3da66175598	621	#define HRTIM_PRESCALERRATIO_MUL32 ((uint32_t)0x00000000) /!< fHRCK: 4.608 GHz - Resolution: 217 ps - Min PWM frequency: 70.3 kHz (fHRTIM=144MHz) /
mbed_official	237:f3da66175598	622	#define HRTIM_PRESCALERRATIO_MUL16 ((uint32_t)0x00000001) /!< fHRCK: 2.304 GHz - Resolution: 434 ps - Min PWM frequency: 35.1 KHz (fHRTIM=144MHz) /
mbed_official	237:f3da66175598	623	#define HRTIM_PRESCALERRATIO_MUL8 ((uint32_t)0x00000002) /!< fHRCK: 1.152 GHz - Resolution: 868 ps - Min PWM frequency: 17.6 kHz (fHRTIM=144MHz) /
mbed_official	237:f3da66175598	624	#define HRTIM_PRESCALERRATIO_MUL4 ((uint32_t)0x00000003) /!< fHRCK: 576 MHz - Resolution: 1.73 ns - Min PWM frequency: 8.8 kHz (fHRTIM=144MHz) /
mbed_official	237:f3da66175598	625	#define HRTIM_PRESCALERRATIO_MUL2 ((uint32_t)0x00000004) /!< fHRCK: 288 MHz - Resolution: 3.47 ns - Min PWM frequency: 4.4 kHz (fHRTIM=144MHz) /
mbed_official	237:f3da66175598	626	#define HRTIM_PRESCALERRATIO_DIV1 ((uint32_t)0x00000005) /!< fHRCK: 144 MHz - Resolution: 6.95 ns - Min PWM frequency: 2.2 kHz (fHRTIM=144MHz) /
mbed_official	237:f3da66175598	627	#define HRTIM_PRESCALERRATIO_DIV2 ((uint32_t)0x00000006) /!< fHRCK: 72 MHz - Resolution: 13.88 ns- Min PWM frequency: 1.1 kHz (fHRTIM=144MHz) /
mbed_official	237:f3da66175598	628	#define HRTIM_PRESCALERRATIO_DIV4 ((uint32_t)0x00000007) /!< fHRCK: 36 MHz - Resolution: 27.7 ns- Min PWM frequency: 550Hz (fHRTIM=144MHz) /
mbed_official	237:f3da66175598	629
mbed_official	237:f3da66175598	630	#define IS_HRTIM_PRESCALERRATIO(PRESCALERRATIO)\
mbed_official	237:f3da66175598	631	(((PRESCALERRATIO) == HRTIM_PRESCALERRATIO_MUL32) \|\| \
mbed_official	237:f3da66175598	632	((PRESCALERRATIO) == HRTIM_PRESCALERRATIO_MUL16) \|\| \
mbed_official	237:f3da66175598	633	((PRESCALERRATIO) == HRTIM_PRESCALERRATIO_MUL8) \|\| \
mbed_official	237:f3da66175598	634	((PRESCALERRATIO) == HRTIM_PRESCALERRATIO_MUL4) \|\| \
mbed_official	237:f3da66175598	635	((PRESCALERRATIO) == HRTIM_PRESCALERRATIO_MUL2) \|\| \
mbed_official	237:f3da66175598	636	((PRESCALERRATIO) == HRTIM_PRESCALERRATIO_DIV1) \|\| \
mbed_official	237:f3da66175598	637	((PRESCALERRATIO) == HRTIM_PRESCALERRATIO_DIV2) \|\| \
mbed_official	237:f3da66175598	638	((PRESCALERRATIO) == HRTIM_PRESCALERRATIO_DIV4))
mbed_official	237:f3da66175598	639	/**
mbed_official	237:f3da66175598	640	* @}
mbed_official	237:f3da66175598	641	*/
mbed_official	237:f3da66175598	642
mbed_official	237:f3da66175598	643	/** @defgroup HRTIM_Mode
mbed_official	237:f3da66175598	644	* @{
mbed_official	237:f3da66175598	645	* @brief Constants defining timer counter operating mode.
mbed_official	237:f3da66175598	646	*/
mbed_official	237:f3da66175598	647	#define HRTIM_MODE_CONTINUOUS ((uint32_t)0x00000008) /!< The timer operates in continuous (free-running) mode /
mbed_official	237:f3da66175598	648	#define HRTIM_MODE_SINGLESHOT ((uint32_t)0x00000000) /!< The timer operates in non retriggerable single-shot mode /
mbed_official	237:f3da66175598	649	#define HRTIM_MODE_SINGLESHOT_RETRIGGERABLE ((uint32_t)0x00000010) /!< The timer operates in retriggerable single-shot mode /
mbed_official	237:f3da66175598	650
mbed_official	237:f3da66175598	651	#define IS_HRTIM_MODE(MODE)\
mbed_official	237:f3da66175598	652	(((MODE) == HRTIM_MODE_CONTINUOUS) \|\| \
mbed_official	237:f3da66175598	653	((MODE) == HRTIM_MODE_SINGLESHOT) \|\| \
mbed_official	237:f3da66175598	654	((MODE) == HRTIM_MODE_SINGLESHOT_RETRIGGERABLE))
mbed_official	237:f3da66175598	655
mbed_official	237:f3da66175598	656	#define IS_HRTIM_MODE_ONEPULSE(MODE)\
mbed_official	237:f3da66175598	657	(((MODE) == HRTIM_MODE_SINGLESHOT) \|\| \
mbed_official	237:f3da66175598	658	((MODE) == HRTIM_MODE_SINGLESHOT_RETRIGGERABLE))
mbed_official	237:f3da66175598	659
mbed_official	237:f3da66175598	660	/**
mbed_official	237:f3da66175598	661	* @}
mbed_official	237:f3da66175598	662	*/
mbed_official	237:f3da66175598	663
mbed_official	237:f3da66175598	664	/** @defgroup HRTIM_Half_Mode_Enable
mbed_official	237:f3da66175598	665	* @{
mbed_official	237:f3da66175598	666	* @brief Constants defining half mode enabling status.
mbed_official	237:f3da66175598	667	*/
mbed_official	237:f3da66175598	668	#define HRTIM_HALFMODE_DISABLED ((uint32_t)0x00000000) /!< Half mode is disabled /
mbed_official	237:f3da66175598	669	#define HRTIM_HALFMODE_ENABLED ((uint32_t)0x00000020) /!< Half mode is enabled /
mbed_official	237:f3da66175598	670
mbed_official	237:f3da66175598	671	#define IS_HRTIM_HALFMODE(HALFMODE)\
mbed_official	237:f3da66175598	672	(((HALFMODE) == HRTIM_HALFMODE_DISABLED) \|\| \
mbed_official	237:f3da66175598	673	((HALFMODE) == HRTIM_HALFMODE_ENABLED))
mbed_official	237:f3da66175598	674	/**
mbed_official	237:f3da66175598	675	* @}
mbed_official	237:f3da66175598	676	*/
mbed_official	237:f3da66175598	677
mbed_official	237:f3da66175598	678	/** @defgroup HRTIM_Start_On_Sync_Input_Event
mbed_official	237:f3da66175598	679	* @{
mbed_official	237:f3da66175598	680	* @brief Constants defining the timer behavior following the synchronization event
mbed_official	237:f3da66175598	681	*/
mbed_official	237:f3da66175598	682	#define HRTIM_SYNCSTART_DISABLED ((uint32_t)0x00000000) /!< Synchronization input event has effect on the timer /
mbed_official	237:f3da66175598	683	#define HRTIM_SYNCSTART_ENABLED (HRTIM_MCR_SYNCSTRTM) /!< Synchronization input event starts the timer /
mbed_official	237:f3da66175598	684
mbed_official	237:f3da66175598	685	#define IS_HRTIM_SYNCSTART(SYNCSTART)\
mbed_official	237:f3da66175598	686	(((SYNCSTART) == HRTIM_SYNCSTART_DISABLED) \|\| \
mbed_official	237:f3da66175598	687	((SYNCSTART) == HRTIM_SYNCSTART_ENABLED))
mbed_official	237:f3da66175598	688	/**
mbed_official	237:f3da66175598	689	* @}
mbed_official	237:f3da66175598	690	*/
mbed_official	237:f3da66175598	691
mbed_official	237:f3da66175598	692	/** @defgroup HRTIM_Reset_On_Sync_Input_Event
mbed_official	237:f3da66175598	693	* @{
mbed_official	237:f3da66175598	694	* @brief Constants defining the timer behavior following the synchronization event
mbed_official	237:f3da66175598	695	*/
mbed_official	237:f3da66175598	696	#define HRTIM_SYNCRESET_DISABLED ((uint32_t)0x00000000) /!< Synchronization input event has effect on the timer /
mbed_official	237:f3da66175598	697	#define HRTIM_SYNCRESET_ENABLED (HRTIM_MCR_SYNCRSTM) /!< Synchronization input event resets the timer /
mbed_official	237:f3da66175598	698
mbed_official	237:f3da66175598	699	#define IS_HRTIM_SYNCRESET(SYNCRESET)\
mbed_official	237:f3da66175598	700	(((SYNCRESET) == HRTIM_SYNCRESET_DISABLED) \|\| \
mbed_official	237:f3da66175598	701	((SYNCRESET) == HRTIM_SYNCRESET_ENABLED))
mbed_official	237:f3da66175598	702	/**
mbed_official	237:f3da66175598	703	* @}
mbed_official	237:f3da66175598	704	*/
mbed_official	237:f3da66175598	705
mbed_official	237:f3da66175598	706	/** @defgroup HRTIM_DAC_Synchronization
mbed_official	237:f3da66175598	707	* @{
mbed_official	237:f3da66175598	708	* @brief Constants defining on which output the DAC synchronization event is sent
mbed_official	237:f3da66175598	709	*/
mbed_official	237:f3da66175598	710	#define HRTIM_DACSYNC_NONE (uint32_t)0x00000000 /!< No DAC synchronization event generated /
mbed_official	237:f3da66175598	711	#define HRTIM_DACSYNC_DACTRIGOUT_1 (HRTIM_MCR_DACSYNC_0) /!< DAC synchronization event generated on DACTrigOut1 output upon timer update /
mbed_official	237:f3da66175598	712	#define HRTIM_DACSYNC_DACTRIGOUT_2 (HRTIM_MCR_DACSYNC_1) /!< DAC synchronization event generated on DACTrigOut2 output upon timer update /
mbed_official	237:f3da66175598	713	#define HRTIM_DACSYNC_DACTRIGOUT_3 (HRTIM_MCR_DACSYNC_1 \| HRTIM_MCR_DACSYNC_0) /!< DAC update generated on DACTrigOut3 output upon timer update /
mbed_official	237:f3da66175598	714
mbed_official	237:f3da66175598	715	#define IS_HHRTIM_DACSYNC(DACSYNC)\
mbed_official	237:f3da66175598	716	(((DACSYNC) == HRTIM_DACSYNC_NONE) \|\| \
mbed_official	237:f3da66175598	717	((DACSYNC) == HRTIM_DACSYNC_DACTRIGOUT_1) \|\| \
mbed_official	237:f3da66175598	718	((DACSYNC) == HRTIM_DACSYNC_DACTRIGOUT_2) \|\| \
mbed_official	237:f3da66175598	719	((DACSYNC) == HRTIM_DACSYNC_DACTRIGOUT_3))
mbed_official	237:f3da66175598	720	/**
mbed_official	237:f3da66175598	721	* @}
mbed_official	237:f3da66175598	722	*/
mbed_official	237:f3da66175598	723
mbed_official	237:f3da66175598	724	/** @defgroup HRTIM_Register_Preload_Enable
mbed_official	237:f3da66175598	725	* @{
mbed_official	237:f3da66175598	726	* @brief Constants defining whether a write access into a preloadable
mbed_official	237:f3da66175598	727	* register is done into the active or the preload register.
mbed_official	237:f3da66175598	728	*/
mbed_official	237:f3da66175598	729	#define HRTIM_PRELOAD_DISABLED ((uint32_t)0x00000000) /!< Preload disabled: the write access is directly done into the active register /
mbed_official	237:f3da66175598	730	#define HRTIM_PRELOAD_ENABLED (HRTIM_MCR_PREEN) /!< Preload enabled: the write access is done into the preload register /
mbed_official	237:f3da66175598	731
mbed_official	237:f3da66175598	732	#define IS_HRTIM_PRELOAD(PRELOAD)\
mbed_official	237:f3da66175598	733	(((PRELOAD) == HRTIM_PRELOAD_DISABLED) \|\| \
mbed_official	237:f3da66175598	734	((PRELOAD) == HRTIM_PRELOAD_ENABLED))
mbed_official	237:f3da66175598	735	/**
mbed_official	237:f3da66175598	736	* @}
mbed_official	237:f3da66175598	737	*/
mbed_official	237:f3da66175598	738
mbed_official	237:f3da66175598	739	/** @defgroup HRTIM_Update_Gating
mbed_official	237:f3da66175598	740	* @{
mbed_official	237:f3da66175598	741	* @brief Constants defining how the update occurs relatively to the burst DMA
mbed_official	237:f3da66175598	742	* transaction and the external update request on update enable inputs 1 to 3.
mbed_official	237:f3da66175598	743	*/
mbed_official	237:f3da66175598	744	#define HRTIM_UPDATEGATING_INDEPENDENT (uint32_t)0x00000000 /!< Update done independently from the DMA burst transfer completion /
mbed_official	237:f3da66175598	745	#define HRTIM_UPDATEGATING_DMABURST (HRTIM_TIMCR_UPDGAT_0) /!< Update done when the DMA burst transfer is completed /
mbed_official	237:f3da66175598	746	#define HRTIM_UPDATEGATING_DMABURST_UPDATE (HRTIM_TIMCR_UPDGAT_1) /!< Update done on timer roll-over following a DMA burst transfer completion/
mbed_official	237:f3da66175598	747	#define HRTIM_UPDATEGATING_UPDEN1 (HRTIM_TIMCR_UPDGAT_1 \| HRTIM_TIMCR_UPDGAT_0) /!< Slave timer only - Update done on a rising edge of HRTIM update enable input 1 /
mbed_official	237:f3da66175598	748	#define HRTIM_UPDATEGATING_UPDEN2 (HRTIM_TIMCR_UPDGAT_2) /!< Slave timer only - Update done on a rising edge of HRTIM update enable input 2 /
mbed_official	237:f3da66175598	749	#define HRTIM_UPDATEGATING_UPDEN3 (HRTIM_TIMCR_UPDGAT_2 \| HRTIM_TIMCR_UPDGAT_0) /!< Slave timer only - Update done on a rising edge of HRTIM update enable input 3 /
mbed_official	237:f3da66175598	750	#define HRTIM_UPDATEGATING_UPDEN1_UPDATE (HRTIM_TIMCR_UPDGAT_2 \| HRTIM_TIMCR_UPDGAT_1) /!< Slave timer only - Update done on the update event following a rising edge of HRTIM update enable input 1 /
mbed_official	237:f3da66175598	751	#define HRTIM_UPDATEGATING_UPDEN2_UPDATE (HRTIM_TIMCR_UPDGAT_2 \| HRTIM_TIMCR_UPDGAT_1 \| HRTIM_TIMCR_UPDGAT_0) /!< Slave timer only - Update done on the update event following a rising edge of HRTIM update enable input 2 /
mbed_official	237:f3da66175598	752	#define HRTIM_UPDATEGATING_UPDEN3_UPDATE (HRTIM_TIMCR_UPDGAT_3) /!< Slave timer only - Update done on the update event following a rising edge of HRTIM update enable input 3 /
mbed_official	237:f3da66175598	753
mbed_official	237:f3da66175598	754	#define IS_HRTIM_UPDATEGATING_MASTER(UPDATEGATING)\
mbed_official	237:f3da66175598	755	(((UPDATEGATING) == HRTIM_UPDATEGATING_INDEPENDENT) \|\| \
mbed_official	237:f3da66175598	756	((UPDATEGATING) == HRTIM_UPDATEGATING_DMABURST) \|\| \
mbed_official	237:f3da66175598	757	((UPDATEGATING) == HRTIM_UPDATEGATING_DMABURST_UPDATE))
mbed_official	237:f3da66175598	758
mbed_official	237:f3da66175598	759	#define IS_HRTIM_UPDATEGATING_TIM(UPDATEGATING)\
mbed_official	237:f3da66175598	760	(((UPDATEGATING) == HRTIM_UPDATEGATING_INDEPENDENT) \|\| \
mbed_official	237:f3da66175598	761	((UPDATEGATING) == HRTIM_UPDATEGATING_DMABURST) \|\| \
mbed_official	237:f3da66175598	762	((UPDATEGATING) == HRTIM_UPDATEGATING_DMABURST_UPDATE) \|\| \
mbed_official	237:f3da66175598	763	((UPDATEGATING) == HRTIM_UPDATEGATING_UPDEN1) \|\| \
mbed_official	237:f3da66175598	764	((UPDATEGATING) == HRTIM_UPDATEGATING_UPDEN2) \|\| \
mbed_official	237:f3da66175598	765	((UPDATEGATING) == HRTIM_UPDATEGATING_UPDEN3) \|\| \
mbed_official	237:f3da66175598	766	((UPDATEGATING) == HRTIM_UPDATEGATING_UPDEN1_UPDATE) \|\| \
mbed_official	237:f3da66175598	767	((UPDATEGATING) == HRTIM_UPDATEGATING_UPDEN2_UPDATE) \|\| \
mbed_official	237:f3da66175598	768	((UPDATEGATING) == HRTIM_UPDATEGATING_UPDEN3_UPDATE))
mbed_official	237:f3da66175598	769	/**
mbed_official	237:f3da66175598	770	* @}
mbed_official	237:f3da66175598	771	*/
mbed_official	237:f3da66175598	772
mbed_official	237:f3da66175598	773	/** @defgroup HRTIM_Timer_Burst_Mode
mbed_official	237:f3da66175598	774	* @{
mbed_official	237:f3da66175598	775	* @brief Constants defining how the timer behaves during a burst
mbed_official	237:f3da66175598	776	mode operation.
mbed_official	237:f3da66175598	777	*/
mbed_official	237:f3da66175598	778	#define HRTIM_TIMERBURSTMODE_MAINTAINCLOCK (uint32_t)0x000000 /!< Timer counter clock is maintained and the timer operates normally /
mbed_official	237:f3da66175598	779	#define HRTIM_TIMERBURSTMODE_RESETCOUNTER (HRTIM_BMCR_MTBM) /!< Timer counter clock is stopped and the counter is reset /
mbed_official	237:f3da66175598	780
mbed_official	237:f3da66175598	781	#define IS_HRTIM_TIMERBURSTMODE(TIMERBURSTMODE) \
mbed_official	237:f3da66175598	782	(((TIMERBURSTMODE) == HRTIM_TIMERBURSTMODE_MAINTAINCLOCK) \|\| \
mbed_official	237:f3da66175598	783	((TIMERBURSTMODE) == HRTIM_TIMERBURSTMODE_RESETCOUNTER))
mbed_official	237:f3da66175598	784	/**
mbed_official	237:f3da66175598	785	* @}
mbed_official	237:f3da66175598	786	*/
mbed_official	237:f3da66175598	787
mbed_official	237:f3da66175598	788	/** @defgroup HRTIM_Timer_Repetition_Update
mbed_official	237:f3da66175598	789	* @{
mbed_official	237:f3da66175598	790	* @brief Constants defining whether registers are updated when the timer
mbed_official	237:f3da66175598	791	* repetition period is completed (either due to roll-over or
mbed_official	237:f3da66175598	792	* reset events)
mbed_official	237:f3da66175598	793	*/
mbed_official	237:f3da66175598	794	#define HRTIM_UPDATEONREPETITION_DISABLED (uint32_t)0x00000000 /!< Update on repetition disabled /
mbed_official	237:f3da66175598	795	#define HRTIM_UPDATEONREPETITION_ENABLED (HRTIM_MCR_MREPU) /!< Update on repetition enabled /
mbed_official	237:f3da66175598	796
mbed_official	237:f3da66175598	797	#define IS_HRTIM_UPDATEONREPETITION(UPDATEONREPETITION) \
mbed_official	237:f3da66175598	798	(((UPDATEONREPETITION) == HRTIM_UPDATEONREPETITION_DISABLED) \|\| \
mbed_official	237:f3da66175598	799	((UPDATEONREPETITION) == HRTIM_UPDATEONREPETITION_ENABLED))
mbed_official	237:f3da66175598	800	/**
mbed_official	237:f3da66175598	801	* @}
mbed_official	237:f3da66175598	802	*/
mbed_official	237:f3da66175598	803
mbed_official	237:f3da66175598	804
mbed_official	237:f3da66175598	805	/** @defgroup HRTIM_Timer_Push_Pull_Mode
mbed_official	237:f3da66175598	806	* @{
mbed_official	237:f3da66175598	807	* @brief Constants defining whether or not the puhs-pull mode is enabled for
mbed_official	237:f3da66175598	808	* a timer.
mbed_official	237:f3da66175598	809	*/
mbed_official	237:f3da66175598	810	#define HRTIM_TIMPUSHPULLMODE_DISABLED ((uint32_t)0x00000000) /!< Push-Pull mode disabled /
mbed_official	237:f3da66175598	811	#define HRTIM_TIMPUSHPULLMODE_ENABLED ((uint32_t)HRTIM_TIMCR_PSHPLL) /!< Push-Pull mode enabled /
mbed_official	237:f3da66175598	812
mbed_official	237:f3da66175598	813	#define IS_HRTIM_TIMPUSHPULLMODE(TIMPUSHPULLMODE)\
mbed_official	237:f3da66175598	814	(((TIMPUSHPULLMODE) == HRTIM_TIMPUSHPULLMODE_DISABLED) \|\| \
mbed_official	237:f3da66175598	815	((TIMPUSHPULLMODE) == HRTIM_TIMPUSHPULLMODE_ENABLED))
mbed_official	237:f3da66175598	816	/**
mbed_official	237:f3da66175598	817	* @}
mbed_official	237:f3da66175598	818	*/
mbed_official	237:f3da66175598	819
mbed_official	237:f3da66175598	820	/** @defgroup HRTIM_Timer_Fault_Enabling
mbed_official	237:f3da66175598	821	* @{
mbed_official	237:f3da66175598	822	* @brief Constants defining whether a faut channel is enabled for a timer
mbed_official	237:f3da66175598	823	*/
mbed_official	237:f3da66175598	824	#define HRTIM_TIMFAULTENABLE_NONE (uint32_t)0x00000000 /!< No fault enabled /
mbed_official	237:f3da66175598	825	#define HRTIM_TIMFAULTENABLE_FAULT1 (HRTIM_FLTR_FLT1EN) /!< Fault 1 enabled /
mbed_official	237:f3da66175598	826	#define HRTIM_TIMFAULTENABLE_FAULT2 (HRTIM_FLTR_FLT2EN) /!< Fault 2 enabled /
mbed_official	237:f3da66175598	827	#define HRTIM_TIMFAULTENABLE_FAULT3 (HRTIM_FLTR_FLT3EN) /!< Fault 3 enabled /
mbed_official	237:f3da66175598	828	#define HRTIM_TIMFAULTENABLE_FAULT4 (HRTIM_FLTR_FLT4EN) /!< Fault 4 enabled /
mbed_official	237:f3da66175598	829	#define HRTIM_TIMFAULTENABLE_FAULT5 (HRTIM_FLTR_FLT5EN) /!< Fault 5 enabled /
mbed_official	237:f3da66175598	830
mbed_official	237:f3da66175598	831	#define IS_HRTIM_TIMFAULTENABLE(TIMFAULTENABLE) (((TIMFAULTENABLE) & 0xFFFFFFE0) == 0x00000000)
mbed_official	237:f3da66175598	832
mbed_official	237:f3da66175598	833	/**
mbed_official	237:f3da66175598	834	* @}
mbed_official	237:f3da66175598	835	*/
mbed_official	237:f3da66175598	836
mbed_official	237:f3da66175598	837	/** @defgroup HRTIM_Timer_Fault_Lock
mbed_official	237:f3da66175598	838	* @{
mbed_official	237:f3da66175598	839	* @brief Constants defining whether or not fault enabling bits are write
mbed_official	237:f3da66175598	840	* protected for a timer
mbed_official	237:f3da66175598	841	*/
mbed_official	237:f3da66175598	842	#define HRTIM_TIMFAULTLOCK_READWRITE ((uint32_t)0x00000000) /!< Timer fault enabling bits are read/write /
mbed_official	237:f3da66175598	843	#define HRTIM_TIMFAULTLOCK_READONLY (HRTIM_FLTR_FLTLCK) /!< Timer fault enabling bits are read only /
mbed_official	237:f3da66175598	844
mbed_official	237:f3da66175598	845	#define IS_HRTIM_TIMFAULTLOCK(TIMFAULTLOCK)\
mbed_official	237:f3da66175598	846	(((TIMFAULTLOCK) == HRTIM_TIMFAULTLOCK_READWRITE) \|\| \
mbed_official	237:f3da66175598	847	((TIMFAULTLOCK) == HRTIM_TIMFAULTLOCK_READONLY))
mbed_official	237:f3da66175598	848	/**
mbed_official	237:f3da66175598	849	* @}
mbed_official	237:f3da66175598	850	*/
mbed_official	237:f3da66175598	851
mbed_official	237:f3da66175598	852	/** @defgroup HRTIM_Timer_Deadtime_Insertion
mbed_official	237:f3da66175598	853	* @{
mbed_official	237:f3da66175598	854	* @brief Constants defining whether or not fault the dead time insertion
mbed_official	237:f3da66175598	855	* feature is enabled for a timer
mbed_official	237:f3da66175598	856	*/
mbed_official	237:f3da66175598	857	#define HRTIM_TIMDEADTIMEINSERTION_DISABLED ((uint32_t)0x00000000) /!< Output 1 and output 2 signals are independent /
mbed_official	237:f3da66175598	858	#define HRTIM_TIMDEADTIMEINSERTION_ENABLED HRTIM_OUTR_DTEN /!< Deadtime is inserted between output 1 and output 2 /
mbed_official	237:f3da66175598	859
mbed_official	237:f3da66175598	860	#define IS_HRTIM_TIMDEADTIMEINSERTION(TIMPUSHPULLMODE, TIMDEADTIMEINSERTION)\
mbed_official	237:f3da66175598	861	((((TIMPUSHPULLMODE) == HRTIM_TIMPUSHPULLMODE_DISABLED) && \
mbed_official	237:f3da66175598	862	((((TIMDEADTIMEINSERTION) == HRTIM_TIMDEADTIMEINSERTION_DISABLED) \|\| \
mbed_official	237:f3da66175598	863	((TIMDEADTIMEINSERTION) == HRTIM_TIMDEADTIMEINSERTION_ENABLED)))) \
mbed_official	237:f3da66175598	864	\|\| \
mbed_official	237:f3da66175598	865	(((TIMPUSHPULLMODE) == HRTIM_TIMPUSHPULLMODE_ENABLED) && \
mbed_official	237:f3da66175598	866	((TIMDEADTIMEINSERTION) == HRTIM_TIMDEADTIMEINSERTION_DISABLED)))
mbed_official	237:f3da66175598	867	/**
mbed_official	237:f3da66175598	868	* @}
mbed_official	237:f3da66175598	869	*/
mbed_official	237:f3da66175598	870
mbed_official	237:f3da66175598	871	/** @defgroup HRTIM_Timer_Delayed_Protection_Mode
mbed_official	237:f3da66175598	872	* @{
mbed_official	237:f3da66175598	873	* @brief Constants defining all possible delayed protection modes
mbed_official	237:f3da66175598	874	* for a timer. Also definethe source and outputs on which the delayed
mbed_official	237:f3da66175598	875	* protection schemes are applied
mbed_official	237:f3da66175598	876	*/
mbed_official	237:f3da66175598	877	#define HRTIM_TIMDELAYEDPROTECTION_DISABLED ((uint32_t)0x00000000) /!< No action /
mbed_official	237:f3da66175598	878	#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_EEV68 (HRTIM_OUTR_DLYPRTEN) /!< Output 1 delayed Idle on external Event 6 or 8 /
mbed_official	237:f3da66175598	879	#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_EEV68 (HRTIM_OUTR_DLYPRT_0 \| HRTIM_OUTR_DLYPRTEN) /!< Output 2 delayed Idle on external Event 6 or 8 /
mbed_official	237:f3da66175598	880	#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV68 (HRTIM_OUTR_DLYPRT_1 \| HRTIM_OUTR_DLYPRTEN) /!< Output 1 and output 2 delayed Idle on external Event 6 or 8 /
mbed_official	237:f3da66175598	881	#define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV68 (HRTIM_OUTR_DLYPRT_1 \| HRTIM_OUTR_DLYPRT_0 \| HRTIM_OUTR_DLYPRTEN) /!< Balanced Idle on external Event 6 or 8 /
mbed_official	237:f3da66175598	882	#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_DEEV79 (HRTIM_OUTR_DLYPRT_2 \| HRTIM_OUTR_DLYPRTEN) /!< Output 1 delayed Idle on external Event 7 or 9 /
mbed_official	237:f3da66175598	883	#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_DEEV79 (HRTIM_OUTR_DLYPRT_2 \| HRTIM_OUTR_DLYPRT_0 \| HRTIM_OUTR_DLYPRTEN) /!< Output 2 delayed Idle on external Event 7 or 9 /
mbed_official	237:f3da66175598	884	#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV79 (HRTIM_OUTR_DLYPRT_2 \| HRTIM_OUTR_DLYPRT_1 \| HRTIM_OUTR_DLYPRTEN) /!< Output 1 and output2 delayed Idle on external Event 7 or 9 /
mbed_official	237:f3da66175598	885	#define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV79 (HRTIM_OUTR_DLYPRT_2 \| HRTIM_OUTR_DLYPRT_1 \| HRTIM_OUTR_DLYPRT_0 \| HRTIM_OUTR_DLYPRTEN) /!< Balanced Idle on external Event 7 or 9 /
mbed_official	237:f3da66175598	886
mbed_official	237:f3da66175598	887	#define IS_HRTIM_TIMDELAYEDPROTECTION(TIMPUSHPULLMODE, TIMDELAYEDPROTECTION)\
mbed_official	237:f3da66175598	888	((((TIMDELAYEDPROTECTION) == HRTIM_TIMDELAYEDPROTECTION_DISABLED) \|\| \
mbed_official	237:f3da66175598	889	((TIMDELAYEDPROTECTION) == HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_EEV68) \|\| \
mbed_official	237:f3da66175598	890	((TIMDELAYEDPROTECTION) == HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_EEV68) \|\| \
mbed_official	237:f3da66175598	891	((TIMDELAYEDPROTECTION) == HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV68) \|\| \
mbed_official	237:f3da66175598	892	((TIMDELAYEDPROTECTION) == HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_DEEV79) \|\| \
mbed_official	237:f3da66175598	893	((TIMDELAYEDPROTECTION) == HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_DEEV79) \|\| \
mbed_official	237:f3da66175598	894	((TIMDELAYEDPROTECTION) == HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV79)) \
mbed_official	237:f3da66175598	895	\|\| \
mbed_official	237:f3da66175598	896	(((TIMPUSHPULLMODE) == HRTIM_TIMPUSHPULLMODE_ENABLED) && \
mbed_official	237:f3da66175598	897	((TIMDELAYEDPROTECTION) == HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV68) \|\| \
mbed_official	237:f3da66175598	898	((TIMDELAYEDPROTECTION) == HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV79)))
mbed_official	237:f3da66175598	899	/**
mbed_official	237:f3da66175598	900	* @}
mbed_official	237:f3da66175598	901	*/
mbed_official	237:f3da66175598	902
mbed_official	237:f3da66175598	903	/** @defgroup HRTIM_Timer_Update_Trigger
mbed_official	237:f3da66175598	904	* @{
mbed_official	237:f3da66175598	905	* @brief Constants defining whether the registers update is done synchronously
mbed_official	237:f3da66175598	906	* with any other timer or master update
mbed_official	237:f3da66175598	907	*/
mbed_official	237:f3da66175598	908	#define HRTIM_TIMUPDATETRIGGER_NONE (uint32_t)0x00000000 /!< Register update is disabled /
mbed_official	237:f3da66175598	909	#define HRTIM_TIMUPDATETRIGGER_MASTER (HRTIM_TIMCR_MSTU) /!< Register update is triggered by the master timer update /
mbed_official	237:f3da66175598	910	#define HRTIM_TIMUPDATETRIGGER_TIMER_A (HRTIM_TIMCR_TAU) /!< Register update is triggered by the timer A update /
mbed_official	237:f3da66175598	911	#define HRTIM_TIMUPDATETRIGGER_TIMER_B (HRTIM_TIMCR_TBU) /!< Register update is triggered by the timer B update /
mbed_official	237:f3da66175598	912	#define HRTIM_TIMUPDATETRIGGER_TIMER_C (HRTIM_TIMCR_TCU) /!< Register update is triggered by the timer C update/
mbed_official	237:f3da66175598	913	#define HRTIM_TIMUPDATETRIGGER_TIMER_D (HRTIM_TIMCR_TDU) /!< Register update is triggered by the timer D update /
mbed_official	237:f3da66175598	914	#define HRTIM_TIMUPDATETRIGGER_TIMER_E (HRTIM_TIMCR_TEU) /!< Register update is triggered by the timer E update /
mbed_official	237:f3da66175598	915
mbed_official	237:f3da66175598	916	#define IS_HRTIM_TIMUPDATETRIGGER(TIMUPDATETRIGGER) (((TIMUPDATETRIGGER) & 0xFE07FFFF) == 0x00000000)
mbed_official	237:f3da66175598	917	/**
mbed_official	237:f3da66175598	918	* @}
mbed_official	237:f3da66175598	919	*/
mbed_official	237:f3da66175598	920
mbed_official	237:f3da66175598	921	/** @defgroup HRTIM_Timer_Reset_Trigger
mbed_official	237:f3da66175598	922	* @{
mbed_official	237:f3da66175598	923	* @brief Constants defining the events that can be selected to trigger the reset
mbed_official	237:f3da66175598	924	* of the timer counter
mbed_official	237:f3da66175598	925	*/
mbed_official	237:f3da66175598	926	#define HRTIM_TIMRESETTRIGGER_NONE (uint32_t)0x00000000 /!< No counter reset trigger /
mbed_official	237:f3da66175598	927	#define HRTIM_TIMRESETTRIGGER_UPDATE (HRTIM_RSTR_UPDATE) /!< The timer counter is reset upon update event /
mbed_official	237:f3da66175598	928	#define HRTIM_TIMRESETTRIGGER_CMP2 (HRTIM_RSTR_CMP2) /!< The timer counter is reset upon Timer Compare 2 event /
mbed_official	237:f3da66175598	929	#define HRTIM_TIMRESETTRIGGER_CMP4 (HRTIM_RSTR_CMP4) /!< The timer counter is reset upon Timer Compare 4 event /
mbed_official	237:f3da66175598	930	#define HRTIM_TIMRESETTRIGGER_MASTER_PER (HRTIM_RSTR_MSTPER) /!< The timercounter is reset upon master timer period event /
mbed_official	237:f3da66175598	931	#define HRTIM_TIMRESETTRIGGER_MASTER_CMP1 (HRTIM_RSTR_MSTCMP1) /!< The timer counter is reset upon master timer Compare 1 event /
mbed_official	237:f3da66175598	932	#define HRTIM_TIMRESETTRIGGER_MASTER_CMP2 (HRTIM_RSTR_MSTCMP2) /!< The timer counter is reset upon master timer Compare 2 event /
mbed_official	237:f3da66175598	933	#define HRTIM_TIMRESETTRIGGER_MASTER_CMP3 (HRTIM_RSTR_MSTCMP3) /!< The timer counter is reset upon master timer Compare 3 event /
mbed_official	237:f3da66175598	934	#define HRTIM_TIMRESETTRIGGER_MASTER_CMP4 (HRTIM_RSTR_MSTCMP4) /!< The timer counter is reset upon master timer Compare 4 event /
mbed_official	237:f3da66175598	935	#define HRTIM_TIMRESETTRIGGER_EEV_1 (HRTIM_RSTR_EXTEVNT1) /!< The timer counter is reset upon external event 1 /
mbed_official	237:f3da66175598	936	#define HRTIM_TIMRESETTRIGGER_EEV_2 (HRTIM_RSTR_EXTEVNT2) /!< The timer counter is reset upon external event 2 /
mbed_official	237:f3da66175598	937	#define HRTIM_TIMRESETTRIGGER_EEV_3 (HRTIM_RSTR_EXTEVNT3) /!< The timer counter is reset upon external event 3 /
mbed_official	237:f3da66175598	938	#define HRTIM_TIMRESETTRIGGER_EEV_4 (HRTIM_RSTR_EXTEVNT4) /!< The timer counter is reset upon external event 4 /
mbed_official	237:f3da66175598	939	#define HRTIM_TIMRESETTRIGGER_EEV_5 (HRTIM_RSTR_EXTEVNT5) /!< The timer counter is reset upon external event 5 /
mbed_official	237:f3da66175598	940	#define HRTIM_TIMRESETTRIGGER_EEV_6 (HRTIM_RSTR_EXTEVNT6) /!< The timer counter is reset upon external event 6 /
mbed_official	237:f3da66175598	941	#define HRTIM_TIMRESETTRIGGER_EEV_7 (HRTIM_RSTR_EXTEVNT7) /!< The timer counter is reset upon external event 7 /
mbed_official	237:f3da66175598	942	#define HRTIM_TIMRESETTRIGGER_EEV_8 (HRTIM_RSTR_EXTEVNT8) /!< The timer counter is reset upon external event 8 /
mbed_official	237:f3da66175598	943	#define HRTIM_TIMRESETTRIGGER_EEV_9 (HRTIM_RSTR_EXTEVNT9) /!< The timer counter is reset upon external event 9 /
mbed_official	237:f3da66175598	944	#define HRTIM_TIMRESETTRIGGER_EEV_10 (HRTIM_RSTR_EXTEVNT10) /!< The timer counter is reset upon external event 10 /
mbed_official	237:f3da66175598	945	#define HRTIM_TIMRESETTRIGGER_OTHER1_CMP1 (HRTIM_RSTR_TIMBCMP1) /!< The timer counter is reset upon other timer Compare 1 event /
mbed_official	237:f3da66175598	946	#define HRTIM_TIMRESETTRIGGER_OTHER1_CMP2 (HRTIM_RSTR_TIMBCMP2) /!< The timer counter is reset upon other timer Compare 2 event /
mbed_official	237:f3da66175598	947	#define HRTIM_TIMRESETTRIGGER_OTHER1_CMP4 (HRTIM_RSTR_TIMBCMP4) /!< The timer counter is reset upon other timer Compare 4 event /
mbed_official	237:f3da66175598	948	#define HRTIM_TIMRESETTRIGGER_OTHER2_CMP1 (HRTIM_RSTR_TIMCCMP1) /!< The timer counter is reset upon other timer Compare 1 event /
mbed_official	237:f3da66175598	949	#define HRTIM_TIMRESETTRIGGER_OTHER2_CMP2 (HRTIM_RSTR_TIMCCMP2) /!< The timer counter is reset upon other timer Compare 2 event /
mbed_official	237:f3da66175598	950	#define HRTIM_TIMRESETTRIGGER_OTHER2_CMP4 (HRTIM_RSTR_TIMCCMP4) /!< The timer counter is reset upon other timer Compare 4 event /
mbed_official	237:f3da66175598	951	#define HRTIM_TIMRESETTRIGGER_OTHER3_CMP1 (HRTIM_RSTR_TIMDCMP1) /!< The timer counter is reset upon other timer Compare 1 event /
mbed_official	237:f3da66175598	952	#define HRTIM_TIMRESETTRIGGER_OTHER3_CMP2 (HRTIM_RSTR_TIMDCMP2) /!< The timer counter is reset upon other timer Compare 2 event /
mbed_official	237:f3da66175598	953	#define HRTIM_TIMRESETTRIGGER_OTHER3_CMP4 (HRTIM_RSTR_TIMDCMP4) /!< The timer counter is reset upon other timer Compare 4 event /
mbed_official	237:f3da66175598	954	#define HRTIM_TIMRESETTRIGGER_OTHER4_CMP1 (HRTIM_RSTR_TIMECMP1) /!< The timer counter is reset upon other timer Compare 1 event /
mbed_official	237:f3da66175598	955	#define HRTIM_TIMRESETTRIGGER_OTHER4_CMP2 (HRTIM_RSTR_TIMECMP2) /!< The timer counter is reset upon other timer Compare 2 event /
mbed_official	237:f3da66175598	956	#define HRTIM_TIMRESETTRIGGER_OTHER4_CMP4 (HRTIM_RSTR_TIMECMP4) /!< The timer counter is reset upon other timer Compare 4 event /
mbed_official	237:f3da66175598	957
mbed_official	237:f3da66175598	958	#define IS_HRTIM_TIMRESETTRIGGER(TIMRESETTRIGGER) (((TIMRESETTRIGGER) & 0x800000001) == 0x00000000)
mbed_official	237:f3da66175598	959
mbed_official	237:f3da66175598	960	/**
mbed_official	237:f3da66175598	961	* @}
mbed_official	237:f3da66175598	962	*/
mbed_official	237:f3da66175598	963
mbed_official	237:f3da66175598	964	/** @defgroup HRTIM_Timer_Reset_Update
mbed_official	237:f3da66175598	965	* @{
mbed_official	237:f3da66175598	966	* @brief Constants defining whether the register are updated upon Timerx
mbed_official	237:f3da66175598	967	* counter reset or roll-over to 0 after reaching the period value
mbed_official	237:f3da66175598	968	* in continuous mode
mbed_official	237:f3da66175598	969	*/
mbed_official	237:f3da66175598	970	#define HRTIM_TIMUPDATEONRESET_DISABLED (uint32_t)0x00000000 /!< Update by timer x reset / roll-over disabled /
mbed_official	237:f3da66175598	971	#define HRTIM_TIMUPDATEONRESET_ENABLED (HRTIM_TIMCR_TRSTU) /!< Update by timer x reset / roll-over enabled /
mbed_official	237:f3da66175598	972
mbed_official	237:f3da66175598	973	#define IS_HRTIM_TIMUPDATEONRESET(TIMUPDATEONRESET) \
mbed_official	237:f3da66175598	974	(((TIMUPDATEONRESET) == HRTIM_TIMUPDATEONRESET_DISABLED) \|\| \
mbed_official	237:f3da66175598	975	((TIMUPDATEONRESET) == HRTIM_TIMUPDATEONRESET_ENABLED))
mbed_official	237:f3da66175598	976	/**
mbed_official	237:f3da66175598	977	* @}
mbed_official	237:f3da66175598	978	*/
mbed_official	237:f3da66175598	979
mbed_official	237:f3da66175598	980	/** @defgroup HRTIM_Compare_Unit_Auto_Delayed_Mode
mbed_official	237:f3da66175598	981	* @{
mbed_official	237:f3da66175598	982	* @brief Constants defining whether the compare register is behaving in
mbed_official	237:f3da66175598	983	* regular mode (compare match issued as soon as counter equal compare),
mbed_official	237:f3da66175598	984	* or in auto-delayed mode
mbed_official	237:f3da66175598	985	*/
mbed_official	237:f3da66175598	986	#define HRTIM_AUTODELAYEDMODE_REGULAR ((uint32_t)0x00000000) /!< standard compare mode /
mbed_official	237:f3da66175598	987	#define HRTIM_AUTODELAYEDMODE_AUTODELAYED_NOTIMEOUT (HRTIM_TIMCR_DELCMP2_0) /!< Compare event generated only if a capture has occured /
mbed_official	237:f3da66175598	988	#define HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP1 (HRTIM_TIMCR_DELCMP2_1) /!< Compare event generated if a capture has occured or after a Compare 1 match (timeout if capture event is missing) /
mbed_official	237:f3da66175598	989	#define HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP3 (HRTIM_TIMCR_DELCMP2_1 \| HRTIM_TIMCR_DELCMP2_0) /!< Compare event generated if a capture has occured or after a Compare 3 match (timeout if capture event is missing) /
mbed_official	237:f3da66175598	990
mbed_official	237:f3da66175598	991	#define IS_HRTIM_AUTODELAYEDMODE(AUTODELAYEDMODE)\
mbed_official	237:f3da66175598	992	(((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_REGULAR) \|\| \
mbed_official	237:f3da66175598	993	((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_AUTODELAYED_NOTIMEOUT) \|\| \
mbed_official	237:f3da66175598	994	((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP1) \|\| \
mbed_official	237:f3da66175598	995	((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP3))
mbed_official	237:f3da66175598	996
mbed_official	237:f3da66175598	997	/* Auto delayed mode is only available for compare units 2 and 4 */
mbed_official	237:f3da66175598	998	#define IS_HRTIM_COMPAREUNIT_AUTODELAYEDMODE(COMPAREUNIT, AUTODELAYEDMODE) \
mbed_official	237:f3da66175598	999	((((COMPAREUNIT) == HRTIM_COMPAREUNIT_2) && \
mbed_official	237:f3da66175598	1000	(((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_REGULAR) \|\| \
mbed_official	237:f3da66175598	1001	((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_AUTODELAYED_NOTIMEOUT) \|\| \
mbed_official	237:f3da66175598	1002	((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP1) \|\| \
mbed_official	237:f3da66175598	1003	((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP3))) \
mbed_official	237:f3da66175598	1004	\|\| \
mbed_official	237:f3da66175598	1005	(((COMPAREUNIT) == HRTIM_COMPAREUNIT_4) && \
mbed_official	237:f3da66175598	1006	(((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_REGULAR) \|\| \
mbed_official	237:f3da66175598	1007	((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_AUTODELAYED_NOTIMEOUT) \|\| \
mbed_official	237:f3da66175598	1008	((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP1) \|\| \
mbed_official	237:f3da66175598	1009	((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP3))))
mbed_official	237:f3da66175598	1010	/**
mbed_official	237:f3da66175598	1011	* @}
mbed_official	237:f3da66175598	1012	*/
mbed_official	237:f3da66175598	1013
mbed_official	237:f3da66175598	1014	/** @defgroup HRTIM_Simple_OC_Mode
mbed_official	237:f3da66175598	1015	* @{
mbed_official	237:f3da66175598	1016	* @brief Constants defining the behavior of the output signal when the timer
mbed_official	237:f3da66175598	1017	operates in basic output compare mode
mbed_official	237:f3da66175598	1018	*/
mbed_official	237:f3da66175598	1019	#define HRTIM_BASICOCMODE_TOGGLE ((uint32_t)0x00000001) /!< Ouput toggles when the timer counter reaches the compare value /
mbed_official	237:f3da66175598	1020	#define HRTIM_BASICOCMODE_INACTIVE ((uint32_t)0x00000002) /!< Ouput forced to active level when the timer counter reaches the compare value /
mbed_official	237:f3da66175598	1021	#define HRTIM_BASICOCMODE_ACTIVE ((uint32_t)0x00000003) /!< Ouput forced to inactive level when the timer counter reaches the compare value /
mbed_official	237:f3da66175598	1022
mbed_official	237:f3da66175598	1023	#define IS_HRTIM_BASICOCMODE(BASICOCMODE)\
mbed_official	237:f3da66175598	1024	(((BASICOCMODE) == HRTIM_BASICOCMODE_TOGGLE) \|\| \
mbed_official	237:f3da66175598	1025	((BASICOCMODE) == HRTIM_BASICOCMODE_INACTIVE) \|\| \
mbed_official	237:f3da66175598	1026	((BASICOCMODE) == HRTIM_BASICOCMODE_ACTIVE))
mbed_official	237:f3da66175598	1027	/**
mbed_official	237:f3da66175598	1028	* @}
mbed_official	237:f3da66175598	1029	*/
mbed_official	237:f3da66175598	1030
mbed_official	237:f3da66175598	1031	/** @defgroup HRTIM_Output_Polarity
mbed_official	237:f3da66175598	1032	* @{
mbed_official	237:f3da66175598	1033	* @brief Constants defining the polarity of a timer output
mbed_official	237:f3da66175598	1034	*/
mbed_official	237:f3da66175598	1035	#define HRTIM_OUTPUTPOLARITY_HIGH ((uint32_t)0x00000000) /!< Output is acitve HIGH /
mbed_official	237:f3da66175598	1036	#define HRTIM_OUTPUTPOLARITY_LOW (HRTIM_OUTR_POL1) /!< Output is active LOW /
mbed_official	237:f3da66175598	1037
mbed_official	237:f3da66175598	1038	#define IS_HRTIM_OUTPUTPOLARITY(OUTPUTPOLARITY)\
mbed_official	237:f3da66175598	1039	(((OUTPUTPOLARITY) == HRTIM_OUTPUTPOLARITY_HIGH) \|\| \
mbed_official	237:f3da66175598	1040	((OUTPUTPOLARITY) == HRTIM_OUTPUTPOLARITY_LOW))
mbed_official	237:f3da66175598	1041	/**
mbed_official	237:f3da66175598	1042	* @}
mbed_official	237:f3da66175598	1043	*/
mbed_official	237:f3da66175598	1044
mbed_official	237:f3da66175598	1045	/** @defgroup HRTIM_Output_Set_Source
mbed_official	237:f3da66175598	1046	* @{
mbed_official	237:f3da66175598	1047	* @brief Constants defining the events that can be selected to configure the
mbed_official	237:f3da66175598	1048	* set crossbar of a timer output
mbed_official	237:f3da66175598	1049	*/
mbed_official	237:f3da66175598	1050	#define HRTIM_OUTPUTSET_NONE (uint32_t)0x00000000 /!< Reset the output set crossbar /
mbed_official	237:f3da66175598	1051	#define HRTIM_OUTPUTSET_RESYNC (HRTIM_SET1R_RESYNC) /!< Timer reset event coming solely from software or SYNC input forces the output to its active state /
mbed_official	237:f3da66175598	1052	#define HRTIM_OUTPUTSET_TIMPER (HRTIM_SET1R_PER) /!< Timer period event forces the output to its active state /
mbed_official	237:f3da66175598	1053	#define HRTIM_OUTPUTSET_TIMCMP1 (HRTIM_SET1R_CMP1) /!< Timer compare 1 event forces the output to its active state /
mbed_official	237:f3da66175598	1054	#define HRTIM_OUTPUTSET_TIMCMP2 (HRTIM_SET1R_CMP2) /!< Timer compare 2 event forces the output to its active state /
mbed_official	237:f3da66175598	1055	#define HRTIM_OUTPUTSET_TIMCMP3 (HRTIM_SET1R_CMP3) /!< Timer compare 3 event forces the output to its active state /
mbed_official	237:f3da66175598	1056	#define HRTIM_OUTPUTSET_TIMCMP4 (HRTIM_SET1R_CMP4) /!< Timer compare 4 event forces the output to its active state /
mbed_official	237:f3da66175598	1057	#define HRTIM_OUTPUTSET_MASTERPER (HRTIM_SET1R_MSTPER) /!< The master timer period event forces the output to its active state /
mbed_official	237:f3da66175598	1058	#define HRTIM_OUTPUTSET_MASTERCMP1 (HRTIM_SET1R_MSTCMP1) /!< Master Timer compare 1 event forces the output to its active state /
mbed_official	237:f3da66175598	1059	#define HRTIM_OUTPUTSET_MASTERCMP2 (HRTIM_SET1R_MSTCMP2) /!< Master Timer compare 2 event forces the output to its active state /
mbed_official	237:f3da66175598	1060	#define HRTIM_OUTPUTSET_MASTERCMP3 (HRTIM_SET1R_MSTCMP3) /!< Master Timer compare 3 event forces the output to its active state /
mbed_official	237:f3da66175598	1061	#define HRTIM_OUTPUTSET_MASTERCMP4 (HRTIM_SET1R_MSTCMP4) /!< Master Timer compare 4 event forces the output to its active state /
mbed_official	237:f3da66175598	1062	#define HRTIM_OUTPUTSET_TIMEV_1 (HRTIM_SET1R_TIMEVNT1) /!< Timer event 1 forces the output to its active state /
mbed_official	237:f3da66175598	1063	#define HRTIM_OUTPUTSET_TIMEV_2 (HRTIM_SET1R_TIMEVNT2) /!< Timer event 2 forces the output to its active state /
mbed_official	237:f3da66175598	1064	#define HRTIM_OUTPUTSET_TIMEV_3 (HRTIM_SET1R_TIMEVNT3) /!< Timer event 3 forces the output to its active state /
mbed_official	237:f3da66175598	1065	#define HRTIM_OUTPUTSET_TIMEV_4 (HRTIM_SET1R_TIMEVNT4) /!< Timer event 4 forces the output to its active state /
mbed_official	237:f3da66175598	1066	#define HRTIM_OUTPUTSET_TIMEV_5 (HRTIM_SET1R_TIMEVNT5) /!< Timer event 5 forces the output to its active state /
mbed_official	237:f3da66175598	1067	#define HRTIM_OUTPUTSET_TIMEV_6 (HRTIM_SET1R_TIMEVNT6) /!< Timer event 6 forces the output to its active state /
mbed_official	237:f3da66175598	1068	#define HRTIM_OUTPUTSET_TIMEV_7 (HRTIM_SET1R_TIMEVNT7) /!< Timer event 7 forces the output to its active state /
mbed_official	237:f3da66175598	1069	#define HRTIM_OUTPUTSET_TIMEV_8 (HRTIM_SET1R_TIMEVNT8) /!< Timer event 8 forces the output to its active state /
mbed_official	237:f3da66175598	1070	#define HRTIM_OUTPUTSET_TIMEV_9 (HRTIM_SET1R_TIMEVNT9) /!< Timer event 9 forces the output to its active state /
mbed_official	237:f3da66175598	1071	#define HRTIM_OUTPUTSET_EEV_1 (HRTIM_SET1R_EXTVNT1) /!< External event 1 forces the output to its active state /
mbed_official	237:f3da66175598	1072	#define HRTIM_OUTPUTSET_EEV_2 (HRTIM_SET1R_EXTVNT2) /!< External event 2 forces the output to its active state /
mbed_official	237:f3da66175598	1073	#define HRTIM_OUTPUTSET_EEV_3 (HRTIM_SET1R_EXTVNT3) /!< External event 3 forces the output to its active state /
mbed_official	237:f3da66175598	1074	#define HRTIM_OUTPUTSET_EEV_4 (HRTIM_SET1R_EXTVNT4) /!< External event 4 forces the output to its active state /
mbed_official	237:f3da66175598	1075	#define HRTIM_OUTPUTSET_EEV_5 (HRTIM_SET1R_EXTVNT5) /!< External event 5 forces the output to its active state /
mbed_official	237:f3da66175598	1076	#define HRTIM_OUTPUTSET_EEV_6 (HRTIM_SET1R_EXTVNT6) /!< External event 6 forces the output to its active state /
mbed_official	237:f3da66175598	1077	#define HRTIM_OUTPUTSET_EEV_7 (HRTIM_SET1R_EXTVNT7) /!< External event 7 forces the output to its active state /
mbed_official	237:f3da66175598	1078	#define HRTIM_OUTPUTSET_EEV_8 (HRTIM_SET1R_EXTVNT8) /!< External event 8 forces the output to its active state /
mbed_official	237:f3da66175598	1079	#define HRTIM_OUTPUTSET_EEV_9 (HRTIM_SET1R_EXTVNT9) /!< External event 9 forces the output to its active state /
mbed_official	237:f3da66175598	1080	#define HRTIM_OUTPUTSET_EEV_10 (HRTIM_SET1R_EXTVNT10) /!< External event 10 forces the output to its active state /
mbed_official	237:f3da66175598	1081	#define HRTIM_OUTPUTSET_UPDATE (HRTIM_SET1R_UPDATE) /!< Timer register update event forces the output to its active state /
mbed_official	237:f3da66175598	1082
mbed_official	237:f3da66175598	1083	#define IS_HRTIM_OUTPUTSET(OUTPUTSET)\
mbed_official	237:f3da66175598	1084	(((OUTPUTSET) == HRTIM_OUTPUTSET_NONE) \|\| \
mbed_official	237:f3da66175598	1085	((OUTPUTSET) == HRTIM_OUTPUTSET_RESYNC) \|\| \
mbed_official	237:f3da66175598	1086	((OUTPUTSET) == HRTIM_OUTPUTSET_TIMPER) \|\| \
mbed_official	237:f3da66175598	1087	((OUTPUTSET) == HRTIM_OUTPUTSET_TIMCMP1) \|\| \
mbed_official	237:f3da66175598	1088	((OUTPUTSET) == HRTIM_OUTPUTSET_TIMCMP2) \|\| \
mbed_official	237:f3da66175598	1089	((OUTPUTSET) == HRTIM_OUTPUTSET_TIMCMP3) \|\| \
mbed_official	237:f3da66175598	1090	((OUTPUTSET) == HRTIM_OUTPUTSET_TIMCMP4) \|\| \
mbed_official	237:f3da66175598	1091	((OUTPUTSET) == HRTIM_OUTPUTSET_MASTERPER) \|\| \
mbed_official	237:f3da66175598	1092	((OUTPUTSET) == HRTIM_OUTPUTSET_MASTERCMP1) \|\| \
mbed_official	237:f3da66175598	1093	((OUTPUTSET) == HRTIM_OUTPUTSET_MASTERCMP2) \|\| \
mbed_official	237:f3da66175598	1094	((OUTPUTSET) == HRTIM_OUTPUTSET_MASTERCMP3) \|\| \
mbed_official	237:f3da66175598	1095	((OUTPUTSET) == HRTIM_OUTPUTSET_MASTERCMP4) \|\| \
mbed_official	237:f3da66175598	1096	((OUTPUTSET) == HRTIM_OUTPUTSET_TIMEV_1) \|\| \
mbed_official	237:f3da66175598	1097	((OUTPUTSET) == HRTIM_OUTPUTSET_TIMEV_2) \|\| \
mbed_official	237:f3da66175598	1098	((OUTPUTSET) == HRTIM_OUTPUTSET_TIMEV_3) \|\| \
mbed_official	237:f3da66175598	1099	((OUTPUTSET) == HRTIM_OUTPUTSET_TIMEV_4) \|\| \
mbed_official	237:f3da66175598	1100	((OUTPUTSET) == HRTIM_OUTPUTSET_TIMEV_5) \|\| \
mbed_official	237:f3da66175598	1101	((OUTPUTSET) == HRTIM_OUTPUTSET_TIMEV_6) \|\| \
mbed_official	237:f3da66175598	1102	((OUTPUTSET) == HRTIM_OUTPUTSET_TIMEV_7) \|\| \
mbed_official	237:f3da66175598	1103	((OUTPUTSET) == HRTIM_OUTPUTSET_TIMEV_8) \|\| \
mbed_official	237:f3da66175598	1104	((OUTPUTSET) == HRTIM_OUTPUTSET_TIMEV_9) \|\| \
mbed_official	237:f3da66175598	1105	((OUTPUTSET) == HRTIM_OUTPUTSET_EEV_1) \|\| \
mbed_official	237:f3da66175598	1106	((OUTPUTSET) == HRTIM_OUTPUTSET_EEV_2) \|\| \
mbed_official	237:f3da66175598	1107	((OUTPUTSET) == HRTIM_OUTPUTSET_EEV_3) \|\| \
mbed_official	237:f3da66175598	1108	((OUTPUTSET) == HRTIM_OUTPUTSET_EEV_4) \|\| \
mbed_official	237:f3da66175598	1109	((OUTPUTSET) == HRTIM_OUTPUTSET_EEV_5) \|\| \
mbed_official	237:f3da66175598	1110	((OUTPUTSET) == HRTIM_OUTPUTSET_EEV_6) \|\| \
mbed_official	237:f3da66175598	1111	((OUTPUTSET) == HRTIM_OUTPUTSET_EEV_7) \|\| \
mbed_official	237:f3da66175598	1112	((OUTPUTSET) == HRTIM_OUTPUTSET_EEV_8) \|\| \
mbed_official	237:f3da66175598	1113	((OUTPUTSET) == HRTIM_OUTPUTSET_EEV_9) \|\| \
mbed_official	237:f3da66175598	1114	((OUTPUTSET) == HRTIM_OUTPUTSET_EEV_10) \|\| \
mbed_official	237:f3da66175598	1115	((OUTPUTSET) == HRTIM_OUTPUTSET_UPDATE))
mbed_official	237:f3da66175598	1116	/**
mbed_official	237:f3da66175598	1117	* @}
mbed_official	237:f3da66175598	1118	*/
mbed_official	237:f3da66175598	1119
mbed_official	237:f3da66175598	1120	/** @defgroup HRTIM_Output_Reset_Source
mbed_official	237:f3da66175598	1121	* @{
mbed_official	237:f3da66175598	1122	* @brief Constants defining the events that can be selected to configure the
mbed_official	237:f3da66175598	1123	* set crossbar of a timer output
mbed_official	237:f3da66175598	1124	*/
mbed_official	237:f3da66175598	1125	#define HRTIM_OUTPUTRESET_NONE (uint32_t)0x00000000 /!< Reset the output reset crossbar /
mbed_official	237:f3da66175598	1126	#define HRTIM_OUTPUTRESET_RESYNC (HRTIM_RST1R_RESYNC) /!< Timer reset event coming solely from software or SYNC input forces the output to its inactive state /
mbed_official	237:f3da66175598	1127	#define HRTIM_OUTPUTRESET_TIMPER (HRTIM_RST1R_PER) /!< Timer period event forces the output to its inactive state /
mbed_official	237:f3da66175598	1128	#define HRTIM_OUTPUTRESET_TIMCMP1 (HRTIM_RST1R_CMP1) /!< Timer compare 1 event forces the output to its inactive state /
mbed_official	237:f3da66175598	1129	#define HRTIM_OUTPUTRESET_TIMCMP2 (HRTIM_RST1R_CMP2) /!< Timer compare 2 event forces the output to its inactive state /
mbed_official	237:f3da66175598	1130	#define HRTIM_OUTPUTRESET_TIMCMP3 (HRTIM_RST1R_CMP3) /!< Timer compare 3 event forces the output to its inactive state /
mbed_official	237:f3da66175598	1131	#define HRTIM_OUTPUTRESET_TIMCMP4 (HRTIM_RST1R_CMP4) /!< Timer compare 4 event forces the output to its inactive state /
mbed_official	237:f3da66175598	1132	#define HRTIM_OUTPUTRESET_MASTERPER (HRTIM_RST1R_MSTPER) /!< The master timer period event forces the output to its inactive state /
mbed_official	237:f3da66175598	1133	#define HRTIM_OUTPUTRESET_MASTERCMP1 (HRTIM_RST1R_MSTCMP1) /!< Master Timer compare 1 event forces the output to its inactive state /
mbed_official	237:f3da66175598	1134	#define HRTIM_OUTPUTRESET_MASTERCMP2 (HRTIM_RST1R_MSTCMP2) /!< Master Timer compare 2 event forces the output to its inactive state /
mbed_official	237:f3da66175598	1135	#define HRTIM_OUTPUTRESET_MASTERCMP3 (HRTIM_RST1R_MSTCMP3) /!< Master Timer compare 3 event forces the output to its inactive state /
mbed_official	237:f3da66175598	1136	#define HRTIM_OUTPUTRESET_MASTERCMP4 (HRTIM_RST1R_MSTCMP4) /!< Master Timer compare 4 event forces the output to its inactive state /
mbed_official	237:f3da66175598	1137	#define HRTIM_OUTPUTRESET_TIMEV_1 (HRTIM_RST1R_TIMEVNT1) /!< Timer event 1 forces the output to its inactive state /
mbed_official	237:f3da66175598	1138	#define HRTIM_OUTPUTRESET_TIMEV_2 (HRTIM_RST1R_TIMEVNT2) /!< Timer event 2 forces the output to its inactive state /
mbed_official	237:f3da66175598	1139	#define HRTIM_OUTPUTRESET_TIMEV_3 (HRTIM_RST1R_TIMEVNT3) /!< Timer event 3 forces the output to its inactive state /
mbed_official	237:f3da66175598	1140	#define HRTIM_OUTPUTRESET_TIMEV_4 (HRTIM_RST1R_TIMEVNT4) /!< Timer event 4 forces the output to its inactive state /
mbed_official	237:f3da66175598	1141	#define HRTIM_OUTPUTRESET_TIMEV_5 (HRTIM_RST1R_TIMEVNT5) /!< Timer event 5 forces the output to its inactive state /
mbed_official	237:f3da66175598	1142	#define HRTIM_OUTPUTRESET_TIMEV_6 (HRTIM_RST1R_TIMEVNT6) /!< Timer event 6 forces the output to its inactive state /
mbed_official	237:f3da66175598	1143	#define HRTIM_OUTPUTRESET_TIMEV_7 (HRTIM_RST1R_TIMEVNT7) /!< Timer event 7 forces the output to its inactive state /
mbed_official	237:f3da66175598	1144	#define HRTIM_OUTPUTRESET_TIMEV_8 (HRTIM_RST1R_TIMEVNT8) /!< Timer event 8 forces the output to its inactive state /
mbed_official	237:f3da66175598	1145	#define HRTIM_OUTPUTRESET_TIMEV_9 (HRTIM_RST1R_TIMEVNT9) /!< Timer event 9 forces the output to its inactive state /
mbed_official	237:f3da66175598	1146	#define HRTIM_OUTPUTRESET_EEV_1 (HRTIM_RST1R_EXTVNT1) /!< External event 1 forces the output to its inactive state /
mbed_official	237:f3da66175598	1147	#define HRTIM_OUTPUTRESET_EEV_2 (HRTIM_RST1R_EXTVNT2) /!< External event 2 forces the output to its inactive state /
mbed_official	237:f3da66175598	1148	#define HRTIM_OUTPUTRESET_EEV_3 (HRTIM_RST1R_EXTVNT3) /!< External event 3 forces the output to its inactive state /
mbed_official	237:f3da66175598	1149	#define HRTIM_OUTPUTRESET_EEV_4 (HRTIM_RST1R_EXTVNT4) /!< External event 4 forces the output to its inactive state /
mbed_official	237:f3da66175598	1150	#define HRTIM_OUTPUTRESET_EEV_5 (HRTIM_RST1R_EXTVNT5) /!< External event 5 forces the output to its inactive state /
mbed_official	237:f3da66175598	1151	#define HRTIM_OUTPUTRESET_EEV_6 (HRTIM_RST1R_EXTVNT6) /!< External event 6 forces the output to its inactive state /
mbed_official	237:f3da66175598	1152	#define HRTIM_OUTPUTRESET_EEV_7 (HRTIM_RST1R_EXTVNT7) /!< External event 7 forces the output to its inactive state /
mbed_official	237:f3da66175598	1153	#define HRTIM_OUTPUTRESET_EEV_8 (HRTIM_RST1R_EXTVNT8) /!< External event 8 forces the output to its inactive state /
mbed_official	237:f3da66175598	1154	#define HRTIM_OUTPUTRESET_EEV_9 (HRTIM_RST1R_EXTVNT9) /!< External event 9 forces the output to its inactive state /
mbed_official	237:f3da66175598	1155	#define HRTIM_OUTPUTRESET_EEV_10 (HRTIM_RST1R_EXTVNT10) /!< External event 10 forces the output to its inactive state /
mbed_official	237:f3da66175598	1156	#define HRTIM_OUTPUTRESET_UPDATE (HRTIM_RST1R_UPDATE) /!< Timer register update event forces the output to its inactive state /
mbed_official	237:f3da66175598	1157
mbed_official	237:f3da66175598	1158	#define IS_HRTIM_OUTPUTRESET(OUTPUTRESET)\
mbed_official	237:f3da66175598	1159	(((OUTPUTRESET) == HRTIM_OUTPUTRESET_NONE) \|\| \
mbed_official	237:f3da66175598	1160	((OUTPUTRESET) == HRTIM_OUTPUTRESET_RESYNC) \|\| \
mbed_official	237:f3da66175598	1161	((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMPER) \|\| \
mbed_official	237:f3da66175598	1162	((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMCMP1) \|\| \
mbed_official	237:f3da66175598	1163	((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMCMP2) \|\| \
mbed_official	237:f3da66175598	1164	((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMCMP3) \|\| \
mbed_official	237:f3da66175598	1165	((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMCMP4) \|\| \
mbed_official	237:f3da66175598	1166	((OUTPUTRESET) == HRTIM_OUTPUTRESET_MASTERPER) \|\| \
mbed_official	237:f3da66175598	1167	((OUTPUTRESET) == HRTIM_OUTPUTRESET_MASTERCMP1) \|\| \
mbed_official	237:f3da66175598	1168	((OUTPUTRESET) == HRTIM_OUTPUTRESET_MASTERCMP2) \|\| \
mbed_official	237:f3da66175598	1169	((OUTPUTRESET) == HRTIM_OUTPUTRESET_MASTERCMP3) \|\| \
mbed_official	237:f3da66175598	1170	((OUTPUTRESET) == HRTIM_OUTPUTRESET_MASTERCMP4) \|\| \
mbed_official	237:f3da66175598	1171	((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMEV_1) \|\| \
mbed_official	237:f3da66175598	1172	((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMEV_2) \|\| \
mbed_official	237:f3da66175598	1173	((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMEV_3) \|\| \
mbed_official	237:f3da66175598	1174	((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMEV_4) \|\| \
mbed_official	237:f3da66175598	1175	((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMEV_5) \|\| \
mbed_official	237:f3da66175598	1176	((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMEV_6) \|\| \
mbed_official	237:f3da66175598	1177	((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMEV_7) \|\| \
mbed_official	237:f3da66175598	1178	((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMEV_8) \|\| \
mbed_official	237:f3da66175598	1179	((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMEV_9) \|\| \
mbed_official	237:f3da66175598	1180	((OUTPUTRESET) == HRTIM_OUTPUTRESET_EEV_1) \|\| \
mbed_official	237:f3da66175598	1181	((OUTPUTRESET) == HRTIM_OUTPUTRESET_EEV_2) \|\| \
mbed_official	237:f3da66175598	1182	((OUTPUTRESET) == HRTIM_OUTPUTRESET_EEV_3) \|\| \
mbed_official	237:f3da66175598	1183	((OUTPUTRESET) == HRTIM_OUTPUTRESET_EEV_4) \|\| \
mbed_official	237:f3da66175598	1184	((OUTPUTRESET) == HRTIM_OUTPUTRESET_EEV_5) \|\| \
mbed_official	237:f3da66175598	1185	((OUTPUTRESET) == HRTIM_OUTPUTRESET_EEV_6) \|\| \
mbed_official	237:f3da66175598	1186	((OUTPUTRESET) == HRTIM_OUTPUTRESET_EEV_7) \|\| \
mbed_official	237:f3da66175598	1187	((OUTPUTRESET) == HRTIM_OUTPUTRESET_EEV_8) \|\| \
mbed_official	237:f3da66175598	1188	((OUTPUTRESET) == HRTIM_OUTPUTRESET_EEV_9) \|\| \
mbed_official	237:f3da66175598	1189	((OUTPUTRESET) == HRTIM_OUTPUTRESET_EEV_10) \|\| \
mbed_official	237:f3da66175598	1190	((OUTPUTRESET) == HRTIM_OUTPUTRESET_UPDATE))
mbed_official	237:f3da66175598	1191	/**
mbed_official	237:f3da66175598	1192	* @}
mbed_official	237:f3da66175598	1193	*/
mbed_official	237:f3da66175598	1194
mbed_official	237:f3da66175598	1195	/** @defgroup HRTIM_Output_Idle_Mode
mbed_official	237:f3da66175598	1196	* @{
mbed_official	237:f3da66175598	1197	* @brief Constants defining whether or not the timer output transition to its
mbed_official	237:f3da66175598	1198	IDLE state when burst mode is entered
mbed_official	237:f3da66175598	1199	*/
mbed_official	237:f3da66175598	1200	#define HRTIM_OUTPUTIDLEMODE_NONE (uint32_t)0x00000000 /!< The output is not affected by the burst mode operation /
mbed_official	237:f3da66175598	1201	#define HRTIM_OUTPUTIDLEMODE_IDLE (HRTIM_OUTR_IDLM1) /!< The output is in idle state when requested by the burst mode controller /
mbed_official	237:f3da66175598	1202
mbed_official	237:f3da66175598	1203	#define IS_HRTIM_OUTPUTIDLEMODE(OUTPUTIDLEMODE)\
mbed_official	237:f3da66175598	1204	(((OUTPUTIDLEMODE) == HRTIM_OUTPUTIDLEMODE_NONE) \|\| \
mbed_official	237:f3da66175598	1205	((OUTPUTIDLEMODE) == HRTIM_OUTPUTIDLEMODE_IDLE))
mbed_official	237:f3da66175598	1206	/**
mbed_official	237:f3da66175598	1207	* @}
mbed_official	237:f3da66175598	1208	*/
mbed_official	237:f3da66175598	1209
mbed_official	237:f3da66175598	1210	/** @defgroup HRTIM_Output_IDLE_Level
mbed_official	237:f3da66175598	1211	* @{
mbed_official	237:f3da66175598	1212	* @brief Constants defining the output level when output is in IDLE state
mbed_official	237:f3da66175598	1213	*/
mbed_official	237:f3da66175598	1214	#define HRTIM_OUTPUTIDLELEVEL_INACTIVE (uint32_t)0x00000000 /!< Output at inactive level when in IDLE state /
mbed_official	237:f3da66175598	1215	#define HRTIM_OUTPUTIDLELEVEL_ACTIVE (HRTIM_OUTR_IDLES1) /!< Output at active level when in IDLE state /
mbed_official	237:f3da66175598	1216
mbed_official	237:f3da66175598	1217	#define IS_HRTIM_OUTPUTIDLELEVEL(OUTPUTIDLELEVEL)\
mbed_official	237:f3da66175598	1218	(((OUTPUTIDLELEVEL) == HRTIM_OUTPUTIDLELEVEL_INACTIVE) \|\| \
mbed_official	237:f3da66175598	1219	((OUTPUTIDLELEVEL) == HRTIM_OUTPUTIDLELEVEL_ACTIVE))
mbed_official	237:f3da66175598	1220	/**
mbed_official	237:f3da66175598	1221	* @}
mbed_official	237:f3da66175598	1222	*/
mbed_official	237:f3da66175598	1223
mbed_official	237:f3da66175598	1224	/** @defgroup HRTIM_Output_FAULT_Level
mbed_official	237:f3da66175598	1225	* @{
mbed_official	237:f3da66175598	1226	* @brief Constants defining the output level when output is in FAULT state
mbed_official	237:f3da66175598	1227	*/
mbed_official	237:f3da66175598	1228	#define HRTIM_OUTPUTFAULTLEVEL_NONE (uint32_t)0x00000000 /!< The output is not affected by the fault input /
mbed_official	237:f3da66175598	1229	#define HRTIM_OUTPUTFAULTLEVEL_ACTIVE (HRTIM_OUTR_FAULT1_0) /!< Output at active level when in FAULT state /
mbed_official	237:f3da66175598	1230	#define HRTIM_OUTPUTFAULTLEVEL_INACTIVE (HRTIM_OUTR_FAULT1_1) /!< Output at inactive level when in FAULT state /
mbed_official	237:f3da66175598	1231	#define HRTIM_OUTPUTFAULTLEVEL_HIGHZ (HRTIM_OUTR_FAULT1_1 \| HRTIM_OUTR_FAULT1_0) /!< Output is tri-stated when in FAULT state /
mbed_official	237:f3da66175598	1232
mbed_official	237:f3da66175598	1233	#define IS_HRTIM_OUTPUTFAULTLEVEL(OUTPUTFAULTLEVEL)\
mbed_official	237:f3da66175598	1234	(((OUTPUTFAULTLEVEL) == HRTIM_OUTPUTFAULTLEVEL_NONE) \|\| \
mbed_official	237:f3da66175598	1235	((OUTPUTFAULTLEVEL) == HRTIM_OUTPUTFAULTLEVEL_ACTIVE) \|\| \
mbed_official	237:f3da66175598	1236	((OUTPUTFAULTLEVEL) == HRTIM_OUTPUTFAULTLEVEL_INACTIVE) \|\| \
mbed_official	237:f3da66175598	1237	((OUTPUTFAULTLEVEL) == HRTIM_OUTPUTFAULTLEVEL_HIGHZ))
mbed_official	237:f3da66175598	1238	/**
mbed_official	237:f3da66175598	1239	* @}
mbed_official	237:f3da66175598	1240	*/
mbed_official	237:f3da66175598	1241
mbed_official	237:f3da66175598	1242	/** @defgroup HRTIM_Output_Chopper_Mode_Enable
mbed_official	237:f3da66175598	1243	* @{
mbed_official	237:f3da66175598	1244	* @brief Constants defining whether or not chopper mode is enabled for a timer
mbed_official	237:f3da66175598	1245	output
mbed_official	237:f3da66175598	1246	*/
mbed_official	237:f3da66175598	1247	#define HRTIM_OUTPUTCHOPPERMODE_DISABLED (uint32_t)0x00000000 /!< The output is not affected by the fault input /
mbed_official	237:f3da66175598	1248	#define HRTIM_OUTPUTCHOPPERMODE_ENABLED (HRTIM_OUTR_CHP1) /!< Output at active level when in FAULT state /
mbed_official	237:f3da66175598	1249
mbed_official	237:f3da66175598	1250	#define IS_HRTIM_OUTPUTCHOPPERMODE(OUTPUTCHOPPERMODE)\
mbed_official	237:f3da66175598	1251	(((OUTPUTCHOPPERMODE) == HRTIM_OUTPUTCHOPPERMODE_DISABLED) \|\| \
mbed_official	237:f3da66175598	1252	((OUTPUTCHOPPERMODE) == HRTIM_OUTPUTCHOPPERMODE_ENABLED))
mbed_official	237:f3da66175598	1253	/**
mbed_official	237:f3da66175598	1254	* @}
mbed_official	237:f3da66175598	1255	*/
mbed_official	237:f3da66175598	1256
mbed_official	237:f3da66175598	1257	/** @defgroup HRTIM_Output_Burst_Mode_Entry_Delayed
mbed_official	237:f3da66175598	1258	* @{
mbed_official	237:f3da66175598	1259	* @brief Constants defining the idle mode entry is delayed by forcing a
mbed_official	237:f3da66175598	1260	deadtime insertion before switching the outputs to their idle state
mbed_official	237:f3da66175598	1261	*/
mbed_official	237:f3da66175598	1262	#define HRTIM_OUTPUTBURSTMODEENTRY_REGULAR (uint32_t)0x00000000 /!< The programmed Idle state is applied immediately to the Output /
mbed_official	237:f3da66175598	1263	#define HRTIM_OUTPUTBURSTMODEENTRY_DELAYED (HRTIM_OUTR_DIDL1) /!< Deadtime is inserted on output before entering the idle mode /
mbed_official	237:f3da66175598	1264
mbed_official	237:f3da66175598	1265	#define IS_HRTIM_OUTPUTBURSTMODEENTRY(OUTPUTBURSTMODEENTRY)\
mbed_official	237:f3da66175598	1266	(((OUTPUTBURSTMODEENTRY) == HRTIM_OUTPUTBURSTMODEENTRY_REGULAR) \|\| \
mbed_official	237:f3da66175598	1267	((OUTPUTBURSTMODEENTRY) == HRTIM_OUTPUTBURSTMODEENTRY_DELAYED))
mbed_official	237:f3da66175598	1268	/**
mbed_official	237:f3da66175598	1269	* @}
mbed_official	237:f3da66175598	1270	*/
mbed_official	237:f3da66175598	1271
mbed_official	237:f3da66175598	1272	/** @defgroup HRTIM_Capture_Unit_Trigger
mbed_official	237:f3da66175598	1273	* @{
mbed_official	237:f3da66175598	1274	* @brief Constants defining the events that can be selected to trigger the
mbed_official	237:f3da66175598	1275	* capture of the timing unit counter
mbed_official	237:f3da66175598	1276	*/
mbed_official	237:f3da66175598	1277	#define HRTIM_CAPTURETRIGGER_NONE (uint32_t)0x00000000 /!< Capture trigger is disabled /
mbed_official	237:f3da66175598	1278	#define HRTIM_CAPTURETRIGGER_UPDATE (HRTIM_CPT1CR_UPDCPT) /!< The update event triggers the Capture /
mbed_official	237:f3da66175598	1279	#define HRTIM_CAPTURETRIGGER_EEV_1 (HRTIM_CPT1CR_EXEV1CPT) /!< The External event 1 triggers the Capture /
mbed_official	237:f3da66175598	1280	#define HRTIM_CAPTURETRIGGER_EEV_2 (HRTIM_CPT1CR_EXEV2CPT) /!< The External event 2 triggers the Capture /
mbed_official	237:f3da66175598	1281	#define HRTIM_CAPTURETRIGGER_EEV_3 (HRTIM_CPT1CR_EXEV3CPT) /!< The External event 3 triggers the Capture /
mbed_official	237:f3da66175598	1282	#define HRTIM_CAPTURETRIGGER_EEV_4 (HRTIM_CPT1CR_EXEV4CPT) /!< The External event 4 triggers the Capture /
mbed_official	237:f3da66175598	1283	#define HRTIM_CAPTURETRIGGER_EEV_5 (HRTIM_CPT1CR_EXEV5CPT) /!< The External event 5 triggers the Capture /
mbed_official	237:f3da66175598	1284	#define HRTIM_CAPTURETRIGGER_EEV_6 (HRTIM_CPT1CR_EXEV6CPT) /!< The External event 6 triggers the Capture /
mbed_official	237:f3da66175598	1285	#define HRTIM_CAPTURETRIGGER_EEV_7 (HRTIM_CPT1CR_EXEV7CPT) /!< The External event 7 triggers the Capture /
mbed_official	237:f3da66175598	1286	#define HRTIM_CAPTURETRIGGER_EEV_8 (HRTIM_CPT1CR_EXEV8CPT) /!< The External event 8 triggers the Capture /
mbed_official	237:f3da66175598	1287	#define HRTIM_CAPTURETRIGGER_EEV_9 (HRTIM_CPT1CR_EXEV9CPT) /!< The External event 9 triggers the Capture /
mbed_official	237:f3da66175598	1288	#define HRTIM_CAPTURETRIGGER_EEV_10 (HRTIM_CPT1CR_EXEV10CPT) /!< The External event 10 triggers the Capture /
mbed_official	237:f3da66175598	1289	#define HRTIM_CAPTURETRIGGER_TA1_SET (HRTIM_CPT1CR_TA1SET) /!< Capture is triggered by TA1 output inactive to active transition /
mbed_official	237:f3da66175598	1290	#define HRTIM_CAPTURETRIGGER_TA1_RESET (HRTIM_CPT1CR_TA1RST) /!< Capture is triggered by TA1 output active to inactive transition /
mbed_official	237:f3da66175598	1291	#define HRTIM_CAPTURETRIGGER_TIMERA_CMP1 (HRTIM_CPT1CR_TIMACMP1) /!< Timer A Compare 1 triggers Capture /
mbed_official	237:f3da66175598	1292	#define HRTIM_CAPTURETRIGGER_TIMERA_CMP2 (HRTIM_CPT1CR_TIMACMP2) /!< Timer A Compare 2 triggers Capture /
mbed_official	237:f3da66175598	1293	#define HRTIM_CAPTURETRIGGER_TB1_SET (HRTIM_CPT1CR_TB1SET) /!< Capture is triggered by TB1 output inactive to active transition /
mbed_official	237:f3da66175598	1294	#define HRTIM_CAPTURETRIGGER_TB1_RESET (HRTIM_CPT1CR_TB1RST) /!< Capture is triggered by TB1 output active to inactive transition /
mbed_official	237:f3da66175598	1295	#define HRTIM_CAPTURETRIGGER_TIMERB_CMP1 (HRTIM_CPT1CR_TIMBCMP1) /!< Timer B Compare 1 triggers Capture /
mbed_official	237:f3da66175598	1296	#define HRTIM_CAPTURETRIGGER_TIMERB_CMP2 (HRTIM_CPT1CR_TIMBCMP2) /!< Timer B Compare 2 triggers Capture /
mbed_official	237:f3da66175598	1297	#define HRTIM_CAPTURETRIGGER_TC1_SET (HRTIM_CPT1CR_TC1SET) /!< Capture is triggered by TC1 output inactive to active transition /
mbed_official	237:f3da66175598	1298	#define HRTIM_CAPTURETRIGGER_TC1_RESET (HRTIM_CPT1CR_TC1RST) /!< Capture is triggered by TC1 output active to inactive transition /
mbed_official	237:f3da66175598	1299	#define HRTIM_CAPTURETRIGGER_TIMERC_CMP1 (HRTIM_CPT1CR_TIMCCMP1) /!< Timer C Compare 1 triggers Capture /
mbed_official	237:f3da66175598	1300	#define HRTIM_CAPTURETRIGGER_TIMERC_CMP2 (HRTIM_CPT1CR_TIMCCMP2) /!< Timer C Compare 2 triggers Capture /
mbed_official	237:f3da66175598	1301	#define HRTIM_CAPTURETRIGGER_TD1_SET (HRTIM_CPT1CR_TD1SET) /!< Capture is triggered by TD1 output inactive to active transition /
mbed_official	237:f3da66175598	1302	#define HRTIM_CAPTURETRIGGER_TD1_RESET (HRTIM_CPT1CR_TD1RST) /!< Capture is triggered by TD1 output active to inactive transition /
mbed_official	237:f3da66175598	1303	#define HRTIM_CAPTURETRIGGER_TIMERD_CMP1 (HRTIM_CPT1CR_TIMDCMP1) /!< Timer D Compare 1 triggers Capture /
mbed_official	237:f3da66175598	1304	#define HRTIM_CAPTURETRIGGER_TIMERD_CMP2 (HRTIM_CPT1CR_TIMDCMP2) /!< Timer D Compare 2 triggers Capture /
mbed_official	237:f3da66175598	1305	#define HRTIM_CAPTURETRIGGER_TE1_SET (HRTIM_CPT1CR_TE1SET) /!< Capture is triggered by TE1 output inactive to active transition /
mbed_official	237:f3da66175598	1306	#define HRTIM_CAPTURETRIGGER_TE1_RESET (HRTIM_CPT1CR_TE1RST) /!< Capture is triggered by TE1 output active to inactive transition /
mbed_official	237:f3da66175598	1307	#define HRTIM_CAPTURETRIGGER_TIMERE_CMP1 (HRTIM_CPT1CR_TIMECMP1) /!< Timer E Compare 1 triggers Capture /
mbed_official	237:f3da66175598	1308	#define HRTIM_CAPTURETRIGGER_TIMERE_CMP2 (HRTIM_CPT1CR_TIMECMP2) /!< Timer E Compare 2 triggers Capture /
mbed_official	237:f3da66175598	1309
mbed_official	237:f3da66175598	1310	#define IS_HRTIM_TIMER_CAPTURETRIGGER(TIMER, CAPTURETRIGGER) \
mbed_official	237:f3da66175598	1311	(((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_NONE) \|\| \
mbed_official	237:f3da66175598	1312	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_UPDATE) \|\| \
mbed_official	237:f3da66175598	1313	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_EEV_1) \|\| \
mbed_official	237:f3da66175598	1314	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_EEV_2) \|\| \
mbed_official	237:f3da66175598	1315	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_EEV_3) \|\| \
mbed_official	237:f3da66175598	1316	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_EEV_4) \|\| \
mbed_official	237:f3da66175598	1317	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_EEV_5) \|\| \
mbed_official	237:f3da66175598	1318	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_EEV_6) \|\| \
mbed_official	237:f3da66175598	1319	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_EEV_7) \|\| \
mbed_official	237:f3da66175598	1320	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_EEV_8) \|\| \
mbed_official	237:f3da66175598	1321	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_EEV_9) \|\| \
mbed_official	237:f3da66175598	1322	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_EEV_10) \
mbed_official	237:f3da66175598	1323	\|\| \
mbed_official	237:f3da66175598	1324	(((TIMER) == HRTIM_TIMERINDEX_TIMER_A) && \
mbed_official	237:f3da66175598	1325	(((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TB1_SET) \|\| \
mbed_official	237:f3da66175598	1326	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TB1_RESET) \|\| \
mbed_official	237:f3da66175598	1327	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERB_CMP1) \|\| \
mbed_official	237:f3da66175598	1328	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERB_CMP2) \|\| \
mbed_official	237:f3da66175598	1329	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TC1_SET) \|\| \
mbed_official	237:f3da66175598	1330	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TC1_RESET) \|\| \
mbed_official	237:f3da66175598	1331	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERC_CMP1) \|\| \
mbed_official	237:f3da66175598	1332	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERC_CMP2) \|\| \
mbed_official	237:f3da66175598	1333	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TD1_SET) \|\| \
mbed_official	237:f3da66175598	1334	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TD1_RESET) \|\| \
mbed_official	237:f3da66175598	1335	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERD_CMP1) \|\| \
mbed_official	237:f3da66175598	1336	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERD_CMP2) \|\| \
mbed_official	237:f3da66175598	1337	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TE1_SET) \|\| \
mbed_official	237:f3da66175598	1338	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TE1_RESET) \|\| \
mbed_official	237:f3da66175598	1339	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERE_CMP1) \|\| \
mbed_official	237:f3da66175598	1340	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERE_CMP2))) \
mbed_official	237:f3da66175598	1341	\|\| \
mbed_official	237:f3da66175598	1342	(((TIMER) == HRTIM_TIMERINDEX_TIMER_B) && \
mbed_official	237:f3da66175598	1343	(((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TA1_SET) \|\| \
mbed_official	237:f3da66175598	1344	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TA1_RESET) \|\| \
mbed_official	237:f3da66175598	1345	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERA_CMP1) \|\| \
mbed_official	237:f3da66175598	1346	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERA_CMP2) \|\| \
mbed_official	237:f3da66175598	1347	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TC1_SET) \|\| \
mbed_official	237:f3da66175598	1348	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TC1_RESET) \|\| \
mbed_official	237:f3da66175598	1349	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERC_CMP1) \|\| \
mbed_official	237:f3da66175598	1350	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERC_CMP2) \|\| \
mbed_official	237:f3da66175598	1351	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TD1_SET) \|\| \
mbed_official	237:f3da66175598	1352	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TD1_RESET) \|\| \
mbed_official	237:f3da66175598	1353	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERD_CMP1) \|\| \
mbed_official	237:f3da66175598	1354	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERD_CMP2) \|\| \
mbed_official	237:f3da66175598	1355	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TE1_SET) \|\| \
mbed_official	237:f3da66175598	1356	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TE1_RESET) \|\| \
mbed_official	237:f3da66175598	1357	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERE_CMP1) \|\| \
mbed_official	237:f3da66175598	1358	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERE_CMP2))) \
mbed_official	237:f3da66175598	1359	\|\| \
mbed_official	237:f3da66175598	1360	(((TIMER) == HRTIM_TIMERINDEX_TIMER_C) && \
mbed_official	237:f3da66175598	1361	(((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TA1_SET) \|\| \
mbed_official	237:f3da66175598	1362	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TA1_RESET) \|\| \
mbed_official	237:f3da66175598	1363	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERA_CMP1) \|\| \
mbed_official	237:f3da66175598	1364	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERA_CMP2) \|\| \
mbed_official	237:f3da66175598	1365	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TB1_SET) \|\| \
mbed_official	237:f3da66175598	1366	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TB1_RESET) \|\| \
mbed_official	237:f3da66175598	1367	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERB_CMP1) \|\| \
mbed_official	237:f3da66175598	1368	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERB_CMP2) \|\| \
mbed_official	237:f3da66175598	1369	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TD1_SET) \|\| \
mbed_official	237:f3da66175598	1370	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TD1_RESET) \|\| \
mbed_official	237:f3da66175598	1371	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERD_CMP1) \|\| \
mbed_official	237:f3da66175598	1372	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERD_CMP2) \|\| \
mbed_official	237:f3da66175598	1373	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TE1_SET) \|\| \
mbed_official	237:f3da66175598	1374	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TE1_RESET) \|\| \
mbed_official	237:f3da66175598	1375	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERE_CMP1) \|\| \
mbed_official	237:f3da66175598	1376	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERE_CMP2))) \
mbed_official	237:f3da66175598	1377	\|\| \
mbed_official	237:f3da66175598	1378	(((TIMER) == HRTIM_TIMERINDEX_TIMER_D) && \
mbed_official	237:f3da66175598	1379	(((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TA1_SET) \|\| \
mbed_official	237:f3da66175598	1380	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TA1_RESET) \|\| \
mbed_official	237:f3da66175598	1381	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERA_CMP1) \|\| \
mbed_official	237:f3da66175598	1382	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERA_CMP2) \|\| \
mbed_official	237:f3da66175598	1383	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TB1_SET) \|\| \
mbed_official	237:f3da66175598	1384	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TB1_RESET) \|\| \
mbed_official	237:f3da66175598	1385	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERB_CMP1) \|\| \
mbed_official	237:f3da66175598	1386	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERB_CMP2) \|\| \
mbed_official	237:f3da66175598	1387	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TC1_SET) \|\| \
mbed_official	237:f3da66175598	1388	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TC1_RESET) \|\| \
mbed_official	237:f3da66175598	1389	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERC_CMP1) \|\| \
mbed_official	237:f3da66175598	1390	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERC_CMP2) \|\| \
mbed_official	237:f3da66175598	1391	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TE1_SET) \|\| \
mbed_official	237:f3da66175598	1392	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TE1_RESET) \|\| \
mbed_official	237:f3da66175598	1393	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERE_CMP1) \|\| \
mbed_official	237:f3da66175598	1394	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERE_CMP2))) \
mbed_official	237:f3da66175598	1395	\|\| \
mbed_official	237:f3da66175598	1396	(((TIMER) == HRTIM_TIMERINDEX_TIMER_E) && \
mbed_official	237:f3da66175598	1397	(((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TA1_SET) \|\| \
mbed_official	237:f3da66175598	1398	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TA1_RESET) \|\| \
mbed_official	237:f3da66175598	1399	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERA_CMP1) \|\| \
mbed_official	237:f3da66175598	1400	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERA_CMP2) \|\| \
mbed_official	237:f3da66175598	1401	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TB1_SET) \|\| \
mbed_official	237:f3da66175598	1402	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TB1_RESET) \|\| \
mbed_official	237:f3da66175598	1403	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERB_CMP1) \|\| \
mbed_official	237:f3da66175598	1404	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERB_CMP2) \|\| \
mbed_official	237:f3da66175598	1405	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TC1_SET) \|\| \
mbed_official	237:f3da66175598	1406	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TC1_RESET) \|\| \
mbed_official	237:f3da66175598	1407	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERC_CMP1) \|\| \
mbed_official	237:f3da66175598	1408	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERC_CMP2) \|\| \
mbed_official	237:f3da66175598	1409	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TD1_SET) \|\| \
mbed_official	237:f3da66175598	1410	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TD1_RESET) \|\| \
mbed_official	237:f3da66175598	1411	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERD_CMP1) \|\| \
mbed_official	237:f3da66175598	1412	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERD_CMP2))))
mbed_official	237:f3da66175598	1413	/**
mbed_official	237:f3da66175598	1414	* @}
mbed_official	237:f3da66175598	1415	*/
mbed_official	237:f3da66175598	1416
mbed_official	237:f3da66175598	1417	/** @defgroup HRTIM_Timer_External_Event_Filter
mbed_official	237:f3da66175598	1418	* @{
mbed_official	237:f3da66175598	1419	* @brief Constants defining the event filtering apploed to external events
mbed_official	237:f3da66175598	1420	* by a timer
mbed_official	237:f3da66175598	1421	*/
mbed_official	237:f3da66175598	1422	#define HRTIM_TIMEVENTFILTER_NONE (0x00000000)
mbed_official	237:f3da66175598	1423	#define HRTIM_TIMEVENTFILTER_BLANKINGCMP1 (HRTIM_EEFR1_EE1FLTR_0) /!< Blanking from counter reset/roll-over to Compare 1 /
mbed_official	237:f3da66175598	1424	#define HRTIM_TIMEVENTFILTER_BLANKINGCMP2 (HRTIM_EEFR1_EE1FLTR_1) /!< Blanking from counter reset/roll-over to Compare 2 /
mbed_official	237:f3da66175598	1425	#define HRTIM_TIMEVENTFILTER_BLANKINGCMP3 (HRTIM_EEFR1_EE1FLTR_1 \| HRTIM_EEFR1_EE1FLTR_0) /!< Blanking from counter reset/roll-over to Compare 3 /
mbed_official	237:f3da66175598	1426	#define HRTIM_TIMEVENTFILTER_BLANKINGCMP4 (HRTIM_EEFR1_EE1FLTR_2) /!< Blanking from counter reset/roll-over to Compare 4 /
mbed_official	237:f3da66175598	1427	#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR1 (HRTIM_EEFR1_EE1FLTR_2 \| HRTIM_EEFR1_EE1FLTR_0) /!< Blanking from another timing unit: TIMFLTR1 source /
mbed_official	237:f3da66175598	1428	#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR2 (HRTIM_EEFR1_EE1FLTR_2 \| HRTIM_EEFR1_EE1FLTR_1) /!< Blanking from another timing unit: TIMFLTR2 source /
mbed_official	237:f3da66175598	1429	#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR3 (HRTIM_EEFR1_EE1FLTR_2 \| HRTIM_EEFR1_EE1FLTR_1 \| HRTIM_EEFR1_EE1FLTR_0) /!< Blanking from another timing unit: TIMFLTR3 source /
mbed_official	237:f3da66175598	1430	#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR4 (HRTIM_EEFR1_EE1FLTR_3) /!< Blanking from another timing unit: TIMFLTR4 source /
mbed_official	237:f3da66175598	1431	#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR5 (HRTIM_EEFR1_EE1FLTR_3 \| HRTIM_EEFR1_EE1FLTR_0) /!< Blanking from another timing unit: TIMFLTR5 source /
mbed_official	237:f3da66175598	1432	#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR6 (HRTIM_EEFR1_EE1FLTR_3 \| HRTIM_EEFR1_EE1FLTR_1) /!< Blanking from another timing unit: TIMFLTR6 source /
mbed_official	237:f3da66175598	1433	#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR7 (HRTIM_EEFR1_EE1FLTR_3 \| HRTIM_EEFR1_EE1FLTR_1 \| HRTIM_EEFR1_EE1FLTR_0) /!< Blanking from another timing unit: TIMFLTR7 source /
mbed_official	237:f3da66175598	1434	#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR8 (HRTIM_EEFR1_EE1FLTR_3 \| HRTIM_EEFR1_EE1FLTR_2) /!< Blanking from another timing unit: TIMFLTR8 source /
mbed_official	237:f3da66175598	1435	#define HRTIM_TIMEVENTFILTER_WINDOWINGCMP2 (HRTIM_EEFR1_EE1FLTR_3 \| HRTIM_EEFR1_EE1FLTR_2 \| HRTIM_EEFR1_EE1FLTR_0) /!< Windowing from counter reset/roll-over to Compare 2 /
mbed_official	237:f3da66175598	1436	#define HRTIM_TIMEVENTFILTER_WINDOWINGCMP3 (HRTIM_EEFR1_EE1FLTR_3 \| HRTIM_EEFR1_EE1FLTR_2 \| HRTIM_EEFR1_EE1FLTR_1) /!< Windowing from counter reset/roll-over to Compare 3 /
mbed_official	237:f3da66175598	1437	#define HRTIM_TIMEVENTFILTER_WINDOWINGTIM (HRTIM_EEFR1_EE1FLTR_3 \| HRTIM_EEFR1_EE1FLTR_2 \| HRTIM_EEFR1_EE1FLTR_1 \| HRTIM_EEFR1_EE1FLTR_3 \| HRTIM_EEFR1_EE1FLTR_2 \| HRTIM_EEFR1_EE1FLTR_0) /!< Windowing from another timing unit: TIMWIN source /
mbed_official	237:f3da66175598	1438
mbed_official	237:f3da66175598	1439	#define IS_HRTIM_TIMEVENTFILTER(TIMEVENTFILTER)\
mbed_official	237:f3da66175598	1440	(((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_NONE) \|\| \
mbed_official	237:f3da66175598	1441	((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_BLANKINGCMP1) \|\| \
mbed_official	237:f3da66175598	1442	((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_BLANKINGCMP2) \|\| \
mbed_official	237:f3da66175598	1443	((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_BLANKINGCMP3) \|\| \
mbed_official	237:f3da66175598	1444	((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_BLANKINGCMP4) \|\| \
mbed_official	237:f3da66175598	1445	((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_BLANKINGFLTR1) \|\| \
mbed_official	237:f3da66175598	1446	((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_BLANKINGFLTR2) \|\| \
mbed_official	237:f3da66175598	1447	((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_BLANKINGFLTR3) \|\| \
mbed_official	237:f3da66175598	1448	((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_BLANKINGFLTR4) \|\| \
mbed_official	237:f3da66175598	1449	((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_BLANKINGFLTR5) \|\| \
mbed_official	237:f3da66175598	1450	((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_BLANKINGFLTR6) \|\| \
mbed_official	237:f3da66175598	1451	((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_BLANKINGFLTR7) \|\| \
mbed_official	237:f3da66175598	1452	((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_BLANKINGFLTR8) \|\| \
mbed_official	237:f3da66175598	1453	((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_WINDOWINGCMP2) \|\| \
mbed_official	237:f3da66175598	1454	((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_WINDOWINGCMP3) \|\| \
mbed_official	237:f3da66175598	1455	((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_WINDOWINGTIM))
mbed_official	237:f3da66175598	1456	/**
mbed_official	237:f3da66175598	1457	* @}
mbed_official	237:f3da66175598	1458	*/
mbed_official	237:f3da66175598	1459
mbed_official	237:f3da66175598	1460	/** @defgroup HRTIM_Timer_External_Event_Latch
mbed_official	237:f3da66175598	1461	* @{
mbed_official	237:f3da66175598	1462	* @brief Constants defining whether or not the external event is
mbed_official	237:f3da66175598	1463	* memorized (latched) and generated as soon as the blanking period
mbed_official	237:f3da66175598	1464	* is completed or the window ends
mbed_official	237:f3da66175598	1465	*/
mbed_official	237:f3da66175598	1466	#define HRTIM_TIMEVENTLATCH_DISABLED ((uint32_t)0x00000000) /!< Event is ignored if it happens during a blank, or passed through during a window /
mbed_official	237:f3da66175598	1467	#define HRTIM_TIMEVENTLATCH_ENABLED HRTIM_EEFR1_EE1LTCH /!< Event is latched and delayed till the end of the blanking or windowing period /
mbed_official	237:f3da66175598	1468
mbed_official	237:f3da66175598	1469	#define IS_HRTIM_TIMEVENTLATCH(TIMEVENTLATCH)\
mbed_official	237:f3da66175598	1470	(((TIMEVENTLATCH) == HRTIM_TIMEVENTLATCH_DISABLED) \|\| \
mbed_official	237:f3da66175598	1471	((TIMEVENTLATCH) == HRTIM_TIMEVENTLATCH_ENABLED))
mbed_official	237:f3da66175598	1472	/**
mbed_official	237:f3da66175598	1473	* @}
mbed_official	237:f3da66175598	1474	*/
mbed_official	237:f3da66175598	1475
mbed_official	237:f3da66175598	1476	/** @defgroup HRTIM_Deadtime_Prescaler_Ratio
mbed_official	237:f3da66175598	1477	* @{
mbed_official	237:f3da66175598	1478	* @brief Constants defining division ratio between the timer clock frequency
mbed_official	237:f3da66175598	1479	* (fHRTIM) and the deadtime generator clock (fDTG)
mbed_official	237:f3da66175598	1480	*/
mbed_official	237:f3da66175598	1481	#define HRTIM_TIMDEADTIME_PRESCALERRATIO_MUL8 ((uint32_t)0x00000000) /!< fDTG = fHRTIM 8 */
mbed_official	237:f3da66175598	1482	#define HRTIM_TIMDEADTIME_PRESCALERRATIO_MUL4 (HRTIM_DTR_DTPRSC_0) /!< fDTG = fHRTIM 4 */
mbed_official	237:f3da66175598	1483	#define HRTIM_TIMDEADTIME_PRESCALERRATIO_MUL2 (HRTIM_DTR_DTPRSC_1) /!< fDTG = fHRTIM 2 */
mbed_official	237:f3da66175598	1484	#define HRTIM_TIMDEADTIME_PRESCALERRATIO_DIV1 (HRTIM_DTR_DTPRSC_1 \| HRTIM_DTR_DTPRSC_0) /!< fDTG = fHRTIM /
mbed_official	237:f3da66175598	1485	#define HRTIM_TIMDEADTIME_PRESCALERRATIO_DIV2 (HRTIM_DTR_DTPRSC_2) /!< fDTG = fHRTIM / 2 /
mbed_official	237:f3da66175598	1486	#define HRTIM_TIMDEADTIME_PRESCALERRATIO_DIV4 (HRTIM_DTR_DTPRSC_2 \| HRTIM_DTR_DTPRSC_0) /!< fDTG = fHRTIM / 4 /
mbed_official	237:f3da66175598	1487	#define HRTIM_TIMDEADTIME_PRESCALERRATIO_DIV8 (HRTIM_DTR_DTPRSC_2 \| HRTIM_DTR_DTPRSC_1) /!< fDTG = fHRTIM / 8 /
mbed_official	237:f3da66175598	1488	#define HRTIM_TIMDEADTIME_PRESCALERRATIO_DIV16 (HRTIM_DTR_DTPRSC_2 \| HRTIM_DTR_DTPRSC_1 \| HRTIM_DTR_DTPRSC_0) /!< fDTG = fHRTIM / 16 /
mbed_official	237:f3da66175598	1489
mbed_official	237:f3da66175598	1490	#define IS_HRTIM_TIMDEADTIME_PRESCALERRATIO(PRESCALERRATIO)\
mbed_official	237:f3da66175598	1491	(((PRESCALERRATIO) == HRTIM_TIMDEADTIME_PRESCALERRATIO_MUL8) \|\| \
mbed_official	237:f3da66175598	1492	((PRESCALERRATIO) == HRTIM_TIMDEADTIME_PRESCALERRATIO_MUL4) \|\| \
mbed_official	237:f3da66175598	1493	((PRESCALERRATIO) == HRTIM_TIMDEADTIME_PRESCALERRATIO_MUL2) \|\| \
mbed_official	237:f3da66175598	1494	((PRESCALERRATIO) == HRTIM_TIMDEADTIME_PRESCALERRATIO_DIV1) \|\| \
mbed_official	237:f3da66175598	1495	((PRESCALERRATIO) == HRTIM_TIMDEADTIME_PRESCALERRATIO_DIV2) \|\| \
mbed_official	237:f3da66175598	1496	((PRESCALERRATIO) == HRTIM_TIMDEADTIME_PRESCALERRATIO_DIV4) \|\| \
mbed_official	237:f3da66175598	1497	((PRESCALERRATIO) == HRTIM_TIMDEADTIME_PRESCALERRATIO_DIV8) \|\| \
mbed_official	237:f3da66175598	1498	((PRESCALERRATIO) == HRTIM_TIMDEADTIME_PRESCALERRATIO_DIV16))
mbed_official	237:f3da66175598	1499	/**
mbed_official	237:f3da66175598	1500	* @}
mbed_official	237:f3da66175598	1501	*/
mbed_official	237:f3da66175598	1502
mbed_official	237:f3da66175598	1503	/** @defgroup HRTIM_Deadtime_Rising_Sign
mbed_official	237:f3da66175598	1504	* @{
mbed_official	237:f3da66175598	1505	* @brief Constants defining whether the deadtime is positive or negative
mbed_official	237:f3da66175598	1506	* (overlapping signal) on rising edge
mbed_official	237:f3da66175598	1507	*/
mbed_official	237:f3da66175598	1508	#define HRTIM_TIMDEADTIME_RISINGSIGN_POSITIVE ((uint32_t)0x00000000) /!< Positive deadtime on rising edge /
mbed_official	237:f3da66175598	1509	#define HRTIM_TIMDEADTIME_RISINGSIGN_NEGATIVE (HRTIM_DTR_SDTR) /!< Negative deadtime on rising edge /
mbed_official	237:f3da66175598	1510
mbed_official	237:f3da66175598	1511	#define IS_HRTIM_TIMDEADTIME_RISINGSIGN(RISINGSIGN)\
mbed_official	237:f3da66175598	1512	(((RISINGSIGN) == HRTIM_TIMDEADTIME_RISINGSIGN_POSITIVE) \|\| \
mbed_official	237:f3da66175598	1513	((RISINGSIGN) == HRTIM_TIMDEADTIME_RISINGSIGN_NEGATIVE))
mbed_official	237:f3da66175598	1514	/**
mbed_official	237:f3da66175598	1515	* @}
mbed_official	237:f3da66175598	1516	*/
mbed_official	237:f3da66175598	1517
mbed_official	237:f3da66175598	1518	/** @defgroup HRTIM_Deadtime_Rising_Lock
mbed_official	237:f3da66175598	1519	* @{
mbed_official	237:f3da66175598	1520	* @brief Constants defining whether or not the deadtime (rising sign and
mbed_official	237:f3da66175598	1521	* value) is write protected
mbed_official	237:f3da66175598	1522	*/
mbed_official	237:f3da66175598	1523	#define HRTIM_TIMDEADTIME_RISINGLOCK_WRITE ((uint32_t)0x00000000) /!< Deadtime rising value and sign is writable /
mbed_official	237:f3da66175598	1524	#define HRTIM_TIMDEADTIME_RISINGLOCK_READONLY (HRTIM_DTR_DTRLK) /!< Deadtime rising value and sign is read-only /
mbed_official	237:f3da66175598	1525
mbed_official	237:f3da66175598	1526	#define IS_HRTIM_TIMDEADTIME_RISINGLOCK(RISINGLOCK)\
mbed_official	237:f3da66175598	1527	(((RISINGLOCK) == HRTIM_TIMDEADTIME_RISINGLOCK_WRITE) \|\| \
mbed_official	237:f3da66175598	1528	((RISINGLOCK) == HRTIM_TIMDEADTIME_RISINGLOCK_READONLY))
mbed_official	237:f3da66175598	1529	/**
mbed_official	237:f3da66175598	1530	* @}
mbed_official	237:f3da66175598	1531	*/
mbed_official	237:f3da66175598	1532
mbed_official	237:f3da66175598	1533	/** @defgroup HRTIM_Deadtime_Rising_Sign_Lock
mbed_official	237:f3da66175598	1534	* @{
mbed_official	237:f3da66175598	1535	* @brief Constants defining whether or not the deadtime rising sign is write
mbed_official	237:f3da66175598	1536	* protected
mbed_official	237:f3da66175598	1537	*/
mbed_official	237:f3da66175598	1538	#define HRTIM_TIMDEADTIME_RISINGSIGNLOCK_WRITE ((uint32_t)0x00000000) /!< Deadtime rising sign is writable /
mbed_official	237:f3da66175598	1539	#define HRTIM_TIMDEADTIME_RISINGSIGNLOCK_READONLY (HRTIM_DTR_DTRSLK) /!< Deadtime rising sign is read-only /
mbed_official	237:f3da66175598	1540
mbed_official	237:f3da66175598	1541	#define IS_HRTIM_TIMDEADTIME_RISINGSIGNLOCK(RISINGSIGNLOCK)\
mbed_official	237:f3da66175598	1542	(((RISINGSIGNLOCK) == HRTIM_TIMDEADTIME_RISINGSIGNLOCK_WRITE) \|\| \
mbed_official	237:f3da66175598	1543	((RISINGSIGNLOCK) == HRTIM_TIMDEADTIME_RISINGSIGNLOCK_READONLY))
mbed_official	237:f3da66175598	1544	/**
mbed_official	237:f3da66175598	1545	* @}
mbed_official	237:f3da66175598	1546	*/
mbed_official	237:f3da66175598	1547
mbed_official	237:f3da66175598	1548	/** @defgroup HRTIM_Deadtime_Falling_Sign
mbed_official	237:f3da66175598	1549	* @{
mbed_official	237:f3da66175598	1550	* @brief Constants defining whether the deadtime is positive or negative
mbed_official	237:f3da66175598	1551	* (overlapping signal) on falling edge
mbed_official	237:f3da66175598	1552	*/
mbed_official	237:f3da66175598	1553	#define HRTIM_TIMDEADTIME_FALLINGSIGN_POSITIVE ((uint32_t)0x00000000) /!< Positive deadtime on falling edge /
mbed_official	237:f3da66175598	1554	#define HRTIM_TIMDEADTIME_FALLINGSIGN_NEGATIVE (HRTIM_DTR_SDTF) /!< Negative deadtime on falling edge /
mbed_official	237:f3da66175598	1555
mbed_official	237:f3da66175598	1556	#define IS_HRTIM_TIMDEADTIME_FALLINGSIGN(FALLINGSIGN)\
mbed_official	237:f3da66175598	1557	(((FALLINGSIGN) == HRTIM_TIMDEADTIME_FALLINGSIGN_POSITIVE) \|\| \
mbed_official	237:f3da66175598	1558	((FALLINGSIGN) == HRTIM_TIMDEADTIME_FALLINGSIGN_NEGATIVE))
mbed_official	237:f3da66175598	1559	/**
mbed_official	237:f3da66175598	1560	* @}
mbed_official	237:f3da66175598	1561	*/
mbed_official	237:f3da66175598	1562
mbed_official	237:f3da66175598	1563	/** @defgroup HRTIM_Deadtime_Falling_Lock
mbed_official	237:f3da66175598	1564	* @{
mbed_official	237:f3da66175598	1565	* @brief Constants defining whether or not the deadtime (falling sign and
mbed_official	237:f3da66175598	1566	* value) is write protected
mbed_official	237:f3da66175598	1567	*/
mbed_official	237:f3da66175598	1568	#define HRTIM_TIMDEADTIME_FALLINGLOCK_WRITE ((uint32_t)0x00000000) /!< Deadtime falling value and sign is writable /
mbed_official	237:f3da66175598	1569	#define HRTIM_TIMDEADTIME_FALLINGLOCK_READONLY (HRTIM_DTR_DTFLK) /!< Deadtime falling value and sign is read-only /
mbed_official	237:f3da66175598	1570
mbed_official	237:f3da66175598	1571	#define IS_HRTIM_TIMDEADTIME_FALLINGLOCK(FALLINGLOCK)\
mbed_official	237:f3da66175598	1572	(((FALLINGLOCK) == HRTIM_TIMDEADTIME_FALLINGLOCK_WRITE) \|\| \
mbed_official	237:f3da66175598	1573	((FALLINGLOCK) == HRTIM_TIMDEADTIME_FALLINGLOCK_READONLY))
mbed_official	237:f3da66175598	1574	/**
mbed_official	237:f3da66175598	1575	* @}
mbed_official	237:f3da66175598	1576	*/
mbed_official	237:f3da66175598	1577
mbed_official	237:f3da66175598	1578	/** @defgroup HRTIM_Deadtime_Falling_Sign_Lock
mbed_official	237:f3da66175598	1579	* @{
mbed_official	237:f3da66175598	1580	* @brief Constants defining whether or not the deadtime falling sign is write
mbed_official	237:f3da66175598	1581	* protected
mbed_official	237:f3da66175598	1582	*/
mbed_official	237:f3da66175598	1583	#define HRTIM_TIMDEADTIME_FALLINGSIGNLOCK_WRITE ((uint32_t)0x00000000) /!< Deadtime falling sign is writable /
mbed_official	237:f3da66175598	1584	#define HRTIM_TIMDEADTIME_FALLINGSIGNLOCK_READONLY (HRTIM_DTR_DTFSLK) /!< Deadtime falling sign is read-only /
mbed_official	237:f3da66175598	1585
mbed_official	237:f3da66175598	1586	#define IS_HRTIM_TIMDEADTIME_FALLINGSIGNLOCK(FALLINGSIGNLOCK)\
mbed_official	237:f3da66175598	1587	(((FALLINGSIGNLOCK) == HRTIM_TIMDEADTIME_FALLINGSIGNLOCK_WRITE) \|\| \
mbed_official	237:f3da66175598	1588	((FALLINGSIGNLOCK) == HRTIM_TIMDEADTIME_FALLINGSIGNLOCK_READONLY))
mbed_official	237:f3da66175598	1589	/**
mbed_official	237:f3da66175598	1590	* @}
mbed_official	237:f3da66175598	1591	*/
mbed_official	237:f3da66175598	1592
mbed_official	237:f3da66175598	1593	/** @defgroup HRTIM_Chopper_Frequency
mbed_official	237:f3da66175598	1594	* @{
mbed_official	237:f3da66175598	1595	* @brief Constants defining the frequency of the generated high frequency carrier
mbed_official	237:f3da66175598	1596	*/
mbed_official	237:f3da66175598	1597	#define HRTIM_CHOPPER_PRESCALERRATIO_DIV16 ((uint32_t)0x000000) /!< fCHPFRQ = fHRTIM / 16 /
mbed_official	237:f3da66175598	1598	#define HRTIM_CHOPPER_PRESCALERRATIO_DIV32 (HRTIM_CHPR_CARFRQ_0) /!< fCHPFRQ = fHRTIM / 32 /
mbed_official	237:f3da66175598	1599	#define HRTIM_CHOPPER_PRESCALERRATIO_DIV48 (HRTIM_CHPR_CARFRQ_1) /!< fCHPFRQ = fHRTIM / 48 /
mbed_official	237:f3da66175598	1600	#define HRTIM_CHOPPER_PRESCALERRATIO_DIV64 (HRTIM_CHPR_CARFRQ_1 \| HRTIM_CHPR_CARFRQ_0) /!< fCHPFRQ = fHRTIM / 64 /
mbed_official	237:f3da66175598	1601	#define HRTIM_CHOPPER_PRESCALERRATIO_DIV80 (HRTIM_CHPR_CARFRQ_2) /!< fCHPFRQ = fHRTIM / 80 /
mbed_official	237:f3da66175598	1602	#define HRTIM_CHOPPER_PRESCALERRATIO_DIV96 (HRTIM_CHPR_CARFRQ_2 \| HRTIM_CHPR_CARFRQ_0) /!< fCHPFRQ = fHRTIM / 96 /
mbed_official	237:f3da66175598	1603	#define HRTIM_CHOPPER_PRESCALERRATIO_DIV112 (HRTIM_CHPR_CARFRQ_2 \| HRTIM_CHPR_CARFRQ_1) /!< fCHPFRQ = fHRTIM / 112 /
mbed_official	237:f3da66175598	1604	#define HRTIM_CHOPPER_PRESCALERRATIO_DIV128 (HRTIM_CHPR_CARFRQ_2 \| HRTIM_CHPR_CARFRQ_1 \| HRTIM_CHPR_CARFRQ_0) /!< fCHPFRQ = fHRTIM / 128 /
mbed_official	237:f3da66175598	1605	#define HRTIM_CHOPPER_PRESCALERRATIO_DIV144 (HRTIM_CHPR_CARFRQ_3) /!< fCHPFRQ = fHRTIM / 144 /
mbed_official	237:f3da66175598	1606	#define HRTIM_CHOPPER_PRESCALERRATIO_DIV160 (HRTIM_CHPR_CARFRQ_3 \| HRTIM_CHPR_CARFRQ_0) /!< fCHPFRQ = fHRTIM / 160 /
mbed_official	237:f3da66175598	1607	#define HRTIM_CHOPPER_PRESCALERRATIO_DIV176 (HRTIM_CHPR_CARFRQ_3 \| HRTIM_CHPR_CARFRQ_1) /!< fCHPFRQ = fHRTIM / 176 /
mbed_official	237:f3da66175598	1608	#define HRTIM_CHOPPER_PRESCALERRATIO_DIV192 (HRTIM_CHPR_CARFRQ_3 \| HRTIM_CHPR_CARFRQ_1 \| HRTIM_CHPR_CARFRQ_0) /!< fCHPFRQ = fHRTIM / 192 /
mbed_official	237:f3da66175598	1609	#define HRTIM_CHOPPER_PRESCALERRATIO_DIV208 (HRTIM_CHPR_CARFRQ_3 \| HRTIM_CHPR_CARFRQ_2) /!< fCHPFRQ = fHRTIM / 208 /
mbed_official	237:f3da66175598	1610	#define HRTIM_CHOPPER_PRESCALERRATIO_DIV224 (HRTIM_CHPR_CARFRQ_3 \| HRTIM_CHPR_CARFRQ_2 \| HRTIM_CHPR_CARFRQ_0) /!< fCHPFRQ = fHRTIM / 224 /
mbed_official	237:f3da66175598	1611	#define HRTIM_CHOPPER_PRESCALERRATIO_DIV240 (HRTIM_CHPR_CARFRQ_3 \| HRTIM_CHPR_CARFRQ_2 \| HRTIM_CHPR_CARFRQ_1) /!< fCHPFRQ = fHRTIM / 240 /
mbed_official	237:f3da66175598	1612	#define HRTIM_CHOPPER_PRESCALERRATIO_DIV256 (HRTIM_CHPR_CARFRQ_3 \| HRTIM_CHPR_CARFRQ_2 \| HRTIM_CHPR_CARFRQ_1 \| HRTIM_CHPR_CARFRQ_0) /!< fCHPFRQ = fHRTIM / 256 /
mbed_official	237:f3da66175598	1613
mbed_official	237:f3da66175598	1614	#define IS_HRTIM_CHOPPER_PRESCALERRATIO(PRESCALERRATIO)\
mbed_official	237:f3da66175598	1615	(((PRESCALERRATIO) == HRTIM_CHOPPER_PRESCALERRATIO_DIV16) \|\| \
mbed_official	237:f3da66175598	1616	((PRESCALERRATIO) == HRTIM_CHOPPER_PRESCALERRATIO_DIV32) \|\| \
mbed_official	237:f3da66175598	1617	((PRESCALERRATIO) == HRTIM_CHOPPER_PRESCALERRATIO_DIV48) \|\| \
mbed_official	237:f3da66175598	1618	((PRESCALERRATIO) == HRTIM_CHOPPER_PRESCALERRATIO_DIV64) \|\| \
mbed_official	237:f3da66175598	1619	((PRESCALERRATIO) == HRTIM_CHOPPER_PRESCALERRATIO_DIV80) \|\| \
mbed_official	237:f3da66175598	1620	((PRESCALERRATIO) == HRTIM_CHOPPER_PRESCALERRATIO_DIV96) \|\| \
mbed_official	237:f3da66175598	1621	((PRESCALERRATIO) == HRTIM_CHOPPER_PRESCALERRATIO_DIV112) \|\| \
mbed_official	237:f3da66175598	1622	((PRESCALERRATIO) == HRTIM_CHOPPER_PRESCALERRATIO_DIV128) \|\| \
mbed_official	237:f3da66175598	1623	((PRESCALERRATIO) == HRTIM_CHOPPER_PRESCALERRATIO_DIV144) \|\| \
mbed_official	237:f3da66175598	1624	((PRESCALERRATIO) == HRTIM_CHOPPER_PRESCALERRATIO_DIV160) \|\| \
mbed_official	237:f3da66175598	1625	((PRESCALERRATIO) == HRTIM_CHOPPER_PRESCALERRATIO_DIV176) \|\| \
mbed_official	237:f3da66175598	1626	((PRESCALERRATIO) == HRTIM_CHOPPER_PRESCALERRATIO_DIV192) \|\| \
mbed_official	237:f3da66175598	1627	((PRESCALERRATIO) == HRTIM_CHOPPER_PRESCALERRATIO_DIV208) \|\| \
mbed_official	237:f3da66175598	1628	((PRESCALERRATIO) == HRTIM_CHOPPER_PRESCALERRATIO_DIV224) \|\| \
mbed_official	237:f3da66175598	1629	((PRESCALERRATIO) == HRTIM_CHOPPER_PRESCALERRATIO_DIV240) \|\| \
mbed_official	237:f3da66175598	1630	((PRESCALERRATIO) == HRTIM_CHOPPER_PRESCALERRATIO_DIV256))
mbed_official	237:f3da66175598	1631	/**
mbed_official	237:f3da66175598	1632	* @}
mbed_official	237:f3da66175598	1633	*/
mbed_official	237:f3da66175598	1634
mbed_official	237:f3da66175598	1635	/** @defgroup HRTIM_Chopper_Duty_Cycle
mbed_official	237:f3da66175598	1636	* @{
mbed_official	237:f3da66175598	1637	* @brief Constants defining the duty cycle of the generated high frequency carrier
mbed_official	237:f3da66175598	1638	* Duty cycle can be adjusted by 1/8 step (from 0/8 up to 7/8)
mbed_official	237:f3da66175598	1639	*/
mbed_official	237:f3da66175598	1640	#define HRTIM_CHOPPER_DUTYCYCLE_0 ((uint32_t)0x000000) /!< 0/8 (i.e. only 1st pulse is present) / /!< fCHPFRQ = fHRTIM / 16 /
mbed_official	237:f3da66175598	1641	#define HRTIM_CHOPPER_DUTYCYCLE_125 (HRTIM_CHPR_CARDTY_0) /!< 1/8 (12.5 %)/ /!< fCHPFRQ = fHRTIM / 16 /
mbed_official	237:f3da66175598	1642	#define HRTIM_CHOPPER_DUTYCYCLE_250 (HRTIM_CHPR_CARDTY_1) /!< 2/8 (25 %) / /!< fCHPFRQ = fHRTIM / 16 /
mbed_official	237:f3da66175598	1643	#define HRTIM_CHOPPER_DUTYCYCLE_375 (HRTIM_CHPR_CARDTY_1 \| HRTIM_CHPR_CARDTY_0) /!< 3/8 (37.5 %) / /!< fCHPFRQ = fHRTIM / 16 /
mbed_official	237:f3da66175598	1644	#define HRTIM_CHOPPER_DUTYCYCLE_500 (HRTIM_CHPR_CARDTY_2) /!< 4/8 (50 %) / /!< fCHPFRQ = fHRTIM / 16 /
mbed_official	237:f3da66175598	1645	#define HRTIM_CHOPPER_DUTYCYCLE_625 (HRTIM_CHPR_CARDTY_2 \| HRTIM_CHPR_CARDTY_0) /!< 5/8 (62.5 %) / /!< fCHPFRQ = fHRTIM / 16 /
mbed_official	237:f3da66175598	1646	#define HRTIM_CHOPPER_DUTYCYCLE_750 (HRTIM_CHPR_CARDTY_2 \| HRTIM_CHPR_CARDTY_1) /!< 6/8 (75 %) / /!< fCHPFRQ = fHRTIM / 16 /
mbed_official	237:f3da66175598	1647	#define HRTIM_CHOPPER_DUTYCYCLE_875 (HRTIM_CHPR_CARDTY_2 \| HRTIM_CHPR_CARDTY_1 \| HRTIM_CHPR_CARDTY_0) /!< 7/8 (87.5 %) / /!< fCHPFRQ = fHRTIM / 16 /
mbed_official	237:f3da66175598	1648
mbed_official	237:f3da66175598	1649	#define IS_HRTIM_CHOPPER_DUTYCYCLE(DUTYCYCLE)\
mbed_official	237:f3da66175598	1650	(((DUTYCYCLE) == HRTIM_CHOPPER_DUTYCYCLE_0) \|\| \
mbed_official	237:f3da66175598	1651	((DUTYCYCLE) == HRTIM_CHOPPER_DUTYCYCLE_125) \|\| \
mbed_official	237:f3da66175598	1652	((DUTYCYCLE) == HRTIM_CHOPPER_DUTYCYCLE_250) \|\| \
mbed_official	237:f3da66175598	1653	((DUTYCYCLE) == HRTIM_CHOPPER_DUTYCYCLE_375) \|\| \
mbed_official	237:f3da66175598	1654	((DUTYCYCLE) == HRTIM_CHOPPER_DUTYCYCLE_500) \|\| \
mbed_official	237:f3da66175598	1655	((DUTYCYCLE) == HRTIM_CHOPPER_DUTYCYCLE_625) \|\| \
mbed_official	237:f3da66175598	1656	((DUTYCYCLE) == HRTIM_CHOPPER_DUTYCYCLE_750) \|\| \
mbed_official	237:f3da66175598	1657	((DUTYCYCLE) == HRTIM_CHOPPER_DUTYCYCLE_875))
mbed_official	237:f3da66175598	1658	/**
mbed_official	237:f3da66175598	1659	* @}
mbed_official	237:f3da66175598	1660	*/
mbed_official	237:f3da66175598	1661
mbed_official	237:f3da66175598	1662	/** @defgroup HRTIM_Chopper_Start_Pulse_Width
mbed_official	237:f3da66175598	1663	* @{
mbed_official	237:f3da66175598	1664	* @brief Constants defining the pulse width of the first pulse of the generated
mbed_official	237:f3da66175598	1665	* high frequency carrier
mbed_official	237:f3da66175598	1666	*/
mbed_official	237:f3da66175598	1667	#define HRTIM_CHOPPER_PULSEWIDTH_16 ((uint32_t)0x000000) /!< tSTPW = tHRTIM x 16 /
mbed_official	237:f3da66175598	1668	#define HRTIM_CHOPPER_PULSEWIDTH_32 (HRTIM_CHPR_STRPW_0) /!< tSTPW = tHRTIM x 32 /
mbed_official	237:f3da66175598	1669	#define HRTIM_CHOPPER_PULSEWIDTH_48 (HRTIM_CHPR_STRPW_1) /!< tSTPW = tHRTIM x 48 /
mbed_official	237:f3da66175598	1670	#define HRTIM_CHOPPER_PULSEWIDTH_64 (HRTIM_CHPR_STRPW_1 \| HRTIM_CHPR_STRPW_0) /!< tSTPW = tHRTIM x 64 /
mbed_official	237:f3da66175598	1671	#define HRTIM_CHOPPER_PULSEWIDTH_80 (HRTIM_CHPR_STRPW_2) /!< tSTPW = tHRTIM x 80 /
mbed_official	237:f3da66175598	1672	#define HRTIM_CHOPPER_PULSEWIDTH_96 (HRTIM_CHPR_STRPW_2 \| HRTIM_CHPR_STRPW_0) /!< tSTPW = tHRTIM x 96 /
mbed_official	237:f3da66175598	1673	#define HRTIM_CHOPPER_PULSEWIDTH_112 (HRTIM_CHPR_STRPW_2 \| HRTIM_CHPR_STRPW_1) /!< tSTPW = tHRTIM x 112 /
mbed_official	237:f3da66175598	1674	#define HRTIM_CHOPPER_PULSEWIDTH_128 (HRTIM_CHPR_STRPW_2 \| HRTIM_CHPR_STRPW_1 \| HRTIM_CHPR_STRPW_0) /!< tSTPW = tHRTIM x 128 /
mbed_official	237:f3da66175598	1675	#define HRTIM_CHOPPER_PULSEWIDTH_144 (HRTIM_CHPR_STRPW_3) /!< tSTPW = tHRTIM x 144 /
mbed_official	237:f3da66175598	1676	#define HRTIM_CHOPPER_PULSEWIDTH_160 (HRTIM_CHPR_STRPW_3 \| HRTIM_CHPR_STRPW_0) /!< tSTPW = tHRTIM x 160 /
mbed_official	237:f3da66175598	1677	#define HRTIM_CHOPPER_PULSEWIDTH_176 (HRTIM_CHPR_STRPW_3 \| HRTIM_CHPR_STRPW_1) /!< tSTPW = tHRTIM x 176 /
mbed_official	237:f3da66175598	1678	#define HRTIM_CHOPPER_PULSEWIDTH_192 (HRTIM_CHPR_STRPW_3 \| HRTIM_CHPR_STRPW_1 \| HRTIM_CHPR_STRPW_0) /!< tSTPW = tHRTIM x 192 /
mbed_official	237:f3da66175598	1679	#define HRTIM_CHOPPER_PULSEWIDTH_208 (HRTIM_CHPR_STRPW_3 \| HRTIM_CHPR_STRPW_2) /!< tSTPW = tHRTIM x 208 /
mbed_official	237:f3da66175598	1680	#define HRTIM_CHOPPER_PULSEWIDTH_224 (HRTIM_CHPR_STRPW_3 \| HRTIM_CHPR_STRPW_2 \| HRTIM_CHPR_STRPW_0) /!< tSTPW = tHRTIM x 224 /
mbed_official	237:f3da66175598	1681	#define HRTIM_CHOPPER_PULSEWIDTH_240 (HRTIM_CHPR_STRPW_3 \| HRTIM_CHPR_STRPW_2 \| HRTIM_CHPR_STRPW_1) /!< tSTPW = tHRTIM x 240 /
mbed_official	237:f3da66175598	1682	#define HRTIM_CHOPPER_PULSEWIDTH_256 (HRTIM_CHPR_STRPW_3 \| HRTIM_CHPR_STRPW_2 \| HRTIM_CHPR_STRPW_1 \| HRTIM_CHPR_STRPW_0) /!< tSTPW = tHRTIM x 256 /
mbed_official	237:f3da66175598	1683
mbed_official	237:f3da66175598	1684	#define IS_HRTIM_CHOPPER_PULSEWIDTH(PULSEWIDTH)\
mbed_official	237:f3da66175598	1685	(((PULSEWIDTH) == HRTIM_CHOPPER_PULSEWIDTH_16) \|\| \
mbed_official	237:f3da66175598	1686	((PULSEWIDTH) == HRTIM_CHOPPER_PULSEWIDTH_32) \|\| \
mbed_official	237:f3da66175598	1687	((PULSEWIDTH) == HRTIM_CHOPPER_PULSEWIDTH_48) \|\| \
mbed_official	237:f3da66175598	1688	((PULSEWIDTH) == HRTIM_CHOPPER_PULSEWIDTH_64) \|\| \
mbed_official	237:f3da66175598	1689	((PULSEWIDTH) == HRTIM_CHOPPER_PULSEWIDTH_80) \|\| \
mbed_official	237:f3da66175598	1690	((PULSEWIDTH) == HRTIM_CHOPPER_PULSEWIDTH_96) \|\| \
mbed_official	237:f3da66175598	1691	((PULSEWIDTH) == HRTIM_CHOPPER_PULSEWIDTH_112) \|\| \
mbed_official	237:f3da66175598	1692	((PULSEWIDTH) == HRTIM_CHOPPER_PULSEWIDTH_128) \|\| \
mbed_official	237:f3da66175598	1693	((PULSEWIDTH) == HRTIM_CHOPPER_PULSEWIDTH_144) \|\| \
mbed_official	237:f3da66175598	1694	((PULSEWIDTH) == HRTIM_CHOPPER_PULSEWIDTH_160) \|\| \
mbed_official	237:f3da66175598	1695	((PULSEWIDTH) == HRTIM_CHOPPER_PULSEWIDTH_176) \|\| \
mbed_official	237:f3da66175598	1696	((PULSEWIDTH) == HRTIM_CHOPPER_PULSEWIDTH_192) \|\| \
mbed_official	237:f3da66175598	1697	((PULSEWIDTH) == HRTIM_CHOPPER_PULSEWIDTH_208) \|\| \
mbed_official	237:f3da66175598	1698	((PULSEWIDTH) == HRTIM_CHOPPER_PULSEWIDTH_224) \|\| \
mbed_official	237:f3da66175598	1699	((PULSEWIDTH) == HRTIM_CHOPPER_PULSEWIDTH_240) \|\| \
mbed_official	237:f3da66175598	1700	((PULSEWIDTH) == HRTIM_CHOPPER_PULSEWIDTH_256))
mbed_official	237:f3da66175598	1701	/**
mbed_official	237:f3da66175598	1702	* @}
mbed_official	237:f3da66175598	1703	*/
mbed_official	237:f3da66175598	1704
mbed_official	237:f3da66175598	1705	/** @defgroup HRTIM_Synchronization_Options
mbed_official	237:f3da66175598	1706	* @{
mbed_official	237:f3da66175598	1707	* @brief Constants defining the options for synchronizing multiple HRTIM
mbed_official	237:f3da66175598	1708	* instances, as a master unit (generating a synchronization signal)
mbed_official	237:f3da66175598	1709	* or as a slave (waiting for a trigger to be synchronized)
mbed_official	237:f3da66175598	1710	*/
mbed_official	237:f3da66175598	1711	#define HRTIM_SYNCOPTION_NONE (uint32_t)0x00000000 /!< HRTIM instance doesn't handle external synchronization signals (SYNCIN, SYNCOUT) /
mbed_official	237:f3da66175598	1712	#define HRTIM_SYNCOPTION_MASTER (uint32_t)0x00000001 /!< HRTIM instance acts as a MASTER, i.e. generates external synchronization output (SYNCOUT)/
mbed_official	237:f3da66175598	1713	#define HRTIM_SYNCOPTION_SLAVE (uint32_t)0x00000002 /!< HRTIM instance acts as a SLAVE, i.e. it is synchronized by external sources (SYNCIN) /
mbed_official	237:f3da66175598	1714	/**
mbed_official	237:f3da66175598	1715	* @}
mbed_official	237:f3da66175598	1716	*/
mbed_official	237:f3da66175598	1717
mbed_official	237:f3da66175598	1718	/** @defgroup HRTIM_Synchronization_Input_Source
mbed_official	237:f3da66175598	1719	* @{
mbed_official	237:f3da66175598	1720	* @brief Constants defining defining the synchronization input source
mbed_official	237:f3da66175598	1721	*/
mbed_official	237:f3da66175598	1722	#define HRTIM_SYNCINPUTSOURCE_NONE (uint32_t)0x00000000 /!< disabled. HRTIM is not synchronized and runs in standalone mode /
mbed_official	237:f3da66175598	1723	#define HRTIM_SYNCINPUTSOURCE_INTERNALEVENT HRTIM_MCR_SYNC_IN_1 /!< The HRTIM is synchronized with the on-chip timer /
mbed_official	237:f3da66175598	1724	#define HRTIM_SYNCINPUTSOURCE_EXTERNALEVENT (HRTIM_MCR_SYNC_IN_1 \| HRTIM_MCR_SYNC_IN_0) /!< A positive pulse on SYNCIN input triggers the HRTIM /
mbed_official	237:f3da66175598	1725
mbed_official	237:f3da66175598	1726	#define IS_HRTIM_SYNCINPUTSOURCE(SYNCINPUTSOURCE)\
mbed_official	237:f3da66175598	1727	(((SYNCINPUTSOURCE) == HRTIM_SYNCINPUTSOURCE_NONE) \|\| \
mbed_official	237:f3da66175598	1728	((SYNCINPUTSOURCE) == HRTIM_SYNCINPUTSOURCE_INTERNALEVENT) \|\| \
mbed_official	237:f3da66175598	1729	((SYNCINPUTSOURCE) == HRTIM_SYNCINPUTSOURCE_EXTERNALEVENT))
mbed_official	237:f3da66175598	1730	/**
mbed_official	237:f3da66175598	1731	* @}
mbed_official	237:f3da66175598	1732	*/
mbed_official	237:f3da66175598	1733
mbed_official	237:f3da66175598	1734	/** @defgroup HRTIM_Synchronization_Output_Source
mbed_official	237:f3da66175598	1735	* @{
mbed_official	237:f3da66175598	1736	* @brief Constants defining the source and event to be sent on the
mbed_official	237:f3da66175598	1737	* synchronization outputs
mbed_official	237:f3da66175598	1738	*/
mbed_official	237:f3da66175598	1739	#define HRTIM_SYNCOUTPUTSOURCE_MASTER_START (uint32_t)0x00000000 /!< A pulse is sent on the SYNCOUT output (16x fHRTIM clock cycles) upon master timer start event /
mbed_official	237:f3da66175598	1740	#define HRTIM_SYNCOUTPUTSOURCE_MASTER_CMP1 (HRTIM_MCR_SYNC_SRC_0) /!< A pulse is sent on the SYNCOUT output (16x fHRTIM clock cycles) upon master timer compare 1 event/
mbed_official	237:f3da66175598	1741	#define HRTIM_SYNCOUTPUTSOURCE_TIMA_START (HRTIM_MCR_SYNC_SRC_1) /!< A pulse is sent on the SYNCOUT output (16x fHRTIM clock cycles) upon timer A start or reset events /
mbed_official	237:f3da66175598	1742	#define HRTIM_SYNCOUTPUTSOURCE_TIMA_CMP1 (HRTIM_MCR_SYNC_SRC_1 \| HRTIM_MCR_SYNC_SRC_0) /!< A pulse is sent on the SYNCOUT output (16x fHRTIM clock cycles) upon timer A compare 1 event /
mbed_official	237:f3da66175598	1743
mbed_official	237:f3da66175598	1744	#define IS_HRTIM_SYNCOUTPUTSOURCE(SYNCOUTPUTSOURCE)\
mbed_official	237:f3da66175598	1745	(((SYNCOUTPUTSOURCE) == HRTIM_SYNCOUTPUTSOURCE_MASTER_START) \|\| \
mbed_official	237:f3da66175598	1746	((SYNCOUTPUTSOURCE) == HRTIM_SYNCOUTPUTSOURCE_MASTER_CMP1) \|\| \
mbed_official	237:f3da66175598	1747	((SYNCOUTPUTSOURCE) == HRTIM_SYNCOUTPUTSOURCE_TIMA_START) \|\| \
mbed_official	237:f3da66175598	1748	((SYNCOUTPUTSOURCE) == HRTIM_SYNCOUTPUTSOURCE_TIMA_CMP1))
mbed_official	237:f3da66175598	1749	/**
mbed_official	237:f3da66175598	1750	* @}
mbed_official	237:f3da66175598	1751	*/
mbed_official	237:f3da66175598	1752
mbed_official	237:f3da66175598	1753	/** @defgroup HRTIM_Synchronization_Output_Polarity
mbed_official	237:f3da66175598	1754	* @{
mbed_official	237:f3da66175598	1755	* @brief Constants defining the routing and conditioning of the synchronization output event
mbed_official	237:f3da66175598	1756	*/
mbed_official	237:f3da66175598	1757	#define HRTIM_SYNCOUTPUTPOLARITY_NONE (uint32_t)0x00000000 /!< Synchronization output event is disabled /
mbed_official	237:f3da66175598	1758	#define HRTIM_SYNCOUTPUTPOLARITY_POSITIVE (HRTIM_MCR_SYNC_OUT_1) /!< Positive pulse on SCOUT output (16x fHRTIM clock cycles) /
mbed_official	237:f3da66175598	1759	#define HRTIM_SYNCOUTPUTPOLARITY_NEGATIVE (HRTIM_MCR_SYNC_OUT_1 \| HRTIM_MCR_SYNC_OUT_0) /!< Positive pulse on SCOUT output (16x fHRTIM clock cycles) /
mbed_official	237:f3da66175598	1760
mbed_official	237:f3da66175598	1761	#define IS_HRTIM_SYNCOUTPUTPOLARITY(SYNCOUTPUTPOLARITY)\
mbed_official	237:f3da66175598	1762	(((SYNCOUTPUTPOLARITY) == HRTIM_SYNCOUTPUTPOLARITY_NONE) \|\| \
mbed_official	237:f3da66175598	1763	((SYNCOUTPUTPOLARITY) == HRTIM_SYNCOUTPUTPOLARITY_POSITIVE) \|\| \
mbed_official	237:f3da66175598	1764	((SYNCOUTPUTPOLARITY) == HRTIM_SYNCOUTPUTPOLARITY_NEGATIVE))
mbed_official	237:f3da66175598	1765	/**
mbed_official	237:f3da66175598	1766	* @}
mbed_official	237:f3da66175598	1767	*/
mbed_official	237:f3da66175598	1768
mbed_official	237:f3da66175598	1769	/** @defgroup HRTIM_External_Event_Sources
mbed_official	237:f3da66175598	1770	* @{
mbed_official	237:f3da66175598	1771	* @brief Constants defining available sources associated to external events
mbed_official	237:f3da66175598	1772	*/
mbed_official	237:f3da66175598	1773	#define HRTIM_EVENTSRC_1 ((uint32_t)0x00000000) /!< External event source 1 /
mbed_official	237:f3da66175598	1774	#define HRTIM_EVENTSRC_2 (HRTIM_EECR1_EE1SRC_0) /!< External event source 2 /
mbed_official	237:f3da66175598	1775	#define HRTIM_EVENTSRC_3 (HRTIM_EECR1_EE1SRC_1) /!< External event source 3 /
mbed_official	237:f3da66175598	1776	#define HRTIM_EVENTSRC_4 (HRTIM_EECR1_EE1SRC_1 \| HRTIM_EECR1_EE1SRC_0) /!< External event source 4 /
mbed_official	237:f3da66175598	1777
mbed_official	237:f3da66175598	1778	#define IS_HRTIM_EVENTSRC(EVENTSRC)\
mbed_official	237:f3da66175598	1779	(((EVENTSRC) == HRTIM_EVENTSRC_1) \|\| \
mbed_official	237:f3da66175598	1780	((EVENTSRC) == HRTIM_EVENTSRC_2) \|\| \
mbed_official	237:f3da66175598	1781	((EVENTSRC) == HRTIM_EVENTSRC_3) \|\| \
mbed_official	237:f3da66175598	1782	((EVENTSRC) == HRTIM_EVENTSRC_4))
mbed_official	237:f3da66175598	1783	/**
mbed_official	237:f3da66175598	1784	* @}
mbed_official	237:f3da66175598	1785	*/
mbed_official	237:f3da66175598	1786
mbed_official	237:f3da66175598	1787	/** @defgroup HRTIM_External_Event_Polarity
mbed_official	237:f3da66175598	1788	* @{
mbed_official	237:f3da66175598	1789	* @brief Constants defining the polarity of an external event
mbed_official	237:f3da66175598	1790	*/
mbed_official	237:f3da66175598	1791	#define HRTIM_EVENTPOLARITY_HIGH ((uint32_t)0x00000000) /!< External event is active high /
mbed_official	237:f3da66175598	1792	#define HRTIM_EVENTPOLARITY_LOW (HRTIM_EECR1_EE1POL) /!< External event is active low /
mbed_official	237:f3da66175598	1793
mbed_official	237:f3da66175598	1794	#define IS_HRTIM_EVENTPOLARITY(EVENTSENSITIVITY, EVENTPOLARITY)\
mbed_official	237:f3da66175598	1795	((((EVENTSENSITIVITY) == HRTIM_EVENTSENSITIVITY_LEVEL) && \
mbed_official	237:f3da66175598	1796	(((EVENTPOLARITY) == HRTIM_EVENTPOLARITY_HIGH) \|\| \
mbed_official	237:f3da66175598	1797	((EVENTPOLARITY) == HRTIM_EVENTPOLARITY_LOW))) \
mbed_official	237:f3da66175598	1798	\|\| \
mbed_official	237:f3da66175598	1799	(((EVENTSENSITIVITY) == HRTIM_EVENTSENSITIVITY_RISINGEDGE) \|\| \
mbed_official	237:f3da66175598	1800	((EVENTSENSITIVITY) == HRTIM_EVENTSENSITIVITY_FALLINGEDGE)\|\| \
mbed_official	237:f3da66175598	1801	((EVENTSENSITIVITY) == HRTIM_EVENTSENSITIVITY_BOTHEDGES)))
mbed_official	237:f3da66175598	1802	/**
mbed_official	237:f3da66175598	1803	* @}
mbed_official	237:f3da66175598	1804	*/
mbed_official	237:f3da66175598	1805
mbed_official	237:f3da66175598	1806	/** @defgroup HRTIM_External_Event_Sensitivity
mbed_official	237:f3da66175598	1807	* @{
mbed_official	237:f3da66175598	1808	* @brief Constants defining the sensitivity (level-sensitive or edge-sensitive)
mbed_official	237:f3da66175598	1809	* of an external event
mbed_official	237:f3da66175598	1810	*/
mbed_official	237:f3da66175598	1811	#define HRTIM_EVENTSENSITIVITY_LEVEL ((uint32_t)0x00000000) /!< External event is active on level /
mbed_official	237:f3da66175598	1812	#define HRTIM_EVENTSENSITIVITY_RISINGEDGE (HRTIM_EECR1_EE1SNS_0) /!< External event is active on Rising edge /
mbed_official	237:f3da66175598	1813	#define HRTIM_EVENTSENSITIVITY_FALLINGEDGE (HRTIM_EECR1_EE1SNS_1) /!< External event is active on Falling edge /
mbed_official	237:f3da66175598	1814	#define HRTIM_EVENTSENSITIVITY_BOTHEDGES (HRTIM_EECR1_EE1SNS_1 \| HRTIM_EECR1_EE1SNS_0) /!< External event is active on Rising and Falling edges /
mbed_official	237:f3da66175598	1815
mbed_official	237:f3da66175598	1816	#define IS_HRTIM_EVENTSENSITIVITY(EVENTSENSITIVITY)\
mbed_official	237:f3da66175598	1817	(((EVENTSENSITIVITY) == HRTIM_EVENTSENSITIVITY_LEVEL) \|\| \
mbed_official	237:f3da66175598	1818	((EVENTSENSITIVITY) == HRTIM_EVENTSENSITIVITY_RISINGEDGE) \|\| \
mbed_official	237:f3da66175598	1819	((EVENTSENSITIVITY) == HRTIM_EVENTSENSITIVITY_FALLINGEDGE) \|\| \
mbed_official	237:f3da66175598	1820	((EVENTSENSITIVITY) == HRTIM_EVENTSENSITIVITY_BOTHEDGES))
mbed_official	237:f3da66175598	1821	/**
mbed_official	237:f3da66175598	1822	* @}
mbed_official	237:f3da66175598	1823	*/
mbed_official	237:f3da66175598	1824
mbed_official	237:f3da66175598	1825	/** @defgroup HRTIM_External_Event_Fast_Mode
mbed_official	237:f3da66175598	1826	* @{
mbed_official	237:f3da66175598	1827	* @brief Constants defining whether or not an external event is programmed in
mbed_official	237:f3da66175598	1828	fast mode
mbed_official	237:f3da66175598	1829	*/
mbed_official	237:f3da66175598	1830	#define HRTIM_EVENTFASTMODE_DISABLE ((uint32_t)0x00000000) /!< External Event is acting asynchronously on outputs (low latency mode) /
mbed_official	237:f3da66175598	1831	#define HRTIM_EVENTFASTMODE_ENABLE (HRTIM_EECR1_EE1FAST) /!< External Event is re-synchronized by the HRTIM logic before acting on outputs /
mbed_official	237:f3da66175598	1832
mbed_official	237:f3da66175598	1833	#define IS_HRTIM_EVENTFASTMODE(EVENT, FASTMODE)\
mbed_official	237:f3da66175598	1834	(((((EVENT) == HRTIM_EVENT_1) \|\| \
mbed_official	237:f3da66175598	1835	((EVENT) == HRTIM_EVENT_2) \|\| \
mbed_official	237:f3da66175598	1836	((EVENT) == HRTIM_EVENT_3) \|\| \
mbed_official	237:f3da66175598	1837	((EVENT) == HRTIM_EVENT_4) \|\| \
mbed_official	237:f3da66175598	1838	((EVENT) == HRTIM_EVENT_5)) && \
mbed_official	237:f3da66175598	1839	(((FASTMODE) == HRTIM_EVENTFASTMODE_ENABLE) \|\| \
mbed_official	237:f3da66175598	1840	((FASTMODE) == HRTIM_EVENTFASTMODE_DISABLE))) \
mbed_official	237:f3da66175598	1841	\|\| \
mbed_official	237:f3da66175598	1842	(((EVENT) == HRTIM_EVENT_6) \|\| \
mbed_official	237:f3da66175598	1843	((EVENT) == HRTIM_EVENT_7) \|\| \
mbed_official	237:f3da66175598	1844	((EVENT) == HRTIM_EVENT_8) \|\| \
mbed_official	237:f3da66175598	1845	((EVENT) == HRTIM_EVENT_9) \|\| \
mbed_official	237:f3da66175598	1846	((EVENT) == HRTIM_EVENT_10)))
mbed_official	237:f3da66175598	1847
mbed_official	237:f3da66175598	1848	/**
mbed_official	237:f3da66175598	1849	* @}
mbed_official	237:f3da66175598	1850	*/
mbed_official	237:f3da66175598	1851
mbed_official	237:f3da66175598	1852	/** @defgroup HRTIM_External_Event_Filter
mbed_official	237:f3da66175598	1853	* @{
mbed_official	237:f3da66175598	1854	* @brief Constants defining the frequency used to sample an external event 6
mbed_official	237:f3da66175598	1855	* input and the length (N) of the digital filter applied
mbed_official	237:f3da66175598	1856	*/
mbed_official	237:f3da66175598	1857	#define HRTIM_EVENTFILTER_NONE ((uint32_t)0x00000000) /!< Filter disabled /
mbed_official	237:f3da66175598	1858	#define HRTIM_EVENTFILTER_1 (HRTIM_EECR3_EE6F_0) /!< fSAMPLING= fHRTIM, N=2 /
mbed_official	237:f3da66175598	1859	#define HRTIM_EVENTFILTER_2 (HRTIM_EECR3_EE6F_1) /!< fSAMPLING= fHRTIM, N=4 /
mbed_official	237:f3da66175598	1860	#define HRTIM_EVENTFILTER_3 (HRTIM_EECR3_EE6F_1 \| HRTIM_EECR3_EE6F_0) /!< fSAMPLING= fHRTIM, N=8 /
mbed_official	237:f3da66175598	1861	#define HRTIM_EVENTFILTER_4 (HRTIM_EECR3_EE6F_2) /!< fSAMPLING= fEEVS/2, N=6 /
mbed_official	237:f3da66175598	1862	#define HRTIM_EVENTFILTER_5 (HRTIM_EECR3_EE6F_2 \| HRTIM_EECR3_EE6F_0) /!< fSAMPLING= fEEVS/2, N=8 /
mbed_official	237:f3da66175598	1863	#define HRTIM_EVENTFILTER_6 (HRTIM_EECR3_EE6F_2 \| HRTIM_EECR3_EE6F_1) /!< fSAMPLING= fEEVS/4, N=6 /
mbed_official	237:f3da66175598	1864	#define HRTIM_EVENTFILTER_7 (HRTIM_EECR3_EE6F_2 \| HRTIM_EECR3_EE6F_1 \| HRTIM_EECR3_EE6F_0) /!< fSAMPLING= fEEVS/4, N=8 /
mbed_official	237:f3da66175598	1865	#define HRTIM_EVENTFILTER_8 (HRTIM_EECR3_EE6F_3) /!< fSAMPLING= fEEVS/8, N=6 /
mbed_official	237:f3da66175598	1866	#define HRTIM_EVENTFILTER_9 (HRTIM_EECR3_EE6F_3 \| HRTIM_EECR3_EE6F_0) /!< fSAMPLING= fEEVS/8, N=8 /
mbed_official	237:f3da66175598	1867	#define HRTIM_EVENTFILTER_10 (HRTIM_EECR3_EE6F_3 \| HRTIM_EECR3_EE6F_1) /!< fSAMPLING= fEEVS/16, N=5 /
mbed_official	237:f3da66175598	1868	#define HRTIM_EVENTFILTER_11 (HRTIM_EECR3_EE6F_3 \| HRTIM_EECR3_EE6F_1 \| HRTIM_EECR3_EE6F_0) /!< fSAMPLING= fEEVS/16, N=6 /
mbed_official	237:f3da66175598	1869	#define HRTIM_EVENTFILTER_12 (HRTIM_EECR3_EE6F_3 \| HRTIM_EECR3_EE6F_2) /!< fSAMPLING= fEEVS/16, N=8 /
mbed_official	237:f3da66175598	1870	#define HRTIM_EVENTFILTER_13 (HRTIM_EECR3_EE6F_3 \| HRTIM_EECR3_EE6F_2 \| HRTIM_EECR3_EE6F_0) /!< fSAMPLING= fEEVS/32, N=5 /
mbed_official	237:f3da66175598	1871	#define HRTIM_EVENTFILTER_14 (HRTIM_EECR3_EE6F_3 \| HRTIM_EECR3_EE6F_2 \| HRTIM_EECR3_EE6F_1) /!< fSAMPLING= fEEVS/32, N=6 /
mbed_official	237:f3da66175598	1872	#define HRTIM_EVENTFILTER_15 (HRTIM_EECR3_EE6F_3 \| HRTIM_EECR3_EE6F_2 \| HRTIM_EECR3_EE6F_1 \| HRTIM_EECR3_EE6F_0) /!< fSAMPLING= fEEVS/32, N=8 /
mbed_official	237:f3da66175598	1873
mbed_official	237:f3da66175598	1874	#define IS_HRTIM_EVENTFILTER(EVENT, FILTER)\
mbed_official	237:f3da66175598	1875	((((EVENT) == HRTIM_EVENT_1) \|\| \
mbed_official	237:f3da66175598	1876	((EVENT) == HRTIM_EVENT_2) \|\| \
mbed_official	237:f3da66175598	1877	((EVENT) == HRTIM_EVENT_3) \|\| \
mbed_official	237:f3da66175598	1878	((EVENT) == HRTIM_EVENT_4) \|\| \
mbed_official	237:f3da66175598	1879	((EVENT) == HRTIM_EVENT_5)) \
mbed_official	237:f3da66175598	1880	\|\| \
mbed_official	237:f3da66175598	1881	((((EVENT) == HRTIM_EVENT_6) \|\| \
mbed_official	237:f3da66175598	1882	((EVENT) == HRTIM_EVENT_7) \|\| \
mbed_official	237:f3da66175598	1883	((EVENT) == HRTIM_EVENT_8) \|\| \
mbed_official	237:f3da66175598	1884	((EVENT) == HRTIM_EVENT_9) \|\| \
mbed_official	237:f3da66175598	1885	((EVENT) == HRTIM_EVENT_10)) && \
mbed_official	237:f3da66175598	1886	(((FILTER) == HRTIM_EVENTFILTER_NONE) \|\| \
mbed_official	237:f3da66175598	1887	((FILTER) == HRTIM_EVENTFILTER_1) \|\| \
mbed_official	237:f3da66175598	1888	((FILTER) == HRTIM_EVENTFILTER_2) \|\| \
mbed_official	237:f3da66175598	1889	((FILTER) == HRTIM_EVENTFILTER_3) \|\| \
mbed_official	237:f3da66175598	1890	((FILTER) == HRTIM_EVENTFILTER_4) \|\| \
mbed_official	237:f3da66175598	1891	((FILTER) == HRTIM_EVENTFILTER_5) \|\| \
mbed_official	237:f3da66175598	1892	((FILTER) == HRTIM_EVENTFILTER_6) \|\| \
mbed_official	237:f3da66175598	1893	((FILTER) == HRTIM_EVENTFILTER_7) \|\| \
mbed_official	237:f3da66175598	1894	((FILTER) == HRTIM_EVENTFILTER_8) \|\| \
mbed_official	237:f3da66175598	1895	((FILTER) == HRTIM_EVENTFILTER_9) \|\| \
mbed_official	237:f3da66175598	1896	((FILTER) == HRTIM_EVENTFILTER_10) \|\| \
mbed_official	237:f3da66175598	1897	((FILTER) == HRTIM_EVENTFILTER_11) \|\| \
mbed_official	237:f3da66175598	1898	((FILTER) == HRTIM_EVENTFILTER_12) \|\| \
mbed_official	237:f3da66175598	1899	((FILTER) == HRTIM_EVENTFILTER_13) \|\| \
mbed_official	237:f3da66175598	1900	((FILTER) == HRTIM_EVENTFILTER_14) \|\| \
mbed_official	237:f3da66175598	1901	((FILTER) == HRTIM_EVENTFILTER_15))))
mbed_official	237:f3da66175598	1902	/**
mbed_official	237:f3da66175598	1903	* @}
mbed_official	237:f3da66175598	1904	*/
mbed_official	237:f3da66175598	1905
mbed_official	237:f3da66175598	1906	/** @defgroup External_Event_Prescaler
mbed_official	237:f3da66175598	1907	* @{
mbed_official	237:f3da66175598	1908	* @brief Constants defining division ratio between the timer clock frequency
mbed_official	237:f3da66175598	1909	* fHRTIM) and the external event signal sampling clock (fEEVS)
mbed_official	237:f3da66175598	1910	* used by the digital filters
mbed_official	237:f3da66175598	1911	*/
mbed_official	237:f3da66175598	1912	#define HRTIM_EVENTPRESCALER_DIV1 ((uint32_t)0x00000000) /!< fEEVS=fHRTIM /
mbed_official	237:f3da66175598	1913	#define HRTIM_EVENTPRESCALER_DIV2 (HRTIM_EECR3_EEVSD_0) /!< fEEVS=fHRTIM / 2 /
mbed_official	237:f3da66175598	1914	#define HRTIM_EVENTPRESCALER_DIV4 (HRTIM_EECR3_EEVSD_1) /!< fEEVS=fHRTIM / 4 /
mbed_official	237:f3da66175598	1915	#define HRTIM_EVENTPRESCALER_DIV8 (HRTIM_EECR3_EEVSD_1 \| HRTIM_EECR3_EEVSD_0) /!< fEEVS=fHRTIM / 8 /
mbed_official	237:f3da66175598	1916
mbed_official	237:f3da66175598	1917	#define IS_HRTIM_EVENTPRESCALER(EVENTPRESCALER)\
mbed_official	237:f3da66175598	1918	(((EVENTPRESCALER) == HRTIM_EVENTPRESCALER_DIV1) \|\| \
mbed_official	237:f3da66175598	1919	((EVENTPRESCALER) == HRTIM_EVENTPRESCALER_DIV2) \|\| \
mbed_official	237:f3da66175598	1920	((EVENTPRESCALER) == HRTIM_EVENTPRESCALER_DIV4) \|\| \
mbed_official	237:f3da66175598	1921	((EVENTPRESCALER) == HRTIM_EVENTPRESCALER_DIV8))
mbed_official	237:f3da66175598	1922	/**
mbed_official	237:f3da66175598	1923	* @}
mbed_official	237:f3da66175598	1924	*/
mbed_official	237:f3da66175598	1925
mbed_official	237:f3da66175598	1926	/** @defgroup HRTIM_Fault_Sources
mbed_official	237:f3da66175598	1927	* @{
mbed_official	237:f3da66175598	1928	* @brief Constants defining whether a faults is be triggered by any external
mbed_official	237:f3da66175598	1929	* or internal fault source
mbed_official	237:f3da66175598	1930	*/
mbed_official	237:f3da66175598	1931	#define HRTIM_FAULTSOURCE_DIGITALINPUT ((uint32_t)0x00000000) /!< Fault input is FLT input pin /
mbed_official	237:f3da66175598	1932	#define HRTIM_FAULTSOURCE_INTERNAL (HRTIM_FLTINR1_FLT1SRC) /!< Fault input is FLT_Int signal (e.g. internal comparator) /
mbed_official	237:f3da66175598	1933
mbed_official	237:f3da66175598	1934
mbed_official	237:f3da66175598	1935	#define IS_HRTIM_FAULTSOURCE(FAULTSOURCE)\
mbed_official	237:f3da66175598	1936	(((FAULTSOURCE) == HRTIM_FAULTSOURCE_DIGITALINPUT) \|\| \
mbed_official	237:f3da66175598	1937	((FAULTSOURCE) == HRTIM_FAULTSOURCE_INTERNAL))
mbed_official	237:f3da66175598	1938	/**
mbed_official	237:f3da66175598	1939	* @}
mbed_official	237:f3da66175598	1940	*/
mbed_official	237:f3da66175598	1941
mbed_official	237:f3da66175598	1942	/** @defgroup HRTIM_Fault_Polarity
mbed_official	237:f3da66175598	1943	* @{
mbed_official	237:f3da66175598	1944	* @brief Constants defining the polarity of a fault event
mbed_official	237:f3da66175598	1945	*/
mbed_official	237:f3da66175598	1946	#define HRTIM_FAULTPOLARITY_LOW ((uint32_t)0x00000000) /!< Fault input is active low /
mbed_official	237:f3da66175598	1947	#define HRTIM_FAULTPOLARITY_HIGH (HRTIM_FLTINR1_FLT1P) /!< Fault input is active high /
mbed_official	237:f3da66175598	1948
mbed_official	237:f3da66175598	1949	#define IS_HRTIM_FAULTPOLARITY(HRTIM_FAULTPOLARITY)\
mbed_official	237:f3da66175598	1950	(((HRTIM_FAULTPOLARITY) == HRTIM_FAULTPOLARITY_LOW) \|\| \
mbed_official	237:f3da66175598	1951	((HRTIM_FAULTPOLARITY) == HRTIM_FAULTPOLARITY_HIGH))
mbed_official	237:f3da66175598	1952	/**
mbed_official	237:f3da66175598	1953	* @}
mbed_official	237:f3da66175598	1954	*/
mbed_official	237:f3da66175598	1955
mbed_official	237:f3da66175598	1956	/** @defgroup HRTIM_Fault_Filter
mbed_official	237:f3da66175598	1957	* @{
mbed_official	237:f3da66175598	1958	* @ brief Constants defining the frequency used to sample the fault input and
mbed_official	237:f3da66175598	1959	* the length (N) of the digital filter applied
mbed_official	237:f3da66175598	1960	*/
mbed_official	237:f3da66175598	1961	#define HRTIM_FAULTFILTER_NONE ((uint32_t)0x00000000) /!< Filter disabled /
mbed_official	237:f3da66175598	1962	#define HRTIM_FAULTFILTER_1 (HRTIM_FLTINR1_FLT1F_0) /!< fSAMPLING= fHRTIM, N=2 /
mbed_official	237:f3da66175598	1963	#define HRTIM_FAULTFILTER_2 (HRTIM_FLTINR1_FLT1F_1) /!< fSAMPLING= fHRTIM, N=4 /
mbed_official	237:f3da66175598	1964	#define HRTIM_FAULTFILTER_3 (HRTIM_FLTINR1_FLT1F_1 \| HRTIM_FLTINR1_FLT1F_0) /!< fSAMPLING= fHRTIM, N=8 /
mbed_official	237:f3da66175598	1965	#define HRTIM_FAULTFILTER_4 (HRTIM_FLTINR1_FLT1F_2) /!< fSAMPLING= fFLTS/2, N=6 /
mbed_official	237:f3da66175598	1966	#define HRTIM_FAULTFILTER_5 (HRTIM_FLTINR1_FLT1F_2 \| HRTIM_FLTINR1_FLT1F_0) /!< fSAMPLING= fFLTS/2, N=8 /
mbed_official	237:f3da66175598	1967	#define HRTIM_FAULTFILTER_6 (HRTIM_FLTINR1_FLT1F_2 \| HRTIM_FLTINR1_FLT1F_1) /!< fSAMPLING= fFLTS/4, N=6 /
mbed_official	237:f3da66175598	1968	#define HRTIM_FAULTFILTER_7 (HRTIM_FLTINR1_FLT1F_2 \| HRTIM_FLTINR1_FLT1F_1 \| HRTIM_FLTINR1_FLT1F_0) /!< fSAMPLING= fFLTS/4, N=8 /
mbed_official	237:f3da66175598	1969	#define HRTIM_FAULTFILTER_8 (HRTIM_FLTINR1_FLT1F_3) /!< fSAMPLING= fFLTS/8, N=6 /
mbed_official	237:f3da66175598	1970	#define HRTIM_FAULTFILTER_9 (HRTIM_FLTINR1_FLT1F_3 \| HRTIM_FLTINR1_FLT1F_0) /!< fSAMPLING= fFLTS/8, N=8 /
mbed_official	237:f3da66175598	1971	#define HRTIM_FAULTFILTER_10 (HRTIM_FLTINR1_FLT1F_3 \| HRTIM_FLTINR1_FLT1F_1) /!< fSAMPLING= fFLTS/16, N=5 /
mbed_official	237:f3da66175598	1972	#define HRTIM_FAULTFILTER_11 (HRTIM_FLTINR1_FLT1F_3 \| HRTIM_FLTINR1_FLT1F_1 \| HRTIM_FLTINR1_FLT1F_0) /!< fSAMPLING= fFLTS/16, N=6 /
mbed_official	237:f3da66175598	1973	#define HRTIM_FAULTFILTER_12 (HRTIM_FLTINR1_FLT1F_3 \| HRTIM_FLTINR1_FLT1F_2) /!< fSAMPLING= fFLTS/16, N=8 /
mbed_official	237:f3da66175598	1974	#define HRTIM_FAULTFILTER_13 (HRTIM_FLTINR1_FLT1F_3 \| HRTIM_FLTINR1_FLT1F_2 \| HRTIM_FLTINR1_FLT1F_0) /!< fSAMPLING= fFLTS/32, N=5 /
mbed_official	237:f3da66175598	1975	#define HRTIM_FAULTFILTER_14 (HRTIM_FLTINR1_FLT1F_3 \| HRTIM_FLTINR1_FLT1F_2 \| HRTIM_FLTINR1_FLT1F_1) /!< fSAMPLING= fFLTS/32, N=6 /
mbed_official	237:f3da66175598	1976	#define HRTIM_FAULTFILTER_15 (HRTIM_FLTINR1_FLT1F_3 \| HRTIM_FLTINR1_FLT1F_2 \| HRTIM_FLTINR1_FLT1F_1 \| HRTIM_FLTINR1_FLT1F_0) /!< fSAMPLING= fFLTS/32, N=8 /
mbed_official	237:f3da66175598	1977
mbed_official	237:f3da66175598	1978	#define IS_HRTIM_FAULTFILTER(FAULTFILTER)\
mbed_official	237:f3da66175598	1979	(((FAULTFILTER) == HRTIM_FAULTFILTER_NONE) \|\| \
mbed_official	237:f3da66175598	1980	((FAULTFILTER) == HRTIM_FAULTFILTER_1) \|\| \
mbed_official	237:f3da66175598	1981	((FAULTFILTER) == HRTIM_FAULTFILTER_2) \|\| \
mbed_official	237:f3da66175598	1982	((FAULTFILTER) == HRTIM_FAULTFILTER_3) \|\| \
mbed_official	237:f3da66175598	1983	((FAULTFILTER) == HRTIM_FAULTFILTER_4) \|\| \
mbed_official	237:f3da66175598	1984	((FAULTFILTER) == HRTIM_FAULTFILTER_5) \|\| \
mbed_official	237:f3da66175598	1985	((FAULTFILTER) == HRTIM_FAULTFILTER_6) \|\| \
mbed_official	237:f3da66175598	1986	((FAULTFILTER) == HRTIM_FAULTFILTER_7) \|\| \
mbed_official	237:f3da66175598	1987	((FAULTFILTER) == HRTIM_FAULTFILTER_8) \|\| \
mbed_official	237:f3da66175598	1988	((FAULTFILTER) == HRTIM_FAULTFILTER_9) \|\| \
mbed_official	237:f3da66175598	1989	((FAULTFILTER) == HRTIM_FAULTFILTER_10) \|\| \
mbed_official	237:f3da66175598	1990	((FAULTFILTER) == HRTIM_FAULTFILTER_11) \|\| \
mbed_official	237:f3da66175598	1991	((FAULTFILTER) == HRTIM_FAULTFILTER_12) \|\| \
mbed_official	237:f3da66175598	1992	((FAULTFILTER) == HRTIM_FAULTFILTER_13) \|\| \
mbed_official	237:f3da66175598	1993	((FAULTFILTER) == HRTIM_FAULTFILTER_14) \|\| \
mbed_official	237:f3da66175598	1994	((FAULTFILTER) == HRTIM_FAULTFILTER_15))
mbed_official	237:f3da66175598	1995	/**
mbed_official	237:f3da66175598	1996	* @}
mbed_official	237:f3da66175598	1997	*/
mbed_official	237:f3da66175598	1998
mbed_official	237:f3da66175598	1999	/** @defgroup HRTIM_Fault_Lock
mbed_official	237:f3da66175598	2000	* @{
mbed_official	237:f3da66175598	2001	* @brief Constants defining whether or not the fault programming bits are
mbed_official	237:f3da66175598	2002	write protected
mbed_official	237:f3da66175598	2003	*/
mbed_official	237:f3da66175598	2004	#define HRTIM_FAULTLOCK_READWRITE ((uint32_t)0x00000000) /!< Fault settings bits are read/write /
mbed_official	237:f3da66175598	2005	#define HRTIM_FAULTLOCK_READONLY (HRTIM_FLTINR1_FLT1LCK) /!< Fault settings bits are read only /
mbed_official	237:f3da66175598	2006
mbed_official	237:f3da66175598	2007	#define IS_HRTIM_FAULTLOCK(FAULTLOCK)\
mbed_official	237:f3da66175598	2008	(((FAULTLOCK) == HRTIM_FAULTLOCK_READWRITE) \|\| \
mbed_official	237:f3da66175598	2009	((FAULTLOCK) == HRTIM_FAULTLOCK_READONLY))
mbed_official	237:f3da66175598	2010	/**
mbed_official	237:f3da66175598	2011	* @}
mbed_official	237:f3da66175598	2012	*/
mbed_official	237:f3da66175598	2013
mbed_official	237:f3da66175598	2014	/** @defgroup External_Fault_Prescaler
mbed_official	237:f3da66175598	2015	* @{
mbed_official	237:f3da66175598	2016	* @brief Constants defining the division ratio between the timer clock
mbed_official	237:f3da66175598	2017	* frequency (fHRTIM) and the fault signal sampling clock (fFLTS) used
mbed_official	237:f3da66175598	2018	* by the digital filters.
mbed_official	237:f3da66175598	2019	*/
mbed_official	237:f3da66175598	2020	#define HRTIM_FAULTPRESCALER_DIV1 ((uint32_t)0x00000000) /!< fFLTS=fHRTIM /
mbed_official	237:f3da66175598	2021	#define HRTIM_FAULTPRESCALER_DIV2 (HRTIM_FLTINR2_FLTSD_0) /!< fFLTS=fHRTIM / 2 /
mbed_official	237:f3da66175598	2022	#define HRTIM_FAULTPRESCALER_DIV4 (HRTIM_FLTINR2_FLTSD_1) /!< fFLTS=fHRTIM / 4 /
mbed_official	237:f3da66175598	2023	#define HRTIM_FAULTPRESCALER_DIV8 (HRTIM_FLTINR2_FLTSD_1 \| HRTIM_FLTINR2_FLTSD_0) /!< fFLTS=fHRTIM / 8 /
mbed_official	237:f3da66175598	2024
mbed_official	237:f3da66175598	2025	#define IS_HRTIM_FAULTPRESCALER(FAULTPRESCALER)\
mbed_official	237:f3da66175598	2026	(((FAULTPRESCALER) == HRTIM_FAULTPRESCALER_DIV1) \|\| \
mbed_official	237:f3da66175598	2027	((FAULTPRESCALER) == HRTIM_FAULTPRESCALER_DIV2) \|\| \
mbed_official	237:f3da66175598	2028	((FAULTPRESCALER) == HRTIM_FAULTPRESCALER_DIV4) \|\| \
mbed_official	237:f3da66175598	2029	((FAULTPRESCALER) == HRTIM_FAULTPRESCALER_DIV8))
mbed_official	237:f3da66175598	2030	/**
mbed_official	237:f3da66175598	2031	* @}
mbed_official	237:f3da66175598	2032	*/
mbed_official	237:f3da66175598	2033
mbed_official	237:f3da66175598	2034	/** @defgroup HRTIM_Burst_Mode_Operating_mode
mbed_official	237:f3da66175598	2035	* @{
mbed_official	237:f3da66175598	2036	* @brief Constants defining if the burst mode is entered once or if it is
mbed_official	237:f3da66175598	2037	* continuously operating
mbed_official	237:f3da66175598	2038	*/
mbed_official	237:f3da66175598	2039	#define HRTIM_BURSTMODE_SINGLESHOT ((uint32_t)0x00000000) /!< Burst mode operates in single shot mode /
mbed_official	237:f3da66175598	2040	#define HRTIM_BURSTMODE_CONTINOUS (HRTIM_BMCR_BMOM) /!< Burst mode operates in continuous mode /
mbed_official	237:f3da66175598	2041
mbed_official	237:f3da66175598	2042	#define IS_HRTIM_BURSTMODE(BURSTMODE)\
mbed_official	237:f3da66175598	2043	(((BURSTMODE) == HRTIM_BURSTMODE_SINGLESHOT) \|\| \
mbed_official	237:f3da66175598	2044	((BURSTMODE) == HRTIM_BURSTMODE_CONTINOUS))
mbed_official	237:f3da66175598	2045	/**
mbed_official	237:f3da66175598	2046	* @}
mbed_official	237:f3da66175598	2047	*/
mbed_official	237:f3da66175598	2048
mbed_official	237:f3da66175598	2049	/** @defgroup HRTIM_Burst_Mode_Clock_Source
mbed_official	237:f3da66175598	2050	* @{
mbed_official	237:f3da66175598	2051	* @brief Constants defining the clock source for the burst mode counter
mbed_official	237:f3da66175598	2052	*/
mbed_official	237:f3da66175598	2053	#define HRTIM_BURSTMODECLOCKSOURCE_MASTER ((uint32_t)0x00000000) /!< Master timer counter reset/roll-over is used as clock source for the burst mode counter /
mbed_official	237:f3da66175598	2054	#define HRTIM_BURSTMODECLOCKSOURCE_TIMER_A (HRTIM_BMCR_BMCLK_0) /!< Timer A counter reset/roll-over is used as clock source for the burst mode counter /
mbed_official	237:f3da66175598	2055	#define HRTIM_BURSTMODECLOCKSOURCE_TIMER_B (HRTIM_BMCR_BMCLK_1) /!< Timer B counter reset/roll-over is used as clock source for the burst mode counter /
mbed_official	237:f3da66175598	2056	#define HRTIM_BURSTMODECLOCKSOURCE_TIMER_C (HRTIM_BMCR_BMCLK_1 \| HRTIM_BMCR_BMCLK_0) /!< Timer C counter reset/roll-over is used as clock source for the burst mode counter /
mbed_official	237:f3da66175598	2057	#define HRTIM_BURSTMODECLOCKSOURCE_TIMER_D (HRTIM_BMCR_BMCLK_2) /!< Timer D counter reset/roll-over is used as clock source for the burst mode counter /
mbed_official	237:f3da66175598	2058	#define HRTIM_BURSTMODECLOCKSOURCE_TIMER_E (HRTIM_BMCR_BMCLK_2 \| HRTIM_BMCR_BMCLK_0) /!< Timer E counter reset/roll-over is used as clock source for the burst mode counter /
mbed_official	237:f3da66175598	2059	#define HRTIM_BURSTMODECLOCKSOURCE_TIM16_OC (HRTIM_BMCR_BMCLK_2 \| HRTIM_BMCR_BMCLK_1) /!< On-chip Event 1 (BMClk[1]), acting as a burst mode counter clock /
mbed_official	237:f3da66175598	2060	#define HRTIM_BURSTMODECLOCKSOURCE_TIM17_OC (HRTIM_BMCR_BMCLK_2 \| HRTIM_BMCR_BMCLK_1 \| HRTIM_BMCR_BMCLK_0) /!< On-chip Event 2 (BMClk[2]), acting as a burst mode counter clock /
mbed_official	237:f3da66175598	2061	#define HRTIM_BURSTMODECLOCKSOURCE_TIM7_TRGO (HRTIM_BMCR_BMCLK_3) /!< On-chip Event 3 (BMClk[3]), acting as a burst mode counter clock /
mbed_official	237:f3da66175598	2062	#define HRTIM_BURSTMODECLOCKSOURCE_FHRTIM (HRTIM_BMCR_BMCLK_3 \| HRTIM_BMCR_BMCLK_1) /!< Prescaled fHRTIM clock is used as clock source for the burst mode counter /
mbed_official	237:f3da66175598	2063
mbed_official	237:f3da66175598	2064	#define IS_HRTIM_BURSTMODECLOCKSOURCE(BURSTMODECLOCKSOURCE)\
mbed_official	237:f3da66175598	2065	(((BURSTMODECLOCKSOURCE) == HRTIM_BURSTMODECLOCKSOURCE_MASTER) \|\| \
mbed_official	237:f3da66175598	2066	((BURSTMODECLOCKSOURCE) == HRTIM_BURSTMODECLOCKSOURCE_TIMER_A) \|\| \
mbed_official	237:f3da66175598	2067	((BURSTMODECLOCKSOURCE) == HRTIM_BURSTMODECLOCKSOURCE_TIMER_B) \|\| \
mbed_official	237:f3da66175598	2068	((BURSTMODECLOCKSOURCE) == HRTIM_BURSTMODECLOCKSOURCE_TIMER_C) \|\| \
mbed_official	237:f3da66175598	2069	((BURSTMODECLOCKSOURCE) == HRTIM_BURSTMODECLOCKSOURCE_TIMER_D) \|\| \
mbed_official	237:f3da66175598	2070	((BURSTMODECLOCKSOURCE) == HRTIM_BURSTMODECLOCKSOURCE_TIMER_E) \|\| \
mbed_official	237:f3da66175598	2071	((BURSTMODECLOCKSOURCE) == HRTIM_BURSTMODECLOCKSOURCE_TIM16_OC) \|\| \
mbed_official	237:f3da66175598	2072	((BURSTMODECLOCKSOURCE) == HRTIM_BURSTMODECLOCKSOURCE_TIM17_OC) \|\| \
mbed_official	237:f3da66175598	2073	((BURSTMODECLOCKSOURCE) == HRTIM_BURSTMODECLOCKSOURCE_TIM7_TRGO) \|\| \
mbed_official	237:f3da66175598	2074	((BURSTMODECLOCKSOURCE) == HRTIM_BURSTMODECLOCKSOURCE_FHRTIM))
mbed_official	237:f3da66175598	2075	/**
mbed_official	237:f3da66175598	2076	* @}
mbed_official	237:f3da66175598	2077	*/
mbed_official	237:f3da66175598	2078
mbed_official	237:f3da66175598	2079	/** @defgroup HRTIM_Burst_Mode_Prescaler
mbed_official	237:f3da66175598	2080	* @{
mbed_official	237:f3da66175598	2081	* @brief Constants defining the prescaling ratio of the fHRTIM clock
mbed_official	237:f3da66175598	2082	* for the burst mode controller
mbed_official	237:f3da66175598	2083	*/
mbed_official	237:f3da66175598	2084	#define HRTIM_BURSTMODEPRESCALER_DIV1 ((uint32_t)0x00000000) /!< fBRST = fHRTIM /
mbed_official	237:f3da66175598	2085	#define HRTIM_BURSTMODEPRESCALER_DIV2 (HRTIM_BMCR_BMPRSC_0) /!< fBRST = fHRTIM/2 /
mbed_official	237:f3da66175598	2086	#define HRTIM_BURSTMODEPRESCALER_DIV4 (HRTIM_BMCR_BMPRSC_1) /!< fBRST = fHRTIM/4 /
mbed_official	237:f3da66175598	2087	#define HRTIM_BURSTMODEPRESCALER_DIV8 (HRTIM_BMCR_BMPRSC_1 \| HRTIM_BMCR_BMPRSC_0) /!< fBRST = fHRTIM/8 /
mbed_official	237:f3da66175598	2088	#define HRTIM_BURSTMODEPRESCALER_DIV16 (HRTIM_BMCR_BMPRSC_2) /!< fBRST = fHRTIM/16 /
mbed_official	237:f3da66175598	2089	#define HRTIM_BURSTMODEPRESCALER_DIV32 (HRTIM_BMCR_BMPRSC_2 \| HRTIM_BMCR_BMPRSC_0) /!< fBRST = fHRTIM/32 /
mbed_official	237:f3da66175598	2090	#define HRTIM_BURSTMODEPRESCALER_DIV64 (HRTIM_BMCR_BMPRSC_2 \| HRTIM_BMCR_BMPRSC_1) /!< fBRST = fHRTIM/64 /
mbed_official	237:f3da66175598	2091	#define HRTIM_BURSTMODEPRESCALER_DIV128 (HRTIM_BMCR_BMPRSC_2 \| HRTIM_BMCR_BMPRSC_1 \| HRTIM_BMCR_BMPRSC_0) /!< fBRST = fHRTIM/128 /
mbed_official	237:f3da66175598	2092	#define HRTIM_BURSTMODEPRESCALER_DIV256 (HRTIM_BMCR_BMPRSC_3) /!< fBRST = fHRTIM/256 /
mbed_official	237:f3da66175598	2093	#define HRTIM_BURSTMODEPRESCALER_DIV512 (HRTIM_BMCR_BMPRSC_3 \| HRTIM_BMCR_BMPRSC_0) /!< fBRST = fHRTIM/512 /
mbed_official	237:f3da66175598	2094	#define HRTIM_BURSTMODEPRESCALER_DIV1024 (HRTIM_BMCR_BMPRSC_3 \| HRTIM_BMCR_BMPRSC_1) /!< fBRST = fHRTIM/1024 /
mbed_official	237:f3da66175598	2095	#define HRTIM_BURSTMODEPRESCALER_DIV2048 (HRTIM_BMCR_BMPRSC_3 \| HRTIM_BMCR_BMPRSC_1 \| HRTIM_BMCR_BMPRSC_0) /!< fBRST = fHRTIM/2048/
mbed_official	237:f3da66175598	2096	#define HRTIM_BURSTMODEPRESCALER_DIV4096 (HRTIM_BMCR_BMPRSC_3 \| HRTIM_BMCR_BMPRSC_2) /!< fBRST = fHRTIM/4096 /
mbed_official	237:f3da66175598	2097	#define HRTIM_BURSTMODEPRESCALER_DIV8192 (HRTIM_BMCR_BMPRSC_3 \| HRTIM_BMCR_BMPRSC_2 \| HRTIM_BMCR_BMPRSC_0) /!< fBRST = fHRTIM/8192 /
mbed_official	237:f3da66175598	2098	#define HRTIM_BURSTMODEPRESCALER_DIV16384 (HRTIM_BMCR_BMPRSC_3 \| HRTIM_BMCR_BMPRSC_2 \| HRTIM_BMCR_BMPRSC_1) /!< fBRST = fHRTIM/16384 /
mbed_official	237:f3da66175598	2099	#define HRTIM_BURSTMODEPRESCALER_DIV32768 (HRTIM_BMCR_BMPRSC_3 \| HRTIM_BMCR_BMPRSC_2 \| HRTIM_BMCR_BMPRSC_1 \| HRTIM_BMCR_BMPRSC_0) /!< fBRST = fHRTIM/32768 /
mbed_official	237:f3da66175598	2100
mbed_official	237:f3da66175598	2101	#define IS_HRTIM_HRTIM_BURSTMODEPRESCALER(BURSTMODEPRESCALER)\
mbed_official	237:f3da66175598	2102	(((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV1) \|\| \
mbed_official	237:f3da66175598	2103	((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV2) \|\| \
mbed_official	237:f3da66175598	2104	((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV4) \|\| \
mbed_official	237:f3da66175598	2105	((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV8) \|\| \
mbed_official	237:f3da66175598	2106	((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV16) \|\| \
mbed_official	237:f3da66175598	2107	((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV32) \|\| \
mbed_official	237:f3da66175598	2108	((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV64) \|\| \
mbed_official	237:f3da66175598	2109	((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV128) \|\| \
mbed_official	237:f3da66175598	2110	((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV256) \|\| \
mbed_official	237:f3da66175598	2111	((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV512) \|\| \
mbed_official	237:f3da66175598	2112	((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV1024) \|\| \
mbed_official	237:f3da66175598	2113	((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV2048) \|\| \
mbed_official	237:f3da66175598	2114	((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV4096) \|\| \
mbed_official	237:f3da66175598	2115	((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV8192) \|\| \
mbed_official	237:f3da66175598	2116	((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV16384) \|\| \
mbed_official	237:f3da66175598	2117	((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV32768))
mbed_official	237:f3da66175598	2118	/**
mbed_official	237:f3da66175598	2119	* @}
mbed_official	237:f3da66175598	2120	*/
mbed_official	237:f3da66175598	2121
mbed_official	237:f3da66175598	2122	/** @defgroup HRTIM_Burst_Mode_Register_Preload_Enable
mbed_official	237:f3da66175598	2123	* @{
mbed_official	237:f3da66175598	2124	* @brief Constants defining whether or not burst mode registers preload
mbed_official	237:f3da66175598	2125	mechanism is enabled, i.e. a write access into a preloadable register
mbed_official	237:f3da66175598	2126	(HRTIM_BMCMPR, HRTIM_BMPER) is done into the active or the preload register
mbed_official	237:f3da66175598	2127	*/
mbed_official	237:f3da66175598	2128	#define HRIM_BURSTMODEPRELOAD_DISABLED ((uint32_t)0x00000000) /!< Preload disabled: the write access is directly done into active registers /
mbed_official	237:f3da66175598	2129	#define HRIM_BURSTMODEPRELOAD_ENABLED (HRTIM_BMCR_BMPREN) /!< Preload enabled: the write access is done into preload registers /
mbed_official	237:f3da66175598	2130
mbed_official	237:f3da66175598	2131	#define IS_HRTIM_BURSTMODEPRELOAD(BURSTMODEPRELOAD)\
mbed_official	237:f3da66175598	2132	(((BURSTMODEPRELOAD) == HRIM_BURSTMODEPRELOAD_DISABLED) \|\| \
mbed_official	237:f3da66175598	2133	((BURSTMODEPRELOAD) == HRIM_BURSTMODEPRELOAD_ENABLED))
mbed_official	237:f3da66175598	2134	/**
mbed_official	237:f3da66175598	2135	* @}
mbed_official	237:f3da66175598	2136	*/
mbed_official	237:f3da66175598	2137
mbed_official	237:f3da66175598	2138	/** @defgroup HRTIM_Burst_Mode_Trigger
mbed_official	237:f3da66175598	2139	* @{
mbed_official	237:f3da66175598	2140	* @brief Constants defining the events that can be used tor trig the burst
mbed_official	237:f3da66175598	2141	* mode operation
mbed_official	237:f3da66175598	2142	*/
mbed_official	237:f3da66175598	2143	#define HRTIM_BURSTMODETRIGGER_NONE (uint32_t)0x00000000 /!< No trigger /
mbed_official	237:f3da66175598	2144	#define HRTIM_BURSTMODETRIGGER_MASTER_RESET (HRTIM_BMTRGR_MSTRST) /!< Master reset /
mbed_official	237:f3da66175598	2145	#define HRTIM_BURSTMODETRIGGER_MASTER_REPETITION (HRTIM_BMTRGR_MSTREP) /!< Master repetition /
mbed_official	237:f3da66175598	2146	#define HRTIM_BURSTMODETRIGGER_MASTER_CMP1 (HRTIM_BMTRGR_MSTCMP1) /!< Master compare 1 /
mbed_official	237:f3da66175598	2147	#define HRTIM_BURSTMODETRIGGER_MASTER_CMP2 (HRTIM_BMTRGR_MSTCMP2) /!< Master compare 2 /
mbed_official	237:f3da66175598	2148	#define HRTIM_BURSTMODETRIGGER_MASTER_CMP3 (HRTIM_BMTRGR_MSTCMP3) /!< Master compare 3 /
mbed_official	237:f3da66175598	2149	#define HRTIM_BURSTMODETRIGGER_MASTER_CMP4 (HRTIM_BMTRGR_MSTCMP4) /!< Master compare 4 /
mbed_official	237:f3da66175598	2150	#define HRTIM_BURSTMODETRIGGER_TIMERA_RESET (HRTIM_BMTRGR_TARST) /!< Timer A reset /
mbed_official	237:f3da66175598	2151	#define HRTIM_BURSTMODETRIGGER_TIMERA_REPETITION (HRTIM_BMTRGR_TAREP) /!< Timer A repetition /
mbed_official	237:f3da66175598	2152	#define HRTIM_BURSTMODETRIGGER_TIMERA_CMP1 (HRTIM_BMTRGR_TACMP1) /!< Timer A compare 1 /
mbed_official	237:f3da66175598	2153	#define HRTIM_BURSTMODETRIGGER_TIMERA_CMP2 (HRTIM_BMTRGR_TACMP2) /!< Timer A compare 2 /
mbed_official	237:f3da66175598	2154	#define HRTIM_BURSTMODETRIGGER_TIMERB_RESET (HRTIM_BMTRGR_TBRST) /!< Timer B reset /
mbed_official	237:f3da66175598	2155	#define HRTIM_BURSTMODETRIGGER_TIMERB_REPETITION (HRTIM_BMTRGR_TBREP) /!< Timer B repetition /
mbed_official	237:f3da66175598	2156	#define HRTIM_BURSTMODETRIGGER_TIMERB_CMP1 (HRTIM_BMTRGR_TBCMP1) /!< Timer B compare 1 /
mbed_official	237:f3da66175598	2157	#define HRTIM_BURSTMODETRIGGER_TIMERB_CMP2 (HRTIM_BMTRGR_TBCMP2) /!< Timer B compare 2 /
mbed_official	237:f3da66175598	2158	#define HRTIM_BURSTMODETRIGGER_TIMERC_RESET (HRTIM_BMTRGR_TCRST) /!< Timer C reset /
mbed_official	237:f3da66175598	2159	#define HRTIM_BURSTMODETRIGGER_TIMERC_REPETITION (HRTIM_BMTRGR_TCREP) /!< Timer C repetition /
mbed_official	237:f3da66175598	2160	#define HRTIM_BURSTMODETRIGGER_TIMERC_CMP1 (HRTIM_BMTRGR_TCCMP1) /!< Timer C compare 1 /
mbed_official	237:f3da66175598	2161	#define HRTIM_BURSTMODETRIGGER_TIMERC_CMP2 (HRTIM_BMTRGR_TCCMP2) /!< Timer C compare 2 /
mbed_official	237:f3da66175598	2162	#define HRTIM_BURSTMODETRIGGER_TIMERD_RESET (HRTIM_BMTRGR_TDRST) /!< Timer D reset /
mbed_official	237:f3da66175598	2163	#define HRTIM_BURSTMODETRIGGER_TIMERD_REPETITION (HRTIM_BMTRGR_TDREP) /!< Timer D repetition /
mbed_official	237:f3da66175598	2164	#define HRTIM_BURSTMODETRIGGER_TIMERD_CMP1 (HRTIM_BMTRGR_TDCMP1) /!< Timer D compare 1 /
mbed_official	237:f3da66175598	2165	#define HRTIM_BURSTMODETRIGGER_TIMERD_CMP2 (HRTIM_BMTRGR_TDCMP2) /!< Timer D compare 2 /
mbed_official	237:f3da66175598	2166	#define HRTIM_BURSTMODETRIGGER_TIMERE_RESET (HRTIM_BMTRGR_TERST) /!< Timer E reset /
mbed_official	237:f3da66175598	2167	#define HRTIM_BURSTMODETRIGGER_TIMERE_REPETITION (HRTIM_BMTRGR_TEREP) /!< Timer E repetition /
mbed_official	237:f3da66175598	2168	#define HRTIM_BURSTMODETRIGGER_TIMERE_CMP1 (HRTIM_BMTRGR_TECMP1) /!< Timer E compare 1 /
mbed_official	237:f3da66175598	2169	#define HRTIM_BURSTMODETRIGGER_TIMERE_CMP2 (HRTIM_BMTRGR_TECMP2) /!< Timer E compare 2 /
mbed_official	237:f3da66175598	2170	#define HRTIM_BURSTMODETRIGGER_TIMERA_EVENT7 (HRTIM_BMTRGR_TAEEV7) /!< Timer A period following External Event 7 /
mbed_official	237:f3da66175598	2171	#define HRTIM_BURSTMODETRIGGER_TIMERD_EVENT8 (HRTIM_BMTRGR_TDEEV8) /!< Timer D period following External Event 8 /
mbed_official	237:f3da66175598	2172	#define HRTIM_BURSTMODETRIGGER_EVENT_7 (HRTIM_BMTRGR_EEV7) /!< External Event 7 (timer A filters applied) /
mbed_official	237:f3da66175598	2173	#define HRTIM_BURSTMODETRIGGER_EVENT_8 (HRTIM_BMTRGR_EEV8) /!< External Event 8 (timer D filters applied)/
mbed_official	237:f3da66175598	2174	#define HRTIM_BURSTMODETRIGGER_EVENT_ONCHIP (HRTIM_BMTRGR_OCHPEV) /!< On-chip Event /
mbed_official	237:f3da66175598	2175
mbed_official	237:f3da66175598	2176	#define IS_HRTIM_BURSTMODETRIGGER(BURSTMODETRIGGER)\
mbed_official	237:f3da66175598	2177	(((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_NONE) \|\| \
mbed_official	237:f3da66175598	2178	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_MASTER_RESET) \|\| \
mbed_official	237:f3da66175598	2179	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_MASTER_REPETITION) \|\| \
mbed_official	237:f3da66175598	2180	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_MASTER_CMP1) \|\| \
mbed_official	237:f3da66175598	2181	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_MASTER_CMP2) \|\| \
mbed_official	237:f3da66175598	2182	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_MASTER_CMP3) \|\| \
mbed_official	237:f3da66175598	2183	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_MASTER_CMP4) \|\| \
mbed_official	237:f3da66175598	2184	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERA_RESET) \|\| \
mbed_official	237:f3da66175598	2185	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERA_REPETITION) \|\| \
mbed_official	237:f3da66175598	2186	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERA_CMP1) \|\| \
mbed_official	237:f3da66175598	2187	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERA_CMP2) \|\| \
mbed_official	237:f3da66175598	2188	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERB_RESET) \|\| \
mbed_official	237:f3da66175598	2189	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERB_REPETITION) \|\| \
mbed_official	237:f3da66175598	2190	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERB_CMP1) \|\| \
mbed_official	237:f3da66175598	2191	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERB_CMP2) \|\| \
mbed_official	237:f3da66175598	2192	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERC_RESET) \|\| \
mbed_official	237:f3da66175598	2193	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERC_REPETITION) \|\| \
mbed_official	237:f3da66175598	2194	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERC_CMP1) \|\| \
mbed_official	237:f3da66175598	2195	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERC_CMP2) \|\| \
mbed_official	237:f3da66175598	2196	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERD_RESET) \|\| \
mbed_official	237:f3da66175598	2197	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERD_REPETITION) \|\| \
mbed_official	237:f3da66175598	2198	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERD_CMP1) \|\| \
mbed_official	237:f3da66175598	2199	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERD_CMP2) \|\| \
mbed_official	237:f3da66175598	2200	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERE_RESET) \|\| \
mbed_official	237:f3da66175598	2201	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERE_REPETITION) \|\| \
mbed_official	237:f3da66175598	2202	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERE_CMP1) \|\| \
mbed_official	237:f3da66175598	2203	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERE_CMP2) \|\| \
mbed_official	237:f3da66175598	2204	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERA_EVENT7) \|\| \
mbed_official	237:f3da66175598	2205	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERD_EVENT8) \|\| \
mbed_official	237:f3da66175598	2206	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_EVENT_7) \|\| \
mbed_official	237:f3da66175598	2207	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_EVENT_8) \|\| \
mbed_official	237:f3da66175598	2208	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_EVENT_ONCHIP))
mbed_official	237:f3da66175598	2209	/**
mbed_official	237:f3da66175598	2210	* @}
mbed_official	237:f3da66175598	2211	*/
mbed_official	237:f3da66175598	2212
mbed_official	237:f3da66175598	2213	/** @defgroup HRTIM_ADC_Trigger_Update_Source
mbed_official	237:f3da66175598	2214	* @{
mbed_official	237:f3da66175598	2215	* @brief constants defining the source triggering the update of the
mbed_official	237:f3da66175598	2216	HRTIM_ADCxR register (transfer from preload to active register).
mbed_official	237:f3da66175598	2217	*/
mbed_official	237:f3da66175598	2218	#define HRTIM_ADCTRIGGERUPDATE_MASTER (uint32_t)0x00000000 /!< Master timer /
mbed_official	237:f3da66175598	2219	#define HRTIM_ADCTRIGGERUPDATE_TIMER_A (HRTIM_CR1_ADC1USRC_0) /!< Timer A /
mbed_official	237:f3da66175598	2220	#define HRTIM_ADCTRIGGERUPDATE_TIMER_B (HRTIM_CR1_ADC1USRC_1) /!< Timer B /
mbed_official	237:f3da66175598	2221	#define HRTIM_ADCTRIGGERUPDATE_TIMER_C (HRTIM_CR1_ADC1USRC_1 \| HRTIM_CR1_ADC1USRC_0) /!< Timer C /
mbed_official	237:f3da66175598	2222	#define HRTIM_ADCTRIGGERUPDATE_TIMER_D (HRTIM_CR1_ADC1USRC_2) /!< Timer D /
mbed_official	237:f3da66175598	2223	#define HRTIM_ADCTRIGGERUPDATE_TIMER_E (HRTIM_CR1_ADC1USRC_2 \| HRTIM_CR1_ADC1USRC_0) /!< Timer E /
mbed_official	237:f3da66175598	2224
mbed_official	237:f3da66175598	2225	#define IS_HRTIM_ADCTRIGGERUPDATE(ADCTRIGGERUPDATE)\
mbed_official	237:f3da66175598	2226	(((ADCTRIGGERUPDATE) == HRTIM_ADCTRIGGERUPDATE_MASTER) \|\| \
mbed_official	237:f3da66175598	2227	((ADCTRIGGERUPDATE) == HRTIM_ADCTRIGGERUPDATE_TIMER_A) \|\| \
mbed_official	237:f3da66175598	2228	((ADCTRIGGERUPDATE) == HRTIM_ADCTRIGGERUPDATE_TIMER_B) \|\| \
mbed_official	237:f3da66175598	2229	((ADCTRIGGERUPDATE) == HRTIM_ADCTRIGGERUPDATE_TIMER_C) \|\| \
mbed_official	237:f3da66175598	2230	((ADCTRIGGERUPDATE) == HRTIM_ADCTRIGGERUPDATE_TIMER_D) \|\| \
mbed_official	237:f3da66175598	2231	((ADCTRIGGERUPDATE) == HRTIM_ADCTRIGGERUPDATE_TIMER_E))
mbed_official	237:f3da66175598	2232	/**
mbed_official	237:f3da66175598	2233	* @}
mbed_official	237:f3da66175598	2234	*/
mbed_official	237:f3da66175598	2235
mbed_official	237:f3da66175598	2236	/** @defgroup HRTIM_ADC_Trigger_Event
mbed_official	237:f3da66175598	2237	* @{
mbed_official	237:f3da66175598	2238	* @brief constants defining the events triggering ADC conversion.
mbed_official	237:f3da66175598	2239	* HRTIM_ADCTRIGGEREVENT13_*: ADC Triggers 1 and 3
mbed_official	237:f3da66175598	2240	* HRTIM_ADCTRIGGEREVENT24_*: ADC Triggers 2 and 4
mbed_official	237:f3da66175598	2241	*/
mbed_official	237:f3da66175598	2242	#define HRTIM_ADCTRIGGEREVENT13_NONE (uint32_t)0x00000000 /!< No ADC trigger event /
mbed_official	237:f3da66175598	2243	#define HRTIM_ADCTRIGGEREVENT13_MASTER_CMP1 (HRTIM_ADC1R_AD1MC1) /!< ADC Trigger on master compare 1 /
mbed_official	237:f3da66175598	2244	#define HRTIM_ADCTRIGGEREVENT13_MASTER_CMP2 (HRTIM_ADC1R_AD1MC2) /!< ADC Trigger on master compare 2 /
mbed_official	237:f3da66175598	2245	#define HRTIM_ADCTRIGGEREVENT13_MASTER_CMP3 (HRTIM_ADC1R_AD1MC3) /!< ADC Trigger on master compare 3 /
mbed_official	237:f3da66175598	2246	#define HRTIM_ADCTRIGGEREVENT13_MASTER_CMP4 (HRTIM_ADC1R_AD1MC4) /!< ADC Trigger on master compare 4 /
mbed_official	237:f3da66175598	2247	#define HRTIM_ADCTRIGGEREVENT13_MASTER_PERIOD (HRTIM_ADC1R_AD1MPER) /!< ADC Trigger on master period /
mbed_official	237:f3da66175598	2248	#define HRTIM_ADCTRIGGEREVENT13_EVENT_1 (HRTIM_ADC1R_AD1EEV1) /!< ADC Trigger on external event 1 /
mbed_official	237:f3da66175598	2249	#define HRTIM_ADCTRIGGEREVENT13_EVENT_2 (HRTIM_ADC1R_AD1EEV2) /!< ADC Trigger on external event 2 /
mbed_official	237:f3da66175598	2250	#define HRTIM_ADCTRIGGEREVENT13_EVENT_3 (HRTIM_ADC1R_AD1EEV3) /!< ADC Trigger on external event 3 /
mbed_official	237:f3da66175598	2251	#define HRTIM_ADCTRIGGEREVENT13_EVENT_4 (HRTIM_ADC1R_AD1EEV4) /!< ADC Trigger on external event 4 /
mbed_official	237:f3da66175598	2252	#define HRTIM_ADCTRIGGEREVENT13_EVENT_5 (HRTIM_ADC1R_AD1EEV5) /!< ADC Trigger on external event 5 /
mbed_official	237:f3da66175598	2253	#define HRTIM_ADCTRIGGEREVENT13_TIMERA_CMP2 (HRTIM_ADC1R_AD1TAC2) /!< ADC Trigger on Timer A compare 2 /
mbed_official	237:f3da66175598	2254	#define HRTIM_ADCTRIGGEREVENT13_TIMERA_CMP3 (HRTIM_ADC1R_AD1TAC3) /!< ADC Trigger on Timer A compare 3 /
mbed_official	237:f3da66175598	2255	#define HRTIM_ADCTRIGGEREVENT13_TIMERA_CMP4 (HRTIM_ADC1R_AD1TAC4) /!< ADC Trigger on Timer A compare 4 /
mbed_official	237:f3da66175598	2256	#define HRTIM_ADCTRIGGEREVENT13_TIMERA_PERIOD (HRTIM_ADC1R_AD1TAPER) /!< ADC Trigger on Timer A period /
mbed_official	237:f3da66175598	2257	#define HRTIM_ADCTRIGGEREVENT13_TIMERA_RESET (HRTIM_ADC1R_AD1TARST) /!< ADC Trigger on Timer A reset /
mbed_official	237:f3da66175598	2258	#define HRTIM_ADCTRIGGEREVENT13_TIMERB_CMP2 (HRTIM_ADC1R_AD1TBC2) /!< ADC Trigger on Timer B compare 2 /
mbed_official	237:f3da66175598	2259	#define HRTIM_ADCTRIGGEREVENT13_TIMERB_CMP3 (HRTIM_ADC1R_AD1TBC3) /!< ADC Trigger on Timer B compare 3 /
mbed_official	237:f3da66175598	2260	#define HRTIM_ADCTRIGGEREVENT13_TIMERB_CMP4 (HRTIM_ADC1R_AD1TBC4) /!< ADC Trigger on Timer B compare 4 /
mbed_official	237:f3da66175598	2261	#define HRTIM_ADCTRIGGEREVENT13_TIMERB_PERIOD (HRTIM_ADC1R_AD1TBPER) /!< ADC Trigger on Timer B period /
mbed_official	237:f3da66175598	2262	#define HRTIM_ADCTRIGGEREVENT13_TIMERB_RESET (HRTIM_ADC1R_AD1TBRST) /!< ADC Trigger on Timer B reset /
mbed_official	237:f3da66175598	2263	#define HRTIM_ADCTRIGGEREVENT13_TIMERC_CMP2 (HRTIM_ADC1R_AD1TCC2) /!< ADC Trigger on Timer C compare 2 /
mbed_official	237:f3da66175598	2264	#define HRTIM_ADCTRIGGEREVENT13_TIMERC_CMP3 (HRTIM_ADC1R_AD1TCC3) /!< ADC Trigger on Timer C compare 3 /
mbed_official	237:f3da66175598	2265	#define HRTIM_ADCTRIGGEREVENT13_TIMERC_CMP4 (HRTIM_ADC1R_AD1TCC4) /!< ADC Trigger on Timer C compare 4 /
mbed_official	237:f3da66175598	2266	#define HRTIM_ADCTRIGGEREVENT13_TIMERC_PERIOD (HRTIM_ADC1R_AD1TCPER) /!< ADC Trigger on Timer C period /
mbed_official	237:f3da66175598	2267	#define HRTIM_ADCTRIGGEREVENT13_TIMERD_CMP2 (HRTIM_ADC1R_AD1TDC2) /!< ADC Trigger on Timer D compare 2 /
mbed_official	237:f3da66175598	2268	#define HRTIM_ADCTRIGGEREVENT13_TIMERD_CMP3 (HRTIM_ADC1R_AD1TDC3) /!< ADC Trigger on Timer D compare 3 /
mbed_official	237:f3da66175598	2269	#define HRTIM_ADCTRIGGEREVENT13_TIMERD_CMP4 (HRTIM_ADC1R_AD1TDC4) /!< ADC Trigger on Timer D compare 4 /
mbed_official	237:f3da66175598	2270	#define HRTIM_ADCTRIGGEREVENT13_TIMERD_PERIOD (HRTIM_ADC1R_AD1TDPER) /!< ADC Trigger on Timer D period /
mbed_official	237:f3da66175598	2271	#define HRTIM_ADCTRIGGEREVENT13_TIMERE_CMP2 (HRTIM_ADC1R_AD1TEC2) /!< ADC Trigger on Timer E compare 2 /
mbed_official	237:f3da66175598	2272	#define HRTIM_ADCTRIGGEREVENT13_TIMERE_CMP3 (HRTIM_ADC1R_AD1TEC3) /!< ADC Trigger on Timer E compare 3 /
mbed_official	237:f3da66175598	2273	#define HRTIM_ADCTRIGGEREVENT13_TIMERE_CMP4 (HRTIM_ADC1R_AD1TEC4) /!< ADC Trigger on Timer E compare 4 /
mbed_official	237:f3da66175598	2274	#define HRTIM_ADCTRIGGEREVENT13_TIMERE_PERIOD (HRTIM_ADC1R_AD1TEPER) /!< ADC Trigger on Timer E period /
mbed_official	237:f3da66175598	2275
mbed_official	237:f3da66175598	2276	#define HRTIM_ADCTRIGGEREVENT24_NONE (uint32_t)0x00000000 /!< No ADC trigger event /
mbed_official	237:f3da66175598	2277	#define HRTIM_ADCTRIGGEREVENT24_MASTER_CMP1 (HRTIM_ADC2R_AD2MC1) /!< ADC Trigger on master compare 1 /
mbed_official	237:f3da66175598	2278	#define HRTIM_ADCTRIGGEREVENT24_MASTER_CMP2 (HRTIM_ADC2R_AD2MC2) /!< ADC Trigger on master compare 2 /
mbed_official	237:f3da66175598	2279	#define HRTIM_ADCTRIGGEREVENT24_MASTER_CMP3 (HRTIM_ADC2R_AD2MC3) /!< ADC Trigger on master compare 3 /
mbed_official	237:f3da66175598	2280	#define HRTIM_ADCTRIGGEREVENT24_MASTER_CMP4 (HRTIM_ADC2R_AD2MC4) /!< ADC Trigger on master compare 4 /
mbed_official	237:f3da66175598	2281	#define HRTIM_ADCTRIGGEREVENT24_MASTER_PERIOD (HRTIM_ADC2R_AD2MPER) /!< ADC Trigger on master period /
mbed_official	237:f3da66175598	2282	#define HRTIM_ADCTRIGGEREVENT24_EVENT_6 (HRTIM_ADC2R_AD2EEV6) /!< ADC Trigger on external event 6 /
mbed_official	237:f3da66175598	2283	#define HRTIM_ADCTRIGGEREVENT24_EVENT_7 (HRTIM_ADC2R_AD2EEV7) /!< ADC Trigger on external event 7 /
mbed_official	237:f3da66175598	2284	#define HRTIM_ADCTRIGGEREVENT24_EVENT_8 (HRTIM_ADC2R_AD2EEV8) /!< ADC Trigger on external event 8 /
mbed_official	237:f3da66175598	2285	#define HRTIM_ADCTRIGGEREVENT24_EVENT_9 (HRTIM_ADC2R_AD2EEV9) /!< ADC Trigger on external event 9 /
mbed_official	237:f3da66175598	2286	#define HRTIM_ADCTRIGGEREVENT24_EVENT_10 (HRTIM_ADC2R_AD2EEV10) /!< ADC Trigger on external event 10 /
mbed_official	237:f3da66175598	2287	#define HRTIM_ADCTRIGGEREVENT24_TIMERA_CMP2 (HRTIM_ADC2R_AD2TAC2) /!< ADC Trigger on Timer A compare 2 /
mbed_official	237:f3da66175598	2288	#define HRTIM_ADCTRIGGEREVENT24_TIMERA_CMP3 (HRTIM_ADC2R_AD2TAC3) /!< ADC Trigger on Timer A compare 3 /
mbed_official	237:f3da66175598	2289	#define HRTIM_ADCTRIGGEREVENT24_TIMERA_CMP4 (HRTIM_ADC2R_AD2TAC4) /!< ADC Trigger on Timer A compare 4 /
mbed_official	237:f3da66175598	2290	#define HRTIM_ADCTRIGGEREVENT24_TIMERA_PERIOD (HRTIM_ADC2R_AD2TAPER) /!< ADC Trigger on Timer A period /
mbed_official	237:f3da66175598	2291	#define HRTIM_ADCTRIGGEREVENT24_TIMERB_CMP2 (HRTIM_ADC2R_AD2TBC2) /!< ADC Trigger on Timer B compare 2 /
mbed_official	237:f3da66175598	2292	#define HRTIM_ADCTRIGGEREVENT24_TIMERB_CMP3 (HRTIM_ADC2R_AD2TBC3) /!< ADC Trigger on Timer B compare 3 /
mbed_official	237:f3da66175598	2293	#define HRTIM_ADCTRIGGEREVENT24_TIMERB_CMP4 (HRTIM_ADC2R_AD2TBC4) /!< ADC Trigger on Timer B compare 4 /
mbed_official	237:f3da66175598	2294	#define HRTIM_ADCTRIGGEREVENT24_TIMERB_PERIOD (HRTIM_ADC2R_AD2TBPER) /!< ADC Trigger on Timer B period /
mbed_official	237:f3da66175598	2295	#define HRTIM_ADCTRIGGEREVENT24_TIMERC_CMP2 (HRTIM_ADC2R_AD2TCC2) /!< ADC Trigger on Timer C compare 2 /
mbed_official	237:f3da66175598	2296	#define HRTIM_ADCTRIGGEREVENT24_TIMERC_CMP3 (HRTIM_ADC2R_AD2TCC3) /!< ADC Trigger on Timer C compare 3 /
mbed_official	237:f3da66175598	2297	#define HRTIM_ADCTRIGGEREVENT24_TIMERC_CMP4 (HRTIM_ADC2R_AD2TCC4) /!< ADC Trigger on Timer C compare 4 /
mbed_official	237:f3da66175598	2298	#define HRTIM_ADCTRIGGEREVENT24_TIMERC_PERIOD (HRTIM_ADC2R_AD2TCPER) /!< ADC Trigger on Timer C period /
mbed_official	237:f3da66175598	2299	#define HRTIM_ADCTRIGGEREVENT24_TIMERC_RESET (HRTIM_ADC2R_AD2TCRST) /!< ADC Trigger on Timer C reset /
mbed_official	237:f3da66175598	2300	#define HRTIM_ADCTRIGGEREVENT24_TIMERD_CMP2 (HRTIM_ADC2R_AD2TDC2) /!< ADC Trigger on Timer D compare 2 /
mbed_official	237:f3da66175598	2301	#define HRTIM_ADCTRIGGEREVENT24_TIMERD_CMP3 (HRTIM_ADC2R_AD2TDC3) /!< ADC Trigger on Timer D compare 3 /
mbed_official	237:f3da66175598	2302	#define HRTIM_ADCTRIGGEREVENT24_TIMERD_CMP4 (HRTIM_ADC2R_AD2TDC4) /!< ADC Trigger on Timer D compare 4 /
mbed_official	237:f3da66175598	2303	#define HRTIM_ADCTRIGGEREVENT24_TIMERD_PERIOD (HRTIM_ADC2R_AD2TDPER) /!< ADC Trigger on Timer D period /
mbed_official	237:f3da66175598	2304	#define HRTIM_ADCTRIGGEREVENT24_TIMERD_RESET (HRTIM_ADC2R_AD2TDRST) /!< ADC Trigger on Timer D reset /
mbed_official	237:f3da66175598	2305	#define HRTIM_ADCTRIGGEREVENT24_TIMERE_CMP2 (HRTIM_ADC2R_AD2TEC2) /!< ADC Trigger on Timer E compare 2 /
mbed_official	237:f3da66175598	2306	#define HRTIM_ADCTRIGGEREVENT24_TIMERE_CMP3 (HRTIM_ADC2R_AD2TEC3) /!< ADC Trigger on Timer E compare 3 /
mbed_official	237:f3da66175598	2307	#define HRTIM_ADCTRIGGEREVENT24_TIMERE_CMP4 (HRTIM_ADC2R_AD2TEC4) /!< ADC Trigger on Timer E compare 4 /
mbed_official	237:f3da66175598	2308	#define HRTIM_ADCTRIGGEREVENT24_TIMERE_RESET (HRTIM_ADC2R_AD2TERST) /!< ADC Trigger on Timer E reset /
mbed_official	237:f3da66175598	2309
mbed_official	237:f3da66175598	2310	/**
mbed_official	237:f3da66175598	2311	* @}
mbed_official	237:f3da66175598	2312	*/
mbed_official	237:f3da66175598	2313
mbed_official	237:f3da66175598	2314	/** @defgroup DLL_Calibration_Rate
mbed_official	237:f3da66175598	2315	* @{
mbed_official	237:f3da66175598	2316	* @brief Constants defining the DLL calibration periods (in micro seconds)
mbed_official	237:f3da66175598	2317	*/
mbed_official	237:f3da66175598	2318	#define HRTIM_SINGLE_CALIBRATION (uint32_t)0xFFFFFFFF /!< Non periodic DLL calibration /
mbed_official	237:f3da66175598	2319	#define HRTIM_CALIBRATIONRATE_7300 (uint32_t)0x00000000 /!< Periodic DLL calibration: T = 1048576 tHRTIM (7.3 ms) */
mbed_official	237:f3da66175598	2320	#define HRTIM_CALIBRATIONRATE_910 (HRTIM_DLLCR_CALRTE_0) /!< Periodic DLL calibration: T = 131072 tHRTIM (910 µs) */
mbed_official	237:f3da66175598	2321	#define HRTIM_CALIBRATIONRATE_114 (HRTIM_DLLCR_CALRTE_1) /!< Periodic DLL calibration: T = 16384 tHRTIM (114 µs) */
mbed_official	237:f3da66175598	2322	#define HRTIM_CALIBRATIONRATE_14 (HRTIM_DLLCR_CALRTE_1 \| HRTIM_DLLCR_CALRTE_0) /!< Periodic DLL calibration: T = 2048 tHRTIM (14 µs) */
mbed_official	237:f3da66175598	2323
mbed_official	237:f3da66175598	2324	#define IS_HRTIM_CALIBRATIONRATE(CALIBRATIONRATE)\
mbed_official	237:f3da66175598	2325	(((CALIBRATIONRATE) == HRTIM_SINGLE_CALIBRATION) \|\| \
mbed_official	237:f3da66175598	2326	((CALIBRATIONRATE) == HRTIM_CALIBRATIONRATE_7300) \|\| \
mbed_official	237:f3da66175598	2327	((CALIBRATIONRATE) == HRTIM_CALIBRATIONRATE_910) \|\| \
mbed_official	237:f3da66175598	2328	((CALIBRATIONRATE) == HRTIM_CALIBRATIONRATE_114) \|\| \
mbed_official	237:f3da66175598	2329	((CALIBRATIONRATE) == HRTIM_CALIBRATIONRATE_14))
mbed_official	237:f3da66175598	2330	/**
mbed_official	237:f3da66175598	2331	* @}
mbed_official	237:f3da66175598	2332	*/
mbed_official	237:f3da66175598	2333
mbed_official	237:f3da66175598	2334	/** @defgroup Burst_DMA_Registers_Update
mbed_official	237:f3da66175598	2335	* @{
mbed_official	237:f3da66175598	2336	* @brief Constants defining the registers that can be written during a burst
mbed_official	237:f3da66175598	2337	* DMA operation
mbed_official	237:f3da66175598	2338	*/
mbed_official	237:f3da66175598	2339	#define HRTIM_BURSTDMA_NONE (uint32_t)0x00000000 /!< No register is updated by Burst DMA accesses /
mbed_official	237:f3da66175598	2340	#define HRTIM_BURSTDMA_CR (HRTIM_BDTUPR_TIMCR) /!< MCR or TIMxCR register is updated by Burst DMA accesses /
mbed_official	237:f3da66175598	2341	#define HRTIM_BURSTDMA_ICR (HRTIM_BDTUPR_TIMICR) /!< MICR or TIMxICR register is updated by Burst DMA accesses /
mbed_official	237:f3da66175598	2342	#define HRTIM_BURSTDMA_DIER (HRTIM_BDTUPR_TIMDIER) /!< MDIER or TIMxDIER register is updated by Burst DMA accesses /
mbed_official	237:f3da66175598	2343	#define HRTIM_BURSTDMA_CNT (HRTIM_BDTUPR_TIMCNT) /!< MCNTR or CNTxCR register is updated by Burst DMA accesses /
mbed_official	237:f3da66175598	2344	#define HRTIM_BURSTDMA_PER (HRTIM_BDTUPR_TIMPER) /!< MPER or PERxR register is updated by Burst DMA accesses /
mbed_official	237:f3da66175598	2345	#define HRTIM_BURSTDMA_REP (HRTIM_BDTUPR_TIMREP) /!< MREPR or REPxR register is updated by Burst DMA accesses /
mbed_official	237:f3da66175598	2346	#define HRTIM_BURSTDMA_CMP1 (HRTIM_BDTUPR_TIMCMP1) /!< MCMP1R or CMP1xR register is updated by Burst DMA accesses /
mbed_official	237:f3da66175598	2347	#define HRTIM_BURSTDMA_CMP2 (HRTIM_BDTUPR_TIMCMP2) /!< MCMP2R or CMP2xR register is updated by Burst DMA accesses /
mbed_official	237:f3da66175598	2348	#define HRTIM_BURSTDMA_CMP3 (HRTIM_BDTUPR_TIMCMP3) /!< MCMP3R or CMP3xR register is updated by Burst DMA accesses /
mbed_official	237:f3da66175598	2349	#define HRTIM_BURSTDMA_CMP4 (HRTIM_BDTUPR_TIMCMP4) /!< MCMP4R or CMP4xR register is updated by Burst DMA accesses /
mbed_official	237:f3da66175598	2350	#define HRTIM_BURSTDMA_DTR (HRTIM_BDTUPR_TIMDTR) /!< TDxR register is updated by Burst DMA accesses /
mbed_official	237:f3da66175598	2351	#define HRTIM_BURSTDMA_SET1R (HRTIM_BDTUPR_TIMSET1R) /!< SET1R register is updated by Burst DMA accesses /
mbed_official	237:f3da66175598	2352	#define HRTIM_BURSTDMA_RST1R (HRTIM_BDTUPR_TIMRST1R) /!< RST1R register is updated by Burst DMA accesses /
mbed_official	237:f3da66175598	2353	#define HRTIM_BURSTDMA_SET2R (HRTIM_BDTUPR_TIMSET2R) /!< SET2R register is updated by Burst DMA accesses /
mbed_official	237:f3da66175598	2354	#define HRTIM_BURSTDMA_RST2R (HRTIM_BDTUPR_TIMRST2R) /!< RST1R register is updated by Burst DMA accesses /
mbed_official	237:f3da66175598	2355	#define HRTIM_BURSTDMA_EEFR1 (HRTIM_BDTUPR_TIMEEFR1) /!< EEFxR1 register is updated by Burst DMA accesses /
mbed_official	237:f3da66175598	2356	#define HRTIM_BURSTDMA_EEFR2 (HRTIM_BDTUPR_TIMEEFR2) /!< EEFxR2 register is updated by Burst DMA accesses /
mbed_official	237:f3da66175598	2357	#define HRTIM_BURSTDMA_RSTR (HRTIM_BDTUPR_TIMRSTR) /!< RSTxR register is updated by Burst DMA accesses /
mbed_official	237:f3da66175598	2358	#define HRTIM_BURSTDMA_CHPR (HRTIM_BDTUPR_TIMCHPR) /!< CHPxR register is updated by Burst DMA accesses /
mbed_official	237:f3da66175598	2359	#define HRTIM_BURSTDMA_OUTR (HRTIM_BDTUPR_TIMOUTR) /!< OUTxR register is updated by Burst DMA accesses /
mbed_official	237:f3da66175598	2360	#define HRTIM_BURSTDMA_FLTR (HRTIM_BDTUPR_TIMFLTR) /!< FLTxR register is updated by Burst DMA accesses /
mbed_official	237:f3da66175598	2361
mbed_official	237:f3da66175598	2362	#define IS_HRTIM_TIMER_BURSTDMA(TIMER, BURSTDMA) \
mbed_official	237:f3da66175598	2363	((((TIMER) == HRTIM_TIMERINDEX_MASTER) && (((BURSTDMA) & 0xFFFFFC000) == 0x00000000)) \
mbed_official	237:f3da66175598	2364	\|\| \
mbed_official	237:f3da66175598	2365	(((TIMER) == HRTIM_TIMERINDEX_TIMER_A) && (((BURSTDMA) & 0xFFE00000) == 0x00000000)) \
mbed_official	237:f3da66175598	2366	\|\| \
mbed_official	237:f3da66175598	2367	(((TIMER) == HRTIM_TIMERINDEX_TIMER_B) && (((BURSTDMA) & 0xFFE00000) == 0x00000000)) \
mbed_official	237:f3da66175598	2368	\|\| \
mbed_official	237:f3da66175598	2369	(((TIMER) == HRTIM_TIMERINDEX_TIMER_C) && (((BURSTDMA) & 0xFFE00000) == 0x00000000)) \
mbed_official	237:f3da66175598	2370	\|\| \
mbed_official	237:f3da66175598	2371	(((TIMER) == HRTIM_TIMERINDEX_TIMER_D) && (((BURSTDMA) & 0xFFE00000) == 0x00000000)) \
mbed_official	237:f3da66175598	2372	\|\| \
mbed_official	237:f3da66175598	2373	(((TIMER) == HRTIM_TIMERINDEX_TIMER_E) && (((BURSTDMA) & 0xFFE00000) == 0x00000000)))
mbed_official	237:f3da66175598	2374	/**
mbed_official	237:f3da66175598	2375	* @}
mbed_official	237:f3da66175598	2376	*/
mbed_official	237:f3da66175598	2377
mbed_official	237:f3da66175598	2378	/** @defgroup Burst_Mode_Control
mbed_official	237:f3da66175598	2379	* @{
mbed_official	237:f3da66175598	2380	* @brief Constants used to enable or disable the burst mode controller
mbed_official	237:f3da66175598	2381	*/
mbed_official	237:f3da66175598	2382	#define HRTIM_BURSTMODECTL_DISABLED (uint32_t)0x00000000 /!< Burst mode disabled /
mbed_official	237:f3da66175598	2383	#define HRTIM_BURSTMODECTL_ENABLED (HRTIM_BMCR_BME) /!< Burst mode enabled /
mbed_official	237:f3da66175598	2384
mbed_official	237:f3da66175598	2385	#define IS_HRTIM_BURSTMODECTL(BURSTMODECTL)\
mbed_official	237:f3da66175598	2386	(((BURSTMODECTL) == HRTIM_BURSTMODECTL_DISABLED) \|\| \
mbed_official	237:f3da66175598	2387	((BURSTMODECTL) == HRTIM_BURSTMODECTL_ENABLED))
mbed_official	237:f3da66175598	2388	/**
mbed_official	237:f3da66175598	2389	* @}
mbed_official	237:f3da66175598	2390	*/
mbed_official	237:f3da66175598	2391
mbed_official	237:f3da66175598	2392	/** @defgroup Fault_Mode_Control
mbed_official	237:f3da66175598	2393	* @{
mbed_official	237:f3da66175598	2394	* @brief Constants used to enable or disable a fault channel
mbed_official	237:f3da66175598	2395	*/
mbed_official	237:f3da66175598	2396	#define HRTIM_FAULTMODECTL_DISABLED (uint32_t)0x00000000 /!< Fault channel is disabled /
mbed_official	237:f3da66175598	2397	#define HRTIM_FAULTMODECTL_ENABLED (uint32_t)0x00000001 /!< Fault channel is enabled /
mbed_official	237:f3da66175598	2398
mbed_official	237:f3da66175598	2399	#define IS_HRTIM_FAULTMODECTL(FAULTMODECTL)\
mbed_official	237:f3da66175598	2400	(((FAULTMODECTL) == HRTIM_FAULTMODECTL_DISABLED) \|\| \
mbed_official	237:f3da66175598	2401	((FAULTMODECTL) == HRTIM_FAULTMODECTL_ENABLED))
mbed_official	237:f3da66175598	2402	/**
mbed_official	237:f3da66175598	2403	* @}
mbed_official	237:f3da66175598	2404	*/
mbed_official	237:f3da66175598	2405
mbed_official	237:f3da66175598	2406	/** @defgroup Software_Timer_Update
mbed_official	237:f3da66175598	2407	* @{
mbed_official	237:f3da66175598	2408	* @brief Constants used to force timer registers update
mbed_official	237:f3da66175598	2409	*/
mbed_official	237:f3da66175598	2410	#define HRTIM_TIMERUPDATE_MASTER (HRTIM_CR2_MSWU) /!< Forces an immediate transfer from the preload to the active register in the master timer /
mbed_official	237:f3da66175598	2411	#define HRTIM_TIMERUPDATE_A (HRTIM_CR2_TASWU) /!< Forces an immediate transfer from the preload to the active register in the timer A /
mbed_official	237:f3da66175598	2412	#define HRTIM_TIMERUPDATE_B (HRTIM_CR2_TBSWU) /!< Forces an immediate transfer from the preload to the active register in the timer B /
mbed_official	237:f3da66175598	2413	#define HRTIM_TIMERUPDATE_C (HRTIM_CR2_TCSWU) /!< Forces an immediate transfer from the preload to the active register in the timer C /
mbed_official	237:f3da66175598	2414	#define HRTIM_TIMERUPDATE_D (HRTIM_CR2_TDSWU) /!< Forces an immediate transfer from the preload to the active register in the timer D /
mbed_official	237:f3da66175598	2415	#define HRTIM_TIMERUPDATE_E (HRTIM_CR2_TESWU) /!< Forces an immediate transfer from the preload to the active register in the timer E /
mbed_official	237:f3da66175598	2416
mbed_official	237:f3da66175598	2417	#define IS_HRTIM_TIMERUPDATE(TIMERUPDATE) (((TIMERUPDATE) & 0xFFFFFFC0) == 0x00000000)
mbed_official	237:f3da66175598	2418	/**
mbed_official	237:f3da66175598	2419	* @}
mbed_official	237:f3da66175598	2420	*/
mbed_official	237:f3da66175598	2421
mbed_official	237:f3da66175598	2422	/** @defgroup Software_Timer_Reset
mbed_official	237:f3da66175598	2423	* @{
mbed_official	237:f3da66175598	2424	* @brief Constants used to force timer counter reset
mbed_official	237:f3da66175598	2425	*/
mbed_official	237:f3da66175598	2426	#define HRTIM_TIMERRESET_MASTER (HRTIM_CR2_MRST) /!< Resets the master timer counter /
mbed_official	237:f3da66175598	2427	#define HRTIM_TIMERRESET_TIMER_A (HRTIM_CR2_TARST) /!< Resets the timer A counter /
mbed_official	237:f3da66175598	2428	#define HRTIM_TIMERRESET_TIMER_B (HRTIM_CR2_TBRST) /!< Resets the timer B counter /
mbed_official	237:f3da66175598	2429	#define HRTIM_TIMERRESET_TIMER_C (HRTIM_CR2_TCRST) /!< Resets the timer C counter /
mbed_official	237:f3da66175598	2430	#define HRTIM_TIMERRESET_TIMER_D (HRTIM_CR2_TDRST) /!< Resets the timer D counter /
mbed_official	237:f3da66175598	2431	#define HRTIM_TIMERRESET_TIMER_E (HRTIM_CR2_TERST) /!< Resets the timer E counter /
mbed_official	237:f3da66175598	2432
mbed_official	237:f3da66175598	2433	#define IS_HRTIM_TIMERRESET(TIMERRESET) (((TIMERRESET) & 0xFFFFC0FF) == 0x00000000)
mbed_official	237:f3da66175598	2434	/**
mbed_official	237:f3da66175598	2435	* @}
mbed_official	237:f3da66175598	2436	*/
mbed_official	237:f3da66175598	2437
mbed_official	237:f3da66175598	2438	/** @defgroup Output_Level
mbed_official	237:f3da66175598	2439	* @{
mbed_official	237:f3da66175598	2440	* @brief Constants defining the level of a timer output
mbed_official	237:f3da66175598	2441	*/
mbed_official	237:f3da66175598	2442	#define HRTIM_OUTPUTLEVEL_ACTIVE (uint32_t)0x00000001 /!< Forces the output to its active state /
mbed_official	237:f3da66175598	2443	#define HRTIM_OUTPUTLEVEL_INACTIVE (uint32_t)0x00000002 /!< Forces the output to its inactive state /
mbed_official	237:f3da66175598	2444
mbed_official	237:f3da66175598	2445	#define IS_HRTIM_OUTPUTLEVEL(OUTPUTLEVEL)\
mbed_official	237:f3da66175598	2446	(((OUTPUTLEVEL) == HRTIM_OUTPUTLEVEL_ACTIVE) \|\| \
mbed_official	237:f3da66175598	2447	((OUTPUTLEVEL) == HRTIM_OUTPUTLEVEL_INACTIVE))
mbed_official	237:f3da66175598	2448	/**
mbed_official	237:f3da66175598	2449	* @}
mbed_official	237:f3da66175598	2450	*/
mbed_official	237:f3da66175598	2451
mbed_official	237:f3da66175598	2452	/** @defgroup Output_State
mbed_official	237:f3da66175598	2453	* @{
mbed_official	237:f3da66175598	2454	* @brief Constants defining the state of a timer output
mbed_official	237:f3da66175598	2455	*/
mbed_official	237:f3da66175598	2456	#define HRTIM_OUTPUTSTATE_IDLE (uint32_t)0x00000001 /*!< Main operating mode, where the output can take the active or
mbed_official	237:f3da66175598	2457	inactive level as programmed in the crossbar unit */
mbed_official	237:f3da66175598	2458	#define HRTIM_OUTPUTSTATE_RUN (uint32_t)0x00000002 /*!< Default operating state (e.g. after an HRTIM reset, when the
mbed_official	237:f3da66175598	2459	outputs are disabled by software or during a burst mode operation */
mbed_official	237:f3da66175598	2460	#define HRTIM_OUTPUTSTATE_FAULT (uint32_t)0x00000003 /*!< Safety state, entered in case of a shut-down request on
mbed_official	237:f3da66175598	2461	FAULTx inputs */
mbed_official	237:f3da66175598	2462	/**
mbed_official	237:f3da66175598	2463	* @}
mbed_official	237:f3da66175598	2464	*/
mbed_official	237:f3da66175598	2465
mbed_official	237:f3da66175598	2466	/** @defgroup Burst_Mode_Status
mbed_official	237:f3da66175598	2467	* @{
mbed_official	237:f3da66175598	2468	* @brief Constants defining the operating state of the burst mode controller
mbed_official	237:f3da66175598	2469	*/
mbed_official	237:f3da66175598	2470	#define HRTIM_BURSTMODESTATUS_NORMAL (uint32_t) 0x00000000 /!< Normal operation /
mbed_official	237:f3da66175598	2471	#define HRTIM_BURSTMODESTATUS_ONGOING (HRTIM_BMCR_BMSTAT) /!< Burst operation on-going /
mbed_official	237:f3da66175598	2472	/**
mbed_official	237:f3da66175598	2473	* @}
mbed_official	237:f3da66175598	2474	*/
mbed_official	237:f3da66175598	2475
mbed_official	237:f3da66175598	2476	/** @defgroup Current_Push_Pull_Status
mbed_official	237:f3da66175598	2477	* @{
mbed_official	237:f3da66175598	2478	* @brief Constants defining on which output the signal is currently applied
mbed_official	237:f3da66175598	2479	* in push-pull mode
mbed_official	237:f3da66175598	2480	*/
mbed_official	237:f3da66175598	2481	#define HRTIM_PUSHPULL_CURRENTSTATUS_OUTPUT1 (uint32_t) 0x00000000 /!< Signal applied on output 1 and output 2 forced inactive /
mbed_official	237:f3da66175598	2482	#define HRTIM_PUSHPULL_CURRENTSTATUS_OUTPUT2 (HRTIM_TIMISR_CPPSTAT) /!< Signal applied on output 2 and output 1 forced inactive /
mbed_official	237:f3da66175598	2483	/**
mbed_official	237:f3da66175598	2484	* @}
mbed_official	237:f3da66175598	2485	*/
mbed_official	237:f3da66175598	2486
mbed_official	237:f3da66175598	2487	/** @defgroup Idle_Push_Pull_Status
mbed_official	237:f3da66175598	2488	* @{
mbed_official	237:f3da66175598	2489	* @brief Constants defining on which output the signal was applied, in
mbed_official	237:f3da66175598	2490	* push-pull mode balanced fault mode or delayed idle mode, when the
mbed_official	237:f3da66175598	2491	* protection was triggered
mbed_official	237:f3da66175598	2492	*/
mbed_official	237:f3da66175598	2493	#define HRTIM_PUSHPULL_IDLESTATUS_OUTPUT1 (uint32_t) 0x00000000 /!< Protection occurred when the output 1 was active and output 2 forced inactive /
mbed_official	237:f3da66175598	2494	#define HRTIM_PUSHPULL_IDLESTATUS_OUTPUT2 (HRTIM_TIMISR_IPPSTAT) /!< Protection occurred when the output 2 was active and output 1 forced inactive /
mbed_official	237:f3da66175598	2495	/**
mbed_official	237:f3da66175598	2496	* @}
mbed_official	237:f3da66175598	2497	*/
mbed_official	237:f3da66175598	2498
mbed_official	237:f3da66175598	2499	/** @defgroup HRTIM_Common_Interrupt_Enable
mbed_official	237:f3da66175598	2500	* @{
mbed_official	237:f3da66175598	2501	*/
mbed_official	237:f3da66175598	2502	#define HRTIM_IT_NONE (uint32_t)0x00000000 /!< No interrupt enabled /
mbed_official	237:f3da66175598	2503	#define HRTIM_IT_FLT1 HRTIM_IER_FLT1 /!< Fault 1 interrupt enable /
mbed_official	237:f3da66175598	2504	#define HRTIM_IT_FLT2 HRTIM_IER_FLT2 /!< Fault 2 interrupt enable /
mbed_official	237:f3da66175598	2505	#define HRTIM_IT_FLT3 HRTIM_IER_FLT3 /!< Fault 3 interrupt enable /
mbed_official	237:f3da66175598	2506	#define HRTIM_IT_FLT4 HRTIM_IER_FLT4 /!< Fault 4 interrupt enable /
mbed_official	237:f3da66175598	2507	#define HRTIM_IT_FLT5 HRTIM_IER_FLT5 /!< Fault 5 interrupt enable /
mbed_official	237:f3da66175598	2508	#define HRTIM_IT_SYSFLT HRTIM_IER_SYSFLT /!< System Fault interrupt enable /
mbed_official	237:f3da66175598	2509	#define HRTIM_IT_DLLRDY HRTIM_IER_DLLRDY /!< DLL ready interrupt enable /
mbed_official	237:f3da66175598	2510	#define HRTIM_IT_BMPER HRTIM_IER_BMPER /!< Burst mode period interrupt enable /
mbed_official	237:f3da66175598	2511
mbed_official	237:f3da66175598	2512	#define IS_HRTIM_IT(IT) (((IT) & 0xFFFCFFC0) == 0x00000000)
mbed_official	237:f3da66175598	2513
mbed_official	237:f3da66175598	2514	/**
mbed_official	237:f3da66175598	2515	* @}
mbed_official	237:f3da66175598	2516	*/
mbed_official	237:f3da66175598	2517
mbed_official	237:f3da66175598	2518	/** @defgroup HRTIM_Master_Interrupt_Enable
mbed_official	237:f3da66175598	2519	* @{
mbed_official	237:f3da66175598	2520	*/
mbed_official	237:f3da66175598	2521	#define HRTIM_MASTER_IT_NONE (uint32_t)0x00000000 /!< No interrupt enabled /
mbed_official	237:f3da66175598	2522	#define HRTIM_MASTER_IT_MCMP1 HRTIM_MDIER_MCMP1IE /!< Master compare 1 interrupt enable /
mbed_official	237:f3da66175598	2523	#define HRTIM_MASTER_IT_MCMP2 HRTIM_MDIER_MCMP2IE /!< Master compare 2 interrupt enable /
mbed_official	237:f3da66175598	2524	#define HRTIM_MASTER_IT_MCMP3 HRTIM_MDIER_MCMP3IE /!< Master compare 3 interrupt enable /
mbed_official	237:f3da66175598	2525	#define HRTIM_MASTER_IT_MCMP4 HRTIM_MDIER_MCMP4IE /!< Master compare 4 interrupt enable /
mbed_official	237:f3da66175598	2526	#define HRTIM_MASTER_IT_MREP HRTIM_MDIER_MREPIE /!< Master Repetition interrupt enable /
mbed_official	237:f3da66175598	2527	#define HRTIM_MASTER_IT_SYNC HRTIM_MDIER_SYNCIE /!< Synchronization input interrupt enable /
mbed_official	237:f3da66175598	2528	#define HRTIM_MASTER_IT_MUPD HRTIM_MDIER_MUPDIE /!< Master update interrupt enable /
mbed_official	237:f3da66175598	2529
mbed_official	237:f3da66175598	2530	#define IS_HRTIM_MASTER_IT(MASTER_IT) (((MASTER_IT) & 0xFFFFFF80) == 0x00000000)
mbed_official	237:f3da66175598	2531
mbed_official	237:f3da66175598	2532	/**
mbed_official	237:f3da66175598	2533	* @}
mbed_official	237:f3da66175598	2534	*/
mbed_official	237:f3da66175598	2535
mbed_official	237:f3da66175598	2536	/** @defgroup HRTIM_Timing_Unit_Interrupt_Enable
mbed_official	237:f3da66175598	2537	* @{
mbed_official	237:f3da66175598	2538	*/
mbed_official	237:f3da66175598	2539	#define HRTIM_TIM_IT_NONE (uint32_t)0x00000000 /!< No interrupt enabled /
mbed_official	237:f3da66175598	2540	#define HRTIM_TIM_IT_CMP1 HRTIM_TIMDIER_CMP1IE /!< Timer compare 1 interrupt enable /
mbed_official	237:f3da66175598	2541	#define HRTIM_TIM_IT_CMP2 HRTIM_TIMDIER_CMP2IE /!< Timer compare 2 interrupt enable /
mbed_official	237:f3da66175598	2542	#define HRTIM_TIM_IT_CMP3 HRTIM_TIMDIER_CMP3IE /!< Timer compare 3 interrupt enable /
mbed_official	237:f3da66175598	2543	#define HRTIM_TIM_IT_CMP4 HRTIM_TIMDIER_CMP4IE /!< Timer compare 4 interrupt enable /
mbed_official	237:f3da66175598	2544	#define HRTIM_TIM_IT_REP HRTIM_TIMDIER_REPIE /!< Timer repetition interrupt enable /
mbed_official	237:f3da66175598	2545	#define HRTIM_TIM_IT_UPD HRTIM_TIMDIER_UPDIE /!< Timer update interrupt enable /
mbed_official	237:f3da66175598	2546	#define HRTIM_TIM_IT_CPT1 HRTIM_TIMDIER_CPT1IE /!< Timer capture 1 interrupt enable /
mbed_official	237:f3da66175598	2547	#define HRTIM_TIM_IT_CPT2 HRTIM_TIMDIER_CPT2IE /!< Timer capture 2 interrupt enable /
mbed_official	237:f3da66175598	2548	#define HRTIM_TIM_IT_SET1 HRTIM_TIMDIER_SET1IE /!< Timer output 1 set interrupt enable /
mbed_official	237:f3da66175598	2549	#define HRTIM_TIM_IT_RST1 HRTIM_TIMDIER_RST1IE /!< Timer output 1 reset interrupt enable /
mbed_official	237:f3da66175598	2550	#define HRTIM_TIM_IT_SET2 HRTIM_TIMDIER_SET2IE /!< Timer output 2 set interrupt enable /
mbed_official	237:f3da66175598	2551	#define HRTIM_TIM_IT_RST2 HRTIM_TIMDIER_RST2IE /!< Timer output 2 reset interrupt enable /
mbed_official	237:f3da66175598	2552	#define HRTIM_TIM_IT_RST HRTIM_TIMDIER_RSTIE /!< Timer reset interrupt enable /
mbed_official	237:f3da66175598	2553	#define HRTIM_TIM_IT_DLYPRT HRTIM_TIMDIER_DLYPRTIE /!< Timer delay protection interrupt enable /
mbed_official	237:f3da66175598	2554
mbed_official	237:f3da66175598	2555	#define IS_HRTIM_TIM_IT(IS_HRTIM_TIM_IT) (((IS_HRTIM_TIM_IT) & 0xFFFF8020) == 0x00000000)
mbed_official	237:f3da66175598	2556
mbed_official	237:f3da66175598	2557	/**
mbed_official	237:f3da66175598	2558	* @}
mbed_official	237:f3da66175598	2559	*/
mbed_official	237:f3da66175598	2560
mbed_official	237:f3da66175598	2561	/** @defgroup HRTIM_Common_Interrupt_Flag
mbed_official	237:f3da66175598	2562	* @{
mbed_official	237:f3da66175598	2563	*/
mbed_official	237:f3da66175598	2564	#define HRTIM_FLAG_FLT1 HRTIM_ISR_FLT1 /!< Fault 1 interrupt flag /
mbed_official	237:f3da66175598	2565	#define HRTIM_FLAG_FLT2 HRTIM_ISR_FLT2 /!< Fault 2 interrupt flag /
mbed_official	237:f3da66175598	2566	#define HRTIM_FLAG_FLT3 HRTIM_ISR_FLT3 /!< Fault 3 interrupt flag /
mbed_official	237:f3da66175598	2567	#define HRTIM_FLAG_FLT4 HRTIM_ISR_FLT4 /!< Fault 4 interrupt flag /
mbed_official	237:f3da66175598	2568	#define HRTIM_FLAG_FLT5 HRTIM_ISR_FLT5 /!< Fault 5 interrupt flag /
mbed_official	237:f3da66175598	2569	#define HRTIM_FLAG_SYSFLT HRTIM_ISR_SYSFLT /!< System Fault interrupt flag /
mbed_official	237:f3da66175598	2570	#define HRTIM_FLAG_DLLRDY HRTIM_ISR_DLLRDY /!< DLL ready interrupt flag /
mbed_official	237:f3da66175598	2571	#define HRTIM_FLAG_BMPER HRTIM_ISR_BMPER /!< Burst mode period interrupt flag /
mbed_official	237:f3da66175598	2572
mbed_official	237:f3da66175598	2573	/**
mbed_official	237:f3da66175598	2574	* @}
mbed_official	237:f3da66175598	2575	*/
mbed_official	237:f3da66175598	2576
mbed_official	237:f3da66175598	2577	/** @defgroup HRTIM_Master_Interrupt_Flag
mbed_official	237:f3da66175598	2578	* @{
mbed_official	237:f3da66175598	2579	*/
mbed_official	237:f3da66175598	2580	#define HRTIM_MASTER_FLAG_MCMP1 HRTIM_MISR_MCMP1 /!< Master compare 1 interrupt flag /
mbed_official	237:f3da66175598	2581	#define HRTIM_MASTER_FLAG_MCMP2 HRTIM_MISR_MCMP2 /!< Master compare 2 interrupt flag /
mbed_official	237:f3da66175598	2582	#define HRTIM_MASTER_FLAG_MCMP3 HRTIM_MISR_MCMP3 /!< Master compare 3 interrupt flag /
mbed_official	237:f3da66175598	2583	#define HRTIM_MASTER_FLAG_MCMP4 HRTIM_MISR_MCMP4 /!< Master compare 4 interrupt flag /
mbed_official	237:f3da66175598	2584	#define HRTIM_MASTER_FLAG_MREP HRTIM_MISR_MREP /!< Master Repetition interrupt flag /
mbed_official	237:f3da66175598	2585	#define HRTIM_MASTER_FLAG_SYNC HRTIM_MISR_SYNC /!< Synchronization input interrupt flag /
mbed_official	237:f3da66175598	2586	#define HRTIM_MASTER_FLAG_MUPD HRTIM_MISR_MUPD /!< Master update interrupt flag /
mbed_official	237:f3da66175598	2587
mbed_official	237:f3da66175598	2588	/**
mbed_official	237:f3da66175598	2589	* @}
mbed_official	237:f3da66175598	2590	*/
mbed_official	237:f3da66175598	2591
mbed_official	237:f3da66175598	2592	/** @defgroup HRTIM_Timing_Unit_Interrupt_Flag
mbed_official	237:f3da66175598	2593	* @{
mbed_official	237:f3da66175598	2594	*/
mbed_official	237:f3da66175598	2595	#define HRTIM_TIM_FLAG_CMP1 HRTIM_TIMISR_CMP1 /!< Timer compare 1 interrupt flag /
mbed_official	237:f3da66175598	2596	#define HRTIM_TIM_FLAG_CMP2 HRTIM_TIMISR_CMP2 /!< Timer compare 2 interrupt flag /
mbed_official	237:f3da66175598	2597	#define HRTIM_TIM_FLAG_CMP3 HRTIM_TIMISR_CMP3 /!< Timer compare 3 interrupt flag /
mbed_official	237:f3da66175598	2598	#define HRTIM_TIM_FLAG_CMP4 HRTIM_TIMISR_CMP4 /!< Timer compare 4 interrupt flag /
mbed_official	237:f3da66175598	2599	#define HRTIM_TIM_FLAG_REP HRTIM_TIMISR_REP /!< Timer repetition interrupt flag /
mbed_official	237:f3da66175598	2600	#define HRTIM_TIM_FLAG_UPD HRTIM_TIMISR_UPD /!< Timer update interrupt flag /
mbed_official	237:f3da66175598	2601	#define HRTIM_TIM_FLAG_CPT1 HRTIM_TIMISR_CPT1 /!< Timer capture 1 interrupt flag /
mbed_official	237:f3da66175598	2602	#define HRTIM_TIM_FLAG_CPT2 HRTIM_TIMISR_CPT2 /!< Timer capture 2 interrupt flag /
mbed_official	237:f3da66175598	2603	#define HRTIM_TIM_FLAG_SET1 HRTIM_TIMISR_SET1 /!< Timer output 1 set interrupt flag /
mbed_official	237:f3da66175598	2604	#define HRTIM_TIM_FLAG_RST1 HRTIM_TIMISR_RST1 /!< Timer output 1 reset interrupt flag /
mbed_official	237:f3da66175598	2605	#define HRTIM_TIM_FLAG_SET2 HRTIM_TIMISR_SET2 /!< Timer output 2 set interrupt flag /
mbed_official	237:f3da66175598	2606	#define HRTIM_TIM_FLAG_RST2 HRTIM_TIMISR_RST2 /!< Timer output 2 reset interrupt flag /
mbed_official	237:f3da66175598	2607	#define HRTIM_TIM_FLAG_RST HRTIM_TIMISR_RST /!< Timer reset interrupt flag /
mbed_official	237:f3da66175598	2608	#define HRTIM_TIM_FLAG_DLYPRT HRTIM_TIMISR_DLYPRT /!< Timer delay protection interrupt flag /
mbed_official	237:f3da66175598	2609
mbed_official	237:f3da66175598	2610	/**
mbed_official	237:f3da66175598	2611	* @}
mbed_official	237:f3da66175598	2612	*/
mbed_official	237:f3da66175598	2613
mbed_official	237:f3da66175598	2614	/** @defgroup HRTIM_Master_DMA_Request_Enable
mbed_official	237:f3da66175598	2615	* @{
mbed_official	237:f3da66175598	2616	*/
mbed_official	237:f3da66175598	2617	#define HRTIM_MASTER_DMA_NONE (uint32_t)0x00000000 /!< No DMA request enable /
mbed_official	237:f3da66175598	2618	#define HRTIM_MASTER_DMA_MCMP1 HRTIM_MDIER_MCMP1DE /!< Master compare 1 DMA request enable /
mbed_official	237:f3da66175598	2619	#define HRTIM_MASTER_DMA_MCMP2 HRTIM_MDIER_MCMP2DE /!< Master compare 2 DMA request enable /
mbed_official	237:f3da66175598	2620	#define HRTIM_MASTER_DMA_MCMP3 HRTIM_MDIER_MCMP3DE /!< Master compare 3 DMA request enable /
mbed_official	237:f3da66175598	2621	#define HRTIM_MASTER_DMA_MCMP4 HRTIM_MDIER_MCMP4DE /!< Master compare 4 DMA request enable /
mbed_official	237:f3da66175598	2622	#define HRTIM_MASTER_DMA_MREP HRTIM_MDIER_MREPDE /!< Master Repetition DMA request enable /
mbed_official	237:f3da66175598	2623	#define HRTIM_MASTER_DMA_SYNC HRTIM_MDIER_SYNCDE /!< Synchronization input DMA request enable /
mbed_official	237:f3da66175598	2624	#define HRTIM_MASTER_DMA_MUPD HRTIM_MDIER_MUPDDE /!< Master update DMA request enable /
mbed_official	237:f3da66175598	2625
mbed_official	237:f3da66175598	2626	#define IS_HRTIM_MASTER_DMA(MASTER_DMA) (((MASTER_DMA) & 0xFF80FFFF) == 0x00000000)
mbed_official	237:f3da66175598	2627	/**
mbed_official	237:f3da66175598	2628	* @}
mbed_official	237:f3da66175598	2629	*/
mbed_official	237:f3da66175598	2630
mbed_official	237:f3da66175598	2631	/** @defgroup HRTIM_Timing_Unit_DMA_Request_Enable
mbed_official	237:f3da66175598	2632	* @{
mbed_official	237:f3da66175598	2633	*/
mbed_official	237:f3da66175598	2634	#define HRTIM_TIM_DMA_NONE (uint32_t)0x00000000 /!< No DMA request enable /
mbed_official	237:f3da66175598	2635	#define HRTIM_TIM_DMA_CMP1 HRTIM_TIMDIER_CMP1DE /!< Timer compare 1 DMA request enable /
mbed_official	237:f3da66175598	2636	#define HRTIM_TIM_DMA_CMP2 HRTIM_TIMDIER_CMP2DE /!< Timer compare 2 DMA request enable /
mbed_official	237:f3da66175598	2637	#define HRTIM_TIM_DMA_CMP3 HRTIM_TIMDIER_CMP3DE /!< Timer compare 3 DMA request enable /
mbed_official	237:f3da66175598	2638	#define HRTIM_TIM_DMA_CMP4 HRTIM_TIMDIER_CMP4DE /!< Timer compare 4 DMA request enable /
mbed_official	237:f3da66175598	2639	#define HRTIM_TIM_DMA_REP HRTIM_TIMDIER_REPDE /!< Timer repetition DMA request enable /
mbed_official	237:f3da66175598	2640	#define HRTIM_TIM_DMA_UPD HRTIM_TIMDIER_UPDDE /!< Timer update DMA request enable /
mbed_official	237:f3da66175598	2641	#define HRTIM_TIM_DMA_CPT1 HRTIM_TIMDIER_CPT1DE /!< Timer capture 1 DMA request enable /
mbed_official	237:f3da66175598	2642	#define HRTIM_TIM_DMA_CPT2 HRTIM_TIMDIER_CPT2DE /!< Timer capture 2 DMA request enable /
mbed_official	237:f3da66175598	2643	#define HRTIM_TIM_DMA_SET1 HRTIM_TIMDIER_SET1DE /!< Timer output 1 set DMA request enable /
mbed_official	237:f3da66175598	2644	#define HRTIM_TIM_DMA_RST1 HRTIM_TIMDIER_RST1DE /!< Timer output 1 reset DMA request enable /
mbed_official	237:f3da66175598	2645	#define HRTIM_TIM_DMA_SET2 HRTIM_TIMDIER_SET2DE /!< Timer output 2 set DMA request enable /
mbed_official	237:f3da66175598	2646	#define HRTIM_TIM_DMA_RST2 HRTIM_TIMDIER_RST2DE /!< Timer output 2 reset DMA request enable /
mbed_official	237:f3da66175598	2647	#define HRTIM_TIM_DMA_RST HRTIM_TIMDIER_RSTDE /!< Timer reset DMA request enable /
mbed_official	237:f3da66175598	2648	#define HRTIM_TIM_DMA_DLYPRT HRTIM_TIMDIER_DLYPRTDE /!< Timer delay protection DMA request enable /
mbed_official	237:f3da66175598	2649
mbed_official	237:f3da66175598	2650	#define IS_HRTIM_TIM_DMA(TIM_DMA) (((TIM_DMA) & 0x8020FFFF) == 0x00000000)
mbed_official	237:f3da66175598	2651
mbed_official	237:f3da66175598	2652	/**
mbed_official	237:f3da66175598	2653	* @}
mbed_official	237:f3da66175598	2654	*/
mbed_official	237:f3da66175598	2655
mbed_official	237:f3da66175598	2656	/** @defgroup HRTIM_Instance_definition
mbed_official	237:f3da66175598	2657	* @{
mbed_official	237:f3da66175598	2658	*/
mbed_official	237:f3da66175598	2659	#define IS_HRTIM_INSTANCE(INSTANCE) (INSTANCE) == HRTIM1)
mbed_official	237:f3da66175598	2660	/**
mbed_official	237:f3da66175598	2661	* @}
mbed_official	237:f3da66175598	2662	*/
mbed_official	237:f3da66175598	2663
mbed_official	237:f3da66175598	2664	/**
mbed_official	237:f3da66175598	2665	* @}
mbed_official	237:f3da66175598	2666	*/
mbed_official	237:f3da66175598	2667
mbed_official	237:f3da66175598	2668	/* Exported macros -----------------------------------------------------------*/
mbed_official	237:f3da66175598	2669
mbed_official	237:f3da66175598	2670	/** @brief Reset HRTIM handle state
mbed_official	237:f3da66175598	2671	* @param __HANDLE__: HRTIM handle.
mbed_official	237:f3da66175598	2672	* @retval None
mbed_official	237:f3da66175598	2673	*/
mbed_official	237:f3da66175598	2674	#define __HAL_HRTIM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_HRTIM_STATE_RESET)
mbed_official	237:f3da66175598	2675
mbed_official	237:f3da66175598	2676	/** @brief Enables or disables the timer counter(s)
mbed_official	237:f3da66175598	2677	* @param __HANDLE__: specifies the HRTIM Handle.
mbed_official	237:f3da66175598	2678	* @param __TIMERS__: timersto enable/disable
mbed_official	237:f3da66175598	2679	* This parameter can be any combinations of the following values:
mbed_official	237:f3da66175598	2680	* @arg HRTIM_TIMERID_MASTER: Master timer identifier
mbed_official	237:f3da66175598	2681	* @arg HRTIM_TIMERID_TIMER_A: Timer A identifier
mbed_official	237:f3da66175598	2682	* @arg HRTIM_TIMERID_TIMER_B: Timer B identifier
mbed_official	237:f3da66175598	2683	* @arg HRTIM_TIMERID_TIMER_C: Timer C identifier
mbed_official	237:f3da66175598	2684	* @arg HRTIM_TIMERID_TIMER_D: Timer D identifier
mbed_official	237:f3da66175598	2685	* @arg HRTIM_TIMERID_TIMER_E: Timer E identifier
mbed_official	237:f3da66175598	2686	* @retval None
mbed_official	237:f3da66175598	2687	*/
mbed_official	237:f3da66175598	2688	#define __HAL_HRTIM_ENABLE(__HANDLE__, __TIMERS__) ((__HANDLE__)->Instance->sMasterRegs.MCR \|= (__TIMERS__))
mbed_official	237:f3da66175598	2689
mbed_official	237:f3da66175598	2690	/* The counter of a timing unit is disabled only if all the timer outputs */
mbed_official	237:f3da66175598	2691	/* are disabled and no capture is configured */
mbed_official	237:f3da66175598	2692	#define HRTIM_TAOEN_MASK (HRTIM_OENR_TA2OEN \| HRTIM_OENR_TA1OEN)
mbed_official	237:f3da66175598	2693	#define HRTIM_TBOEN_MASK (HRTIM_OENR_TB2OEN \| HRTIM_OENR_TB1OEN)
mbed_official	237:f3da66175598	2694	#define HRTIM_TCOEN_MASK (HRTIM_OENR_TC2OEN \| HRTIM_OENR_TC1OEN)
mbed_official	237:f3da66175598	2695	#define HRTIM_TDOEN_MASK (HRTIM_OENR_TD2OEN \| HRTIM_OENR_TD1OEN)
mbed_official	237:f3da66175598	2696	#define HRTIM_TEOEN_MASK (HRTIM_OENR_TE2OEN \| HRTIM_OENR_TE1OEN)
mbed_official	237:f3da66175598	2697	#define __HAL_HRTIM_DISABLE(__HANDLE__, __TIMERS__)\
mbed_official	237:f3da66175598	2698	do {\
mbed_official	237:f3da66175598	2699	if (((__TIMERS__) & HRTIM_TIMERID_MASTER) == HRTIM_TIMERID_MASTER)\
mbed_official	237:f3da66175598	2700	{\
mbed_official	237:f3da66175598	2701	((__HANDLE__)->Instance->sMasterRegs.MCR &= ~HRTIM_TIMERID_MASTER);\
mbed_official	237:f3da66175598	2702	}\
mbed_official	237:f3da66175598	2703	if (((__TIMERS__) & HRTIM_TIMERID_TIMER_A) == HRTIM_TIMERID_TIMER_A)\
mbed_official	237:f3da66175598	2704	{\
mbed_official	237:f3da66175598	2705	if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TAOEN_MASK) == RESET)\
mbed_official	237:f3da66175598	2706	{\
mbed_official	237:f3da66175598	2707	((__HANDLE__)->Instance->sMasterRegs.MCR &= ~HRTIM_TIMERID_TIMER_A);\
mbed_official	237:f3da66175598	2708	}\
mbed_official	237:f3da66175598	2709	}\
mbed_official	237:f3da66175598	2710	if (((__TIMERS__) & HRTIM_TIMERID_TIMER_B) == HRTIM_TIMERID_TIMER_B)\
mbed_official	237:f3da66175598	2711	{\
mbed_official	237:f3da66175598	2712	if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TBOEN_MASK) == RESET)\
mbed_official	237:f3da66175598	2713	{\
mbed_official	237:f3da66175598	2714	((__HANDLE__)->Instance->sMasterRegs.MCR &= ~HRTIM_TIMERID_TIMER_B);\
mbed_official	237:f3da66175598	2715	}\
mbed_official	237:f3da66175598	2716	}\
mbed_official	237:f3da66175598	2717	if (((__TIMERS__) & HRTIM_TIMERID_TIMER_C) == HRTIM_TIMERID_TIMER_C)\
mbed_official	237:f3da66175598	2718	{\
mbed_official	237:f3da66175598	2719	if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TCOEN_MASK) == RESET)\
mbed_official	237:f3da66175598	2720	{\
mbed_official	237:f3da66175598	2721	((__HANDLE__)->Instance->sMasterRegs.MCR &= ~HRTIM_TIMERID_TIMER_C);\
mbed_official	237:f3da66175598	2722	}\
mbed_official	237:f3da66175598	2723	}\
mbed_official	237:f3da66175598	2724	if (((__TIMERS__) & HRTIM_TIMERID_TIMER_D) == HRTIM_TIMERID_TIMER_D)\
mbed_official	237:f3da66175598	2725	{\
mbed_official	237:f3da66175598	2726	if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TDOEN_MASK) == RESET)\
mbed_official	237:f3da66175598	2727	{\
mbed_official	237:f3da66175598	2728	((__HANDLE__)->Instance->sMasterRegs.MCR &= ~HRTIM_TIMERID_TIMER_D);\
mbed_official	237:f3da66175598	2729	}\
mbed_official	237:f3da66175598	2730	}\
mbed_official	237:f3da66175598	2731	if (((__TIMERS__) & HRTIM_TIMERID_TIMER_E) == HRTIM_TIMERID_TIMER_E)\
mbed_official	237:f3da66175598	2732	{\
mbed_official	237:f3da66175598	2733	if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TEOEN_MASK) == RESET)\
mbed_official	237:f3da66175598	2734	{\
mbed_official	237:f3da66175598	2735	((__HANDLE__)->Instance->sMasterRegs.MCR &= ~HRTIM_TIMERID_TIMER_E);\
mbed_official	237:f3da66175598	2736	}\
mbed_official	237:f3da66175598	2737	}\
mbed_official	237:f3da66175598	2738	} while(0)
mbed_official	237:f3da66175598	2739
mbed_official	237:f3da66175598	2740	/** @brief Enables or disables the specified HRTIM common interrupts.
mbed_official	237:f3da66175598	2741	* @param __HANDLE__: specifies the HRTIM Handle.
mbed_official	237:f3da66175598	2742	* @param __INTERRUPT__: specifies the interrupt source to enable or disable.
mbed_official	237:f3da66175598	2743	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	2744	* @arg HRTIM_IT_FLT1: Fault 1 interrupt enable
mbed_official	237:f3da66175598	2745	* @arg HRTIM_IT_FLT2: Fault 2 interrupt enable
mbed_official	237:f3da66175598	2746	* @arg HRTIM_IT_FLT3: Fault 3 interrupt enable
mbed_official	237:f3da66175598	2747	* @arg HRTIM_IT_FLT4: Fault 4 interrupt enable
mbed_official	237:f3da66175598	2748	* @arg HRTIM_IT_FLT5: Fault 5 interrupt enable
mbed_official	237:f3da66175598	2749	* @arg HRTIM_IT_SYSFLT: System Fault interrupt enable
mbed_official	237:f3da66175598	2750	* @arg HRTIM_IT_DLLRDY: DLL ready interrupt enable
mbed_official	237:f3da66175598	2751	* @arg HRTIM_IT_BMPER: Burst mode period interrupt enable
mbed_official	237:f3da66175598	2752	* @retval None
mbed_official	237:f3da66175598	2753	*/
mbed_official	237:f3da66175598	2754	#define __HAL_HRTIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->sCommonRegs.IER \|= (__INTERRUPT__))
mbed_official	237:f3da66175598	2755	#define __HAL_HRTIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->sCommonRegs.IER &= ~(__INTERRUPT__))
mbed_official	237:f3da66175598	2756
mbed_official	237:f3da66175598	2757	/** @brief Enables or disables the specified HRTIM Master timer interrupts.
mbed_official	237:f3da66175598	2758	* @param __HANDLE__: specifies the HRTIM Handle.
mbed_official	237:f3da66175598	2759	* @param __INTERRUPT__: specifies the interrupt source to enable or disable.
mbed_official	237:f3da66175598	2760	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	2761	* @arg HRTIM_MASTER_IT_MCMP1: Master compare 1 interrupt enable
mbed_official	237:f3da66175598	2762	* @arg HRTIM_MASTER_IT_MCMP2: Master compare 2 interrupt enable
mbed_official	237:f3da66175598	2763	* @arg HRTIM_MASTER_IT_MCMP3: Master compare 3 interrupt enable
mbed_official	237:f3da66175598	2764	* @arg HRTIM_MASTER_IT_MCMP4: Master compare 4 interrupt enable
mbed_official	237:f3da66175598	2765	* @arg HRTIM_MASTER_IT_MREP: Master Repetition interrupt enable
mbed_official	237:f3da66175598	2766	* @arg HRTIM_MASTER_IT_SYNC: Synchronization input interrupt enable
mbed_official	237:f3da66175598	2767	* @arg HRTIM_MASTER_IT_MUPD: Master update interrupt enable
mbed_official	237:f3da66175598	2768	* @retval None
mbed_official	237:f3da66175598	2769	*/
mbed_official	237:f3da66175598	2770	#define __HAL_HRTIM_MASTER_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->sMasterRegs.MDIER \|= (__INTERRUPT__))
mbed_official	237:f3da66175598	2771	#define __HAL_HRTIM_MASTER_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->sMasterRegs.MDIER &= ~(__INTERRUPT__))
mbed_official	237:f3da66175598	2772
mbed_official	237:f3da66175598	2773	/** @brief Enables or disables the specified HRTIM Timerx interrupts.
mbed_official	237:f3da66175598	2774	* @param __HANDLE__: specifies the HRTIM Handle.
mbed_official	237:f3da66175598	2775	* @param __TIMER__: specified the timing unit (Timer A to E)
mbed_official	237:f3da66175598	2776	* @param __INTERRUPT__: specifies the interrupt source to enable or disable.
mbed_official	237:f3da66175598	2777	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	2778	* @arg HRTIM_TIM_IT_CMP1: Timer compare 1 interrupt enable
mbed_official	237:f3da66175598	2779	* @arg HRTIM_TIM_IT_CMP2: Timer compare 2 interrupt enable
mbed_official	237:f3da66175598	2780	* @arg HRTIM_TIM_IT_CMP3: Timer compare 3 interrupt enable
mbed_official	237:f3da66175598	2781	* @arg HRTIM_TIM_IT_CMP4: Timer compare 4 interrupt enable
mbed_official	237:f3da66175598	2782	* @arg HRTIM_TIM_IT_REP: Timer repetition interrupt enable
mbed_official	237:f3da66175598	2783	* @arg HRTIM_TIM_IT_UPD: Timer update interrupt enable
mbed_official	237:f3da66175598	2784	* @arg HRTIM_TIM_IT_CPT1: Timer capture 1 interrupt enable
mbed_official	237:f3da66175598	2785	* @arg HRTIM_TIM_IT_CPT2: Timer capture 2 interrupt enable
mbed_official	237:f3da66175598	2786	* @arg HRTIM_TIM_IT_SET1: Timer output 1 set interrupt enable
mbed_official	237:f3da66175598	2787	* @arg HRTIM_TIM_IT_RST1: Timer output 1 reset interrupt enable
mbed_official	237:f3da66175598	2788	* @arg HRTIM_TIM_IT_SET2: Timer output 2 set interrupt enable
mbed_official	237:f3da66175598	2789	* @arg HRTIM_TIM_IT_RST2: Timer output 2 reset interrupt enable
mbed_official	237:f3da66175598	2790	* @arg HRTIM_TIM_IT_RST: Timer reset interrupt enable
mbed_official	237:f3da66175598	2791	* @arg HRTIM_TIM_IT_DLYPRT: Timer delay protection interrupt enable
mbed_official	237:f3da66175598	2792	* @retval None
mbed_official	237:f3da66175598	2793	*/
mbed_official	237:f3da66175598	2794	#define __HAL_HRTIM_TIMER_ENABLE_IT(__HANDLE__, __TIMER__, __INTERRUPT__) ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].TIMxDIER \|= (__INTERRUPT__))
mbed_official	237:f3da66175598	2795	#define __HAL_HRTIM_TIMER_DISABLE_IT(__HANDLE__, __TIMER__, __INTERRUPT__) ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].TIMxDIER &= ~(__INTERRUPT__))
mbed_official	237:f3da66175598	2796
mbed_official	237:f3da66175598	2797	/** @brief Checks if the specified HRTIM common interrupt source is enabled or disabled.
mbed_official	237:f3da66175598	2798	* @param __HANDLE__: specifies the HRTIM Handle.
mbed_official	237:f3da66175598	2799	* @param __INTERRUPT__: specifies the interrupt source to check.
mbed_official	237:f3da66175598	2800	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	2801	* @arg HRTIM_IT_FLT1: Fault 1 interrupt enable
mbed_official	237:f3da66175598	2802	* @arg HRTIM_IT_FLT2: Fault 2 interrupt enable
mbed_official	237:f3da66175598	2803	* @arg HRTIM_IT_FLT3: Fault 3 enable
mbed_official	237:f3da66175598	2804	* @arg HRTIM_IT_FLT4: Fault 4 enable
mbed_official	237:f3da66175598	2805	* @arg HRTIM_IT_FLT5: Fault 5 enable
mbed_official	237:f3da66175598	2806	* @arg HRTIM_IT_SYSFLT: System Fault interrupt enable
mbed_official	237:f3da66175598	2807	* @arg HRTIM_IT_DLLRDY: DLL ready interrupt enable
mbed_official	237:f3da66175598	2808	* @arg HRTIM_IT_BMPER: Burst mode period interrupt enable
mbed_official	237:f3da66175598	2809	* @retval The new state of __INTERRUPT__ (TRUE or FALSE).
mbed_official	237:f3da66175598	2810	*/
mbed_official	237:f3da66175598	2811	#define __HAL_HRTIM_GET_ITSTATUS(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->sCommonRegs.IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
mbed_official	237:f3da66175598	2812
mbed_official	237:f3da66175598	2813	/** @brief Checks if the specified HRTIM Master interrupt source is enabled or disabled.
mbed_official	237:f3da66175598	2814	* @param __HANDLE__: specifies the HRTIM Handle.
mbed_official	237:f3da66175598	2815	* @param __INTERRUPT__: specifies the interrupt source to check.
mbed_official	237:f3da66175598	2816	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	2817	* @arg HRTIM_MASTER_IT_MCMP1: Master compare 1 interrupt enable
mbed_official	237:f3da66175598	2818	* @arg HRTIM_MASTER_IT_MCMP2: Master compare 2 interrupt enable
mbed_official	237:f3da66175598	2819	* @arg HRTIM_MASTER_IT_MCMP3: Master compare 3 interrupt enable
mbed_official	237:f3da66175598	2820	* @arg HRTIM_MASTER_IT_MCMP4: Master compare 4 interrupt enable
mbed_official	237:f3da66175598	2821	* @arg HRTIM_MASTER_IT_MREP: Master Repetition interrupt enable
mbed_official	237:f3da66175598	2822	* @arg HRTIM_MASTER_IT_SYNC: Synchronization input interrupt enable
mbed_official	237:f3da66175598	2823	* @arg HRTIM_MASTER_IT_MUPD: Master update interrupt enable
mbed_official	237:f3da66175598	2824	* @retval The new state of __INTERRUPT__ (TRUE or FALSE).
mbed_official	237:f3da66175598	2825	*/
mbed_official	237:f3da66175598	2826	#define __HAL_HRTIM_MASTER_GET_ITSTATUS(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->sMasterRegs.MDIER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
mbed_official	237:f3da66175598	2827
mbed_official	237:f3da66175598	2828	/** @brief Checks if the specified HRTIM Timerx interrupt source is enabled or disabled.
mbed_official	237:f3da66175598	2829	* @param __HANDLE__: specifies the HRTIM Handle.
mbed_official	237:f3da66175598	2830	* @param __TIMER__: specified the timing unit (Timer A to E)
mbed_official	237:f3da66175598	2831	* @param __INTERRUPT__: specifies the interrupt source to check.
mbed_official	237:f3da66175598	2832	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	2833	* @arg HRTIM_MASTER_IT_MCMP1: Master compare 1 interrupt enable
mbed_official	237:f3da66175598	2834	* @arg HRTIM_MASTER_IT_MCMP2: Master compare 2 interrupt enable
mbed_official	237:f3da66175598	2835	* @arg HRTIM_MASTER_IT_MCMP3: Master compare 3 interrupt enable
mbed_official	237:f3da66175598	2836	* @arg HRTIM_MASTER_IT_MCMP4: Master compare 4 interrupt enable
mbed_official	237:f3da66175598	2837	* @arg HRTIM_MASTER_IT_MREP: Master Repetition interrupt enable
mbed_official	237:f3da66175598	2838	* @arg HRTIM_MASTER_IT_SYNC: Synchronization input interrupt enable
mbed_official	237:f3da66175598	2839	* @arg HRTIM_MASTER_IT_MUPD: Master update interrupt enable
mbed_official	237:f3da66175598	2840	* @arg HRTIM_TIM_IT_CMP1: Timer compare 1 interrupt enable
mbed_official	237:f3da66175598	2841	* @arg HRTIM_TIM_IT_CMP2: Timer compare 2 interrupt enable
mbed_official	237:f3da66175598	2842	* @arg HRTIM_TIM_IT_CMP3: Timer compare 3 interrupt enable
mbed_official	237:f3da66175598	2843	* @arg HRTIM_TIM_IT_CMP4: Timer compare 4 interrupt enable
mbed_official	237:f3da66175598	2844	* @arg HRTIM_TIM_IT_REP: Timer repetition interrupt enable
mbed_official	237:f3da66175598	2845	* @arg HRTIM_TIM_IT_UPD: Timer update interrupt enable
mbed_official	237:f3da66175598	2846	* @arg HRTIM_TIM_IT_CPT1: Timer capture 1 interrupt enable
mbed_official	237:f3da66175598	2847	* @arg HRTIM_TIM_IT_CPT2: Timer capture 2 interrupt enable
mbed_official	237:f3da66175598	2848	* @arg HRTIM_TIM_IT_SET1: Timer output 1 set interrupt enable
mbed_official	237:f3da66175598	2849	* @arg HRTIM_TIM_IT_RST1: Timer output 1 reset interrupt enable
mbed_official	237:f3da66175598	2850	* @arg HRTIM_TIM_IT_SET2: Timer output 2 set interrupt enable
mbed_official	237:f3da66175598	2851	* @arg HRTIM_TIM_IT_RST2: Timer output 2 reset interrupt enable
mbed_official	237:f3da66175598	2852	* @arg HRTIM_TIM_IT_RST: Timer reset interrupt enable
mbed_official	237:f3da66175598	2853	* @arg HRTIM_TIM_IT_DLYPRT: Timer delay protection interrupt enable
mbed_official	237:f3da66175598	2854	* @retval The new state of __INTERRUPT__ (TRUE or FALSE).
mbed_official	237:f3da66175598	2855	*/
mbed_official	237:f3da66175598	2856	#define __HAL_HRTIM_TIMER_GET_ITSTATUS(__HANDLE__, __TIMER__, __INTERRUPT__) ((((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].TIMxDIER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
mbed_official	237:f3da66175598	2857
mbed_official	237:f3da66175598	2858	/** @brief Clears the specified HRTIM common pending flag.
mbed_official	237:f3da66175598	2859	* @param __HANDLE__: specifies the HRTIM Handle.
mbed_official	237:f3da66175598	2860	* @param __INTERRUPT__: specifies the interrupt pending bit to clear.
mbed_official	237:f3da66175598	2861	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	2862	* @arg HRTIM_IT_FLT1: Fault 1 interrupt clear flag
mbed_official	237:f3da66175598	2863	* @arg HRTIM_IT_FLT2: Fault 2 interrupt clear flag
mbed_official	237:f3da66175598	2864	* @arg HRTIM_IT_FLT3: Fault 3 clear flag
mbed_official	237:f3da66175598	2865	* @arg HRTIM_IT_FLT4: Fault 4 clear flag
mbed_official	237:f3da66175598	2866	* @arg HRTIM_IT_FLT5: Fault 5 clear flag
mbed_official	237:f3da66175598	2867	* @arg HRTIM_IT_SYSFLT: System Fault interrupt clear flag
mbed_official	237:f3da66175598	2868	* @arg HRTIM_IT_DLLRDY: DLL ready interrupt clear flag
mbed_official	237:f3da66175598	2869	* @arg HRTIM_IT_BMPER: Burst mode period interrupt clear flag
mbed_official	237:f3da66175598	2870	* @retval None
mbed_official	237:f3da66175598	2871	*/
mbed_official	237:f3da66175598	2872	#define __HAL_HRTIM_CLEAR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->sCommonRegs.ICR = (__INTERRUPT__))
mbed_official	237:f3da66175598	2873
mbed_official	237:f3da66175598	2874	/** @brief Clears the specified HRTIM Master pending flag.
mbed_official	237:f3da66175598	2875	* @param __HANDLE__: specifies the HRTIM Handle.
mbed_official	237:f3da66175598	2876	* @param __INTERRUPT__: specifies the interrupt pending bit to clear.
mbed_official	237:f3da66175598	2877	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	2878	* @arg HRTIM_MASTER_IT_MCMP1: Master compare 1 interrupt clear flag
mbed_official	237:f3da66175598	2879	* @arg HRTIM_MASTER_IT_MCMP2: Master compare 2 interrupt clear flag
mbed_official	237:f3da66175598	2880	* @arg HRTIM_MASTER_IT_MCMP3: Master compare 3 interrupt clear flag
mbed_official	237:f3da66175598	2881	* @arg HRTIM_MASTER_IT_MCMP4: Master compare 4 interrupt clear flag
mbed_official	237:f3da66175598	2882	* @arg HRTIM_MASTER_IT_MREP: Master Repetition interrupt clear flag
mbed_official	237:f3da66175598	2883	* @arg HRTIM_MASTER_IT_SYNC: Synchronization input interrupt clear flag
mbed_official	237:f3da66175598	2884	* @arg HRTIM_MASTER_IT_MUPD: Master update interrupt clear flag
mbed_official	237:f3da66175598	2885	* @retval None
mbed_official	237:f3da66175598	2886	*/
mbed_official	237:f3da66175598	2887	#define __HAL_HRTIM_MASTER_CLEAR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->sMasterRegs.MICR = (__INTERRUPT__))
mbed_official	237:f3da66175598	2888
mbed_official	237:f3da66175598	2889	/** @brief Clears the specified HRTIM Timerx pending flag.
mbed_official	237:f3da66175598	2890	* @param __HANDLE__: specifies the HRTIM Handle.
mbed_official	237:f3da66175598	2891	* @param __TIMER__: specified the timing unit (Timer A to E)
mbed_official	237:f3da66175598	2892	* @param __INTERRUPT__: specifies the interrupt pending bit to clear.
mbed_official	237:f3da66175598	2893	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	2894	* @arg HRTIM_TIM_IT_CMP1: Timer compare 1 interrupt clear flag
mbed_official	237:f3da66175598	2895	* @arg HRTIM_TIM_IT_CMP2: Timer compare 2 interrupt clear flag
mbed_official	237:f3da66175598	2896	* @arg HRTIM_TIM_IT_CMP3: Timer compare 3 interrupt clear flag
mbed_official	237:f3da66175598	2897	* @arg HRTIM_TIM_IT_CMP4: Timer compare 4 interrupt clear flag
mbed_official	237:f3da66175598	2898	* @arg HRTIM_TIM_IT_REP: Timer repetition interrupt clear flag
mbed_official	237:f3da66175598	2899	* @arg HRTIM_TIM_IT_UPD: Timer update interrupt clear flag
mbed_official	237:f3da66175598	2900	* @arg HRTIM_TIM_IT_CPT1: Timer capture 1 interrupt clear flag
mbed_official	237:f3da66175598	2901	* @arg HRTIM_TIM_IT_CPT2: Timer capture 2 interrupt clear flag
mbed_official	237:f3da66175598	2902	* @arg HRTIM_TIM_IT_SET1: Timer output 1 set interrupt clear flag
mbed_official	237:f3da66175598	2903	* @arg HRTIM_TIM_IT_RST1: Timer output 1 reset interrupt clear flag
mbed_official	237:f3da66175598	2904	* @arg HRTIM_TIM_IT_SET2: Timer output 2 set interrupt clear flag
mbed_official	237:f3da66175598	2905	* @arg HRTIM_TIM_IT_RST2: Timer output 2 reset interrupt clear flag
mbed_official	237:f3da66175598	2906	* @arg HRTIM_TIM_IT_RST: Timer reset interrupt clear flag
mbed_official	237:f3da66175598	2907	* @arg HRTIM_TIM_IT_DLYPRT: Timer output 1 delay protection interrupt clear flag
mbed_official	237:f3da66175598	2908	* @retval None
mbed_official	237:f3da66175598	2909	*/
mbed_official	237:f3da66175598	2910	#define __HAL_HRTIM_TIMER_CLEAR_IT(__HANDLE__, __TIMER__, __INTERRUPT__) ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].TIMxICR = (__INTERRUPT__))
mbed_official	237:f3da66175598	2911
mbed_official	237:f3da66175598	2912	/* DMA HANDLING */
mbed_official	237:f3da66175598	2913	/** @brief Enables or disables the specified HRTIM common interrupts.
mbed_official	237:f3da66175598	2914	* @param __HANDLE__: specifies the HRTIM Handle.
mbed_official	237:f3da66175598	2915	* @param __INTERRUPT__: specifies the interrupt source to enable or disable.
mbed_official	237:f3da66175598	2916	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	2917	* @arg HRTIM_IT_FLT1: Fault 1 interrupt enable
mbed_official	237:f3da66175598	2918	* @arg HRTIM_IT_FLT2: Fault 2 interrupt enable
mbed_official	237:f3da66175598	2919	* @arg HRTIM_IT_FLT3: Fault 3 interrupt enable
mbed_official	237:f3da66175598	2920	* @arg HRTIM_IT_FLT4: Fault 4 interrupt enable
mbed_official	237:f3da66175598	2921	* @arg HRTIM_IT_FLT5: Fault 5 interrupt enable
mbed_official	237:f3da66175598	2922	* @arg HRTIM_IT_SYSFLT: System Fault interrupt enable
mbed_official	237:f3da66175598	2923	* @arg HRTIM_IT_DLLRDY: DLL ready interrupt enable
mbed_official	237:f3da66175598	2924	* @arg HRTIM_IT_BMPER: Burst mode period interrupt enable
mbed_official	237:f3da66175598	2925	* @retval None
mbed_official	237:f3da66175598	2926	*/
mbed_official	237:f3da66175598	2927	#define __HAL_HRTIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->sCommonRegs.IER \|= (__INTERRUPT__))
mbed_official	237:f3da66175598	2928	#define __HAL_HRTIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->sCommonRegs.IER &= ~(__INTERRUPT__))
mbed_official	237:f3da66175598	2929
mbed_official	237:f3da66175598	2930	/** @brief Enables or disables the specified HRTIM Master timer DMA requets.
mbed_official	237:f3da66175598	2931	* @param __HANDLE__: specifies the HRTIM Handle.
mbed_official	237:f3da66175598	2932	* @param __DMA__: specifies the DMA request to enable or disable.
mbed_official	237:f3da66175598	2933	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	2934	* @arg HRTIM_MASTER_DMA_MCMP1: Master compare 1 DMA resquest enable
mbed_official	237:f3da66175598	2935	* @arg HRTIM_MASTER_DMA_MCMP2: Master compare 2 DMA resquest enable
mbed_official	237:f3da66175598	2936	* @arg HRTIM_MASTER_DMA_MCMP3: Master compare 3 DMA resquest enable
mbed_official	237:f3da66175598	2937	* @arg HRTIM_MASTER_DMA_MCMP4: Master compare 4 DMA resquest enable
mbed_official	237:f3da66175598	2938	* @arg HRTIM_MASTER_DMA_MREP: Master Repetition DMA resquest enable
mbed_official	237:f3da66175598	2939	* @arg HRTIM_MASTER_DMA_SYNC: Synchronization input DMA resquest enable
mbed_official	237:f3da66175598	2940	* @arg HRTIM_MASTER_DMA_MUPD: Master update DMA resquest enable
mbed_official	237:f3da66175598	2941	* @retval None
mbed_official	237:f3da66175598	2942	*/
mbed_official	237:f3da66175598	2943	#define __HAL_HRTIM_MASTER_ENABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->sMasterRegs.MDIER \|= (__DMA__))
mbed_official	237:f3da66175598	2944	#define __HAL_HRTIM_MASTER_DISABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->sMasterRegs.MDIER &= ~(__DMA__))
mbed_official	237:f3da66175598	2945
mbed_official	237:f3da66175598	2946	/** @brief Enables or disables the specified HRTIM Timerx DMA requests.
mbed_official	237:f3da66175598	2947	* @param __HANDLE__: specifies the HRTIM Handle.
mbed_official	237:f3da66175598	2948	* @param __TIMER__: specified the timing unit (Timer A to E)
mbed_official	237:f3da66175598	2949	* @param __DMA__: specifies the DMA request to enable or disable.
mbed_official	237:f3da66175598	2950	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	2951	* @arg HRTIM_TIM_DMA_CMP1: Timer compare 1 DMA resquest enable
mbed_official	237:f3da66175598	2952	* @arg HRTIM_TIM_DMA_CMP2: Timer compare 2 DMA resquest enable
mbed_official	237:f3da66175598	2953	* @arg HRTIM_TIM_DMA_CMP3: Timer compare 3 DMA resquest enable
mbed_official	237:f3da66175598	2954	* @arg HRTIM_TIM_DMA_CMP4: Timer compare 4 DMA resquest enable
mbed_official	237:f3da66175598	2955	* @arg HRTIM_TIM_DMA_REP: Timer repetition DMA resquest enable
mbed_official	237:f3da66175598	2956	* @arg HRTIM_TIM_DMA_UPD: Timer update DMA resquest enable
mbed_official	237:f3da66175598	2957	* @arg HRTIM_TIM_DMA_CPT1: Timer capture 1 DMA resquest enable
mbed_official	237:f3da66175598	2958	* @arg HRTIM_TIM_DMA_CPT2: Timer capture 2 DMA resquest enable
mbed_official	237:f3da66175598	2959	* @arg HRTIM_TIM_DMA_SET1: Timer output 1 set DMA resquest enable
mbed_official	237:f3da66175598	2960	* @arg HRTIM_TIM_DMA_RST1: Timer output 1 reset DMA resquest enable
mbed_official	237:f3da66175598	2961	* @arg HRTIM_TIM_DMA_SET2: Timer output 2 set DMA resquest enable
mbed_official	237:f3da66175598	2962	* @arg HRTIM_TIM_DMA_RST2: Timer output 2 reset DMA resquest enable
mbed_official	237:f3da66175598	2963	* @arg HRTIM_TIM_DMA_RST: Timer reset DMA resquest enable
mbed_official	237:f3da66175598	2964	* @arg HRTIM_TIM_DMA_DLYPRT: Timer delay protection DMA resquest enable
mbed_official	237:f3da66175598	2965	* @retval None
mbed_official	237:f3da66175598	2966	*/
mbed_official	237:f3da66175598	2967	#define __HAL_HRTIM_TIMER_ENABLE_DMA(__HANDLE__, __TIMER__, __DMA__) ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].TIMxDIER \|= (__DMA__))
mbed_official	237:f3da66175598	2968	#define __HAL_HRTIM_TIMER_DISABLE_DMA(__HANDLE__, __TIMER__, __DMA__) ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].TIMxDIER &= ~(__DMA__))
mbed_official	237:f3da66175598	2969
mbed_official	237:f3da66175598	2970	#define __HAL_HRTIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->sCommonRegs.ISR & (__FLAG__)) == (__FLAG__))
mbed_official	237:f3da66175598	2971	#define __HAL_HRTIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->sCommonRegs.ICR = (__FLAG__))
mbed_official	237:f3da66175598	2972
mbed_official	237:f3da66175598	2973	#define __HAL_HRTIM_MASTER_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->sMasterRegs.MISR & (__FLAG__)) == (__FLAG__))
mbed_official	237:f3da66175598	2974	#define __HAL_HRTIM_MASTER_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->sMasterRegs.MICR = (__FLAG__))
mbed_official	237:f3da66175598	2975
mbed_official	237:f3da66175598	2976	#define __HAL_HRTIM_TIMER_GET_FLAG(__HANDLE__, __TIMER__, __FLAG__) (((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].TIMxISR & (__FLAG__)) == (__FLAG__))
mbed_official	237:f3da66175598	2977	#define __HAL_HRTIM_TIMER_CLEAR_FLAG(__HANDLE__, __TIMER__, __FLAG__) ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].TIMxICR = (__FLAG__))
mbed_official	237:f3da66175598	2978
mbed_official	237:f3da66175598	2979	/** @brief Sets the HRTIM timer Counter Register value on runtime
mbed_official	237:f3da66175598	2980	* @param __HANDLE__: HRTIM Handle.
mbed_official	237:f3da66175598	2981	* @param __TIMER__: HRTIM timer
mbed_official	237:f3da66175598	2982	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	2983	* @arg 0x5 for master timer
mbed_official	237:f3da66175598	2984	* @arg 0x0 to 0x4 for timers A to E
mbed_official	237:f3da66175598	2985	* @param __COUNTER__: specifies the Counter Register new value.
mbed_official	237:f3da66175598	2986	* @retval None
mbed_official	237:f3da66175598	2987	*/
mbed_official	237:f3da66175598	2988	#define __HAL_HRTIM_SetCounter(__HANDLE__, __TIMER__, __COUNTER__) \
mbed_official	237:f3da66175598	2989	(((__TIMER__) == HRTIM_TIMERINDEX_MASTER) ? ((__HANDLE__)->Instance->sMasterRegs.MCNTR = (__COUNTER__)) :\
mbed_official	237:f3da66175598	2990	((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].CNTxR = (__COUNTER__)))
mbed_official	237:f3da66175598	2991
mbed_official	237:f3da66175598	2992	/** @brief Gets the HRTIM timer Counter Register value on runtime
mbed_official	237:f3da66175598	2993	* @param __HANDLE__: HRTIM Handle.
mbed_official	237:f3da66175598	2994	* @param __TIMER__: HRTIM timer
mbed_official	237:f3da66175598	2995	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	2996	* @arg 0x5 for master timer
mbed_official	237:f3da66175598	2997	* @arg 0x0 to 0x4 for timers A to E
mbed_official	237:f3da66175598	2998	* @retval HRTIM timer Counter Register value
mbed_official	237:f3da66175598	2999	*/
mbed_official	237:f3da66175598	3000	#define __HAL_HRTIM_GetCounter(__HANDLE__, __TIMER__) \
mbed_official	237:f3da66175598	3001	(((__TIMER__) == HRTIM_TIMERINDEX_MASTER) ? ((__HANDLE__)->Instance->sMasterRegs.MCNTR) :\
mbed_official	237:f3da66175598	3002	((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].CNTxR))
mbed_official	237:f3da66175598	3003
mbed_official	237:f3da66175598	3004	/** @brief Sets the HRTIM timer Period value on runtime
mbed_official	237:f3da66175598	3005	* @param __HANDLE__: HRTIM Handle.
mbed_official	237:f3da66175598	3006	* @param __TIMER__: HRTIM timer
mbed_official	237:f3da66175598	3007	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	3008	* @arg 0x5 for master timer
mbed_official	237:f3da66175598	3009	* @arg 0x0 to 0x4 for timers A to E
mbed_official	237:f3da66175598	3010	* @param __PERIOD__: specifies the Period Register new value.
mbed_official	237:f3da66175598	3011	* @retval None
mbed_official	237:f3da66175598	3012	*/
mbed_official	237:f3da66175598	3013	#define __HAL_HRTIM_SetPeriod(__HANDLE__, __TIMER__, __PERIOD__) \
mbed_official	237:f3da66175598	3014	(((__TIMER__) == HRTIM_TIMERINDEX_MASTER) ? ((__HANDLE__)->Instance->sMasterRegs.MPER = (__PERIOD__)) :\
mbed_official	237:f3da66175598	3015	((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].PERxR = (__PERIOD__)))
mbed_official	237:f3da66175598	3016
mbed_official	237:f3da66175598	3017	/** @brief Gets the HRTIM timer Period Register value on runtime
mbed_official	237:f3da66175598	3018	* @param __HANDLE__: HRTIM Handle.
mbed_official	237:f3da66175598	3019	* @param __TIMER__: HRTIM timer
mbed_official	237:f3da66175598	3020	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	3021	* @arg 0x5 for master timer
mbed_official	237:f3da66175598	3022	* @arg 0x0 to 0x4 for timers A to E
mbed_official	237:f3da66175598	3023	* @retval timer Period Register
mbed_official	237:f3da66175598	3024	*/
mbed_official	237:f3da66175598	3025	#define __HAL_HRTIM_GetPeriod(__HANDLE__, __TIMER__) \
mbed_official	237:f3da66175598	3026	(((__TIMER__) == HRTIM_TIMERINDEX_MASTER) ? ((__HANDLE__)->Instance->sMasterRegs.MPER) :\
mbed_official	237:f3da66175598	3027	((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].PERxR))
mbed_official	237:f3da66175598	3028
mbed_official	237:f3da66175598	3029	/** @brief Sets the HRTIM timer clock prescaler value on runtime
mbed_official	237:f3da66175598	3030	* @param __HANDLE__: HRTIM Handle.
mbed_official	237:f3da66175598	3031	* @param __TIMER__: HRTIM timer
mbed_official	237:f3da66175598	3032	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	3033	* @arg 0x5 for master timer
mbed_official	237:f3da66175598	3034	* @arg 0x0 to 0x4 for timers A to E
mbed_official	237:f3da66175598	3035	* @param __PRESCALER__: specifies the clock prescaler new value.
mbed_official	237:f3da66175598	3036	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	3037	* @arg HRTIM_PRESCALERRATIO_MUL32: fHRCK: 4.608 GHz - Resolution: 217 ps - Min PWM frequency: 70.3 kHz (fHRTIM=144MHz)
mbed_official	237:f3da66175598	3038	* @arg HRTIM_PRESCALERRATIO_MUL16: fHRCK: 2.304 GHz - Resolution: 434 ps - Min PWM frequency: 35.1 KHz (fHRTIM=144MHz)
mbed_official	237:f3da66175598	3039	* @arg HRTIM_PRESCALERRATIO_MUL8: fHRCK: 1.152 GHz - Resolution: 868 ps - Min PWM frequency: 17.6 kHz (fHRTIM=144MHz)
mbed_official	237:f3da66175598	3040	* @arg HRTIM_PRESCALERRATIO_MUL4: fHRCK: 576 MHz - Resolution: 1.73 ns - Min PWM frequency: 8.8 kHz (fHRTIM=144MHz)
mbed_official	237:f3da66175598	3041	* @arg HRTIM_PRESCALERRATIO_MUL2: fHRCK: 288 MHz - Resolution: 3.47 ns - Min PWM frequency: 4.4 kHz (fHRTIM=144MHz)
mbed_official	237:f3da66175598	3042	* @arg HRTIM_PRESCALERRATIO_DIV1: fHRCK: 144 MHz - Resolution: 6.95 ns - Min PWM frequency: 2.2 kHz (fHRTIM=144MHz)
mbed_official	237:f3da66175598	3043	* @arg HRTIM_PRESCALERRATIO_DIV2: fHRCK: 72 MHz - Resolution: 13.88 ns- Min PWM frequency: 1.1 kHz (fHRTIM=144MHz)
mbed_official	237:f3da66175598	3044	* @arg HRTIM_PRESCALERRATIO_DIV4: fHRCK: 36 MHz - Resolution: 27.7 ns- Min PWM frequency: 550Hz (fHRTIM=144MHz)
mbed_official	237:f3da66175598	3045	* @retval None
mbed_official	237:f3da66175598	3046	*/
mbed_official	237:f3da66175598	3047	#define __HAL_HRTIM_SetClockPrescaler(__HANDLE__, __TIMER__, __PRESCALER__) \
mbed_official	237:f3da66175598	3048	(((__TIMER__) == HRTIM_TIMERINDEX_MASTER) ? ((__HANDLE__)->Instance->sMasterRegs.MCR \|= (__PRESCALER__)) :\
mbed_official	237:f3da66175598	3049	((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].TIMxCR \|= (__PRESCALER__)))
mbed_official	237:f3da66175598	3050
mbed_official	237:f3da66175598	3051	/** @brief Gets the HRTIM timer clock prescaler value on runtime
mbed_official	237:f3da66175598	3052	* @param __HANDLE__: HRTIM Handle.
mbed_official	237:f3da66175598	3053	* @param __TIMER__: HRTIM timer
mbed_official	237:f3da66175598	3054	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	3055	* @arg 0x5 for master timer
mbed_official	237:f3da66175598	3056	* @arg 0x0 to 0x4 for timers A to E
mbed_official	237:f3da66175598	3057	* @retval timer clock prescaler value
mbed_official	237:f3da66175598	3058	*/
mbed_official	237:f3da66175598	3059	#define __HAL_HRTIM_GetClockPrescaler(__HANDLE__, __TIMER__) \
mbed_official	237:f3da66175598	3060	(((__TIMER__) == HRTIM_TIMERINDEX_MASTER) ? ((__HANDLE__)->Instance->sMasterRegs.MCR & HRTIM_MCR_CK_PSC) :\
mbed_official	237:f3da66175598	3061	((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].TIMxCR & HRTIM_TIMCR_CK_PSC))
mbed_official	237:f3da66175598	3062
mbed_official	237:f3da66175598	3063	/** @brief Sets the HRTIM timer Compare Register value on runtime
mbed_official	237:f3da66175598	3064	* @param __HANDLE__: HRTIM Handle.
mbed_official	237:f3da66175598	3065	* @param __TIMER__: HRTIM timer
mbed_official	237:f3da66175598	3066	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	3067	* @arg 0x0 to 0x4 for timers A to E
mbed_official	237:f3da66175598	3068	* @param __COMPAREUNIT__: timer compare unit
mbed_official	237:f3da66175598	3069	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	3070	* @arg HRTIM_COMPAREUNIT_1: Compare unit 1
mbed_official	237:f3da66175598	3071	* @arg HRTIM_COMPAREUNIT_2: Compare unit 2
mbed_official	237:f3da66175598	3072	* @arg HRTIM_COMPAREUNIT_3: Compare unit 3
mbed_official	237:f3da66175598	3073	* @arg HRTIM_COMPAREUNIT_4: Compare unit 4
mbed_official	237:f3da66175598	3074	* @param __COMPARE__: specifies the Compare new value.
mbed_official	237:f3da66175598	3075	* @retval None
mbed_official	237:f3da66175598	3076	*/
mbed_official	237:f3da66175598	3077	#define __HAL_HRTIM_SetCompare(__HANDLE__, __TIMER__, __COMPAREUNIT__, __COMPARE__) \
mbed_official	237:f3da66175598	3078	(((__TIMER__) == HRTIM_TIMERINDEX_MASTER) ? \
mbed_official	237:f3da66175598	3079	(((__COMPAREUNIT__) == HRTIM_COMPAREUNIT_1) ? ((__HANDLE__)->Instance->sMasterRegs.MCMP1R = (__COMPARE__)) :\
mbed_official	237:f3da66175598	3080	((__COMPAREUNIT__) == HRTIM_COMPAREUNIT_2) ? ((__HANDLE__)->Instance->sMasterRegs.MCMP2R = (__COMPARE__)) :\
mbed_official	237:f3da66175598	3081	((__COMPAREUNIT__) == HRTIM_COMPAREUNIT_3) ? ((__HANDLE__)->Instance->sMasterRegs.MCMP3R = (__COMPARE__)) :\
mbed_official	237:f3da66175598	3082	((__HANDLE__)->Instance->sMasterRegs.MCMP4R = (__COMPARE__))) \
mbed_official	237:f3da66175598	3083	: \
mbed_official	237:f3da66175598	3084	(((__COMPAREUNIT__) == HRTIM_COMPAREUNIT_1) ? ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].CMP1xR = (__COMPARE__)) :\
mbed_official	237:f3da66175598	3085	((__COMPAREUNIT__) == HRTIM_COMPAREUNIT_2) ? ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].CMP2xR = (__COMPARE__)) :\
mbed_official	237:f3da66175598	3086	((__COMPAREUNIT__) == HRTIM_COMPAREUNIT_3) ? ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].CMP3xR = (__COMPARE__)) :\
mbed_official	237:f3da66175598	3087	((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].CMP4xR = (__COMPARE__))))
mbed_official	237:f3da66175598	3088
mbed_official	237:f3da66175598	3089	/** @brief Gets the HRTIM timer Compare Register value on runtime
mbed_official	237:f3da66175598	3090	* @param __HANDLE__: HRTIM Handle.
mbed_official	237:f3da66175598	3091	* @param __TIMER__: HRTIM timer
mbed_official	237:f3da66175598	3092	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	3093	* @arg 0x0 to 0x4 for timers A to E
mbed_official	237:f3da66175598	3094	* @param __COMPAREUNIT__: timer compare unit
mbed_official	237:f3da66175598	3095	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	3096	* @arg HRTIM_COMPAREUNIT_1: Compare unit 1
mbed_official	237:f3da66175598	3097	* @arg HRTIM_COMPAREUNIT_2: Compare unit 2
mbed_official	237:f3da66175598	3098	* @arg HRTIM_COMPAREUNIT_3: Compare unit 3
mbed_official	237:f3da66175598	3099	* @arg HRTIM_COMPAREUNIT_4: Compare unit 4
mbed_official	237:f3da66175598	3100	* @retval Compare value
mbed_official	237:f3da66175598	3101	*/
mbed_official	237:f3da66175598	3102	#define __HAL_HRTIM_GetCompare(__HANDLE__, __TIMER__, __COMPAREUNIT__) \
mbed_official	237:f3da66175598	3103	(((__TIMER__) == HRTIM_TIMERINDEX_MASTER) ? \
mbed_official	237:f3da66175598	3104	(((__COMPAREUNIT__) == HRTIM_COMPAREUNIT_1) ? ((__HANDLE__)->Instance->sMasterRegs.MCMP1R) :\
mbed_official	237:f3da66175598	3105	((__COMPAREUNIT__) == HRTIM_COMPAREUNIT_2) ? ((__HANDLE__)->Instance->sMasterRegs.MCMP2R) :\
mbed_official	237:f3da66175598	3106	((__COMPAREUNIT__) == HRTIM_COMPAREUNIT_3) ? ((__HANDLE__)->Instance->sMasterRegs.MCMP3R) :\
mbed_official	237:f3da66175598	3107	((__HANDLE__)->Instance->sMasterRegs.MCMP4R)) \
mbed_official	237:f3da66175598	3108	: \
mbed_official	237:f3da66175598	3109	(((__COMPAREUNIT__) == HRTIM_COMPAREUNIT_1) ? ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].CMP1xR) :\
mbed_official	237:f3da66175598	3110	((__COMPAREUNIT__) == HRTIM_COMPAREUNIT_2) ? ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].CMP2xR) :\
mbed_official	237:f3da66175598	3111	((__COMPAREUNIT__) == HRTIM_COMPAREUNIT_3) ? ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].CMP3xR) :\
mbed_official	237:f3da66175598	3112	((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].CMP4xR)))
mbed_official	237:f3da66175598	3113
mbed_official	237:f3da66175598	3114	/* Exported functions --------------------------------------------------------*/
mbed_official	237:f3da66175598	3115
mbed_official	237:f3da66175598	3116	/* HRTIM common functions *****************************************************/
mbed_official	237:f3da66175598	3117	HAL_StatusTypeDef HAL_HRTIM_Init(HRTIM_HandleTypeDef *hhrtim);
mbed_official	237:f3da66175598	3118
mbed_official	237:f3da66175598	3119	HAL_StatusTypeDef HAL_HRTIM_DeInit (HRTIM_HandleTypeDef *hhrtim);
mbed_official	237:f3da66175598	3120
mbed_official	237:f3da66175598	3121	void HAL_HRTIM_MspInit(HRTIM_HandleTypeDef *hhrtim);
mbed_official	237:f3da66175598	3122
mbed_official	237:f3da66175598	3123	void HAL_HRTIM_MspDeInit(HRTIM_HandleTypeDef *hhrtim);
mbed_official	237:f3da66175598	3124
mbed_official	237:f3da66175598	3125	HAL_StatusTypeDef HAL_HRTIM_TimeBaseConfig(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3126	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3127	HRTIM_TimeBaseCfgTypeDef * pTimeBaseCfg);
mbed_official	237:f3da66175598	3128
mbed_official	237:f3da66175598	3129	HAL_StatusTypeDef HAL_HRTIM_DLLCalibrationStart(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3130	uint32_t CalibrationRate);
mbed_official	237:f3da66175598	3131
mbed_official	237:f3da66175598	3132	HAL_StatusTypeDef HAL_HRTIM_DLLCalibrationStart_IT(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3133	uint32_t CalibrationRate);
mbed_official	237:f3da66175598	3134
mbed_official	237:f3da66175598	3135	HAL_StatusTypeDef HAL_HRTIM_PollForDLLCalibration(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3136	uint32_t Timeout);
mbed_official	237:f3da66175598	3137
mbed_official	237:f3da66175598	3138	/* Simple time base related functions *****************************************/
mbed_official	237:f3da66175598	3139	HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStart(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3140	uint32_t TimerIdx);
mbed_official	237:f3da66175598	3141
mbed_official	237:f3da66175598	3142	HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStop(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3143	uint32_t TimerIdx);
mbed_official	237:f3da66175598	3144
mbed_official	237:f3da66175598	3145	HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStart_IT(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3146	uint32_t TimerIdx);
mbed_official	237:f3da66175598	3147
mbed_official	237:f3da66175598	3148	HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStop_IT(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3149	uint32_t TimerIdx);
mbed_official	237:f3da66175598	3150
mbed_official	237:f3da66175598	3151	HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStart_DMA(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3152	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3153	uint32_t SrcAddr,
mbed_official	237:f3da66175598	3154	uint32_t DestAddr,
mbed_official	237:f3da66175598	3155	uint32_t Length);
mbed_official	237:f3da66175598	3156
mbed_official	237:f3da66175598	3157	HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStop_DMA(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3158	uint32_t TimerIdx);
mbed_official	237:f3da66175598	3159
mbed_official	237:f3da66175598	3160	/* Simple output compare related functions ************************************/
mbed_official	237:f3da66175598	3161	HAL_StatusTypeDef HAL_HRTIM_SimpleOCChannelConfig(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3162	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3163	uint32_t OCChannel,
mbed_official	237:f3da66175598	3164	HRTIM_SimpleOCChannelCfgTypeDef* pSimpleOCChannelCfg);
mbed_official	237:f3da66175598	3165
mbed_official	237:f3da66175598	3166	HAL_StatusTypeDef HAL_HRTIM_SimpleOCStart(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3167	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3168	uint32_t OCChannel);
mbed_official	237:f3da66175598	3169
mbed_official	237:f3da66175598	3170	HAL_StatusTypeDef HAL_HRTIM_SimpleOCStop(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3171	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3172	uint32_t OCChannel);
mbed_official	237:f3da66175598	3173
mbed_official	237:f3da66175598	3174	HAL_StatusTypeDef HAL_HRTIM_SimpleOCStart_IT(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3175	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3176	uint32_t OCChannel);
mbed_official	237:f3da66175598	3177
mbed_official	237:f3da66175598	3178	HAL_StatusTypeDef HAL_HRTIM_SimpleOCStop_IT(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3179	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3180	uint32_t OCChannel);
mbed_official	237:f3da66175598	3181
mbed_official	237:f3da66175598	3182	HAL_StatusTypeDef HAL_HRTIM_SimpleOCStart_DMA(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3183	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3184	uint32_t OCChannel,
mbed_official	237:f3da66175598	3185	uint32_t SrcAddr,
mbed_official	237:f3da66175598	3186	uint32_t DestAddr,
mbed_official	237:f3da66175598	3187	uint32_t Length);
mbed_official	237:f3da66175598	3188
mbed_official	237:f3da66175598	3189	HAL_StatusTypeDef HAL_HRTIM_SimpleOCStop_DMA(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3190	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3191	uint32_t OCChannel);
mbed_official	237:f3da66175598	3192
mbed_official	237:f3da66175598	3193	/* Simple PWM output related functions ****************************************/
mbed_official	237:f3da66175598	3194	HAL_StatusTypeDef HAL_HRTIM_SimplePWMChannelConfig(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3195	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3196	uint32_t PWMChannel,
mbed_official	237:f3da66175598	3197	HRTIM_SimplePWMChannelCfgTypeDef* pSimplePWMChannelCfg);
mbed_official	237:f3da66175598	3198
mbed_official	237:f3da66175598	3199	HAL_StatusTypeDef HAL_HRTIM_SimplePWMStart(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3200	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3201	uint32_t PWMChannel);
mbed_official	237:f3da66175598	3202
mbed_official	237:f3da66175598	3203	HAL_StatusTypeDef HAL_HRTIM_SimplePWMStop(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3204	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3205	uint32_t PWMChannel);
mbed_official	237:f3da66175598	3206
mbed_official	237:f3da66175598	3207	HAL_StatusTypeDef HAL_HRTIM_SimplePWMStart_IT(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3208	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3209	uint32_t PWMChannel);
mbed_official	237:f3da66175598	3210
mbed_official	237:f3da66175598	3211	HAL_StatusTypeDef HAL_HRTIM_SimplePWMStop_IT(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3212	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3213	uint32_t PWMChannel);
mbed_official	237:f3da66175598	3214
mbed_official	237:f3da66175598	3215	HAL_StatusTypeDef HAL_HRTIM_SimplePWMStart_DMA(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3216	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3217	uint32_t PWMChannel,
mbed_official	237:f3da66175598	3218	uint32_t SrcAddr,
mbed_official	237:f3da66175598	3219	uint32_t DestAddr,
mbed_official	237:f3da66175598	3220	uint32_t Length);
mbed_official	237:f3da66175598	3221
mbed_official	237:f3da66175598	3222	HAL_StatusTypeDef HAL_HRTIM_SimplePWMStop_DMA(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3223	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3224	uint32_t PWMChannel);
mbed_official	237:f3da66175598	3225
mbed_official	237:f3da66175598	3226	/* Simple capture related functions *******************************************/
mbed_official	237:f3da66175598	3227	HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureChannelConfig(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3228	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3229	uint32_t CaptureChannel,
mbed_official	237:f3da66175598	3230	HRTIM_SimpleCaptureChannelCfgTypeDef* pSimpleCaptureChannelCfg);
mbed_official	237:f3da66175598	3231
mbed_official	237:f3da66175598	3232	HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStart(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3233	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3234	uint32_t CaptureChannel);
mbed_official	237:f3da66175598	3235
mbed_official	237:f3da66175598	3236	HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStop(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3237	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3238	uint32_t CaptureChannel);
mbed_official	237:f3da66175598	3239
mbed_official	237:f3da66175598	3240	HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStart_IT(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3241	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3242	uint32_t CaptureChannel);
mbed_official	237:f3da66175598	3243
mbed_official	237:f3da66175598	3244	HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStop_IT(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3245	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3246	uint32_t CaptureChannel);
mbed_official	237:f3da66175598	3247
mbed_official	237:f3da66175598	3248	HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStart_DMA(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3249	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3250	uint32_t CaptureChannel,
mbed_official	237:f3da66175598	3251	uint32_t SrcAddr,
mbed_official	237:f3da66175598	3252	uint32_t DestAddr,
mbed_official	237:f3da66175598	3253	uint32_t Length);
mbed_official	237:f3da66175598	3254
mbed_official	237:f3da66175598	3255	HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStop_DMA(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3256	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3257	uint32_t CaptureChannel);
mbed_official	237:f3da66175598	3258
mbed_official	237:f3da66175598	3259	/* Simple one pulse related functions *****************************************/
mbed_official	237:f3da66175598	3260	HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseChannelConfig(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3261	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3262	uint32_t OnePulseChannel,
mbed_official	237:f3da66175598	3263	HRTIM_SimpleOnePulseChannelCfgTypeDef* pSimpleOnePulseChannelCfg);
mbed_official	237:f3da66175598	3264
mbed_official	237:f3da66175598	3265	HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStart(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3266	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3267	uint32_t OnePulseChannel);
mbed_official	237:f3da66175598	3268
mbed_official	237:f3da66175598	3269	HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStop(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3270	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3271	uint32_t OnePulseChannel);
mbed_official	237:f3da66175598	3272
mbed_official	237:f3da66175598	3273	HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStart_IT(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3274	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3275	uint32_t OnePulseChannel);
mbed_official	237:f3da66175598	3276
mbed_official	237:f3da66175598	3277	HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStop_IT(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3278	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3279	uint32_t OnePulseChannel);
mbed_official	237:f3da66175598	3280
mbed_official	237:f3da66175598	3281	/* Waveform related functions *************************************************/
mbed_official	237:f3da66175598	3282	HAL_StatusTypeDef HAL_HRTIM_WaveformTimerConfig(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3283	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3284	HRTIM_TimerCfgTypeDef * pTimerCfg);
mbed_official	237:f3da66175598	3285
mbed_official	237:f3da66175598	3286	HAL_StatusTypeDef HAL_HRTIM_WaveformCompareConfig(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3287	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3288	uint32_t CompareUnit,
mbed_official	237:f3da66175598	3289	HRTIM_CompareCfgTypeDef* pCompareCfg);
mbed_official	237:f3da66175598	3290
mbed_official	237:f3da66175598	3291	HAL_StatusTypeDef HAL_HRTIM_WaveformCaptureConfig(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3292	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3293	uint32_t CaptureUnit,
mbed_official	237:f3da66175598	3294	HRTIM_CaptureCfgTypeDef* pCaptureCfg);
mbed_official	237:f3da66175598	3295
mbed_official	237:f3da66175598	3296	HAL_StatusTypeDef HAL_HRTIM_WaveformOutputConfig(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3297	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3298	uint32_t Output,
mbed_official	237:f3da66175598	3299	HRTIM_OutputCfgTypeDef * pOutputCfg);
mbed_official	237:f3da66175598	3300
mbed_official	237:f3da66175598	3301	HAL_StatusTypeDef HAL_HRTIM_TimerEventFilteringConfig(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3302	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3303	uint32_t Event,
mbed_official	237:f3da66175598	3304	HRTIM_TimerEventFilteringCfgTypeDef * pTimerEventFilteringCfg);
mbed_official	237:f3da66175598	3305
mbed_official	237:f3da66175598	3306	HAL_StatusTypeDef HAL_HRTIM_DeadTimeConfig(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3307	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3308	HRTIM_DeadTimeCfgTypeDef* pDeadTimeCfg);
mbed_official	237:f3da66175598	3309
mbed_official	237:f3da66175598	3310	HAL_StatusTypeDef HAL_HRTIM_ChopperModeConfig(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3311	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3312	HRTIM_ChopperModeCfgTypeDef* pChopperModeCfg);
mbed_official	237:f3da66175598	3313
mbed_official	237:f3da66175598	3314	HAL_StatusTypeDef HAL_HRTIM_BurstDMAConfig(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3315	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3316	uint32_t RegistersToUpdate);
mbed_official	237:f3da66175598	3317
mbed_official	237:f3da66175598	3318	HAL_StatusTypeDef HAL_HRTIM_BurstModeConfig(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3319	HRTIM_BurstModeCfgTypeDef* pBurstModeCfg);
mbed_official	237:f3da66175598	3320
mbed_official	237:f3da66175598	3321	HAL_StatusTypeDef HAL_HRTIM_EventConfig(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3322	uint32_t Event,
mbed_official	237:f3da66175598	3323	HRTIM_EventCfgTypeDef* pEventCfg);
mbed_official	237:f3da66175598	3324
mbed_official	237:f3da66175598	3325	HAL_StatusTypeDef HAL_HRTIM_EventPrescalerConfig(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3326	uint32_t Prescaler);
mbed_official	237:f3da66175598	3327
mbed_official	237:f3da66175598	3328	HAL_StatusTypeDef HAL_HRTIM_FaultConfig(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3329	uint32_t Fault,
mbed_official	237:f3da66175598	3330	HRTIM_FaultCfgTypeDef* pFaultCfg);
mbed_official	237:f3da66175598	3331
mbed_official	237:f3da66175598	3332	HAL_StatusTypeDef HAL_HRTIM_FaultPrescalerConfig(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3333	uint32_t Prescaler);
mbed_official	237:f3da66175598	3334
mbed_official	237:f3da66175598	3335	HAL_StatusTypeDef HAL_HRTIM_ADCTriggerConfig(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3336	uint32_t ADCTrigger,
mbed_official	237:f3da66175598	3337	HRTIM_ADCTriggerCfgTypeDef* pADCTriggerCfg);
mbed_official	237:f3da66175598	3338
mbed_official	237:f3da66175598	3339	HAL_StatusTypeDef HAL_HRTIM_WaveformCounterStart(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3340	uint32_t Timers);
mbed_official	237:f3da66175598	3341
mbed_official	237:f3da66175598	3342	HAL_StatusTypeDef HAL_HRTIM_WaveformCounterStop(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3343	uint32_t Timers);
mbed_official	237:f3da66175598	3344
mbed_official	237:f3da66175598	3345
mbed_official	237:f3da66175598	3346	HAL_StatusTypeDef HAL_HRTIM_WaveformCounterStart_IT(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3347	uint32_t Timers);
mbed_official	237:f3da66175598	3348
mbed_official	237:f3da66175598	3349	HAL_StatusTypeDef HAL_HRTIM_WaveformCounterStop_IT(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3350	uint32_t Timers);
mbed_official	237:f3da66175598	3351
mbed_official	237:f3da66175598	3352
mbed_official	237:f3da66175598	3353	HAL_StatusTypeDef HAL_HRTIM_WaveformCounterStart_DMA(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3354	uint32_t Timers);
mbed_official	237:f3da66175598	3355
mbed_official	237:f3da66175598	3356	HAL_StatusTypeDef HAL_HRTIM_WaveformCounterStop_DMA(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3357	uint32_t Timers);
mbed_official	237:f3da66175598	3358
mbed_official	237:f3da66175598	3359	HAL_StatusTypeDef HAL_HRTIM_WaveformOutputStart(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3360	uint32_t OutputsToStart);
mbed_official	237:f3da66175598	3361
mbed_official	237:f3da66175598	3362	HAL_StatusTypeDef HAL_HRTIM_WaveformOutputStop(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3363	uint32_t OutputsToStop);
mbed_official	237:f3da66175598	3364
mbed_official	237:f3da66175598	3365	/* IRQ handler */
mbed_official	237:f3da66175598	3366	void HAL_HRTIM_IRQHandler(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3367	uint32_t TimerIdx);
mbed_official	237:f3da66175598	3368
mbed_official	237:f3da66175598	3369	HAL_StatusTypeDef HAL_HRTIM_BurstModeCtl(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3370	uint32_t Enable);
mbed_official	237:f3da66175598	3371
mbed_official	237:f3da66175598	3372	HAL_StatusTypeDef HAL_HRTIM_BurstModeSoftwareTrigger(HRTIM_HandleTypeDef *hhrtim);
mbed_official	237:f3da66175598	3373
mbed_official	237:f3da66175598	3374	void HAL_HRTIM_FaultModeCtl(HRTIM_HandleTypeDef * hhrtim,
mbed_official	237:f3da66175598	3375	uint32_t Faults,
mbed_official	237:f3da66175598	3376	uint32_t Enable);
mbed_official	237:f3da66175598	3377
mbed_official	237:f3da66175598	3378	HAL_StatusTypeDef HAL_HRTIM_SoftwareCapture(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3379	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3380	uint32_t CaptureUnit);
mbed_official	237:f3da66175598	3381
mbed_official	237:f3da66175598	3382	HAL_StatusTypeDef HAL_HRTIM_SoftwareUpdate(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3383	uint32_t Timers);
mbed_official	237:f3da66175598	3384
mbed_official	237:f3da66175598	3385	HAL_StatusTypeDef HAL_HRTIM_SoftwareReset(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3386	uint32_t Timers);
mbed_official	237:f3da66175598	3387
mbed_official	237:f3da66175598	3388	HAL_HRTIM_StateTypeDef HAL_HRTIM_GetState(HRTIM_HandleTypeDef* hhrtim);
mbed_official	237:f3da66175598	3389
mbed_official	237:f3da66175598	3390	HAL_StatusTypeDef HAL_HRTIM_UpdateEnable(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3391	uint32_t Timers);
mbed_official	237:f3da66175598	3392
mbed_official	237:f3da66175598	3393	HAL_StatusTypeDef HAL_HRTIM_UpdateDisable(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3394	uint32_t Timers);
mbed_official	237:f3da66175598	3395
mbed_official	237:f3da66175598	3396	HAL_StatusTypeDef HAL_HRTIM_BurstDMATransfer(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3397	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3398	uint32_t BurstBufferAddress,
mbed_official	237:f3da66175598	3399	uint32_t BurstBufferLength);
mbed_official	237:f3da66175598	3400
mbed_official	237:f3da66175598	3401	uint32_t HAL_HRTIM_GetCapturedValue(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3402	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3403	uint32_t CaptureUnit);
mbed_official	237:f3da66175598	3404
mbed_official	237:f3da66175598	3405	HAL_StatusTypeDef HAL_HRTIM_WaveformSetOutputLevel(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3406	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3407	uint32_t Output,
mbed_official	237:f3da66175598	3408	uint32_t OutputLevel);
mbed_official	237:f3da66175598	3409
mbed_official	237:f3da66175598	3410	uint32_t HAL_HRTIM_WaveformGetOutputLevel(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3411	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3412	uint32_t Output);
mbed_official	237:f3da66175598	3413
mbed_official	237:f3da66175598	3414	uint32_t HAL_HRTIM_WaveformGetOutputState(HRTIM_HandleTypeDef * hhrtim,
mbed_official	237:f3da66175598	3415	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3416	uint32_t Output);
mbed_official	237:f3da66175598	3417
mbed_official	237:f3da66175598	3418	uint32_t HAL_HRTIM_GetDelayedProtectionStatus(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3419	uint32_t TimerIdx,
mbed_official	237:f3da66175598	3420	uint32_t Output);
mbed_official	237:f3da66175598	3421
mbed_official	237:f3da66175598	3422	uint32_t HAL_HRTIM_GetBurstStatus(HRTIM_HandleTypeDef *hhrtim);
mbed_official	237:f3da66175598	3423
mbed_official	237:f3da66175598	3424	uint32_t HAL_HRTIM_GetCurrentPushPullStatus(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3425	uint32_t TimerIdx);
mbed_official	237:f3da66175598	3426
mbed_official	237:f3da66175598	3427	uint32_t HAL_HRTIM_GetIdlePushPullStatus(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3428	uint32_t TimerIdx);
mbed_official	237:f3da66175598	3429
mbed_official	237:f3da66175598	3430	/* HRTIM events related callback functions */
mbed_official	237:f3da66175598	3431	void HAL_HRTIM_Fault1Callback(HRTIM_HandleTypeDef *hhrtim);
mbed_official	237:f3da66175598	3432	void HAL_HRTIM_Fault2Callback(HRTIM_HandleTypeDef *hhrtim);
mbed_official	237:f3da66175598	3433	void HAL_HRTIM_Fault3Callback(HRTIM_HandleTypeDef *hhrtim);
mbed_official	237:f3da66175598	3434	void HAL_HRTIM_Fault4Callback(HRTIM_HandleTypeDef *hhrtim);
mbed_official	237:f3da66175598	3435	void HAL_HRTIM_Fault5Callback(HRTIM_HandleTypeDef *hhrtim);
mbed_official	237:f3da66175598	3436	void HAL_HRTIM_SystemFaultCallback(HRTIM_HandleTypeDef *hhrtim);
mbed_official	237:f3da66175598	3437	void HAL_HRTIM_DLLCalbrationReadyCallback(HRTIM_HandleTypeDef *hhrtim);
mbed_official	237:f3da66175598	3438	void HAL_HRTIM_BurstModePeriodCallback(HRTIM_HandleTypeDef *hhrtim);
mbed_official	237:f3da66175598	3439	void HAL_HRTIM_SynchronizationEventCallback(HRTIM_HandleTypeDef *hhrtim);
mbed_official	237:f3da66175598	3440
mbed_official	237:f3da66175598	3441	/* Timer events related callback functions */
mbed_official	237:f3da66175598	3442	void HAL_HRTIM_RegistersUpdateCallback(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3443	uint32_t TimerIdx);
mbed_official	237:f3da66175598	3444	void HAL_HRTIM_RepetitionEventCallback(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3445	uint32_t TimerIdx);
mbed_official	237:f3da66175598	3446	void HAL_HRTIM_Compare1EventCallback(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3447	uint32_t TimerIdx);
mbed_official	237:f3da66175598	3448	void HAL_HRTIM_Compare2EventCallback(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3449	uint32_t TimerIdx);
mbed_official	237:f3da66175598	3450	void HAL_HRTIM_Compare3EventCallback(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3451	uint32_t TimerIdx);
mbed_official	237:f3da66175598	3452	void HAL_HRTIM_Compare4EventCallback(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3453	uint32_t TimerIdx);
mbed_official	237:f3da66175598	3454	void HAL_HRTIM_Capture1EventCallback(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3455	uint32_t TimerIdx);
mbed_official	237:f3da66175598	3456	void HAL_HRTIM_Capture2EventCallback(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3457	uint32_t TimerIdx);
mbed_official	237:f3da66175598	3458	void HAL_HRTIM_DelayedProtectionCallback(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3459	uint32_t TimerIdx);
mbed_official	237:f3da66175598	3460	void HAL_HRTIM_CounterResetCallback(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3461	uint32_t TimerIdx);
mbed_official	237:f3da66175598	3462	void HAL_HRTIM_Output1SetCallback(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3463	uint32_t TimerIdx);
mbed_official	237:f3da66175598	3464	void HAL_HRTIM_Output1ResetCallback(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3465	uint32_t TimerIdx);
mbed_official	237:f3da66175598	3466	void HAL_HRTIM_Output2SetCallback(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3467	uint32_t TimerIdx);
mbed_official	237:f3da66175598	3468	void HAL_HRTIM_Output2ResetCallback(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3469	uint32_t TimerIdx);
mbed_official	237:f3da66175598	3470	void HAL_HRTIM_BurstDMATransferCallback(HRTIM_HandleTypeDef *hhrtim,
mbed_official	237:f3da66175598	3471	uint32_t TimerIdx);
mbed_official	237:f3da66175598	3472	void HAL_HRTIM_ErrorCallback(HRTIM_HandleTypeDef *hhrtim);
mbed_official	237:f3da66175598	3473
mbed_official	237:f3da66175598	3474	/**
mbed_official	237:f3da66175598	3475	* @}
mbed_official	237:f3da66175598	3476	*/
mbed_official	237:f3da66175598	3477
mbed_official	237:f3da66175598	3478	/**
mbed_official	237:f3da66175598	3479	* @}
mbed_official	237:f3da66175598	3480	*/
mbed_official	237:f3da66175598	3481
mbed_official	237:f3da66175598	3482	#endif /* defined(STM32F334x8) */
mbed_official	237:f3da66175598	3483
mbed_official	237:f3da66175598	3484	#ifdef __cplusplus
mbed_official	237:f3da66175598	3485	}
mbed_official	237:f3da66175598	3486	#endif
mbed_official	237:f3da66175598	3487
mbed_official	237:f3da66175598	3488	#endif /* __STM32F3xx_HAL_HRTIM_H */
mbed_official	237:f3da66175598	3489
mbed_official	237:f3da66175598	3490	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	13 Sep 2014
Imports:	4
Forks:	0
Commits:	324
Dependents:	1
Dependencies:	0
Followers:	2

targets/cmsis/TARGET_STM/TARGET_NUCLEO_F334R8/stm32f3xx_hal_hrtim.h@323:9e901b0a5aa1, 2014-09-13 (annotated)

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