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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F334R8/stm32f3xx_hal_adc_ex.c@323:9e901b0a5aa1, 2014-09-13 (annotated)

Committer:: shaoziyang
Date:: Sat Sep 13 14:25:46 2014 +0000
Revision:: 323:9e901b0a5aa1
Parent:: 237:f3da66175598

test with CLOCK_SETUP = 0

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User	Revision	Line number	New contents of line
mbed_official	237:f3da66175598	1	/**
mbed_official	237:f3da66175598	2	******************************************************************************
mbed_official	237:f3da66175598	3	* @file stm32f3xx_hal_adc.c
mbed_official	237:f3da66175598	4	* @author MCD Application Team
mbed_official	237:f3da66175598	5	* @version V1.0.1
mbed_official	237:f3da66175598	6	* @date 18-June-2014
mbed_official	237:f3da66175598	7	* @brief This file provides firmware functions to manage the following
mbed_official	237:f3da66175598	8	* functionalities of the Analog to Digital Convertor (ADC)
mbed_official	237:f3da66175598	9	* peripheral:
mbed_official	237:f3da66175598	10	* + Initialization and de-initialization functions
mbed_official	237:f3da66175598	11	* ++ Initialization and Configuration of ADC
mbed_official	237:f3da66175598	12	* + Operation functions
mbed_official	237:f3da66175598	13	* ++ Start, stop, get result of conversions of regular and injected
mbed_official	237:f3da66175598	14	* groups, using 3 possible modes: polling, interruption or DMA.
mbed_official	237:f3da66175598	15	* ++ Multimode feature (available on devices with 2 ADCs or more)
mbed_official	237:f3da66175598	16	* ++ Calibration (ADC automatic self-calibration)
mbed_official	237:f3da66175598	17	* + Control functions
mbed_official	237:f3da66175598	18	* ++ Configure channels on regular group
mbed_official	237:f3da66175598	19	* ++ Configure channels on injected group
mbed_official	237:f3da66175598	20	* ++ Configure the analog watchdog
mbed_official	237:f3da66175598	21	* + State functions
mbed_official	237:f3da66175598	22	* ++ ADC state machine management
mbed_official	237:f3da66175598	23	* ++ Interrupts and flags management
mbed_official	237:f3da66175598	24	*
mbed_official	237:f3da66175598	25	@verbatim
mbed_official	237:f3da66175598	26	==============================================================================
mbed_official	237:f3da66175598	27	##### ADC specific features #####
mbed_official	237:f3da66175598	28	==============================================================================
mbed_official	237:f3da66175598	29	[..]
mbed_official	237:f3da66175598	30	(#) 12-bit, 10-bit, 8-bit or 6-bit configurable resolution (available only on
mbed_official	237:f3da66175598	31	STM32F30xxC devices).
mbed_official	237:f3da66175598	32
mbed_official	237:f3da66175598	33	(#) Interrupt generation at the end of regular conversion, end of injected
mbed_official	237:f3da66175598	34	conversion, and in case of analog watchdog or overrun events.
mbed_official	237:f3da66175598	35
mbed_official	237:f3da66175598	36	(#) Single and continuous conversion modes.
mbed_official	237:f3da66175598	37
mbed_official	237:f3da66175598	38	(#) Scan mode for automatic conversion of channel 0 to channel n.
mbed_official	237:f3da66175598	39
mbed_official	237:f3da66175598	40	(#) Data alignment with in-built data coherency.
mbed_official	237:f3da66175598	41
mbed_official	237:f3da66175598	42	(#) Channel-wise programmable sampling time.
mbed_official	237:f3da66175598	43
mbed_official	237:f3da66175598	44	(#) ADC conversion Regular or Injected groups.
mbed_official	237:f3da66175598	45
mbed_official	237:f3da66175598	46	(#) External trigger (timer or EXTI) with configurable polarity for both
mbed_official	237:f3da66175598	47	regular and injected groups.
mbed_official	237:f3da66175598	48
mbed_official	237:f3da66175598	49	(#) DMA request generation for transfer of conversions data of regular group.
mbed_official	237:f3da66175598	50
mbed_official	237:f3da66175598	51	(#) Multimode Dual mode (available on devices with 2 ADCs or more).
mbed_official	237:f3da66175598	52
mbed_official	237:f3da66175598	53	(#) Configurable DMA data storage in Multimode Dual mode (available on devices
mbed_official	237:f3da66175598	54	with 2 DCs or more).
mbed_official	237:f3da66175598	55
mbed_official	237:f3da66175598	56	(#) Configurable delay between conversions in Dual interleaved mode (available
mbed_official	237:f3da66175598	57	on devices with 2 DCs or more).
mbed_official	237:f3da66175598	58
mbed_official	237:f3da66175598	59	(#) ADC calibration
mbed_official	237:f3da66175598	60
mbed_official	237:f3da66175598	61	(#) ADC channels selectable single/differential input (available only on
mbed_official	237:f3da66175598	62	STM32F30xxC devices)
mbed_official	237:f3da66175598	63
mbed_official	237:f3da66175598	64	(#) ADC Injected sequencer&channels configuration context queue (available
mbed_official	237:f3da66175598	65	only on STM32F30xxC devices)
mbed_official	237:f3da66175598	66
mbed_official	237:f3da66175598	67	(#) ADC offset on injected and regular groups (offset on regular group
mbed_official	237:f3da66175598	68	available only on STM32F30xxC devices)
mbed_official	237:f3da66175598	69
mbed_official	237:f3da66175598	70	(#) ADC supply requirements: 2.4 V to 3.6 V at full speed and down to 1.8 V at
mbed_official	237:f3da66175598	71	slower speed.
mbed_official	237:f3da66175598	72
mbed_official	237:f3da66175598	73	(#) ADC input range: from Vref (connected to Vssa) to Vref+ (connected to
mbed_official	237:f3da66175598	74	Vdda or to an external voltage reference).
mbed_official	237:f3da66175598	75
mbed_official	237:f3da66175598	76
mbed_official	237:f3da66175598	77	##### How to use this driver #####
mbed_official	237:f3da66175598	78	==============================================================================
mbed_official	237:f3da66175598	79	[..]
mbed_official	237:f3da66175598	80
mbed_official	237:f3da66175598	81	(#) Enable the ADC interface
mbed_official	237:f3da66175598	82	As prerequisite, into HAL_ADC_MspInit(), ADC clock must be configured
mbed_official	237:f3da66175598	83	at RCC top level: clock source and clock prescaler.
mbed_official	237:f3da66175598	84
mbed_official	237:f3da66175598	85	For STM32F30x/STM32F33x devices:
mbed_official	237:f3da66175598	86	Two possible clock sources: synchronous clock derived from AHB clock
mbed_official	237:f3da66175598	87	or asynchronous clock derived from ADC dedicated PLL 72MHz.
mbed_official	237:f3da66175598	88
mbed_official	237:f3da66175598	89	For example, in case of device with a single ADC:
mbed_official	237:f3da66175598	90	__ADC1_CLK_ENABLE() (mandatory)
mbed_official	237:f3da66175598	91	__HAL_RCC_ADC1_CONFIG(RCC_ADC1PLLCLK_DIV1); (optional)
mbed_official	237:f3da66175598	92
mbed_official	237:f3da66175598	93	For example, in case of device with several ADCs:
mbed_official	237:f3da66175598	94	if((hadc->Instance == ADC1) \|\| (hadc->Instance == ADC2))
mbed_official	237:f3da66175598	95	{
mbed_official	237:f3da66175598	96	__ADC12_CLK_ENABLE() (mandatory)
mbed_official	237:f3da66175598	97	__HAL_RCC_ADC12_CONFIG(RCC_ADC12PLLCLK_DIV1); (optional)
mbed_official	237:f3da66175598	98	}
mbed_official	237:f3da66175598	99	else
mbed_official	237:f3da66175598	100	{
mbed_official	237:f3da66175598	101	__ADC34_CLK_ENABLE() (mandatory)
mbed_official	237:f3da66175598	102	__HAL_RCC_ADC34_CONFIG(RCC_ADC34PLLCLK_DIV1); (optional)
mbed_official	237:f3da66175598	103	}
mbed_official	237:f3da66175598	104
mbed_official	237:f3da66175598	105	For STM32F37x devices:
mbed_official	237:f3da66175598	106	Only one clock source: APB2 clock.
mbed_official	237:f3da66175598	107	Example:
mbed_official	237:f3da66175598	108	__HAL_RCC_ADC1_CONFIG(RCC_ADC1PCLK2_DIV2);
mbed_official	237:f3da66175598	109
mbed_official	237:f3da66175598	110	(#) ADC pins configuration
mbed_official	237:f3da66175598	111	(++) Enable the clock for the ADC GPIOs using the following function:
mbed_official	237:f3da66175598	112	__GPIOx_CLK_ENABLE();
mbed_official	237:f3da66175598	113	(++) Configure these ADC pins in analog mode using HAL_GPIO_Init();
mbed_official	237:f3da66175598	114
mbed_official	237:f3da66175598	115	(#) Configure the ADC parameters (conversion resolution, data alignment,
mbed_official	237:f3da66175598	116	continuous mode, ...) using the HAL_ADC_Init() function.
mbed_official	237:f3da66175598	117
mbed_official	237:f3da66175598	118	(#) Activate the ADC peripheral using one of the start functions:
mbed_official	237:f3da66175598	119	HAL_ADC_Start(), HAL_ADC_Start_IT(), HAL_ADC_Start_DMA()
mbed_official	237:f3da66175598	120	HAL_ADCEx_InjectedStart(), HAL_ADCEx_InjectedStart_IT() or
mbed_official	237:f3da66175598	121	HAL_ADC_MultiModeStart_DMA().
mbed_official	237:f3da66175598	122
mbed_official	237:f3da66175598	123	* Channels to regular group configuration *
mbed_official	237:f3da66175598	124	============================================
mbed_official	237:f3da66175598	125	[..]
mbed_official	237:f3da66175598	126	(+) To configure the ADC regular group features, use
mbed_official	237:f3da66175598	127	HAL_ADC_Init() and HAL_ADC_ConfigChannel() functions.
mbed_official	237:f3da66175598	128	(+) To activate the continuous mode, use the HAL_ADC_Init() function.
mbed_official	237:f3da66175598	129	(+) To read the ADC converted values, use the HAL_ADC_GetValue() function.
mbed_official	237:f3da66175598	130
mbed_official	237:f3da66175598	131	* Multimode ADCs configuration *
mbed_official	237:f3da66175598	132	======================================================
mbed_official	237:f3da66175598	133	[..]
mbed_official	237:f3da66175598	134	(+) Multimode feature is available on devices with 2 ADCs or more.
mbed_official	237:f3da66175598	135	(+) Refer to "Channels to regular group" description to
mbed_official	237:f3da66175598	136	configure the ADC1 and ADC2 regular groups.
mbed_official	237:f3da66175598	137	(+) Select the Multi mode ADC features (dual mode
mbed_official	237:f3da66175598	138	simultaneous, interleaved, ...) and configure the DMA mode using
mbed_official	237:f3da66175598	139	HAL_ADCEx_MultiModeConfigChannel() functions.
mbed_official	237:f3da66175598	140	(+) Read the ADCs converted values using the HAL_ADCEx_MultiModeGetValue()
mbed_official	237:f3da66175598	141	function.
mbed_official	237:f3da66175598	142
mbed_official	237:f3da66175598	143	* DMA for regular configuration *
mbed_official	237:f3da66175598	144	=============================================================
mbed_official	237:f3da66175598	145	[..]
mbed_official	237:f3da66175598	146	(+) To enable the DMA mode for regular group, use the
mbed_official	237:f3da66175598	147	HAL_ADC_Start_DMA() function.
mbed_official	237:f3da66175598	148	(+) To enable the generation of DMA requests continuously at the end of
mbed_official	237:f3da66175598	149	the last DMA transfer, use the HAL_ADC_Init() function.
mbed_official	237:f3da66175598	150
mbed_official	237:f3da66175598	151	* Channels to injected group configuration *
mbed_official	237:f3da66175598	152	=============================================
mbed_official	237:f3da66175598	153	[..]
mbed_official	237:f3da66175598	154	(+) To configure the ADC Injected channels group features, use
mbed_official	237:f3da66175598	155	HAL_ADCEx_InjectedConfigChannel() functions.
mbed_official	237:f3da66175598	156	(+) To activate the continuous mode, use the HAL_ADC_Init() function.
mbed_official	237:f3da66175598	157	(+) To read the ADC converted values, use the HAL_ADCEx_InjectedGetValue()
mbed_official	237:f3da66175598	158	function.
mbed_official	237:f3da66175598	159
mbed_official	237:f3da66175598	160	@endverbatim
mbed_official	237:f3da66175598	161	******************************************************************************
mbed_official	237:f3da66175598	162	* @attention
mbed_official	237:f3da66175598	163	*
mbed_official	237:f3da66175598	164	* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official	237:f3da66175598	165	*
mbed_official	237:f3da66175598	166	* Redistribution and use in source and binary forms, with or without modification,
mbed_official	237:f3da66175598	167	* are permitted provided that the following conditions are met:
mbed_official	237:f3da66175598	168	* 1. Redistributions of source code must retain the above copyright notice,
mbed_official	237:f3da66175598	169	* this list of conditions and the following disclaimer.
mbed_official	237:f3da66175598	170	* 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official	237:f3da66175598	171	* this list of conditions and the following disclaimer in the documentation
mbed_official	237:f3da66175598	172	* and/or other materials provided with the distribution.
mbed_official	237:f3da66175598	173	* 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official	237:f3da66175598	174	* may be used to endorse or promote products derived from this software
mbed_official	237:f3da66175598	175	* without specific prior written permission.
mbed_official	237:f3da66175598	176	*
mbed_official	237:f3da66175598	177	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official	237:f3da66175598	178	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official	237:f3da66175598	179	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official	237:f3da66175598	180	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official	237:f3da66175598	181	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official	237:f3da66175598	182	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official	237:f3da66175598	183	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official	237:f3da66175598	184	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official	237:f3da66175598	185	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official	237:f3da66175598	186	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official	237:f3da66175598	187	*
mbed_official	237:f3da66175598	188	******************************************************************************
mbed_official	237:f3da66175598	189	*/
mbed_official	237:f3da66175598	190
mbed_official	237:f3da66175598	191	/* Includes ------------------------------------------------------------------*/
mbed_official	237:f3da66175598	192	#include "stm32f3xx_hal.h"
mbed_official	237:f3da66175598	193
mbed_official	237:f3da66175598	194	/** @addtogroup STM32F3xx_HAL_Driver
mbed_official	237:f3da66175598	195	* @{
mbed_official	237:f3da66175598	196	*/
mbed_official	237:f3da66175598	197
mbed_official	237:f3da66175598	198	/** @defgroup ADCEx
mbed_official	237:f3da66175598	199	* @brief ADC Extended HAL module driver
mbed_official	237:f3da66175598	200	* @{
mbed_official	237:f3da66175598	201	*/
mbed_official	237:f3da66175598	202
mbed_official	237:f3da66175598	203	#ifdef HAL_ADC_MODULE_ENABLED
mbed_official	237:f3da66175598	204
mbed_official	237:f3da66175598	205	/* Private typedef -----------------------------------------------------------*/
mbed_official	237:f3da66175598	206	/* Private define ------------------------------------------------------------*/
mbed_official	237:f3da66175598	207
mbed_official	237:f3da66175598	208	#if defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| defined(STM32F302xC) \|\| defined(STM32F303x8) \|\| defined(STM32F328xx) \|\| defined(STM32F334x8) \|\| defined(STM32F301x8) \|\| defined(STM32F318xx) \|\| defined(STM32F302x8)
mbed_official	237:f3da66175598	209	/* Fixed timeout values for ADC calibration, enable settling time, disable */
mbed_official	237:f3da66175598	210	/* settling time. */
mbed_official	237:f3da66175598	211	/* Values defined to be higher than worst cases: low clock frequency, */
mbed_official	237:f3da66175598	212	/* maximum prescalers. */
mbed_official	237:f3da66175598	213	/* Ex of profile low frequency : Clock source at 0.5 MHz, ADC clock */
mbed_official	237:f3da66175598	214	/* prescaler 256 (devices STM32F30xx), sampling time 7.5 ADC clock cycles, */
mbed_official	237:f3da66175598	215	/* resolution 12 bits. */
mbed_official	237:f3da66175598	216	/* Unit: ms */
mbed_official	237:f3da66175598	217	#define ADC_CALIBRATION_TIMEOUT ((uint32_t) 10)
mbed_official	237:f3da66175598	218	#define ADC_ENABLE_TIMEOUT ((uint32_t) 2)
mbed_official	237:f3da66175598	219	#define ADC_DISABLE_TIMEOUT ((uint32_t) 2)
mbed_official	237:f3da66175598	220	#define ADC_STOP_CONVERSION_TIMEOUT ((uint32_t) 11)
mbed_official	237:f3da66175598	221
mbed_official	237:f3da66175598	222	/* Timeout to wait for current conversion on going to be completed. */
mbed_official	237:f3da66175598	223	/* Timeout fixed to worst case, for 1 channel. */
mbed_official	237:f3da66175598	224	/* - maximum sampling time (601.5 adc_clk) */
mbed_official	237:f3da66175598	225	/* - ADC resolution (Tsar 12 bits= 12.5 adc_clk) */
mbed_official	237:f3da66175598	226	/* - ADC clock (from PLL with prescaler 256 (devices STM32F30xx)) */
mbed_official	237:f3da66175598	227	/* Unit: cycles of CPU clock. */
mbed_official	237:f3da66175598	228	#define ADC_CONVERSION_TIME_MAX_CPU_CYCLES ((uint32_t) 156928)
mbed_official	237:f3da66175598	229
mbed_official	237:f3da66175598	230	/* Delay for ADC stabilization time (ADC voltage regulator start-up time) */
mbed_official	237:f3da66175598	231	/* Maximum delay is 10us (refer to device datasheet, param. TADCVREG_STUP). */
mbed_official	237:f3da66175598	232	/* Delay in CPU cycles, fixed to worst case: maximum CPU frequency 72MHz to */
mbed_official	237:f3da66175598	233	/* have the minimum number of CPU cycles to fulfill this delay. */
mbed_official	237:f3da66175598	234	#define ADC_STAB_DELAY_CPU_CYCLES ((uint32_t)720)
mbed_official	237:f3da66175598	235
mbed_official	237:f3da66175598	236	/* Delay for temperature sensor stabilization time. */
mbed_official	237:f3da66175598	237	/* Maximum delay is 10us (refer device datasheet, parameter tSTART). */
mbed_official	237:f3da66175598	238	/* Delay in CPU cycles, fixed to worst case: maximum CPU frequency 72MHz to */
mbed_official	237:f3da66175598	239	/* have the minimum number of CPU cycles to fulfill this delay. */
mbed_official	237:f3da66175598	240	#define ADC_TEMPSENSOR_DELAY_CPU_CYCLES ((uint32_t)720)
mbed_official	237:f3da66175598	241
mbed_official	237:f3da66175598	242	#endif /* STM32F303xC \|\| STM32F358xx \|\| STM32F302xC \|\| STM32F303x8 \|\| STM32F328xx \|\| STM32F334x8 \|\| STM32F301x8 \|\| STM32F318xx \|\| STM32F302x8 */
mbed_official	237:f3da66175598	243
mbed_official	237:f3da66175598	244	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	237:f3da66175598	245	/* Fixed timeout values for ADC calibration, enable settling time. */
mbed_official	237:f3da66175598	246	/* Values defined to be higher than worst cases: low clocks freq, */
mbed_official	237:f3da66175598	247	/* maximum prescalers. */
mbed_official	237:f3da66175598	248	/* ex: On STM32F303C, clock source PLL=1MHz, presc. RCC_ADC12PLLCLK_DIV256 */
mbed_official	237:f3da66175598	249	/* Unit: ms */
mbed_official	237:f3da66175598	250	#define ADC_CALIBRATION_TIMEOUT ((uint32_t) 10)
mbed_official	237:f3da66175598	251	#define ADC_ENABLE_TIMEOUT ((uint32_t) 10)
mbed_official	237:f3da66175598	252
mbed_official	237:f3da66175598	253	/* Delay for ADC stabilization time. */
mbed_official	237:f3da66175598	254	/* Maximum delay is 1us (refer to device datasheet, parameter tSTAB). */
mbed_official	237:f3da66175598	255	/* Delay in CPU cycles, fixed to worst case: maximum CPU frequency 48MHz to */
mbed_official	237:f3da66175598	256	/* have the minimum number of CPU cycles to fulfill this delay. */
mbed_official	237:f3da66175598	257	#define ADC_STAB_DELAY_CPU_CYCLES ((uint32_t)72)
mbed_official	237:f3da66175598	258
mbed_official	237:f3da66175598	259	/* Maximum number of CPU cycles corresponding to 1 ADC cycle */
mbed_official	237:f3da66175598	260	/* Value fixed to worst case: clock prescalers slowing down ADC clock to */
mbed_official	237:f3da66175598	261	/* minimum frequency */
mbed_official	237:f3da66175598	262	/* - AHB prescaler: 16 */
mbed_official	237:f3da66175598	263	/* - ADC prescaler: 8 */
mbed_official	237:f3da66175598	264	/* Unit: cycles of CPU clock. */
mbed_official	237:f3da66175598	265	#define ADC_CYCLE_WORST_CASE_CPU_CYCLES ((uint32_t) 128)
mbed_official	237:f3da66175598	266
mbed_official	237:f3da66175598	267	/* ADC conversion cycles (unit: ADC clock cycles) */
mbed_official	237:f3da66175598	268	/* (selected sampling time + conversion time of 12.5 ADC clock cycles, with */
mbed_official	237:f3da66175598	269	/* resolution 12 bits) */
mbed_official	237:f3da66175598	270	#define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_1CYCLE5 ((uint32_t) 14)
mbed_official	237:f3da66175598	271	#define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_7CYCLES5 ((uint32_t) 20)
mbed_official	237:f3da66175598	272	#define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_13CYCLES5 ((uint32_t) 26)
mbed_official	237:f3da66175598	273	#define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_28CYCLES5 ((uint32_t) 41)
mbed_official	237:f3da66175598	274	#define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_41CYCLES5 ((uint32_t) 54)
mbed_official	237:f3da66175598	275	#define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_55CYCLES5 ((uint32_t) 68)
mbed_official	237:f3da66175598	276	#define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_71CYCLES5 ((uint32_t) 84)
mbed_official	237:f3da66175598	277	#define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_239CYCLES5 ((uint32_t)252)
mbed_official	237:f3da66175598	278	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	237:f3da66175598	279
mbed_official	237:f3da66175598	280	/* Private macro -------------------------------------------------------------*/
mbed_official	237:f3da66175598	281	/* Private variables ---------------------------------------------------------*/
mbed_official	237:f3da66175598	282	/* Private function prototypes -----------------------------------------------*/
mbed_official	237:f3da66175598	283	#if defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| defined(STM32F302xC) \|\| defined(STM32F303x8) \|\| defined(STM32F328xx) \|\| defined(STM32F334x8) \|\| defined(STM32F301x8) \|\| defined(STM32F318xx) \|\| defined(STM32F302x8)
mbed_official	237:f3da66175598	284	static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc);
mbed_official	237:f3da66175598	285	static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc);
mbed_official	237:f3da66175598	286	static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc, uint32_t ConversionGroup);
mbed_official	237:f3da66175598	287	#endif /* STM32F303xC \|\| STM32F358xx \|\| STM32F302xC \|\| STM32F303x8 \|\| STM32F328xx \|\| STM32F334x8 \|\| STM32F301x8 \|\| STM32F318xx \|\| STM32F302x8 */
mbed_official	237:f3da66175598	288	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	237:f3da66175598	289	static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc);
mbed_official	237:f3da66175598	290	static HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc);
mbed_official	237:f3da66175598	291	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	237:f3da66175598	292
mbed_official	237:f3da66175598	293	static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma);
mbed_official	237:f3da66175598	294	static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma);
mbed_official	237:f3da66175598	295	static void ADC_DMAError(DMA_HandleTypeDef *hdma);
mbed_official	237:f3da66175598	296
mbed_official	237:f3da66175598	297	/* Private functions ---------------------------------------------------------*/
mbed_official	237:f3da66175598	298
mbed_official	237:f3da66175598	299	/** @defgroup ADCEx_Private_Functions
mbed_official	237:f3da66175598	300	* @{
mbed_official	237:f3da66175598	301	*/
mbed_official	237:f3da66175598	302
mbed_official	237:f3da66175598	303	/** @defgroup ADCEx_Group1 Extended Initialization/de-initialization functions
mbed_official	237:f3da66175598	304	* @brief Extended Initialization and Configuration functions
mbed_official	237:f3da66175598	305	*
mbed_official	237:f3da66175598	306	@verbatim
mbed_official	237:f3da66175598	307	===============================================================================
mbed_official	237:f3da66175598	308	##### Initialization and de-initialization functions #####
mbed_official	237:f3da66175598	309	===============================================================================
mbed_official	237:f3da66175598	310	[..] This section provides functions allowing to:
mbed_official	237:f3da66175598	311	(+) Initialize and configure the ADC.
mbed_official	237:f3da66175598	312	(+) De-initialize the ADC.
mbed_official	237:f3da66175598	313
mbed_official	237:f3da66175598	314	@endverbatim
mbed_official	237:f3da66175598	315	* @{
mbed_official	237:f3da66175598	316	*/
mbed_official	237:f3da66175598	317
mbed_official	237:f3da66175598	318	#if defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| defined(STM32F302xC) \|\| defined(STM32F303x8) \|\| defined(STM32F328xx) \|\| defined(STM32F334x8) \|\| defined(STM32F301x8) \|\| defined(STM32F318xx) \|\| defined(STM32F302x8)
mbed_official	237:f3da66175598	319	/**
mbed_official	237:f3da66175598	320	* @brief Initializes the ADC peripheral and regular group according to
mbed_official	237:f3da66175598	321	* parameters specified in structure "ADC_InitTypeDef".
mbed_official	237:f3da66175598	322	* @note As prerequisite, ADC clock must be configured at RCC top level
mbed_official	237:f3da66175598	323	* depending on both possible clock sources: AHB clock or PLL clock.
mbed_official	237:f3da66175598	324	* See commented example code below that can be copied and uncommented
mbed_official	237:f3da66175598	325	* into HAL_ADC_MspInit().
mbed_official	237:f3da66175598	326	* @note Possibility to update parameters on the fly:
mbed_official	237:f3da66175598	327	* This function initializes the ADC MSP (HAL_ADC_MspInit()) only when
mbed_official	237:f3da66175598	328	* coming from ADC state reset. Following calls to this function can
mbed_official	237:f3da66175598	329	* be used to reconfigure some parameters of ADC_InitTypeDef
mbed_official	237:f3da66175598	330	* structure on the fly, without modifiying MSP configuration. If ADC
mbed_official	237:f3da66175598	331	* MSP has to be modified again, HAL_ADC_DeInit() must be called
mbed_official	237:f3da66175598	332	* before HAL_ADC_Init().
mbed_official	237:f3da66175598	333	* The setting of these parameters is conditioned to ADC state.
mbed_official	237:f3da66175598	334	* For parameters constraints, see comments of structure
mbed_official	237:f3da66175598	335	* "ADC_InitTypeDef".
mbed_official	237:f3da66175598	336	* @note This function configures the ADC within 2 scopes: scope of entire
mbed_official	237:f3da66175598	337	* ADC and scope of regular group. For parameters details, see comments
mbed_official	237:f3da66175598	338	* of structure "ADC_InitTypeDef".
mbed_official	237:f3da66175598	339	* @note For devices with several ADCs: parameters related to common ADC
mbed_official	237:f3da66175598	340	* registers (ADC clock mode) are set only if all ADCs sharing the
mbed_official	237:f3da66175598	341	* same common group are disabled.
mbed_official	237:f3da66175598	342	* If this is not the case, these common parameters setting are
mbed_official	237:f3da66175598	343	* bypassed without error reporting: it can be the intended behaviour in
mbed_official	237:f3da66175598	344	* case of update of a parameter of ADC_InitTypeDef on the fly,
mbed_official	237:f3da66175598	345	* without disabling the other ADCs sharing the same common group.
mbed_official	237:f3da66175598	346	* @param hadc: ADC handle
mbed_official	237:f3da66175598	347	* @retval HAL status
mbed_official	237:f3da66175598	348	*/
mbed_official	237:f3da66175598	349	HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
mbed_official	237:f3da66175598	350	{
mbed_official	237:f3da66175598	351	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	237:f3da66175598	352	ADC_Common_TypeDef *tmpADC_Common;
mbed_official	237:f3da66175598	353	ADC_HandleTypeDef tmphadcSharingSameCommonRegister;
mbed_official	237:f3da66175598	354	uint32_t tmpCFGR = 0;
mbed_official	237:f3da66175598	355	uint32_t WaitLoopIndex = 0;
mbed_official	237:f3da66175598	356
mbed_official	237:f3da66175598	357	/* Check ADC handle */
mbed_official	237:f3da66175598	358	if(hadc == NULL)
mbed_official	237:f3da66175598	359	{
mbed_official	237:f3da66175598	360	return HAL_ERROR;
mbed_official	237:f3da66175598	361	}
mbed_official	237:f3da66175598	362
mbed_official	237:f3da66175598	363	/* Check the parameters */
mbed_official	237:f3da66175598	364	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	365	assert_param(IS_ADC_CLOCKPRESCALER(hadc->Init.ClockPrescaler));
mbed_official	237:f3da66175598	366	assert_param(IS_ADC_RESOLUTION(hadc->Init.Resolution));
mbed_official	237:f3da66175598	367	assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));
mbed_official	237:f3da66175598	368	assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode));
mbed_official	237:f3da66175598	369	assert_param(IS_ADC_REGULAR_NB_CONV(hadc->Init.NbrOfConversion));
mbed_official	237:f3da66175598	370	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
mbed_official	237:f3da66175598	371	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode));
mbed_official	237:f3da66175598	372	assert_param(IS_ADC_REGULAR_DISCONT_NUMBER(hadc->Init.NbrOfDiscConversion));
mbed_official	237:f3da66175598	373	assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
mbed_official	237:f3da66175598	374	assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv));
mbed_official	237:f3da66175598	375	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests));
mbed_official	237:f3da66175598	376	assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection));
mbed_official	237:f3da66175598	377	assert_param(IS_ADC_OVERRUN(hadc->Init.Overrun));
mbed_official	237:f3da66175598	378	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoWait));
mbed_official	237:f3da66175598	379
mbed_official	237:f3da66175598	380
mbed_official	237:f3da66175598	381	/* As prerequisite, into HAL_ADC_MspInit(), ADC clock must be configured */
mbed_official	237:f3da66175598	382	/* at RCC top level depending on both possible clock sources: */
mbed_official	237:f3da66175598	383	/* PLL clock or AHB clock. */
mbed_official	237:f3da66175598	384	/* For example: */
mbed_official	237:f3da66175598	385	/* if((hadc->Instance == ADC1) \|\| (hadc->Instance == ADC2)) */
mbed_official	237:f3da66175598	386	/* { */
mbed_official	237:f3da66175598	387	/* __ADC12_CLK_ENABLE(); */
mbed_official	237:f3da66175598	388	/* __HAL_RCC_ADC12_CONFIG(RCC_ADC12PLLCLK_DIV1); */
mbed_official	237:f3da66175598	389	/* } */
mbed_official	237:f3da66175598	390	/* else */
mbed_official	237:f3da66175598	391	/* { */
mbed_official	237:f3da66175598	392	/* __ADC34_CLK_ENABLE(); */
mbed_official	237:f3da66175598	393	/* __HAL_RCC_ADC34_CONFIG(RCC_ADC34PLLCLK_DIV1); */
mbed_official	237:f3da66175598	394	/* } */
mbed_official	237:f3da66175598	395
mbed_official	237:f3da66175598	396
mbed_official	237:f3da66175598	397	/* Actions performed only if ADC is coming from state reset: */
mbed_official	237:f3da66175598	398	/* - Initialization of ADC MSP */
mbed_official	237:f3da66175598	399	/* - ADC voltage regulator enable */
mbed_official	237:f3da66175598	400	if (hadc->State == HAL_ADC_STATE_RESET)
mbed_official	237:f3da66175598	401	{
mbed_official	237:f3da66175598	402	/* Init the low level hardware */
mbed_official	237:f3da66175598	403	HAL_ADC_MspInit(hadc);
mbed_official	237:f3da66175598	404
mbed_official	237:f3da66175598	405	/* Enable voltage regulator (if disabled at this step) */
mbed_official	237:f3da66175598	406	if (HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADVREGEN_0))
mbed_official	237:f3da66175598	407	{
mbed_official	237:f3da66175598	408	/* Note: The software must wait for the startup time of the ADC voltage */
mbed_official	237:f3da66175598	409	/* regulator before launching a calibration or enabling the ADC. */
mbed_official	237:f3da66175598	410	/* This temporization must be implemented by software and is */
mbed_official	237:f3da66175598	411	/* equal to 10 us in the worst case process/temperature/power */
mbed_official	237:f3da66175598	412	/* supply. */
mbed_official	237:f3da66175598	413
mbed_official	237:f3da66175598	414	/* Disable the ADC (if not already disabled) */
mbed_official	237:f3da66175598	415	tmpHALStatus = ADC_Disable(hadc);
mbed_official	237:f3da66175598	416
mbed_official	237:f3da66175598	417	/* Check if ADC is effectively disabled */
mbed_official	237:f3da66175598	418	if (tmpHALStatus != HAL_ERROR)
mbed_official	237:f3da66175598	419	{
mbed_official	237:f3da66175598	420	/* Initialize the ADC state */
mbed_official	237:f3da66175598	421	hadc->State = HAL_ADC_STATE_BUSY;
mbed_official	237:f3da66175598	422
mbed_official	237:f3da66175598	423	/* Set the intermediate state before moving the ADC voltage regulator */
mbed_official	237:f3da66175598	424	/* to state enable. */
mbed_official	237:f3da66175598	425	hadc->Instance->CR &= ~(ADC_CR_ADVREGEN);
mbed_official	237:f3da66175598	426	/* Set ADVREGEN bits to 0x01 */
mbed_official	237:f3da66175598	427	hadc->Instance->CR \|= ADC_CR_ADVREGEN_0;
mbed_official	237:f3da66175598	428
mbed_official	237:f3da66175598	429	/* Delay for ADC stabilization time. */
mbed_official	237:f3da66175598	430	/* Delay fixed to worst case: maximum CPU frequency */
mbed_official	237:f3da66175598	431	while(WaitLoopIndex < ADC_STAB_DELAY_CPU_CYCLES)
mbed_official	237:f3da66175598	432	{
mbed_official	237:f3da66175598	433	WaitLoopIndex++;
mbed_official	237:f3da66175598	434	}
mbed_official	237:f3da66175598	435	}
mbed_official	237:f3da66175598	436	}
mbed_official	237:f3da66175598	437	}
mbed_official	237:f3da66175598	438
mbed_official	237:f3da66175598	439	/* Verification that ADC voltage regulator is correctly enabled, whatever */
mbed_official	237:f3da66175598	440	/* ADC coming from state reset or not (if any potential problem of */
mbed_official	237:f3da66175598	441	/* clocking, voltage regulator would not be enabled). */
mbed_official	237:f3da66175598	442	if ((hadc->Instance->CR & ADC_CR_ADVREGEN) != ADC_CR_ADVREGEN_0)
mbed_official	237:f3da66175598	443	{
mbed_official	237:f3da66175598	444	/* Update ADC state machine to error */
mbed_official	237:f3da66175598	445	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	446
mbed_official	237:f3da66175598	447	/* Set ADC error code to ADC IP internal error */
mbed_official	237:f3da66175598	448	hadc->ErrorCode \|= HAL_ADC_ERROR_INTERNAL;
mbed_official	237:f3da66175598	449
mbed_official	237:f3da66175598	450	tmpHALStatus = HAL_ERROR;
mbed_official	237:f3da66175598	451	}
mbed_official	237:f3da66175598	452
mbed_official	237:f3da66175598	453
mbed_official	237:f3da66175598	454	/* Configuration of ADC parameters if previous preliminary actions are */
mbed_official	237:f3da66175598	455	/* correctly completed. */
mbed_official	237:f3da66175598	456	/* and if there is no conversion on going on regular group (ADC can be */
mbed_official	237:f3da66175598	457	/* enabled anyway, in case of call of this function to update a parameter */
mbed_official	237:f3da66175598	458	/* on the fly). */
mbed_official	237:f3da66175598	459	if ((hadc->State != HAL_ADC_STATE_ERROR) &&
mbed_official	237:f3da66175598	460	(__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) )
mbed_official	237:f3da66175598	461	{
mbed_official	237:f3da66175598	462	/* Initialize the ADC state */
mbed_official	237:f3da66175598	463	hadc->State = HAL_ADC_STATE_BUSY;
mbed_official	237:f3da66175598	464
mbed_official	237:f3da66175598	465	/* Configuration of common ADC parameters */
mbed_official	237:f3da66175598	466
mbed_official	237:f3da66175598	467	/* Pointer to the common control register to which is belonging hadc */
mbed_official	237:f3da66175598	468	/* (Depending on STM32F3 product, there may be up to 4 ADC and 2 common */
mbed_official	237:f3da66175598	469	/* control registers) */
mbed_official	237:f3da66175598	470	tmpADC_Common = __HAL_ADC_COMMON_REGISTER(hadc);
mbed_official	237:f3da66175598	471
mbed_official	237:f3da66175598	472	/* Set handle of the other ADC sharing the same common register */
mbed_official	237:f3da66175598	473	__HAL_ADC_COMMON_ADC_OTHER(hadc, &tmphadcSharingSameCommonRegister);
mbed_official	237:f3da66175598	474
mbed_official	237:f3da66175598	475
mbed_official	237:f3da66175598	476	/* Parameters update conditioned to ADC state: */
mbed_official	237:f3da66175598	477	/* Parameters that can be updated only when ADC is disabled: */
mbed_official	237:f3da66175598	478	/* - Multimode clock configuration */
mbed_official	237:f3da66175598	479	if ((__HAL_ADC_IS_ENABLED(hadc) == RESET) &&
mbed_official	237:f3da66175598	480	( (tmphadcSharingSameCommonRegister.Instance == NULL) \|\|
mbed_official	237:f3da66175598	481	(__HAL_ADC_IS_ENABLED(&tmphadcSharingSameCommonRegister) == RESET) ))
mbed_official	237:f3da66175598	482	{
mbed_official	237:f3da66175598	483	/* Reset configuration of ADC common register CCR: */
mbed_official	237:f3da66175598	484	/* - ADC clock mode: CKMODE */
mbed_official	237:f3da66175598	485	/* Some parameters of this register are not reset, since they are set */
mbed_official	237:f3da66175598	486	/* by other functions and must be kept in case of usage of this */
mbed_official	237:f3da66175598	487	/* function on the fly (update of a parameter of ADC_InitTypeDef */
mbed_official	237:f3da66175598	488	/* without needing to reconfigure all other ADC groups/channels */
mbed_official	237:f3da66175598	489	/* parameters): */
mbed_official	237:f3da66175598	490	/* - multimode related parameters: MDMA, DMACFG, DELAY, MULTI (set */
mbed_official	237:f3da66175598	491	/* into HAL_ADCEx_MultiModeConfigChannel() ) */
mbed_official	237:f3da66175598	492	/* - internal measurement paths: Vbat, temperature sensor, Vref */
mbed_official	237:f3da66175598	493	/* (set into HAL_ADC_ConfigChannel() or */
mbed_official	237:f3da66175598	494	/* HAL_ADCEx_InjectedConfigChannel() ) */
mbed_official	237:f3da66175598	495	tmpADC_Common->CCR &= ~(ADC_CCR_CKMODE);
mbed_official	237:f3da66175598	496
mbed_official	237:f3da66175598	497	/* Configuration of common ADC clock: clock source PLL or AHB with */
mbed_official	237:f3da66175598	498	/* selectable prescaler */
mbed_official	237:f3da66175598	499	tmpADC_Common->CCR \|= hadc->Init.ClockPrescaler;
mbed_official	237:f3da66175598	500	}
mbed_official	237:f3da66175598	501
mbed_official	237:f3da66175598	502	/* Configuration of ADC: */
mbed_official	237:f3da66175598	503	/* - resolution */
mbed_official	237:f3da66175598	504	/* - data alignment */
mbed_official	237:f3da66175598	505	/* - external trigger to start conversion */
mbed_official	237:f3da66175598	506	/* - external trigger polarity */
mbed_official	237:f3da66175598	507	/* - continuous conversion mode */
mbed_official	237:f3da66175598	508	/* - overrun */
mbed_official	237:f3da66175598	509	/* - discontinuous mode */
mbed_official	237:f3da66175598	510	hadc->Instance->CFGR &= ~( ADC_CFGR_DISCNUM \|
mbed_official	237:f3da66175598	511	ADC_CFGR_DISCEN \|
mbed_official	237:f3da66175598	512	ADC_CFGR_CONT \|
mbed_official	237:f3da66175598	513	ADC_CFGR_OVRMOD \|
mbed_official	237:f3da66175598	514	ADC_CFGR_EXTSEL \|
mbed_official	237:f3da66175598	515	ADC_CFGR_EXTEN \|
mbed_official	237:f3da66175598	516	ADC_CFGR_ALIGN \|
mbed_official	237:f3da66175598	517	ADC_CFGR_RES );
mbed_official	237:f3da66175598	518
mbed_official	237:f3da66175598	519	tmpCFGR \|= ( __HAL_ADC_CFGR_CONTINUOUS(hadc->Init.ContinuousConvMode) \|
mbed_official	237:f3da66175598	520	__HAL_ADC_CFGR_OVERRUN(hadc->Init.Overrun) \|
mbed_official	237:f3da66175598	521	hadc->Init.DataAlign \|
mbed_official	237:f3da66175598	522	hadc->Init.Resolution );
mbed_official	237:f3da66175598	523
mbed_official	237:f3da66175598	524	/* Enable discontinuous mode only if continuous mode is disabled */
mbed_official	237:f3da66175598	525	if ((hadc->Init.DiscontinuousConvMode == ENABLE) &&
mbed_official	237:f3da66175598	526	(hadc->Init.ContinuousConvMode == DISABLE) )
mbed_official	237:f3da66175598	527	{
mbed_official	237:f3da66175598	528	/* Enable the selected ADC regular discontinuous mode */
mbed_official	237:f3da66175598	529	/* Set the number of channels to be converted in discontinuous mode */
mbed_official	237:f3da66175598	530	tmpCFGR \|= ( ADC_CFGR_DISCEN \|
mbed_official	237:f3da66175598	531	__HAL_ADC_CFGR_DISCONTINUOUS_NUM(hadc->Init.NbrOfDiscConversion) );
mbed_official	237:f3da66175598	532	}
mbed_official	237:f3da66175598	533
mbed_official	237:f3da66175598	534	/* Enable external trigger if trigger selection is different of software */
mbed_official	237:f3da66175598	535	/* start. */
mbed_official	237:f3da66175598	536	/* Note: This configuration keeps the hardware feature of parameter */
mbed_official	237:f3da66175598	537	/* ExternalTrigConvEdge "trigger edge none" equivalent to */
mbed_official	237:f3da66175598	538	/* software start. */
mbed_official	237:f3da66175598	539	if (hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
mbed_official	237:f3da66175598	540	{
mbed_official	237:f3da66175598	541	tmpCFGR \|= ( __HAL_ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) \|
mbed_official	237:f3da66175598	542	hadc->Init.ExternalTrigConvEdge );
mbed_official	237:f3da66175598	543	}
mbed_official	237:f3da66175598	544
mbed_official	237:f3da66175598	545	/* Parameters update conditioned to ADC state: */
mbed_official	237:f3da66175598	546	/* Parameters that can be updated when ADC is disabled or enabled without */
mbed_official	237:f3da66175598	547	/* conversion on going on regular and injected groups: */
mbed_official	237:f3da66175598	548	/* - DMA continuous request */
mbed_official	237:f3da66175598	549	/* - LowPowerAutoWait feature */
mbed_official	237:f3da66175598	550	if (__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET)
mbed_official	237:f3da66175598	551	{
mbed_official	237:f3da66175598	552	hadc->Instance->CFGR &= ~( ADC_CFGR_AUTDLY \|
mbed_official	237:f3da66175598	553	ADC_CFGR_DMACFG );
mbed_official	237:f3da66175598	554
mbed_official	237:f3da66175598	555	tmpCFGR \|= ( __HAL_ADC_CFGR_AUTOWAIT(hadc->Init.LowPowerAutoWait) \|
mbed_official	237:f3da66175598	556	__HAL_ADC_CFGR_DMACONTREQ(hadc->Init.DMAContinuousRequests) );
mbed_official	237:f3da66175598	557	}
mbed_official	237:f3da66175598	558
mbed_official	237:f3da66175598	559	/* Update ADC configuration register with previous settings */
mbed_official	237:f3da66175598	560	hadc->Instance->CFGR \|= tmpCFGR;
mbed_official	237:f3da66175598	561
mbed_official	237:f3da66175598	562
mbed_official	237:f3da66175598	563	/* Configuration of regular group sequencer: */
mbed_official	237:f3da66175598	564	/* - if scan mode is disabled, regular channels sequence length is set to */
mbed_official	237:f3da66175598	565	/* 0x00: 1 channel converted (channel on regular rank 1) */
mbed_official	237:f3da66175598	566	/* Parameter "NbrOfConversion" is discarded. */
mbed_official	237:f3da66175598	567	/* Note: Scan mode is not present by hardware on this device, but */
mbed_official	237:f3da66175598	568	/* emulated by software for alignment over all STM32 devices. */
mbed_official	237:f3da66175598	569	/* - if scan mode is enabled, regular channels sequence length is set to */
mbed_official	237:f3da66175598	570	/* parameter "NbrOfConversion" */
mbed_official	237:f3da66175598	571	hadc->Instance->SQR1 &= ~(ADC_SQR1_L);
mbed_official	237:f3da66175598	572	if (hadc->Init.ScanConvMode == ADC_SCAN_ENABLE)
mbed_official	237:f3da66175598	573	{
mbed_official	237:f3da66175598	574	/* Set number of ranks in regular group sequencer */
mbed_official	237:f3da66175598	575	hadc->Instance->SQR1 \|= (hadc->Init.NbrOfConversion - (uint8_t)1);
mbed_official	237:f3da66175598	576	}
mbed_official	237:f3da66175598	577
mbed_official	237:f3da66175598	578	/* Set ADC error code to none */
mbed_official	237:f3da66175598	579	__HAL_ADC_CLEAR_ERRORCODE(hadc);
mbed_official	237:f3da66175598	580
mbed_official	237:f3da66175598	581	/* Initialize the ADC state */
mbed_official	237:f3da66175598	582	hadc->State = HAL_ADC_STATE_READY;
mbed_official	237:f3da66175598	583
mbed_official	237:f3da66175598	584	}
mbed_official	237:f3da66175598	585	else
mbed_official	237:f3da66175598	586	{
mbed_official	237:f3da66175598	587	/* Update ADC state machine to error */
mbed_official	237:f3da66175598	588	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	589
mbed_official	237:f3da66175598	590	tmpHALStatus = HAL_ERROR;
mbed_official	237:f3da66175598	591	}
mbed_official	237:f3da66175598	592
mbed_official	237:f3da66175598	593
mbed_official	237:f3da66175598	594	/* Return function status */
mbed_official	237:f3da66175598	595	return tmpHALStatus;
mbed_official	237:f3da66175598	596	}
mbed_official	237:f3da66175598	597	#endif /* STM32F303xC \|\| STM32F358xx \|\| STM32F302xC \|\| STM32F303x8 \|\| STM32F328xx \|\| STM32F334x8 \|\| STM32F301x8 \|\| STM32F318xx \|\| STM32F302x8 */
mbed_official	237:f3da66175598	598
mbed_official	237:f3da66175598	599	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	237:f3da66175598	600	/**
mbed_official	237:f3da66175598	601	* @brief Initializes the ADC peripheral and regular group according to
mbed_official	237:f3da66175598	602	* parameters specified in structure "ADC_InitTypeDef".
mbed_official	237:f3da66175598	603	* @note As prerequisite, ADC clock must be configured at RCC top level
mbed_official	237:f3da66175598	604	* (clock source APB2).
mbed_official	237:f3da66175598	605	* See commented example code below that can be copied and uncommented
mbed_official	237:f3da66175598	606	* into HAL_ADC_MspInit().
mbed_official	237:f3da66175598	607	* @note Possibility to update parameters on the fly:
mbed_official	237:f3da66175598	608	* This function initializes the ADC MSP (HAL_ADC_MspInit()) only when
mbed_official	237:f3da66175598	609	* coming from ADC state reset. Following calls to this function can
mbed_official	237:f3da66175598	610	* be used to reconfigure some parameters of ADC_InitTypeDef
mbed_official	237:f3da66175598	611	* structure on the fly, without modifying MSP configuration. If ADC
mbed_official	237:f3da66175598	612	* MSP has to be modified again, HAL_ADC_DeInit() must be called
mbed_official	237:f3da66175598	613	* before HAL_ADC_Init().
mbed_official	237:f3da66175598	614	* The setting of these parameters is conditioned to ADC state.
mbed_official	237:f3da66175598	615	* For parameters constraints, see comments of structure
mbed_official	237:f3da66175598	616	* "ADC_InitTypeDef".
mbed_official	237:f3da66175598	617	* @note This function configures the ADC within 2 scopes: scope of entire
mbed_official	237:f3da66175598	618	* ADC and scope of regular group. For parameters details, see comments
mbed_official	237:f3da66175598	619	* of structure "ADC_InitTypeDef".
mbed_official	237:f3da66175598	620	* @param hadc: ADC handle
mbed_official	237:f3da66175598	621	* @retval HAL status
mbed_official	237:f3da66175598	622	*/
mbed_official	237:f3da66175598	623	HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
mbed_official	237:f3da66175598	624	{
mbed_official	237:f3da66175598	625	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	237:f3da66175598	626
mbed_official	237:f3da66175598	627	/* Check ADC handle */
mbed_official	237:f3da66175598	628	if(hadc == NULL)
mbed_official	237:f3da66175598	629	{
mbed_official	237:f3da66175598	630	return HAL_ERROR;
mbed_official	237:f3da66175598	631	}
mbed_official	237:f3da66175598	632
mbed_official	237:f3da66175598	633	/* Check the parameters */
mbed_official	237:f3da66175598	634	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	635	assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));
mbed_official	237:f3da66175598	636	assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode));
mbed_official	237:f3da66175598	637	assert_param(IS_ADC_REGULAR_NB_CONV(hadc->Init.NbrOfConversion));
mbed_official	237:f3da66175598	638	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
mbed_official	237:f3da66175598	639	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode));
mbed_official	237:f3da66175598	640	assert_param(IS_ADC_REGULAR_DISCONT_NUMBER(hadc->Init.NbrOfDiscConversion));
mbed_official	237:f3da66175598	641	assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv));
mbed_official	237:f3da66175598	642
mbed_official	237:f3da66175598	643	/* As prerequisite, into HAL_ADC_MspInit(), ADC clock must be configured */
mbed_official	237:f3da66175598	644	/* at RCC top level. */
mbed_official	237:f3da66175598	645	/* For example: */
mbed_official	237:f3da66175598	646	/* __ADC1_CLK_ENABLE(); */
mbed_official	237:f3da66175598	647
mbed_official	237:f3da66175598	648
mbed_official	237:f3da66175598	649	/* Actions performed only if ADC is coming from state reset: */
mbed_official	237:f3da66175598	650	/* - Initialization of ADC MSP */
mbed_official	237:f3da66175598	651	if (hadc->State == HAL_ADC_STATE_RESET)
mbed_official	237:f3da66175598	652	{
mbed_official	237:f3da66175598	653	/* Init the low level hardware */
mbed_official	237:f3da66175598	654	HAL_ADC_MspInit(hadc);
mbed_official	237:f3da66175598	655	}
mbed_official	237:f3da66175598	656
mbed_official	237:f3da66175598	657	/* Stop potential conversion on going, on regular and injected groups */
mbed_official	237:f3da66175598	658	/* Disable ADC peripheral */
mbed_official	237:f3da66175598	659	/* Note: In case of ADC already enabled, precaution to not launch an */
mbed_official	237:f3da66175598	660	/* unwanted conversion while modifying register CR2 by writing 1 to */
mbed_official	237:f3da66175598	661	/* bit ADON. */
mbed_official	237:f3da66175598	662	tmpHALStatus = ADC_ConversionStop_Disable(hadc);
mbed_official	237:f3da66175598	663
mbed_official	237:f3da66175598	664
mbed_official	237:f3da66175598	665	/* Configuration of ADC parameters if previous preliminary actions are */
mbed_official	237:f3da66175598	666	/* correctly completed. */
mbed_official	237:f3da66175598	667	if (tmpHALStatus != HAL_ERROR)
mbed_official	237:f3da66175598	668	{
mbed_official	237:f3da66175598	669	/* Initialize the ADC state */
mbed_official	237:f3da66175598	670	hadc->State = HAL_ADC_STATE_BUSY;
mbed_official	237:f3da66175598	671
mbed_official	237:f3da66175598	672	/* Set ADC parameters */
mbed_official	237:f3da66175598	673
mbed_official	237:f3da66175598	674	/* Configuration of ADC: */
mbed_official	237:f3da66175598	675	/* - data alignment */
mbed_official	237:f3da66175598	676	/* - external trigger to start conversion */
mbed_official	237:f3da66175598	677	/* - external trigger polarity (always set to 1, because needed for all */
mbed_official	237:f3da66175598	678	/* triggers: external trigger of SW start) */
mbed_official	237:f3da66175598	679	/* - continuous conversion mode */
mbed_official	237:f3da66175598	680	hadc->Instance->CR2 &= ~( ADC_CR2_ALIGN \|
mbed_official	237:f3da66175598	681	ADC_CR2_EXTSEL \|
mbed_official	237:f3da66175598	682	ADC_CR2_EXTTRIG \|
mbed_official	237:f3da66175598	683	ADC_CR2_CONT );
mbed_official	237:f3da66175598	684
mbed_official	237:f3da66175598	685	hadc->Instance->CR2 \|= ( hadc->Init.DataAlign \|
mbed_official	237:f3da66175598	686	hadc->Init.ExternalTrigConv \|
mbed_official	237:f3da66175598	687	ADC_CR2_EXTTRIG \|
mbed_official	237:f3da66175598	688	__HAL_ADC_CR2_CONTINUOUS(hadc->Init.ContinuousConvMode) );
mbed_official	237:f3da66175598	689
mbed_official	237:f3da66175598	690	/* Configuration of ADC: */
mbed_official	237:f3da66175598	691	/* - scan mode */
mbed_official	237:f3da66175598	692	/* - discontinuous mode disable/enable */
mbed_official	237:f3da66175598	693	/* - discontinuous mode number of conversions */
mbed_official	237:f3da66175598	694	hadc->Instance->CR1 &= ~( ADC_CR1_SCAN \|
mbed_official	237:f3da66175598	695	ADC_CR1_DISCEN \|
mbed_official	237:f3da66175598	696	ADC_CR1_DISCNUM );
mbed_official	237:f3da66175598	697
mbed_official	237:f3da66175598	698	hadc->Instance->CR1 \|= ( __HAL_ADC_CR1_SCAN(hadc->Init.ScanConvMode) );
mbed_official	237:f3da66175598	699
mbed_official	237:f3da66175598	700	/* Enable discontinuous mode only if continuous mode is disabled */
mbed_official	237:f3da66175598	701	if ((hadc->Init.DiscontinuousConvMode == ENABLE) &&
mbed_official	237:f3da66175598	702	(hadc->Init.ContinuousConvMode == DISABLE) )
mbed_official	237:f3da66175598	703	{
mbed_official	237:f3da66175598	704	/* Enable the selected ADC regular discontinuous mode */
mbed_official	237:f3da66175598	705	hadc->Instance->CR1 \|= (ADC_CR1_DISCEN);
mbed_official	237:f3da66175598	706
mbed_official	237:f3da66175598	707	/* Set the number of channels to be converted in discontinuous mode */
mbed_official	237:f3da66175598	708	hadc->Instance->CR1 \|= __HAL_ADC_CR1_DISCONTINUOUS_NUM(hadc->Init.NbrOfDiscConversion);
mbed_official	237:f3da66175598	709	}
mbed_official	237:f3da66175598	710
mbed_official	237:f3da66175598	711	/* Configuration of regular group sequencer: */
mbed_official	237:f3da66175598	712	/* - if scan mode is disabled, regular channels sequence length is set to */
mbed_official	237:f3da66175598	713	/* 0x00: 1 channel converted (channel on regular rank 1) */
mbed_official	237:f3da66175598	714	/* Parameter "NbrOfConversion" is discarded. */
mbed_official	237:f3da66175598	715	/* Note: Scan mode is present by hardware on this device and, if */
mbed_official	237:f3da66175598	716	/* disabled, discards automatically nb of conversions. Anyway, nb of */
mbed_official	237:f3da66175598	717	/* conversions is forced to 0x00 for alignment over all STM32 devices. */
mbed_official	237:f3da66175598	718	/* - if scan mode is enabled, regular channels sequence length is set to */
mbed_official	237:f3da66175598	719	/* parameter "NbrOfConversion" */
mbed_official	237:f3da66175598	720	hadc->Instance->SQR1 &= ~(ADC_SQR1_L);
mbed_official	237:f3da66175598	721	if (hadc->Init.ScanConvMode == ADC_SCAN_ENABLE)
mbed_official	237:f3da66175598	722	{
mbed_official	237:f3da66175598	723	/* Set number of ranks in regular group sequencer */
mbed_official	237:f3da66175598	724	hadc->Instance->SQR1 \|= __HAL_ADC_SQR1_L(hadc->Init.NbrOfConversion);
mbed_official	237:f3da66175598	725	}
mbed_official	237:f3da66175598	726
mbed_official	237:f3da66175598	727	/* Set ADC error code to none */
mbed_official	237:f3da66175598	728	__HAL_ADC_CLEAR_ERRORCODE(hadc);
mbed_official	237:f3da66175598	729
mbed_official	237:f3da66175598	730	/* Initialize the ADC state */
mbed_official	237:f3da66175598	731	hadc->State = HAL_ADC_STATE_READY;
mbed_official	237:f3da66175598	732	}
mbed_official	237:f3da66175598	733
mbed_official	237:f3da66175598	734	/* Return function status */
mbed_official	237:f3da66175598	735	return tmpHALStatus;
mbed_official	237:f3da66175598	736	}
mbed_official	237:f3da66175598	737	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	237:f3da66175598	738
mbed_official	237:f3da66175598	739	#if defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| defined(STM32F302xC) \|\| defined(STM32F303x8) \|\| defined(STM32F328xx) \|\| defined(STM32F334x8) \|\| defined(STM32F301x8) \|\| defined(STM32F318xx) \|\| defined(STM32F302x8)
mbed_official	237:f3da66175598	740	/**
mbed_official	237:f3da66175598	741	* @brief Deinitialize the ADC peripheral registers to their default reset
mbed_official	237:f3da66175598	742	* values, with deinitialization of the ADC MSP.
mbed_official	237:f3da66175598	743	* @note For devices with several ADCs: reset of ADC common registers is done
mbed_official	237:f3da66175598	744	* only if all ADCs sharing the same common group are disabled.
mbed_official	237:f3da66175598	745	* If this is not the case, reset of these common parameters reset is
mbed_official	237:f3da66175598	746	* bypassed without error reporting: it can be the intended behaviour in
mbed_official	237:f3da66175598	747	* case of reset of a single ADC while the other ADCs sharing the same
mbed_official	237:f3da66175598	748	* common group is still running.
mbed_official	237:f3da66175598	749	* @note For devices with several ADCs: Global reset of all ADCs sharing a
mbed_official	237:f3da66175598	750	* common group is possible.
mbed_official	237:f3da66175598	751	* As this function is intended to reset a single ADC, to not impact
mbed_official	237:f3da66175598	752	* other ADCs, instructions for global reset of multiple ADCs have been
mbed_official	237:f3da66175598	753	* let commented below.
mbed_official	237:f3da66175598	754	* If needed, the example code can be copied and uncommented into
mbed_official	237:f3da66175598	755	* function HAL_ADC_MspDeInit().
mbed_official	237:f3da66175598	756	* @param hadc: ADC handle
mbed_official	237:f3da66175598	757	* @retval HAL status
mbed_official	237:f3da66175598	758	*/
mbed_official	237:f3da66175598	759	HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
mbed_official	237:f3da66175598	760	{
mbed_official	237:f3da66175598	761	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	237:f3da66175598	762	ADC_Common_TypeDef *tmpADC_Common;
mbed_official	237:f3da66175598	763	ADC_HandleTypeDef tmphadcSharingSameCommonRegister;
mbed_official	237:f3da66175598	764
mbed_official	237:f3da66175598	765	/* Check ADC handle */
mbed_official	237:f3da66175598	766	if(hadc == NULL)
mbed_official	237:f3da66175598	767	{
mbed_official	237:f3da66175598	768	return HAL_ERROR;
mbed_official	237:f3da66175598	769	}
mbed_official	237:f3da66175598	770
mbed_official	237:f3da66175598	771	/* Check the parameters */
mbed_official	237:f3da66175598	772	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	773
mbed_official	237:f3da66175598	774	/* Change ADC state */
mbed_official	237:f3da66175598	775	hadc->State = HAL_ADC_STATE_BUSY;
mbed_official	237:f3da66175598	776
mbed_official	237:f3da66175598	777	/* Stop potential conversion on going, on regular and injected groups */
mbed_official	237:f3da66175598	778	tmpHALStatus = ADC_ConversionStop(hadc, REGULAR_INJECTED_GROUP);
mbed_official	237:f3da66175598	779
mbed_official	237:f3da66175598	780	/* Disable ADC peripheral if conversions are effectively stopped */
mbed_official	237:f3da66175598	781	if (tmpHALStatus != HAL_ERROR)
mbed_official	237:f3da66175598	782	{
mbed_official	237:f3da66175598	783	/* Flush register JSQR: queue sequencer reset when injected queue */
mbed_official	237:f3da66175598	784	/* sequencer is enabled and ADC disabled */
mbed_official	237:f3da66175598	785	/* Enable injected queue sequencer after injected conversion stop */
mbed_official	237:f3da66175598	786	hadc->Instance->CFGR \|= ADC_CFGR_JQM;
mbed_official	237:f3da66175598	787
mbed_official	237:f3da66175598	788	/* Disable the ADC peripheral */
mbed_official	237:f3da66175598	789	tmpHALStatus = ADC_Disable(hadc);
mbed_official	237:f3da66175598	790
mbed_official	237:f3da66175598	791	/* Check if ADC is effectively disabled */
mbed_official	237:f3da66175598	792	if (tmpHALStatus != HAL_ERROR)
mbed_official	237:f3da66175598	793	{
mbed_official	237:f3da66175598	794	/* Change ADC state */
mbed_official	237:f3da66175598	795	hadc->State = HAL_ADC_STATE_READY;
mbed_official	237:f3da66175598	796	}
mbed_official	237:f3da66175598	797	else
mbed_official	237:f3da66175598	798	{
mbed_official	237:f3da66175598	799	tmpHALStatus = HAL_ERROR;
mbed_official	237:f3da66175598	800	}
mbed_official	237:f3da66175598	801	}
mbed_official	237:f3da66175598	802
mbed_official	237:f3da66175598	803
mbed_official	237:f3da66175598	804	/* Configuration of ADC parameters if previous preliminary actions are */
mbed_official	237:f3da66175598	805	/* correctly completed. */
mbed_official	237:f3da66175598	806	if (tmpHALStatus != HAL_ERROR)
mbed_official	237:f3da66175598	807	{
mbed_official	237:f3da66175598	808
mbed_official	237:f3da66175598	809	/* ========== Reset ADC registers ========== */
mbed_official	237:f3da66175598	810	/* Reset register IER */
mbed_official	237:f3da66175598	811	__HAL_ADC_DISABLE_IT(hadc, (ADC_IT_AWD3 \| ADC_IT_AWD2 \| ADC_IT_AWD1 \|
mbed_official	237:f3da66175598	812	ADC_IT_JQOVF \| ADC_IT_OVR \|
mbed_official	237:f3da66175598	813	ADC_IT_JEOS \| ADC_IT_JEOC \|
mbed_official	237:f3da66175598	814	ADC_IT_EOS \| ADC_IT_EOC \|
mbed_official	237:f3da66175598	815	ADC_IT_EOSMP \| ADC_IT_RDY ) );
mbed_official	237:f3da66175598	816
mbed_official	237:f3da66175598	817	/* Reset register ISR */
mbed_official	237:f3da66175598	818	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_AWD3 \| ADC_FLAG_AWD2 \| ADC_FLAG_AWD1 \|
mbed_official	237:f3da66175598	819	ADC_FLAG_JQOVF \| ADC_FLAG_OVR \|
mbed_official	237:f3da66175598	820	ADC_FLAG_JEOS \| ADC_FLAG_JEOC \|
mbed_official	237:f3da66175598	821	ADC_FLAG_EOS \| ADC_FLAG_EOC \|
mbed_official	237:f3da66175598	822	ADC_FLAG_EOSMP \| ADC_FLAG_RDY ) );
mbed_official	237:f3da66175598	823
mbed_official	237:f3da66175598	824	/* Reset register CR */
mbed_official	237:f3da66175598	825	/* Bits ADC_CR_JADSTP, ADC_CR_ADSTP, ADC_CR_JADSTART, ADC_CR_ADSTART are */
mbed_official	237:f3da66175598	826	/* in access mode "read-set": no direct reset applicable. */
mbed_official	237:f3da66175598	827	/* Reset Calibration mode to default setting (single ended): */
mbed_official	237:f3da66175598	828	/* Disable voltage regulator: */
mbed_official	237:f3da66175598	829	/* Note: Voltage regulator disable is conditioned to ADC state disabled: */
mbed_official	237:f3da66175598	830	/* already done above. */
mbed_official	237:f3da66175598	831	/* Note: Voltage regulator disable is intended for power saving. */
mbed_official	237:f3da66175598	832	/* Sequence to disable voltage regulator: */
mbed_official	237:f3da66175598	833	/* 1. Set the intermediate state before moving the ADC voltage regulator */
mbed_official	237:f3da66175598	834	/* to disable state. */
mbed_official	237:f3da66175598	835	hadc->Instance->CR &= ~(ADC_CR_ADVREGEN \| ADC_CR_ADCALDIF);
mbed_official	237:f3da66175598	836	/* 2. Set ADVREGEN bits to 0x10 */
mbed_official	237:f3da66175598	837	hadc->Instance->CR \|= ADC_CR_ADVREGEN_1;
mbed_official	237:f3da66175598	838
mbed_official	237:f3da66175598	839	/* Reset register CFGR */
mbed_official	237:f3da66175598	840	hadc->Instance->CFGR &= ~(ADC_CFGR_AWD1CH \| ADC_CFGR_JAUTO \| ADC_CFGR_JAWD1EN \|
mbed_official	237:f3da66175598	841	ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL \| ADC_CFGR_JQM \|
mbed_official	237:f3da66175598	842	ADC_CFGR_JDISCEN \| ADC_CFGR_DISCNUM \| ADC_CFGR_DISCEN \|
mbed_official	237:f3da66175598	843	ADC_CFGR_AUTDLY \| ADC_CFGR_CONT \| ADC_CFGR_OVRMOD \|
mbed_official	237:f3da66175598	844	ADC_CFGR_EXTEN \| ADC_CFGR_EXTSEL \| ADC_CFGR_ALIGN \|
mbed_official	237:f3da66175598	845	ADC_CFGR_RES \| ADC_CFGR_DMACFG \| ADC_CFGR_DMAEN );
mbed_official	237:f3da66175598	846
mbed_official	237:f3da66175598	847	/* Reset register SMPR1 */
mbed_official	237:f3da66175598	848	hadc->Instance->SMPR1 &= ~(ADC_SMPR1_SMP9 \| ADC_SMPR1_SMP8 \| ADC_SMPR1_SMP7 \|
mbed_official	237:f3da66175598	849	ADC_SMPR1_SMP6 \| ADC_SMPR1_SMP5 \| ADC_SMPR1_SMP4 \|
mbed_official	237:f3da66175598	850	ADC_SMPR1_SMP3 \| ADC_SMPR1_SMP2 \| ADC_SMPR1_SMP1 );
mbed_official	237:f3da66175598	851
mbed_official	237:f3da66175598	852	/* Reset register SMPR2 */
mbed_official	237:f3da66175598	853	hadc->Instance->SMPR2 &= ~(ADC_SMPR2_SMP18 \| ADC_SMPR2_SMP17 \| ADC_SMPR2_SMP16 \|
mbed_official	237:f3da66175598	854	ADC_SMPR2_SMP15 \| ADC_SMPR2_SMP14 \| ADC_SMPR2_SMP13 \|
mbed_official	237:f3da66175598	855	ADC_SMPR2_SMP12 \| ADC_SMPR2_SMP11 \| ADC_SMPR2_SMP10 );
mbed_official	237:f3da66175598	856
mbed_official	237:f3da66175598	857	/* Reset register TR1 */
mbed_official	237:f3da66175598	858	hadc->Instance->TR1 &= ~(ADC_TR1_HT1 \| ADC_TR1_LT1);
mbed_official	237:f3da66175598	859
mbed_official	237:f3da66175598	860	/* Reset register TR2 */
mbed_official	237:f3da66175598	861	hadc->Instance->TR2 &= ~(ADC_TR2_HT2 \| ADC_TR2_LT2);
mbed_official	237:f3da66175598	862
mbed_official	237:f3da66175598	863	/* Reset register TR3 */
mbed_official	237:f3da66175598	864	hadc->Instance->TR3 &= ~(ADC_TR3_HT3 \| ADC_TR3_LT3);
mbed_official	237:f3da66175598	865
mbed_official	237:f3da66175598	866	/* Reset register SQR1 */
mbed_official	237:f3da66175598	867	hadc->Instance->SQR1 &= ~(ADC_SQR1_SQ4 \| ADC_SQR1_SQ3 \| ADC_SQR1_SQ2 \|
mbed_official	237:f3da66175598	868	ADC_SQR1_SQ1 \| ADC_SQR1_L);
mbed_official	237:f3da66175598	869
mbed_official	237:f3da66175598	870	/* Reset register SQR2 */
mbed_official	237:f3da66175598	871	hadc->Instance->SQR2 &= ~(ADC_SQR2_SQ9 \| ADC_SQR2_SQ8 \| ADC_SQR2_SQ7 \|
mbed_official	237:f3da66175598	872	ADC_SQR2_SQ6 \| ADC_SQR2_SQ5);
mbed_official	237:f3da66175598	873
mbed_official	237:f3da66175598	874	/* Reset register SQR3 */
mbed_official	237:f3da66175598	875	hadc->Instance->SQR3 &= ~(ADC_SQR3_SQ14 \| ADC_SQR3_SQ13 \| ADC_SQR3_SQ12 \|
mbed_official	237:f3da66175598	876	ADC_SQR3_SQ11 \| ADC_SQR3_SQ10);
mbed_official	237:f3da66175598	877
mbed_official	237:f3da66175598	878	/* Reset register SQR4 */
mbed_official	237:f3da66175598	879	hadc->Instance->SQR4 &= ~(ADC_SQR4_SQ16 \| ADC_SQR4_SQ15);
mbed_official	237:f3da66175598	880
mbed_official	237:f3da66175598	881	/* Reset register DR */
mbed_official	237:f3da66175598	882	/* bits in access mode read only, no direct reset applicable*/
mbed_official	237:f3da66175598	883
mbed_official	237:f3da66175598	884	/* Reset register OFR1 */
mbed_official	237:f3da66175598	885	hadc->Instance->OFR1 &= ~(ADC_OFR1_OFFSET1_EN \| ADC_OFR1_OFFSET1_CH \| ADC_OFR1_OFFSET1);
mbed_official	237:f3da66175598	886	/* Reset register OFR2 */
mbed_official	237:f3da66175598	887	hadc->Instance->OFR2 &= ~(ADC_OFR2_OFFSET2_EN \| ADC_OFR2_OFFSET2_CH \| ADC_OFR2_OFFSET2);
mbed_official	237:f3da66175598	888	/* Reset register OFR3 */
mbed_official	237:f3da66175598	889	hadc->Instance->OFR3 &= ~(ADC_OFR3_OFFSET3_EN \| ADC_OFR3_OFFSET3_CH \| ADC_OFR3_OFFSET3);
mbed_official	237:f3da66175598	890	/* Reset register OFR4 */
mbed_official	237:f3da66175598	891	hadc->Instance->OFR4 &= ~(ADC_OFR4_OFFSET4_EN \| ADC_OFR4_OFFSET4_CH \| ADC_OFR4_OFFSET4);
mbed_official	237:f3da66175598	892
mbed_official	237:f3da66175598	893	/* Reset registers JDR1, JDR2, JDR3, JDR4 */
mbed_official	237:f3da66175598	894	/* bits in access mode read only, no direct reset applicable*/
mbed_official	237:f3da66175598	895
mbed_official	237:f3da66175598	896	/* Reset register AWD2CR */
mbed_official	237:f3da66175598	897	hadc->Instance->AWD2CR &= ~(ADC_AWD2CR_AWD2CH);
mbed_official	237:f3da66175598	898
mbed_official	237:f3da66175598	899	/* Reset register AWD3CR */
mbed_official	237:f3da66175598	900	hadc->Instance->AWD3CR &= ~(ADC_AWD3CR_AWD3CH);
mbed_official	237:f3da66175598	901
mbed_official	237:f3da66175598	902	/* Reset register DIFSEL */
mbed_official	237:f3da66175598	903	hadc->Instance->DIFSEL &= ~(ADC_DIFSEL_DIFSEL);
mbed_official	237:f3da66175598	904
mbed_official	237:f3da66175598	905	/* Reset register CALFACT */
mbed_official	237:f3da66175598	906	hadc->Instance->CALFACT &= ~(ADC_CALFACT_CALFACT_D \| ADC_CALFACT_CALFACT_S);
mbed_official	237:f3da66175598	907
mbed_official	237:f3da66175598	908
mbed_official	237:f3da66175598	909
mbed_official	237:f3da66175598	910
mbed_official	237:f3da66175598	911
mbed_official	237:f3da66175598	912
mbed_official	237:f3da66175598	913	/* ========== Reset common ADC registers ========== */
mbed_official	237:f3da66175598	914
mbed_official	237:f3da66175598	915	/* Pointer to the common control register to which is belonging hadc */
mbed_official	237:f3da66175598	916	/* (Depending on STM32F3 product, there may be up to 4 ADC and 2 common */
mbed_official	237:f3da66175598	917	/* control registers) */
mbed_official	237:f3da66175598	918	tmpADC_Common = __HAL_ADC_COMMON_REGISTER(hadc);
mbed_official	237:f3da66175598	919
mbed_official	237:f3da66175598	920	/* Set handle of the other ADC sharing the same common register */
mbed_official	237:f3da66175598	921	__HAL_ADC_COMMON_ADC_OTHER(hadc, &tmphadcSharingSameCommonRegister);
mbed_official	237:f3da66175598	922
mbed_official	237:f3da66175598	923	/* Software is allowed to change common parameters only when all ADCs of */
mbed_official	237:f3da66175598	924	/* the common group are disabled. */
mbed_official	237:f3da66175598	925	if ((__HAL_ADC_IS_ENABLED(hadc) == RESET) &&
mbed_official	237:f3da66175598	926	( (tmphadcSharingSameCommonRegister.Instance == NULL) \|\|
mbed_official	237:f3da66175598	927	(__HAL_ADC_IS_ENABLED(&tmphadcSharingSameCommonRegister) == RESET) ))
mbed_official	237:f3da66175598	928	{
mbed_official	237:f3da66175598	929	/* Reset configuration of ADC common register CCR:
mbed_official	237:f3da66175598	930	- clock mode: CKMODE
mbed_official	237:f3da66175598	931	- multimode related parameters: MDMA, DMACFG, DELAY, MULTI (set into
mbed_official	237:f3da66175598	932	HAL_ADCEx_MultiModeConfigChannel() )
mbed_official	237:f3da66175598	933	- internal measurement paths: Vbat, temperature sensor, Vref (set into
mbed_official	237:f3da66175598	934	HAL_ADC_ConfigChannel() or HAL_ADCEx_InjectedConfigChannel() )
mbed_official	237:f3da66175598	935	*/
mbed_official	237:f3da66175598	936	tmpADC_Common->CCR &= ~( ADC_CCR_CKMODE \|
mbed_official	237:f3da66175598	937	ADC_CCR_VBATEN \|
mbed_official	237:f3da66175598	938	ADC_CCR_TSEN \|
mbed_official	237:f3da66175598	939	ADC_CCR_VREFEN \|
mbed_official	237:f3da66175598	940	ADC_CCR_DMACFG \|
mbed_official	237:f3da66175598	941	ADC_CCR_DMACFG \|
mbed_official	237:f3da66175598	942	ADC_CCR_DELAY \|
mbed_official	237:f3da66175598	943	ADC_CCR_MULTI );
mbed_official	237:f3da66175598	944
mbed_official	237:f3da66175598	945	/* Other ADC common registers (CSR, CDR) are in access mode read only,
mbed_official	237:f3da66175598	946	no direct reset applicable */
mbed_official	237:f3da66175598	947	}
mbed_official	237:f3da66175598	948
mbed_official	237:f3da66175598	949
mbed_official	237:f3da66175598	950	/* ========== Hard reset of ADC peripheral ========== */
mbed_official	237:f3da66175598	951	/* Performs a global reset of the entire ADC peripheral: ADC state is */
mbed_official	237:f3da66175598	952	/* forced to a similar state after device power-on. */
mbed_official	237:f3da66175598	953	/* Caution: */
mbed_official	237:f3da66175598	954	/* These settings impact both ADC of common group: ADC1&ADC2, ADC3&ADC4 */
mbed_official	237:f3da66175598	955	/* if available (ADC2, ADC3, ADC4 availability depends on STM32 product) */
mbed_official	237:f3da66175598	956	/* As this function is intended to reset a single ADC, instructions for */
mbed_official	237:f3da66175598	957	/* global reset of multiple ADC have been let commented below. */
mbed_official	237:f3da66175598	958	/* */
mbed_official	237:f3da66175598	959	/* If global reset of common ADC is corresponding to the current */
mbed_official	237:f3da66175598	960	/* application, copy-paste and uncomment the following reset code into */
mbed_official	237:f3da66175598	961	/* function "void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)": */
mbed_official	237:f3da66175598	962	/* */
mbed_official	237:f3da66175598	963	/* ADC clock reset */
mbed_official	237:f3da66175598	964	/* if((hadc->Instance == ADC1) \|\| (hadc->Instance == ADC2)) */
mbed_official	237:f3da66175598	965	/* { */
mbed_official	237:f3da66175598	966	/* __ADC12_FORCE_RESET(); */
mbed_official	237:f3da66175598	967	/* __ADC12_RELEASE_RESET(); */
mbed_official	237:f3da66175598	968	/* } */
mbed_official	237:f3da66175598	969	/* else */
mbed_official	237:f3da66175598	970	/* { */
mbed_official	237:f3da66175598	971	/* __ADC34_FORCE_RESET(); */
mbed_official	237:f3da66175598	972	/* __ADC34_RELEASE_RESET(); */
mbed_official	237:f3da66175598	973	/* } */
mbed_official	237:f3da66175598	974	/* */
mbed_official	237:f3da66175598	975	/* ADC clock disable of both possible clock sources: AHB clock and */
mbed_official	237:f3da66175598	976	/* PLL clock. */
mbed_official	237:f3da66175598	977	/* if((hadc->Instance == ADC1) \|\| (hadc->Instance == ADC2)) */
mbed_official	237:f3da66175598	978	/* { */
mbed_official	237:f3da66175598	979	/* __HAL_RCC_ADC12_CONFIG(RCC_ADC12PLLCLK_OFF); */
mbed_official	237:f3da66175598	980	/* __ADC12_CLK_DISABLE(); */
mbed_official	237:f3da66175598	981	/* } */
mbed_official	237:f3da66175598	982	/* else */
mbed_official	237:f3da66175598	983	/* { */
mbed_official	237:f3da66175598	984	/* __HAL_RCC_ADC34_CONFIG(RCC_ADC12PLLCLK_OFF); */
mbed_official	237:f3da66175598	985	/* __ADC34_CLK_DISABLE(); */
mbed_official	237:f3da66175598	986	/* } */
mbed_official	237:f3da66175598	987
mbed_official	237:f3da66175598	988	/* DeInit the low level hardware */
mbed_official	237:f3da66175598	989	HAL_ADC_MspDeInit(hadc);
mbed_official	237:f3da66175598	990
mbed_official	237:f3da66175598	991	/* Set ADC error code to none */
mbed_official	237:f3da66175598	992	__HAL_ADC_CLEAR_ERRORCODE(hadc);
mbed_official	237:f3da66175598	993
mbed_official	237:f3da66175598	994	/* Change ADC state */
mbed_official	237:f3da66175598	995	hadc->State = HAL_ADC_STATE_RESET;
mbed_official	237:f3da66175598	996	}
mbed_official	237:f3da66175598	997
mbed_official	237:f3da66175598	998	/* Process unlocked */
mbed_official	237:f3da66175598	999	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	1000
mbed_official	237:f3da66175598	1001	/* Return function status */
mbed_official	237:f3da66175598	1002	return tmpHALStatus;
mbed_official	237:f3da66175598	1003	}
mbed_official	237:f3da66175598	1004	#endif /* STM32F303xC \|\| STM32F358xx \|\| STM32F302xC \|\| STM32F303x8 \|\| STM32F328xx \|\| STM32F334x8 \|\| STM32F301x8 \|\| STM32F318xx \|\| STM32F302x8 */
mbed_official	237:f3da66175598	1005
mbed_official	237:f3da66175598	1006	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	237:f3da66175598	1007	/**
mbed_official	237:f3da66175598	1008	* @brief Deinitialize the ADC peripheral registers to its default reset values.
mbed_official	237:f3da66175598	1009	* @note To not impact other ADCs, reset of common ADC registers have been
mbed_official	237:f3da66175598	1010	* left commented below.
mbed_official	237:f3da66175598	1011	* If needed, the example code can be copied and uncommented into
mbed_official	237:f3da66175598	1012	* function HAL_ADC_MspDeInit().
mbed_official	237:f3da66175598	1013	* @param hadc: ADC handle
mbed_official	237:f3da66175598	1014	* @retval HAL status
mbed_official	237:f3da66175598	1015	*/
mbed_official	237:f3da66175598	1016	HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
mbed_official	237:f3da66175598	1017	{
mbed_official	237:f3da66175598	1018	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	237:f3da66175598	1019
mbed_official	237:f3da66175598	1020	/* Check ADC handle */
mbed_official	237:f3da66175598	1021	if(hadc == NULL)
mbed_official	237:f3da66175598	1022	{
mbed_official	237:f3da66175598	1023	return HAL_ERROR;
mbed_official	237:f3da66175598	1024	}
mbed_official	237:f3da66175598	1025
mbed_official	237:f3da66175598	1026	/* Check the parameters */
mbed_official	237:f3da66175598	1027	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	1028
mbed_official	237:f3da66175598	1029	/* Change ADC state */
mbed_official	237:f3da66175598	1030	hadc->State = HAL_ADC_STATE_BUSY;
mbed_official	237:f3da66175598	1031
mbed_official	237:f3da66175598	1032	/* Stop potential conversion on going, on regular and injected groups */
mbed_official	237:f3da66175598	1033	/* Disable ADC peripheral */
mbed_official	237:f3da66175598	1034	tmpHALStatus = ADC_ConversionStop_Disable(hadc);
mbed_official	237:f3da66175598	1035
mbed_official	237:f3da66175598	1036
mbed_official	237:f3da66175598	1037	/* Configuration of ADC parameters if previous preliminary actions are */
mbed_official	237:f3da66175598	1038	/* correctly completed. */
mbed_official	237:f3da66175598	1039	if (tmpHALStatus != HAL_ERROR)
mbed_official	237:f3da66175598	1040	{
mbed_official	237:f3da66175598	1041	/* ========== Reset ADC registers ========== */
mbed_official	237:f3da66175598	1042	/* Reset register SR */
mbed_official	237:f3da66175598	1043	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_AWD \| ADC_FLAG_JEOC \| ADC_FLAG_EOC \|
mbed_official	237:f3da66175598	1044	ADC_FLAG_JSTRT \| ADC_FLAG_STRT));
mbed_official	237:f3da66175598	1045
mbed_official	237:f3da66175598	1046	/* Reset register CR1 */
mbed_official	237:f3da66175598	1047	hadc->Instance->CR1 &= ~(ADC_CR1_AWDEN \| ADC_CR1_JAWDEN \| ADC_CR1_DISCNUM \|
mbed_official	237:f3da66175598	1048	ADC_CR1_JDISCEN \| ADC_CR1_DISCEN \| ADC_CR1_JAUTO \|
mbed_official	237:f3da66175598	1049	ADC_CR1_AWDSGL \| ADC_CR1_SCAN \| ADC_CR1_JEOCIE \|
mbed_official	237:f3da66175598	1050	ADC_CR1_AWDIE \| ADC_CR1_EOCIE \| ADC_CR1_AWDCH);
mbed_official	237:f3da66175598	1051
mbed_official	237:f3da66175598	1052	/* Reset register CR2 */
mbed_official	237:f3da66175598	1053	hadc->Instance->CR2 &= ~(ADC_CR2_TSVREFE \| ADC_CR2_SWSTART \| ADC_CR2_JSWSTART \|
mbed_official	237:f3da66175598	1054	ADC_CR2_EXTTRIG \| ADC_CR2_EXTSEL \| ADC_CR2_JEXTTRIG \|
mbed_official	237:f3da66175598	1055	ADC_CR2_JEXTSEL \| ADC_CR2_ALIGN \| ADC_CR2_DMA \|
mbed_official	237:f3da66175598	1056	ADC_CR2_RSTCAL \| ADC_CR2_CAL \| ADC_CR2_CONT \|
mbed_official	237:f3da66175598	1057	ADC_CR2_ADON );
mbed_official	237:f3da66175598	1058
mbed_official	237:f3da66175598	1059	/* Reset register SMPR1 */
mbed_official	237:f3da66175598	1060	hadc->Instance->SMPR1 &= ~(ADC_SMPR1_SMP17 \| ADC_SMPR1_SMP16 \| ADC_SMPR1_SMP15 \|
mbed_official	237:f3da66175598	1061	ADC_SMPR1_SMP14 \| ADC_SMPR1_SMP13 \| ADC_SMPR1_SMP12 \|
mbed_official	237:f3da66175598	1062	ADC_SMPR1_SMP11 \|ADC_SMPR1_SMP10);
mbed_official	237:f3da66175598	1063
mbed_official	237:f3da66175598	1064	/* Reset register SMPR2 */
mbed_official	237:f3da66175598	1065	hadc->Instance->SMPR2 &= ~(ADC_SMPR2_SMP9 \| ADC_SMPR2_SMP8 \| ADC_SMPR2_SMP7 \|
mbed_official	237:f3da66175598	1066	ADC_SMPR2_SMP6 \| ADC_SMPR2_SMP5 \| ADC_SMPR2_SMP4 \|
mbed_official	237:f3da66175598	1067	ADC_SMPR2_SMP3 \| ADC_SMPR2_SMP2 \| ADC_SMPR2_SMP1 \|
mbed_official	237:f3da66175598	1068	ADC_SMPR2_SMP0);
mbed_official	237:f3da66175598	1069
mbed_official	237:f3da66175598	1070	/* Reset register JOFR1 */
mbed_official	237:f3da66175598	1071	hadc->Instance->JOFR1 &= ~(ADC_JOFR1_JOFFSET1);
mbed_official	237:f3da66175598	1072	/* Reset register JOFR2 */
mbed_official	237:f3da66175598	1073	hadc->Instance->JOFR2 &= ~(ADC_JOFR2_JOFFSET2);
mbed_official	237:f3da66175598	1074	/* Reset register JOFR3 */
mbed_official	237:f3da66175598	1075	hadc->Instance->JOFR3 &= ~(ADC_JOFR3_JOFFSET3);
mbed_official	237:f3da66175598	1076	/* Reset register JOFR4 */
mbed_official	237:f3da66175598	1077	hadc->Instance->JOFR4 &= ~(ADC_JOFR4_JOFFSET4);
mbed_official	237:f3da66175598	1078
mbed_official	237:f3da66175598	1079	/* Reset register HTR */
mbed_official	237:f3da66175598	1080	hadc->Instance->HTR &= ~(ADC_HTR_HT);
mbed_official	237:f3da66175598	1081	/* Reset register LTR */
mbed_official	237:f3da66175598	1082	hadc->Instance->LTR &= ~(ADC_LTR_LT);
mbed_official	237:f3da66175598	1083
mbed_official	237:f3da66175598	1084	/* Reset register SQR1 */
mbed_official	237:f3da66175598	1085	hadc->Instance->SQR1 &= ~(ADC_SQR1_L \|
mbed_official	237:f3da66175598	1086	ADC_SQR1_SQ16 \| ADC_SQR1_SQ15 \|
mbed_official	237:f3da66175598	1087	ADC_SQR1_SQ14 \| ADC_SQR1_SQ13 );
mbed_official	237:f3da66175598	1088
mbed_official	237:f3da66175598	1089	/* Reset register SQR1 */
mbed_official	237:f3da66175598	1090	hadc->Instance->SQR1 &= ~(ADC_SQR1_L \|
mbed_official	237:f3da66175598	1091	ADC_SQR1_SQ16 \| ADC_SQR1_SQ15 \|
mbed_official	237:f3da66175598	1092	ADC_SQR1_SQ14 \| ADC_SQR1_SQ13 );
mbed_official	237:f3da66175598	1093
mbed_official	237:f3da66175598	1094	/* Reset register SQR2 */
mbed_official	237:f3da66175598	1095	hadc->Instance->SQR2 &= ~(ADC_SQR2_SQ12 \| ADC_SQR2_SQ11 \| ADC_SQR2_SQ10 \|
mbed_official	237:f3da66175598	1096	ADC_SQR2_SQ9 \| ADC_SQR2_SQ8 \| ADC_SQR2_SQ7 );
mbed_official	237:f3da66175598	1097
mbed_official	237:f3da66175598	1098	/* Reset register SQR3 */
mbed_official	237:f3da66175598	1099	hadc->Instance->SQR3 &= ~(ADC_SQR3_SQ6 \| ADC_SQR3_SQ5 \| ADC_SQR3_SQ4 \|
mbed_official	237:f3da66175598	1100	ADC_SQR3_SQ3 \| ADC_SQR3_SQ2 \| ADC_SQR3_SQ1 );
mbed_official	237:f3da66175598	1101
mbed_official	237:f3da66175598	1102	/* Reset register JSQR */
mbed_official	237:f3da66175598	1103	hadc->Instance->JSQR &= ~(ADC_JSQR_JL \|
mbed_official	237:f3da66175598	1104	ADC_JSQR_JSQ4 \| ADC_JSQR_JSQ3 \|
mbed_official	237:f3da66175598	1105	ADC_JSQR_JSQ2 \| ADC_JSQR_JSQ1 );
mbed_official	237:f3da66175598	1106
mbed_official	237:f3da66175598	1107	/* Reset register JSQR */
mbed_official	237:f3da66175598	1108	hadc->Instance->JSQR &= ~(ADC_JSQR_JL \|
mbed_official	237:f3da66175598	1109	ADC_JSQR_JSQ4 \| ADC_JSQR_JSQ3 \|
mbed_official	237:f3da66175598	1110	ADC_JSQR_JSQ2 \| ADC_JSQR_JSQ1 );
mbed_official	237:f3da66175598	1111
mbed_official	237:f3da66175598	1112	/* Reset register DR */
mbed_official	237:f3da66175598	1113	/* bits in access mode read only, no direct reset applicable*/
mbed_official	237:f3da66175598	1114
mbed_official	237:f3da66175598	1115	/* Reset registers JDR1, JDR2, JDR3, JDR4 */
mbed_official	237:f3da66175598	1116	/* bits in access mode read only, no direct reset applicable*/
mbed_official	237:f3da66175598	1117
mbed_official	237:f3da66175598	1118	/* Reset VBAT measurement path, in case of enabled before by selecting */
mbed_official	237:f3da66175598	1119	/* channel ADC_CHANNEL_VBAT. */
mbed_official	237:f3da66175598	1120	SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_VBAT);
mbed_official	237:f3da66175598	1121
mbed_official	237:f3da66175598	1122
mbed_official	237:f3da66175598	1123	/* ========== Hard reset ADC peripheral ========== */
mbed_official	237:f3da66175598	1124	/* Performs a global reset of the entire ADC peripheral: ADC state is */
mbed_official	237:f3da66175598	1125	/* forced to a similar state after device power-on. */
mbed_official	237:f3da66175598	1126	/* If needed, copy-paste and uncomment the following reset code into */
mbed_official	237:f3da66175598	1127	/* function "void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)": */
mbed_official	237:f3da66175598	1128	/* */
mbed_official	237:f3da66175598	1129	/* __ADC1_FORCE_RESET(); */
mbed_official	237:f3da66175598	1130	/* __ADC1_RELEASE_RESET(); */
mbed_official	237:f3da66175598	1131
mbed_official	237:f3da66175598	1132	/* DeInit the low level hardware */
mbed_official	237:f3da66175598	1133	HAL_ADC_MspDeInit(hadc);
mbed_official	237:f3da66175598	1134
mbed_official	237:f3da66175598	1135	/* Set ADC error code to none */
mbed_official	237:f3da66175598	1136	__HAL_ADC_CLEAR_ERRORCODE(hadc);
mbed_official	237:f3da66175598	1137
mbed_official	237:f3da66175598	1138	/* Change ADC state */
mbed_official	237:f3da66175598	1139	hadc->State = HAL_ADC_STATE_RESET;
mbed_official	237:f3da66175598	1140
mbed_official	237:f3da66175598	1141	}
mbed_official	237:f3da66175598	1142
mbed_official	237:f3da66175598	1143	/* Process unlocked */
mbed_official	237:f3da66175598	1144	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	1145
mbed_official	237:f3da66175598	1146	/* Return function status */
mbed_official	237:f3da66175598	1147	return tmpHALStatus;
mbed_official	237:f3da66175598	1148	}
mbed_official	237:f3da66175598	1149	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	237:f3da66175598	1150
mbed_official	237:f3da66175598	1151	/**
mbed_official	237:f3da66175598	1152	* @}
mbed_official	237:f3da66175598	1153	*/
mbed_official	237:f3da66175598	1154
mbed_official	237:f3da66175598	1155	/** @defgroup ADCEx_Group2 Extended IO operation functions
mbed_official	237:f3da66175598	1156	* @brief Extended IO operation functions
mbed_official	237:f3da66175598	1157	*
mbed_official	237:f3da66175598	1158	@verbatim
mbed_official	237:f3da66175598	1159	===============================================================================
mbed_official	237:f3da66175598	1160	##### IO operation functions #####
mbed_official	237:f3da66175598	1161	===============================================================================
mbed_official	237:f3da66175598	1162	[..] This section provides functions allowing to:
mbed_official	237:f3da66175598	1163	(+) Start conversion of regular group.
mbed_official	237:f3da66175598	1164	(+) Stop conversion of regular group.
mbed_official	237:f3da66175598	1165	(+) Poll for conversion complete on regular group.
mbed_official	237:f3da66175598	1166	(+) Poll for conversion event.
mbed_official	237:f3da66175598	1167	(+) Get result of regular channel conversion.
mbed_official	237:f3da66175598	1168	(+) Start conversion of regular group and enable interruptions.
mbed_official	237:f3da66175598	1169	(+) Stop conversion of regular group and disable interruptions.
mbed_official	237:f3da66175598	1170	(+) Handle ADC interrupt request
mbed_official	237:f3da66175598	1171	(+) Start conversion of regular group and enable DMA transfer.
mbed_official	237:f3da66175598	1172	(+) Stop conversion of regular group and disable ADC DMA transfer.
mbed_official	237:f3da66175598	1173
mbed_official	237:f3da66175598	1174	(+) Start conversion of injected group.
mbed_official	237:f3da66175598	1175	(+) Stop conversion of injected group.
mbed_official	237:f3da66175598	1176	(+) Poll for conversion complete on injected group.
mbed_official	237:f3da66175598	1177	(+) Get result of injected channel conversion.
mbed_official	237:f3da66175598	1178	(+) Start conversion of injected group and enable interruptions.
mbed_official	237:f3da66175598	1179	(+) Stop conversion of injected group and disable interruptions.
mbed_official	237:f3da66175598	1180
mbed_official	237:f3da66175598	1181	(+) Start multimode and enable DMA transfer.
mbed_official	237:f3da66175598	1182	(+) Stop multimode and disable ADC DMA transfer.
mbed_official	237:f3da66175598	1183	(+) Get result of multimode conversion.
mbed_official	237:f3da66175598	1184
mbed_official	237:f3da66175598	1185	(+) Perform the ADC self-calibration for single or differential ending.
mbed_official	237:f3da66175598	1186	(+) Get calibration factors for single or differential ending.
mbed_official	237:f3da66175598	1187	(+) Set calibration factors for single or differential ending.
mbed_official	237:f3da66175598	1188
mbed_official	237:f3da66175598	1189	@endverbatim
mbed_official	237:f3da66175598	1190	* @{
mbed_official	237:f3da66175598	1191	*/
mbed_official	237:f3da66175598	1192
mbed_official	237:f3da66175598	1193	#if defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| defined(STM32F302xC) \|\| defined(STM32F303x8) \|\| defined(STM32F328xx) \|\| defined(STM32F334x8) \|\| defined(STM32F301x8) \|\| defined(STM32F318xx) \|\| defined(STM32F302x8)
mbed_official	237:f3da66175598	1194	/**
mbed_official	237:f3da66175598	1195	* @brief Enables ADC, starts conversion of regular group.
mbed_official	237:f3da66175598	1196	* Interruptions enabled in this function: None.
mbed_official	237:f3da66175598	1197	* @note: Case of multimode enabled (for devices with several ADCs): if ADC
mbed_official	237:f3da66175598	1198	* is slave, ADC is enabled only (conversion is not started). If ADC
mbed_official	237:f3da66175598	1199	* is master, ADC is enabled and multimode conversion is started.
mbed_official	237:f3da66175598	1200	* @param hadc: ADC handle
mbed_official	237:f3da66175598	1201	* @retval HAL status
mbed_official	237:f3da66175598	1202	*/
mbed_official	237:f3da66175598	1203	HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc)
mbed_official	237:f3da66175598	1204	{
mbed_official	237:f3da66175598	1205	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	237:f3da66175598	1206
mbed_official	237:f3da66175598	1207	/* Check the parameters */
mbed_official	237:f3da66175598	1208	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	1209
mbed_official	237:f3da66175598	1210	/* Process locked */
mbed_official	237:f3da66175598	1211	__HAL_LOCK(hadc);
mbed_official	237:f3da66175598	1212
mbed_official	237:f3da66175598	1213	/* Enable the ADC peripheral */
mbed_official	237:f3da66175598	1214	tmpHALStatus = ADC_Enable(hadc);
mbed_official	237:f3da66175598	1215
mbed_official	237:f3da66175598	1216	/* Start conversion if ADC is effectively enabled */
mbed_official	237:f3da66175598	1217	if (tmpHALStatus != HAL_ERROR)
mbed_official	237:f3da66175598	1218	{
mbed_official	237:f3da66175598	1219	/* State machine update: Check if an injected conversion is ongoing */
mbed_official	237:f3da66175598	1220	if(hadc->State == HAL_ADC_STATE_BUSY_INJ)
mbed_official	237:f3da66175598	1221	{
mbed_official	237:f3da66175598	1222	/* Change ADC state */
mbed_official	237:f3da66175598	1223	hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
mbed_official	237:f3da66175598	1224	}
mbed_official	237:f3da66175598	1225	else
mbed_official	237:f3da66175598	1226	{
mbed_official	237:f3da66175598	1227	/* Change ADC state */
mbed_official	237:f3da66175598	1228	hadc->State = HAL_ADC_STATE_BUSY_REG;
mbed_official	237:f3da66175598	1229	}
mbed_official	237:f3da66175598	1230
mbed_official	237:f3da66175598	1231	/* Set ADC error code to none */
mbed_official	237:f3da66175598	1232	__HAL_ADC_CLEAR_ERRORCODE(hadc);
mbed_official	237:f3da66175598	1233
mbed_official	237:f3da66175598	1234	/* Clear regular group conversion flag and overrun flag */
mbed_official	237:f3da66175598	1235	/* (To ensure of no unknown state from potential previous ADC operations) */
mbed_official	237:f3da66175598	1236	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC \| ADC_FLAG_EOS \| ADC_FLAG_OVR));
mbed_official	237:f3da66175598	1237
mbed_official	237:f3da66175598	1238	/* Enable conversion of regular group. */
mbed_official	237:f3da66175598	1239	/* If software start has been selected, conversion starts immediately. */
mbed_official	237:f3da66175598	1240	/* If external trigger has been selected, conversion will start at next */
mbed_official	237:f3da66175598	1241	/* trigger event. */
mbed_official	237:f3da66175598	1242	/* Case of multimode enabled (for devices with several ADCs): if ADC is */
mbed_official	237:f3da66175598	1243	/* slave, ADC is enabled only (conversion is not started). If ADC is */
mbed_official	237:f3da66175598	1244	/* master, ADC is enabled and conversion is started. */
mbed_official	237:f3da66175598	1245	if (__HAL_ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc) )
mbed_official	237:f3da66175598	1246	{
mbed_official	237:f3da66175598	1247	hadc->Instance->CR \|= ADC_CR_ADSTART;
mbed_official	237:f3da66175598	1248	}
mbed_official	237:f3da66175598	1249	}
mbed_official	237:f3da66175598	1250
mbed_official	237:f3da66175598	1251	/* Process unlocked */
mbed_official	237:f3da66175598	1252	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	1253
mbed_official	237:f3da66175598	1254	/* Return function status */
mbed_official	237:f3da66175598	1255	return tmpHALStatus;
mbed_official	237:f3da66175598	1256	}
mbed_official	237:f3da66175598	1257	#endif /* STM32F303xC \|\| STM32F358xx \|\| STM32F302xC \|\| STM32F303x8 \|\| STM32F328xx \|\| STM32F334x8 \|\| STM32F301x8 \|\| STM32F318xx \|\| STM32F302x8 */
mbed_official	237:f3da66175598	1258
mbed_official	237:f3da66175598	1259	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	237:f3da66175598	1260	/**
mbed_official	237:f3da66175598	1261	* @brief Enables ADC, starts conversion of regular group.
mbed_official	237:f3da66175598	1262	* Interruptions enabled in this function: None.
mbed_official	237:f3da66175598	1263	* @param hadc: ADC handle
mbed_official	237:f3da66175598	1264	* @retval HAL status
mbed_official	237:f3da66175598	1265	*/
mbed_official	237:f3da66175598	1266	HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc)
mbed_official	237:f3da66175598	1267	{
mbed_official	237:f3da66175598	1268	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	237:f3da66175598	1269
mbed_official	237:f3da66175598	1270	/* Check the parameters */
mbed_official	237:f3da66175598	1271	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	1272
mbed_official	237:f3da66175598	1273	/* Process locked */
mbed_official	237:f3da66175598	1274	__HAL_LOCK(hadc);
mbed_official	237:f3da66175598	1275
mbed_official	237:f3da66175598	1276	/* Enable the ADC peripheral */
mbed_official	237:f3da66175598	1277	tmpHALStatus = ADC_Enable(hadc);
mbed_official	237:f3da66175598	1278
mbed_official	237:f3da66175598	1279	/* Start conversion if ADC is effectively enabled */
mbed_official	237:f3da66175598	1280	if (tmpHALStatus != HAL_ERROR)
mbed_official	237:f3da66175598	1281	{
mbed_official	237:f3da66175598	1282	/* State machine update: Check if an injected conversion is ongoing */
mbed_official	237:f3da66175598	1283	if(hadc->State == HAL_ADC_STATE_BUSY_INJ)
mbed_official	237:f3da66175598	1284	{
mbed_official	237:f3da66175598	1285	/* Change ADC state */
mbed_official	237:f3da66175598	1286	hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
mbed_official	237:f3da66175598	1287	}
mbed_official	237:f3da66175598	1288	else
mbed_official	237:f3da66175598	1289	{
mbed_official	237:f3da66175598	1290	/* Change ADC state */
mbed_official	237:f3da66175598	1291	hadc->State = HAL_ADC_STATE_BUSY_REG;
mbed_official	237:f3da66175598	1292	}
mbed_official	237:f3da66175598	1293
mbed_official	237:f3da66175598	1294	/* Set ADC error code to none */
mbed_official	237:f3da66175598	1295	__HAL_ADC_CLEAR_ERRORCODE(hadc);
mbed_official	237:f3da66175598	1296
mbed_official	237:f3da66175598	1297	/* Clear regular group conversion flag and overrun flag */
mbed_official	237:f3da66175598	1298	/* (To ensure of no unknown state from potential previous ADC operations) */
mbed_official	237:f3da66175598	1299	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
mbed_official	237:f3da66175598	1300
mbed_official	237:f3da66175598	1301	/* Start conversion of regular group if software start has been selected. */
mbed_official	237:f3da66175598	1302	/* If external trigger has been selected, conversion will start at next */
mbed_official	237:f3da66175598	1303	/* trigger event. */
mbed_official	237:f3da66175598	1304	/* Note: Alternate trigger for single conversion could be to force an */
mbed_official	237:f3da66175598	1305	/* additional set of bit ADON "hadc->Instance->CR2 \|= ADC_CR2_ADON;"*/
mbed_official	237:f3da66175598	1306	if (__HAL_ADC_IS_SOFTWARE_START_REGULAR(hadc))
mbed_official	237:f3da66175598	1307	{
mbed_official	237:f3da66175598	1308	/* Start ADC conversion on regular group */
mbed_official	237:f3da66175598	1309	hadc->Instance->CR2 \|= ADC_CR2_SWSTART;
mbed_official	237:f3da66175598	1310	}
mbed_official	237:f3da66175598	1311	}
mbed_official	237:f3da66175598	1312
mbed_official	237:f3da66175598	1313	/* Process unlocked */
mbed_official	237:f3da66175598	1314	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	1315
mbed_official	237:f3da66175598	1316	/* Return function status */
mbed_official	237:f3da66175598	1317	return tmpHALStatus;
mbed_official	237:f3da66175598	1318	}
mbed_official	237:f3da66175598	1319	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	237:f3da66175598	1320
mbed_official	237:f3da66175598	1321	#if defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| defined(STM32F302xC) \|\| defined(STM32F303x8) \|\| defined(STM32F328xx) \|\| defined(STM32F334x8) \|\| defined(STM32F301x8) \|\| defined(STM32F318xx) \|\| defined(STM32F302x8)
mbed_official	237:f3da66175598	1322	/**
mbed_official	237:f3da66175598	1323	* @brief Stop ADC conversion of regular group (and injected group in
mbed_official	237:f3da66175598	1324	* case of auto_injection mode), disable ADC peripheral.
mbed_official	237:f3da66175598	1325	* @note: ADC peripheral disable is forcing interruption of potential
mbed_official	237:f3da66175598	1326	* conversion on injected group. If injected group is under use, it
mbed_official	237:f3da66175598	1327	* should be preliminarily stopped using HAL_ADCEx_InjectedStop function.
mbed_official	237:f3da66175598	1328	* @param hadc: ADC handle
mbed_official	237:f3da66175598	1329	* @retval HAL status.
mbed_official	237:f3da66175598	1330	*/
mbed_official	237:f3da66175598	1331	HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc)
mbed_official	237:f3da66175598	1332	{
mbed_official	237:f3da66175598	1333	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	237:f3da66175598	1334
mbed_official	237:f3da66175598	1335	/* Check the parameters */
mbed_official	237:f3da66175598	1336	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	1337
mbed_official	237:f3da66175598	1338	/* Process locked */
mbed_official	237:f3da66175598	1339	__HAL_LOCK(hadc);
mbed_official	237:f3da66175598	1340
mbed_official	237:f3da66175598	1341	/* 1. Stop potential conversion on going, on regular and injected groups */
mbed_official	237:f3da66175598	1342	tmpHALStatus = ADC_ConversionStop(hadc, REGULAR_INJECTED_GROUP);
mbed_official	237:f3da66175598	1343
mbed_official	237:f3da66175598	1344	/* Disable ADC peripheral if conversions are effectively stopped */
mbed_official	237:f3da66175598	1345	if (tmpHALStatus != HAL_ERROR)
mbed_official	237:f3da66175598	1346	{
mbed_official	237:f3da66175598	1347	/* 2. Disable the ADC peripheral */
mbed_official	237:f3da66175598	1348	tmpHALStatus = ADC_Disable(hadc);
mbed_official	237:f3da66175598	1349
mbed_official	237:f3da66175598	1350	/* Check if ADC is effectively disabled */
mbed_official	237:f3da66175598	1351	if (tmpHALStatus != HAL_ERROR)
mbed_official	237:f3da66175598	1352	{
mbed_official	237:f3da66175598	1353	/* Change ADC state */
mbed_official	237:f3da66175598	1354	hadc->State = HAL_ADC_STATE_READY;
mbed_official	237:f3da66175598	1355	}
mbed_official	237:f3da66175598	1356	}
mbed_official	237:f3da66175598	1357
mbed_official	237:f3da66175598	1358	/* Process unlocked */
mbed_official	237:f3da66175598	1359	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	1360
mbed_official	237:f3da66175598	1361	/* Return function status */
mbed_official	237:f3da66175598	1362	return tmpHALStatus;
mbed_official	237:f3da66175598	1363	}
mbed_official	237:f3da66175598	1364	#endif /* STM32F303xC \|\| STM32F358xx \|\| STM32F302xC \|\| STM32F303x8 \|\| STM32F328xx \|\| STM32F334x8 \|\| STM32F301x8 \|\| STM32F318xx \|\| STM32F302x8 */
mbed_official	237:f3da66175598	1365
mbed_official	237:f3da66175598	1366	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	237:f3da66175598	1367	/**
mbed_official	237:f3da66175598	1368	* @brief Stop ADC conversion of regular group (and injected channels in
mbed_official	237:f3da66175598	1369	* case of auto_injection mode), disable ADC peripheral.
mbed_official	237:f3da66175598	1370	* @note: ADC peripheral disable is forcing interruption of potential
mbed_official	237:f3da66175598	1371	* conversion on injected group. If injected group is under use, it
mbed_official	237:f3da66175598	1372	* should be preliminarily stopped using HAL_ADCEx_InjectedStop function.
mbed_official	237:f3da66175598	1373	* @param hadc: ADC handle
mbed_official	237:f3da66175598	1374	* @retval HAL status.
mbed_official	237:f3da66175598	1375	*/
mbed_official	237:f3da66175598	1376	HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc)
mbed_official	237:f3da66175598	1377	{
mbed_official	237:f3da66175598	1378	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	237:f3da66175598	1379
mbed_official	237:f3da66175598	1380	/* Check the parameters */
mbed_official	237:f3da66175598	1381	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	1382
mbed_official	237:f3da66175598	1383	/* Process locked */
mbed_official	237:f3da66175598	1384	__HAL_LOCK(hadc);
mbed_official	237:f3da66175598	1385
mbed_official	237:f3da66175598	1386	/* Stop potential conversion on going, on regular and injected groups */
mbed_official	237:f3da66175598	1387	/* Disable ADC peripheral */
mbed_official	237:f3da66175598	1388	tmpHALStatus = ADC_ConversionStop_Disable(hadc);
mbed_official	237:f3da66175598	1389
mbed_official	237:f3da66175598	1390	/* Check if ADC is effectively disabled */
mbed_official	237:f3da66175598	1391	if (tmpHALStatus != HAL_ERROR)
mbed_official	237:f3da66175598	1392	{
mbed_official	237:f3da66175598	1393	/* Change ADC state */
mbed_official	237:f3da66175598	1394	hadc->State = HAL_ADC_STATE_READY;
mbed_official	237:f3da66175598	1395	}
mbed_official	237:f3da66175598	1396
mbed_official	237:f3da66175598	1397	/* Process unlocked */
mbed_official	237:f3da66175598	1398	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	1399
mbed_official	237:f3da66175598	1400	/* Return function status */
mbed_official	237:f3da66175598	1401	return tmpHALStatus;
mbed_official	237:f3da66175598	1402	}
mbed_official	237:f3da66175598	1403	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	237:f3da66175598	1404
mbed_official	237:f3da66175598	1405	#if defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| defined(STM32F302xC) \|\| defined(STM32F303x8) \|\| defined(STM32F328xx) \|\| defined(STM32F334x8) \|\| defined(STM32F301x8) \|\| defined(STM32F318xx) \|\| defined(STM32F302x8)
mbed_official	237:f3da66175598	1406	/**
mbed_official	237:f3da66175598	1407	* @brief Wait for regular group conversion to be completed.
mbed_official	237:f3da66175598	1408	* @param hadc: ADC handle
mbed_official	237:f3da66175598	1409	* @param Timeout: Timeout value in millisecond.
mbed_official	237:f3da66175598	1410	* @retval HAL status
mbed_official	237:f3da66175598	1411	*/
mbed_official	237:f3da66175598	1412	HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
mbed_official	237:f3da66175598	1413	{
mbed_official	237:f3da66175598	1414	uint32_t tickstart;
mbed_official	237:f3da66175598	1415	uint32_t tmp_Flag_EOC;
mbed_official	237:f3da66175598	1416
mbed_official	237:f3da66175598	1417	/* Check the parameters */
mbed_official	237:f3da66175598	1418	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	1419
mbed_official	237:f3da66175598	1420	/* If end of conversion selected to end of sequence */
mbed_official	237:f3da66175598	1421	if (hadc->Init.EOCSelection == EOC_SEQ_CONV)
mbed_official	237:f3da66175598	1422	{
mbed_official	237:f3da66175598	1423	tmp_Flag_EOC = ADC_FLAG_EOS;
mbed_official	237:f3da66175598	1424	}
mbed_official	237:f3da66175598	1425	/* If end of conversion selected to end of each conversion */
mbed_official	237:f3da66175598	1426	else /* EOC_SINGLE_CONV */
mbed_official	237:f3da66175598	1427	{
mbed_official	237:f3da66175598	1428	tmp_Flag_EOC = (ADC_FLAG_EOC \| ADC_FLAG_EOS);
mbed_official	237:f3da66175598	1429	}
mbed_official	237:f3da66175598	1430
mbed_official	237:f3da66175598	1431	/* Get timeout */
mbed_official	237:f3da66175598	1432	tickstart = HAL_GetTick();
mbed_official	237:f3da66175598	1433
mbed_official	237:f3da66175598	1434	/* Wait until End of Conversion flag is raised */
mbed_official	237:f3da66175598	1435	while(HAL_IS_BIT_CLR(hadc->Instance->ISR, tmp_Flag_EOC))
mbed_official	237:f3da66175598	1436	{
mbed_official	237:f3da66175598	1437	/* Check if timeout is disabled (set to infinite wait) */
mbed_official	237:f3da66175598	1438	if(Timeout != HAL_MAX_DELAY)
mbed_official	237:f3da66175598	1439	{
mbed_official	237:f3da66175598	1440	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) > Timeout))
mbed_official	237:f3da66175598	1441	{
mbed_official	237:f3da66175598	1442	/* Update ADC state machine to timeout */
mbed_official	237:f3da66175598	1443	hadc->State = HAL_ADC_STATE_TIMEOUT;
mbed_official	237:f3da66175598	1444
mbed_official	237:f3da66175598	1445	/* Process unlocked */
mbed_official	237:f3da66175598	1446	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	1447
mbed_official	237:f3da66175598	1448	return HAL_ERROR;
mbed_official	237:f3da66175598	1449	}
mbed_official	237:f3da66175598	1450	}
mbed_official	237:f3da66175598	1451	}
mbed_official	237:f3da66175598	1452
mbed_official	237:f3da66175598	1453	/* Clear end of conversion flag of regular group if low power feature */
mbed_official	237:f3da66175598	1454	/* "LowPowerAutoWait " is disabled, to not interfere with this feature */
mbed_official	237:f3da66175598	1455	/* until data register is read using function HAL_ADC_GetValue(). */
mbed_official	237:f3da66175598	1456	if (hadc->Init.LowPowerAutoWait == DISABLE)
mbed_official	237:f3da66175598	1457	{
mbed_official	237:f3da66175598	1458	/* Clear regular group conversion flag */
mbed_official	237:f3da66175598	1459	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC \| ADC_FLAG_EOS));
mbed_official	237:f3da66175598	1460	}
mbed_official	237:f3da66175598	1461
mbed_official	237:f3da66175598	1462	/* Update state machine on conversion status if not in error state */
mbed_official	237:f3da66175598	1463	if(hadc->State != HAL_ADC_STATE_ERROR)
mbed_official	237:f3da66175598	1464	{
mbed_official	237:f3da66175598	1465	/* Update ADC state machine */
mbed_official	237:f3da66175598	1466	if(hadc->State != HAL_ADC_STATE_EOC_INJ_REG)
mbed_official	237:f3da66175598	1467	{
mbed_official	237:f3da66175598	1468	/* Check if a conversion is ready on injected group */
mbed_official	237:f3da66175598	1469	if(hadc->State == HAL_ADC_STATE_EOC_INJ)
mbed_official	237:f3da66175598	1470	{
mbed_official	237:f3da66175598	1471	/* Change ADC state */
mbed_official	237:f3da66175598	1472	hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
mbed_official	237:f3da66175598	1473	}
mbed_official	237:f3da66175598	1474	else
mbed_official	237:f3da66175598	1475	{
mbed_official	237:f3da66175598	1476	/* Change ADC state */
mbed_official	237:f3da66175598	1477	hadc->State = HAL_ADC_STATE_EOC_REG;
mbed_official	237:f3da66175598	1478	}
mbed_official	237:f3da66175598	1479	}
mbed_official	237:f3da66175598	1480	}
mbed_official	237:f3da66175598	1481
mbed_official	237:f3da66175598	1482	/* Return ADC state */
mbed_official	237:f3da66175598	1483	return HAL_OK;
mbed_official	237:f3da66175598	1484	}
mbed_official	237:f3da66175598	1485	#endif /* STM32F303xC \|\| STM32F358xx \|\| STM32F302xC \|\| STM32F303x8 \|\| STM32F328xx \|\| STM32F334x8 \|\| STM32F301x8 \|\| STM32F318xx \|\| STM32F302x8 */
mbed_official	237:f3da66175598	1486
mbed_official	237:f3da66175598	1487	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	237:f3da66175598	1488	/**
mbed_official	237:f3da66175598	1489	* @brief Wait for regular group conversion to be completed.
mbed_official	237:f3da66175598	1490	* @param hadc: ADC handle
mbed_official	237:f3da66175598	1491	* @param Timeout: Timeout value in millisecond.
mbed_official	237:f3da66175598	1492	* @retval HAL status
mbed_official	237:f3da66175598	1493	*/
mbed_official	237:f3da66175598	1494	HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
mbed_official	237:f3da66175598	1495	{
mbed_official	237:f3da66175598	1496	uint32_t tickstart;
mbed_official	237:f3da66175598	1497
mbed_official	237:f3da66175598	1498	/* Variables for polling in case of scan mode enabled */
mbed_official	237:f3da66175598	1499	uint32_t Conversion_Timeout_CPU_cycles_max =0;
mbed_official	237:f3da66175598	1500	uint32_t Conversion_Timeout_CPU_cycles =0;
mbed_official	237:f3da66175598	1501
mbed_official	237:f3da66175598	1502	/* Check the parameters */
mbed_official	237:f3da66175598	1503	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	1504
mbed_official	237:f3da66175598	1505	/* Get timeout */
mbed_official	237:f3da66175598	1506	tickstart = HAL_GetTick();
mbed_official	237:f3da66175598	1507
mbed_official	237:f3da66175598	1508	/* Polling for end of conversion: differentiation if single/sequence */
mbed_official	237:f3da66175598	1509	/* conversion. */
mbed_official	237:f3da66175598	1510	/* - If single conversion for regular group (Scan mode disabled or enabled */
mbed_official	237:f3da66175598	1511	/* with NbrOfConversion =1), flag EOC is used to determine the */
mbed_official	237:f3da66175598	1512	/* conversion completion. */
mbed_official	237:f3da66175598	1513	/* - If sequence conversion for regular group, flag EOC is set only a the */
mbed_official	237:f3da66175598	1514	/* end of the sequence. To poll for each conversion, the maximum */
mbed_official	237:f3da66175598	1515	/* conversion time is calculated from ADC conversion time (selected */
mbed_official	237:f3da66175598	1516	/* sampling time + conversion time of 12.5 ADC clock cycles) and */
mbed_official	237:f3da66175598	1517	/* APB2/ADC clock prescalers (depending on settings, conversion time */
mbed_official	237:f3da66175598	1518	/* range can be from 28 to 32256 CPU cycles). */
mbed_official	237:f3da66175598	1519	if ((HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_SCAN)) &&
mbed_official	237:f3da66175598	1520	((hadc->Instance->SQR1 & ADC_SQR1_L) == RESET) )
mbed_official	237:f3da66175598	1521	{
mbed_official	237:f3da66175598	1522	/* Wait until End of Conversion flag is raised */
mbed_official	237:f3da66175598	1523	while(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_EOC))
mbed_official	237:f3da66175598	1524	{
mbed_official	237:f3da66175598	1525	/* Check if timeout is disabled (set to infinite wait) */
mbed_official	237:f3da66175598	1526	if(Timeout != HAL_MAX_DELAY)
mbed_official	237:f3da66175598	1527	{
mbed_official	237:f3da66175598	1528	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) > Timeout))
mbed_official	237:f3da66175598	1529	{
mbed_official	237:f3da66175598	1530	/* Update ADC state machine to timeout */
mbed_official	237:f3da66175598	1531	hadc->State = HAL_ADC_STATE_TIMEOUT;
mbed_official	237:f3da66175598	1532
mbed_official	237:f3da66175598	1533	/* Process unlocked */
mbed_official	237:f3da66175598	1534	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	1535
mbed_official	237:f3da66175598	1536	return HAL_ERROR;
mbed_official	237:f3da66175598	1537	}
mbed_official	237:f3da66175598	1538	}
mbed_official	237:f3da66175598	1539	}
mbed_official	237:f3da66175598	1540	}
mbed_official	237:f3da66175598	1541	else
mbed_official	237:f3da66175598	1542	{
mbed_official	237:f3da66175598	1543	/* Computation of CPU cycles corresponding to ADC conversion cycles */
mbed_official	237:f3da66175598	1544	/* Retrieve ADC clock prescaler and ADC maximum conversion cycles on all */
mbed_official	237:f3da66175598	1545	/* channels. */
mbed_official	237:f3da66175598	1546	Conversion_Timeout_CPU_cycles_max = __HAL_ADC_CLOCK_PRECSALER_RANGE() ;
mbed_official	237:f3da66175598	1547	Conversion_Timeout_CPU_cycles_max *= __HAL_ADC_CONVCYCLES_MAX_RANGE(hadc);
mbed_official	237:f3da66175598	1548
mbed_official	237:f3da66175598	1549	/* Maximum conversion cycles taking in account offset of 34 CPU cycles: */
mbed_official	237:f3da66175598	1550	/* number of CPU cycles for processing of conversion cycles estimation. */
mbed_official	237:f3da66175598	1551	Conversion_Timeout_CPU_cycles = 34;
mbed_official	237:f3da66175598	1552
mbed_official	237:f3da66175598	1553	/* Poll with maximum conversion time */
mbed_official	237:f3da66175598	1554	while(Conversion_Timeout_CPU_cycles < Conversion_Timeout_CPU_cycles_max)
mbed_official	237:f3da66175598	1555	{
mbed_official	237:f3da66175598	1556	/* Check if timeout is disabled (set to infinite wait) */
mbed_official	237:f3da66175598	1557	if(Timeout != HAL_MAX_DELAY)
mbed_official	237:f3da66175598	1558	{
mbed_official	237:f3da66175598	1559	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) > Timeout))
mbed_official	237:f3da66175598	1560	{
mbed_official	237:f3da66175598	1561	/* Update ADC state machine to timeout */
mbed_official	237:f3da66175598	1562	hadc->State = HAL_ADC_STATE_TIMEOUT;
mbed_official	237:f3da66175598	1563
mbed_official	237:f3da66175598	1564	/* Process unlocked */
mbed_official	237:f3da66175598	1565	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	1566
mbed_official	237:f3da66175598	1567	return HAL_ERROR;
mbed_official	237:f3da66175598	1568	}
mbed_official	237:f3da66175598	1569	}
mbed_official	237:f3da66175598	1570	Conversion_Timeout_CPU_cycles ++;
mbed_official	237:f3da66175598	1571	}
mbed_official	237:f3da66175598	1572	}
mbed_official	237:f3da66175598	1573
mbed_official	237:f3da66175598	1574	/* Clear regular group conversion flag */
mbed_official	237:f3da66175598	1575	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_STRT \| ADC_FLAG_EOC);
mbed_official	237:f3da66175598	1576
mbed_official	237:f3da66175598	1577	/* Update state machine on conversion status if not in error state */
mbed_official	237:f3da66175598	1578	if(hadc->State != HAL_ADC_STATE_ERROR)
mbed_official	237:f3da66175598	1579	{
mbed_official	237:f3da66175598	1580	/* Update ADC state machine */
mbed_official	237:f3da66175598	1581	if(hadc->State != HAL_ADC_STATE_EOC_INJ_REG)
mbed_official	237:f3da66175598	1582	{
mbed_official	237:f3da66175598	1583	/* Check if a conversion is ready on injected group */
mbed_official	237:f3da66175598	1584	if(hadc->State == HAL_ADC_STATE_EOC_INJ)
mbed_official	237:f3da66175598	1585	{
mbed_official	237:f3da66175598	1586	/* Change ADC state */
mbed_official	237:f3da66175598	1587	hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
mbed_official	237:f3da66175598	1588	}
mbed_official	237:f3da66175598	1589	else
mbed_official	237:f3da66175598	1590	{
mbed_official	237:f3da66175598	1591	/* Change ADC state */
mbed_official	237:f3da66175598	1592	hadc->State = HAL_ADC_STATE_EOC_REG;
mbed_official	237:f3da66175598	1593	}
mbed_official	237:f3da66175598	1594	}
mbed_official	237:f3da66175598	1595	}
mbed_official	237:f3da66175598	1596
mbed_official	237:f3da66175598	1597	/* Return ADC state */
mbed_official	237:f3da66175598	1598	return HAL_OK;
mbed_official	237:f3da66175598	1599	}
mbed_official	237:f3da66175598	1600	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	237:f3da66175598	1601
mbed_official	237:f3da66175598	1602	#if defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| defined(STM32F302xC) \|\| defined(STM32F303x8) \|\| defined(STM32F328xx) \|\| defined(STM32F334x8) \|\| defined(STM32F301x8) \|\| defined(STM32F318xx) \|\| defined(STM32F302x8)
mbed_official	237:f3da66175598	1603	/**
mbed_official	237:f3da66175598	1604	* @brief Poll for conversion event.
mbed_official	237:f3da66175598	1605	* @param hadc: ADC handle
mbed_official	237:f3da66175598	1606	* @param EventType: the ADC event type.
mbed_official	237:f3da66175598	1607	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	1608	* @arg AWD_EVENT: ADC Analog watchdog 1 event (main analog watchdog, present on all STM32 devices)
mbed_official	237:f3da66175598	1609	* @arg AWD2_EVENT: ADC Analog watchdog 2 event (additional analog watchdog, present only on STM32F3 devices)
mbed_official	237:f3da66175598	1610	* @arg AWD3_EVENT: ADC Analog watchdog 3 event (additional analog watchdog, present only on STM32F3 devices)
mbed_official	237:f3da66175598	1611	* @arg OVR_EVENT: ADC Overrun event
mbed_official	237:f3da66175598	1612	* @arg JQOVF_EVENT: ADC Injected context queue overflow event
mbed_official	237:f3da66175598	1613	* @param Timeout: Timeout value in millisecond.
mbed_official	237:f3da66175598	1614	* @retval HAL status
mbed_official	237:f3da66175598	1615	*/
mbed_official	237:f3da66175598	1616	HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout)
mbed_official	237:f3da66175598	1617	{
mbed_official	237:f3da66175598	1618	uint32_t tickstart;
mbed_official	237:f3da66175598	1619
mbed_official	237:f3da66175598	1620	/* Check the parameters */
mbed_official	237:f3da66175598	1621	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	1622	assert_param(IS_ADC_EVENT_TYPE(EventType));
mbed_official	237:f3da66175598	1623
mbed_official	237:f3da66175598	1624	tickstart = HAL_GetTick();
mbed_official	237:f3da66175598	1625
mbed_official	237:f3da66175598	1626	/* Check selected event flag */
mbed_official	237:f3da66175598	1627	while(__HAL_ADC_GET_FLAG(hadc, EventType) == RESET)
mbed_official	237:f3da66175598	1628	{
mbed_official	237:f3da66175598	1629	/* Check if timeout is disabled (set to infinite wait) */
mbed_official	237:f3da66175598	1630	if(Timeout != HAL_MAX_DELAY)
mbed_official	237:f3da66175598	1631	{
mbed_official	237:f3da66175598	1632	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) > Timeout))
mbed_official	237:f3da66175598	1633	{
mbed_official	237:f3da66175598	1634	/* Update ADC state machine to timeout */
mbed_official	237:f3da66175598	1635	hadc->State = HAL_ADC_STATE_TIMEOUT;
mbed_official	237:f3da66175598	1636
mbed_official	237:f3da66175598	1637	/* Process unlocked */
mbed_official	237:f3da66175598	1638	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	1639
mbed_official	237:f3da66175598	1640	return HAL_ERROR;
mbed_official	237:f3da66175598	1641	}
mbed_official	237:f3da66175598	1642	}
mbed_official	237:f3da66175598	1643	}
mbed_official	237:f3da66175598	1644
mbed_official	237:f3da66175598	1645
mbed_official	237:f3da66175598	1646	switch(EventType)
mbed_official	237:f3da66175598	1647	{
mbed_official	237:f3da66175598	1648	/* Analog watchdog (level out of window) event */
mbed_official	237:f3da66175598	1649	/* Note: In case of several analog watchdog enabled, if needed to know */
mbed_official	237:f3da66175598	1650	/* which one triggered and on which ADCx, test ADC state of Analog Watchdog */
mbed_official	237:f3da66175598	1651	/* flags HAL_ADC_STATE_AWD/2/3 function. */
mbed_official	237:f3da66175598	1652	/* For example: "if (HAL_ADC_GetState(hadc1) == HAL_ADC_STATE_AWD) " */
mbed_official	237:f3da66175598	1653	/* "if (HAL_ADC_GetState(hadc1) == HAL_ADC_STATE_AWD2)" */
mbed_official	237:f3da66175598	1654	/* "if (HAL_ADC_GetState(hadc1) == HAL_ADC_STATE_AWD3)" */
mbed_official	237:f3da66175598	1655	/* Check analog watchdog 1 flag */
mbed_official	237:f3da66175598	1656	case AWD_EVENT:
mbed_official	237:f3da66175598	1657	/* Change ADC state */
mbed_official	237:f3da66175598	1658	hadc->State = HAL_ADC_STATE_AWD;
mbed_official	237:f3da66175598	1659
mbed_official	237:f3da66175598	1660	/* Clear ADC analog watchdog flag */
mbed_official	237:f3da66175598	1661	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD1);
mbed_official	237:f3da66175598	1662	break;
mbed_official	237:f3da66175598	1663
mbed_official	237:f3da66175598	1664	/* Check analog watchdog 2 flag */
mbed_official	237:f3da66175598	1665	case AWD2_EVENT:
mbed_official	237:f3da66175598	1666	/* Change ADC state */
mbed_official	237:f3da66175598	1667	hadc->State = HAL_ADC_STATE_AWD2;
mbed_official	237:f3da66175598	1668
mbed_official	237:f3da66175598	1669	/* Clear ADC analog watchdog flag */
mbed_official	237:f3da66175598	1670	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD2);
mbed_official	237:f3da66175598	1671	break;
mbed_official	237:f3da66175598	1672
mbed_official	237:f3da66175598	1673	/* Check analog watchdog 3 flag */
mbed_official	237:f3da66175598	1674	case AWD3_EVENT:
mbed_official	237:f3da66175598	1675	/* Change ADC state */
mbed_official	237:f3da66175598	1676	hadc->State = HAL_ADC_STATE_AWD3;
mbed_official	237:f3da66175598	1677
mbed_official	237:f3da66175598	1678	/* Clear ADC analog watchdog flag */
mbed_official	237:f3da66175598	1679	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD3);
mbed_official	237:f3da66175598	1680	break;
mbed_official	237:f3da66175598	1681
mbed_official	237:f3da66175598	1682	/* Injected context queue overflow event */
mbed_official	237:f3da66175598	1683	case JQOVF_EVENT:
mbed_official	237:f3da66175598	1684	/* Change ADC state */
mbed_official	237:f3da66175598	1685	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	1686
mbed_official	237:f3da66175598	1687	/* Set ADC error code to Injected context queue overflow */
mbed_official	237:f3da66175598	1688	hadc->ErrorCode \|= HAL_ADC_ERROR_JQOVF;
mbed_official	237:f3da66175598	1689
mbed_official	237:f3da66175598	1690	/* Clear ADC Injected context queue overflow flag */
mbed_official	237:f3da66175598	1691	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JQOVF);
mbed_official	237:f3da66175598	1692	break;
mbed_official	237:f3da66175598	1693
mbed_official	237:f3da66175598	1694	/* Overrun event */
mbed_official	237:f3da66175598	1695	default: /* Case OVR_EVENT */
mbed_official	237:f3da66175598	1696	/* If overrun is set to overwrite previous data, overrun event is not */
mbed_official	237:f3da66175598	1697	/* considered as an error. */
mbed_official	237:f3da66175598	1698	/* (cf ref manual "Managing conversions without using the DMA and without */
mbed_official	237:f3da66175598	1699	/* overrun ") */
mbed_official	237:f3da66175598	1700	if (hadc->Init.Overrun == OVR_DATA_PRESERVED)
mbed_official	237:f3da66175598	1701	{
mbed_official	237:f3da66175598	1702	/* Change ADC state */
mbed_official	237:f3da66175598	1703	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	1704
mbed_official	237:f3da66175598	1705	/* Set ADC error code to overrun */
mbed_official	237:f3da66175598	1706	hadc->ErrorCode \|= HAL_ADC_ERROR_OVR;
mbed_official	237:f3da66175598	1707	}
mbed_official	237:f3da66175598	1708
mbed_official	237:f3da66175598	1709	/* Clear ADC Overrun flag */
mbed_official	237:f3da66175598	1710	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
mbed_official	237:f3da66175598	1711	break;
mbed_official	237:f3da66175598	1712	}
mbed_official	237:f3da66175598	1713
mbed_official	237:f3da66175598	1714	/* Return ADC state */
mbed_official	237:f3da66175598	1715	return HAL_OK;
mbed_official	237:f3da66175598	1716	}
mbed_official	237:f3da66175598	1717	#endif /* STM32F303xC \|\| STM32F358xx \|\| STM32F302xC \|\| STM32F303x8 \|\| STM32F328xx \|\| STM32F334x8 \|\| STM32F301x8 \|\| STM32F318xx \|\| STM32F302x8 */
mbed_official	237:f3da66175598	1718
mbed_official	237:f3da66175598	1719	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	237:f3da66175598	1720	/**
mbed_official	237:f3da66175598	1721	* @brief Poll for conversion event.
mbed_official	237:f3da66175598	1722	* @param hadc: ADC handle
mbed_official	237:f3da66175598	1723	* @param EventType: the ADC event type.
mbed_official	237:f3da66175598	1724	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	1725	* @arg AWD_EVENT: ADC Analog watchdog event.
mbed_official	237:f3da66175598	1726	* @param Timeout: Timeout value in millisecond.
mbed_official	237:f3da66175598	1727	* @retval HAL status
mbed_official	237:f3da66175598	1728	*/
mbed_official	237:f3da66175598	1729	HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout)
mbed_official	237:f3da66175598	1730	{
mbed_official	237:f3da66175598	1731	uint32_t tickstart=0;
mbed_official	237:f3da66175598	1732
mbed_official	237:f3da66175598	1733	/* Check the parameters */
mbed_official	237:f3da66175598	1734	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	1735	assert_param(IS_ADC_EVENT_TYPE(EventType));
mbed_official	237:f3da66175598	1736
mbed_official	237:f3da66175598	1737	tickstart = HAL_GetTick();
mbed_official	237:f3da66175598	1738
mbed_official	237:f3da66175598	1739	/* Check selected event flag */
mbed_official	237:f3da66175598	1740	while(__HAL_ADC_GET_FLAG(hadc, EventType) == RESET)
mbed_official	237:f3da66175598	1741	{
mbed_official	237:f3da66175598	1742	/* Check if timeout is disabled (set to infinite wait) */
mbed_official	237:f3da66175598	1743	if(Timeout != HAL_MAX_DELAY)
mbed_official	237:f3da66175598	1744	{
mbed_official	237:f3da66175598	1745	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) > Timeout))
mbed_official	237:f3da66175598	1746	{
mbed_official	237:f3da66175598	1747	/* Update ADC state machine to timeout */
mbed_official	237:f3da66175598	1748	hadc->State = HAL_ADC_STATE_TIMEOUT;
mbed_official	237:f3da66175598	1749
mbed_official	237:f3da66175598	1750	/* Process unlocked */
mbed_official	237:f3da66175598	1751	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	1752
mbed_official	237:f3da66175598	1753	return HAL_ERROR;
mbed_official	237:f3da66175598	1754	}
mbed_official	237:f3da66175598	1755	}
mbed_official	237:f3da66175598	1756	}
mbed_official	237:f3da66175598	1757
mbed_official	237:f3da66175598	1758	/* Analog watchdog (level out of window) event */
mbed_official	237:f3da66175598	1759	/* Change ADC state */
mbed_official	237:f3da66175598	1760	hadc->State = HAL_ADC_STATE_AWD;
mbed_official	237:f3da66175598	1761
mbed_official	237:f3da66175598	1762	/* Clear ADC analog watchdog flag */
mbed_official	237:f3da66175598	1763	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
mbed_official	237:f3da66175598	1764
mbed_official	237:f3da66175598	1765	/* Return ADC state */
mbed_official	237:f3da66175598	1766	return HAL_OK;
mbed_official	237:f3da66175598	1767	}
mbed_official	237:f3da66175598	1768	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	237:f3da66175598	1769
mbed_official	237:f3da66175598	1770	#if defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| defined(STM32F302xC) \|\| defined(STM32F303x8) \|\| defined(STM32F328xx) \|\| defined(STM32F334x8) \|\| defined(STM32F301x8) \|\| defined(STM32F318xx) \|\| defined(STM32F302x8)
mbed_official	237:f3da66175598	1771	/**
mbed_official	237:f3da66175598	1772	* @brief Enables ADC, starts conversion of regular group with interruption.
mbed_official	237:f3da66175598	1773	* Interruptions enabled in this function: EOC (end of conversion),
mbed_official	237:f3da66175598	1774	* overrun (if available).
mbed_official	237:f3da66175598	1775	* Each of these interruptions has its dedicated callback function.
mbed_official	237:f3da66175598	1776	* @note: Case of multimode enabled (for devices with several ADCs): This
mbed_official	237:f3da66175598	1777	* function must be called for ADC slave first, then ADC master.
mbed_official	237:f3da66175598	1778	* For ADC slave, ADC is enabled only (conversion is not started).
mbed_official	237:f3da66175598	1779	* For ADC master, ADC is enabled and multimode conversion is started.
mbed_official	237:f3da66175598	1780	* @param hadc: ADC handle
mbed_official	237:f3da66175598	1781	* @retval HAL status
mbed_official	237:f3da66175598	1782	*/
mbed_official	237:f3da66175598	1783	HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc)
mbed_official	237:f3da66175598	1784	{
mbed_official	237:f3da66175598	1785	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	237:f3da66175598	1786
mbed_official	237:f3da66175598	1787	/* Check the parameters */
mbed_official	237:f3da66175598	1788	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	1789
mbed_official	237:f3da66175598	1790	/* Process locked */
mbed_official	237:f3da66175598	1791	__HAL_LOCK(hadc);
mbed_official	237:f3da66175598	1792
mbed_official	237:f3da66175598	1793	/* Enable the ADC peripheral */
mbed_official	237:f3da66175598	1794	tmpHALStatus = ADC_Enable(hadc);
mbed_official	237:f3da66175598	1795
mbed_official	237:f3da66175598	1796	/* Start conversion if ADC is effectively enabled */
mbed_official	237:f3da66175598	1797	if (tmpHALStatus != HAL_ERROR)
mbed_official	237:f3da66175598	1798	{
mbed_official	237:f3da66175598	1799	/* State machine update: Check if an injected conversion is ongoing */
mbed_official	237:f3da66175598	1800	if(hadc->State == HAL_ADC_STATE_BUSY_INJ)
mbed_official	237:f3da66175598	1801	{
mbed_official	237:f3da66175598	1802	/* Change ADC state */
mbed_official	237:f3da66175598	1803	hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
mbed_official	237:f3da66175598	1804	}
mbed_official	237:f3da66175598	1805	else
mbed_official	237:f3da66175598	1806	{
mbed_official	237:f3da66175598	1807	/* Change ADC state */
mbed_official	237:f3da66175598	1808	hadc->State = HAL_ADC_STATE_BUSY_REG;
mbed_official	237:f3da66175598	1809	}
mbed_official	237:f3da66175598	1810
mbed_official	237:f3da66175598	1811	/* Set ADC error code to none */
mbed_official	237:f3da66175598	1812	__HAL_ADC_CLEAR_ERRORCODE(hadc);
mbed_official	237:f3da66175598	1813
mbed_official	237:f3da66175598	1814	/* Clear regular group conversion flag and overrun flag */
mbed_official	237:f3da66175598	1815	/* (To ensure of no unknown state from potential previous ADC operations) */
mbed_official	237:f3da66175598	1816	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC \| ADC_FLAG_EOS \| ADC_FLAG_OVR));
mbed_official	237:f3da66175598	1817
mbed_official	237:f3da66175598	1818	/* Enable ADC end of conversion interrupt */
mbed_official	237:f3da66175598	1819	/* Enable ADC overrun interrupt */
mbed_official	237:f3da66175598	1820	switch(hadc->Init.EOCSelection)
mbed_official	237:f3da66175598	1821	{
mbed_official	237:f3da66175598	1822	case EOC_SEQ_CONV:
mbed_official	237:f3da66175598	1823	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
mbed_official	237:f3da66175598	1824	__HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOS \| ADC_IT_OVR));
mbed_official	237:f3da66175598	1825	break;
mbed_official	237:f3da66175598	1826	/* case EOC_SINGLE_CONV */
mbed_official	237:f3da66175598	1827	default:
mbed_official	237:f3da66175598	1828	__HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOC \| ADC_IT_EOS \| ADC_IT_OVR));
mbed_official	237:f3da66175598	1829	break;
mbed_official	237:f3da66175598	1830	}
mbed_official	237:f3da66175598	1831
mbed_official	237:f3da66175598	1832	/* Enable conversion of regular group. */
mbed_official	237:f3da66175598	1833	/* If software start has been selected, conversion starts immediately. */
mbed_official	237:f3da66175598	1834	/* If external trigger has been selected, conversion will start at next */
mbed_official	237:f3da66175598	1835	/* trigger event. */
mbed_official	237:f3da66175598	1836	/* Case of multimode enabled (for devices with several ADCs): if ADC is */
mbed_official	237:f3da66175598	1837	/* slave, ADC is enabled only (conversion is not started). If ADC is */
mbed_official	237:f3da66175598	1838	/* master, ADC is enabled and conversion is started. */
mbed_official	237:f3da66175598	1839	if (__HAL_ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc) )
mbed_official	237:f3da66175598	1840	{
mbed_official	237:f3da66175598	1841	hadc->Instance->CR \|= ADC_CR_ADSTART;
mbed_official	237:f3da66175598	1842	}
mbed_official	237:f3da66175598	1843	}
mbed_official	237:f3da66175598	1844
mbed_official	237:f3da66175598	1845	/* Process unlocked */
mbed_official	237:f3da66175598	1846	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	1847
mbed_official	237:f3da66175598	1848	/* Return function status */
mbed_official	237:f3da66175598	1849	return tmpHALStatus;
mbed_official	237:f3da66175598	1850	}
mbed_official	237:f3da66175598	1851	#endif /* STM32F303xC \|\| STM32F358xx \|\| STM32F302xC \|\| STM32F303x8 \|\| STM32F328xx \|\| STM32F334x8 \|\| STM32F301x8 \|\| STM32F318xx \|\| STM32F302x8 */
mbed_official	237:f3da66175598	1852
mbed_official	237:f3da66175598	1853	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	237:f3da66175598	1854	/**
mbed_official	237:f3da66175598	1855	* @brief Enables ADC, starts conversion of regular group with interruption.
mbed_official	237:f3da66175598	1856	* Interruptions enabled in this function: EOC (end of conversion),
mbed_official	237:f3da66175598	1857	* overrun (if available).
mbed_official	237:f3da66175598	1858	* Each of these interruptions has its dedicated callback function.
mbed_official	237:f3da66175598	1859	* @param hadc: ADC handle
mbed_official	237:f3da66175598	1860	* @retval HAL status
mbed_official	237:f3da66175598	1861	*/
mbed_official	237:f3da66175598	1862	HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc)
mbed_official	237:f3da66175598	1863	{
mbed_official	237:f3da66175598	1864	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	237:f3da66175598	1865
mbed_official	237:f3da66175598	1866	/* Check the parameters */
mbed_official	237:f3da66175598	1867	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	1868
mbed_official	237:f3da66175598	1869	/* Process locked */
mbed_official	237:f3da66175598	1870	__HAL_LOCK(hadc);
mbed_official	237:f3da66175598	1871
mbed_official	237:f3da66175598	1872	/* Enable the ADC peripheral */
mbed_official	237:f3da66175598	1873	tmpHALStatus = ADC_Enable(hadc);
mbed_official	237:f3da66175598	1874
mbed_official	237:f3da66175598	1875	/* Start conversion if ADC is effectively enabled */
mbed_official	237:f3da66175598	1876	if (tmpHALStatus != HAL_ERROR)
mbed_official	237:f3da66175598	1877	{
mbed_official	237:f3da66175598	1878	/* State machine update: Check if an injected conversion is ongoing */
mbed_official	237:f3da66175598	1879	if(hadc->State == HAL_ADC_STATE_BUSY_INJ)
mbed_official	237:f3da66175598	1880	{
mbed_official	237:f3da66175598	1881	/* Change ADC state */
mbed_official	237:f3da66175598	1882	hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
mbed_official	237:f3da66175598	1883	}
mbed_official	237:f3da66175598	1884	else
mbed_official	237:f3da66175598	1885	{
mbed_official	237:f3da66175598	1886	/* Change ADC state */
mbed_official	237:f3da66175598	1887	hadc->State = HAL_ADC_STATE_BUSY_REG;
mbed_official	237:f3da66175598	1888	}
mbed_official	237:f3da66175598	1889
mbed_official	237:f3da66175598	1890	/* Set ADC error code to none */
mbed_official	237:f3da66175598	1891	__HAL_ADC_CLEAR_ERRORCODE(hadc);
mbed_official	237:f3da66175598	1892
mbed_official	237:f3da66175598	1893	/* Clear regular group conversion flag and overrun flag */
mbed_official	237:f3da66175598	1894	/* (To ensure of no unknown state from potential previous ADC operations) */
mbed_official	237:f3da66175598	1895	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
mbed_official	237:f3da66175598	1896
mbed_official	237:f3da66175598	1897	/* Enable end of conversion interrupt for regular group */
mbed_official	237:f3da66175598	1898	__HAL_ADC_ENABLE_IT(hadc, ADC_IT_EOC);
mbed_official	237:f3da66175598	1899
mbed_official	237:f3da66175598	1900	/* Start conversion of regular group if software start has been selected. */
mbed_official	237:f3da66175598	1901	/* If external trigger has been selected, conversion will start at next */
mbed_official	237:f3da66175598	1902	/* trigger event. */
mbed_official	237:f3da66175598	1903	if (__HAL_ADC_IS_SOFTWARE_START_REGULAR(hadc))
mbed_official	237:f3da66175598	1904	{
mbed_official	237:f3da66175598	1905	/* Start ADC conversion on regular group */
mbed_official	237:f3da66175598	1906	hadc->Instance->CR2 \|= ADC_CR2_SWSTART;
mbed_official	237:f3da66175598	1907	}
mbed_official	237:f3da66175598	1908	}
mbed_official	237:f3da66175598	1909
mbed_official	237:f3da66175598	1910	/* Process unlocked */
mbed_official	237:f3da66175598	1911	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	1912
mbed_official	237:f3da66175598	1913	/* Return function status */
mbed_official	237:f3da66175598	1914	return tmpHALStatus;
mbed_official	237:f3da66175598	1915	}
mbed_official	237:f3da66175598	1916	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	237:f3da66175598	1917
mbed_official	237:f3da66175598	1918	#if defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| defined(STM32F302xC) \|\| defined(STM32F303x8) \|\| defined(STM32F328xx) \|\| defined(STM32F334x8) \|\| defined(STM32F301x8) \|\| defined(STM32F318xx) \|\| defined(STM32F302x8)
mbed_official	237:f3da66175598	1919	/**
mbed_official	237:f3da66175598	1920	* @brief Stop ADC conversion of regular group (and injected group in
mbed_official	237:f3da66175598	1921	* case of auto_injection mode), disable interruption of
mbed_official	237:f3da66175598	1922	* end-of-conversion, disable ADC peripheral.
mbed_official	237:f3da66175598	1923	* @note: ADC peripheral disable is forcing interruption of potential
mbed_official	237:f3da66175598	1924	* conversion on injected group. If injected group is under use, it
mbed_official	237:f3da66175598	1925	* should be preliminarily stopped using HAL_ADCEx_InjectedStop function.
mbed_official	237:f3da66175598	1926	* @param hadc: ADC handle
mbed_official	237:f3da66175598	1927	* @retval HAL status.
mbed_official	237:f3da66175598	1928	*/
mbed_official	237:f3da66175598	1929	HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc)
mbed_official	237:f3da66175598	1930	{
mbed_official	237:f3da66175598	1931	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	237:f3da66175598	1932
mbed_official	237:f3da66175598	1933	/* Check the parameters */
mbed_official	237:f3da66175598	1934	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	1935
mbed_official	237:f3da66175598	1936	/* Process locked */
mbed_official	237:f3da66175598	1937	__HAL_LOCK(hadc);
mbed_official	237:f3da66175598	1938
mbed_official	237:f3da66175598	1939	/* 1. Stop potential conversion on going, on regular and injected groups */
mbed_official	237:f3da66175598	1940	tmpHALStatus = ADC_ConversionStop(hadc, REGULAR_INJECTED_GROUP);
mbed_official	237:f3da66175598	1941
mbed_official	237:f3da66175598	1942	/* Disable ADC peripheral if conversions are effectively stopped */
mbed_official	237:f3da66175598	1943	if (tmpHALStatus != HAL_ERROR)
mbed_official	237:f3da66175598	1944	{
mbed_official	237:f3da66175598	1945	/* Disable ADC end of conversion interrupt for regular group */
mbed_official	237:f3da66175598	1946	/* Disable ADC overrun interrupt */
mbed_official	237:f3da66175598	1947	__HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC \| ADC_IT_EOS \| ADC_IT_OVR));
mbed_official	237:f3da66175598	1948
mbed_official	237:f3da66175598	1949	/* 2. Disable the ADC peripheral */
mbed_official	237:f3da66175598	1950	tmpHALStatus = ADC_Disable(hadc);
mbed_official	237:f3da66175598	1951
mbed_official	237:f3da66175598	1952	/* Check if ADC is effectively disabled */
mbed_official	237:f3da66175598	1953	if (tmpHALStatus != HAL_ERROR)
mbed_official	237:f3da66175598	1954	{
mbed_official	237:f3da66175598	1955	/* Change ADC state */
mbed_official	237:f3da66175598	1956	hadc->State = HAL_ADC_STATE_READY;
mbed_official	237:f3da66175598	1957	}
mbed_official	237:f3da66175598	1958	}
mbed_official	237:f3da66175598	1959
mbed_official	237:f3da66175598	1960	/* Process unlocked */
mbed_official	237:f3da66175598	1961	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	1962
mbed_official	237:f3da66175598	1963	/* Return function status */
mbed_official	237:f3da66175598	1964	return tmpHALStatus;
mbed_official	237:f3da66175598	1965	}
mbed_official	237:f3da66175598	1966	#endif /* STM32F303xC \|\| STM32F358xx \|\| STM32F302xC \|\| STM32F303x8 \|\| STM32F328xx \|\| STM32F334x8 \|\| STM32F301x8 \|\| STM32F318xx \|\| STM32F302x8 */
mbed_official	237:f3da66175598	1967
mbed_official	237:f3da66175598	1968	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	237:f3da66175598	1969	/**
mbed_official	237:f3da66175598	1970	* @brief Stop ADC conversion of regular group (and injected group in
mbed_official	237:f3da66175598	1971	* case of auto_injection mode), disable interrution of
mbed_official	237:f3da66175598	1972	* end-of-conversion, disable ADC peripheral.
mbed_official	237:f3da66175598	1973	* @param hadc: ADC handle
mbed_official	237:f3da66175598	1974	* @retval None
mbed_official	237:f3da66175598	1975	*/
mbed_official	237:f3da66175598	1976	HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc)
mbed_official	237:f3da66175598	1977	{
mbed_official	237:f3da66175598	1978	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	237:f3da66175598	1979
mbed_official	237:f3da66175598	1980	/* Check the parameters */
mbed_official	237:f3da66175598	1981	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	1982
mbed_official	237:f3da66175598	1983	/* Process locked */
mbed_official	237:f3da66175598	1984	__HAL_LOCK(hadc);
mbed_official	237:f3da66175598	1985
mbed_official	237:f3da66175598	1986	/* Stop potential conversion on going, on regular and injected groups */
mbed_official	237:f3da66175598	1987	/* Disable ADC peripheral */
mbed_official	237:f3da66175598	1988	tmpHALStatus = ADC_ConversionStop_Disable(hadc);
mbed_official	237:f3da66175598	1989
mbed_official	237:f3da66175598	1990	/* Check if ADC is effectively disabled */
mbed_official	237:f3da66175598	1991	if (tmpHALStatus != HAL_ERROR)
mbed_official	237:f3da66175598	1992	{
mbed_official	237:f3da66175598	1993	/* Disable ADC end of conversion interrupt for regular group */
mbed_official	237:f3da66175598	1994	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
mbed_official	237:f3da66175598	1995
mbed_official	237:f3da66175598	1996	/* Change ADC state */
mbed_official	237:f3da66175598	1997	hadc->State = HAL_ADC_STATE_READY;
mbed_official	237:f3da66175598	1998	}
mbed_official	237:f3da66175598	1999
mbed_official	237:f3da66175598	2000	/* Process unlocked */
mbed_official	237:f3da66175598	2001	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	2002
mbed_official	237:f3da66175598	2003	/* Return function status */
mbed_official	237:f3da66175598	2004	return tmpHALStatus;
mbed_official	237:f3da66175598	2005	}
mbed_official	237:f3da66175598	2006	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	237:f3da66175598	2007
mbed_official	237:f3da66175598	2008	#if defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| defined(STM32F302xC) \|\| defined(STM32F303x8) \|\| defined(STM32F328xx) \|\| defined(STM32F334x8) \|\| defined(STM32F301x8) \|\| defined(STM32F318xx) \|\| defined(STM32F302x8)
mbed_official	237:f3da66175598	2009	/**
mbed_official	237:f3da66175598	2010	* @brief Enables ADC, starts conversion of regular group and transfers result
mbed_official	237:f3da66175598	2011	* through DMA.
mbed_official	237:f3da66175598	2012	* Interruptions enabled in this function:
mbed_official	237:f3da66175598	2013	* overrun (if available), DMA half transfer, DMA transfer complete.
mbed_official	237:f3da66175598	2014	* Each of these interruptions has its dedicated callback function.
mbed_official	237:f3da66175598	2015	* @note: Case of multimode enabled (for devices with several ADCs): This
mbed_official	237:f3da66175598	2016	* function is for single-ADC mode only. For multimode, use the
mbed_official	237:f3da66175598	2017	* dedicated MultimodeStart function.
mbed_official	237:f3da66175598	2018	* @param hadc: ADC handle
mbed_official	237:f3da66175598	2019	* @param pData: The destination Buffer address.
mbed_official	237:f3da66175598	2020	* @param Length: The length of data to be transferred from ADC peripheral to memory.
mbed_official	237:f3da66175598	2021	* @retval None
mbed_official	237:f3da66175598	2022	*/
mbed_official	237:f3da66175598	2023	HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
mbed_official	237:f3da66175598	2024	{
mbed_official	237:f3da66175598	2025	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	237:f3da66175598	2026
mbed_official	237:f3da66175598	2027	/* Check the parameters */
mbed_official	237:f3da66175598	2028	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	2029
mbed_official	237:f3da66175598	2030	/* Process locked */
mbed_official	237:f3da66175598	2031	__HAL_LOCK(hadc);
mbed_official	237:f3da66175598	2032
mbed_official	237:f3da66175598	2033	/* Verification if multimode is disabled (for devices with several ADC) */
mbed_official	237:f3da66175598	2034	/* If multimode is enabled, dedicated function multimode conversion */
mbed_official	237:f3da66175598	2035	/* start DMA must be used. */
mbed_official	237:f3da66175598	2036	if(__HAL_ADC_COMMON_CCR_MULTI(hadc) == RESET)
mbed_official	237:f3da66175598	2037	{
mbed_official	237:f3da66175598	2038
mbed_official	237:f3da66175598	2039	/* Enable the ADC peripheral */
mbed_official	237:f3da66175598	2040	tmpHALStatus = ADC_Enable(hadc);
mbed_official	237:f3da66175598	2041
mbed_official	237:f3da66175598	2042	/* Start conversion if ADC is effectively enabled */
mbed_official	237:f3da66175598	2043	if (tmpHALStatus != HAL_ERROR)
mbed_official	237:f3da66175598	2044	{
mbed_official	237:f3da66175598	2045	/* State machine update: Check if an injected conversion is ongoing */
mbed_official	237:f3da66175598	2046	if(hadc->State == HAL_ADC_STATE_BUSY_INJ)
mbed_official	237:f3da66175598	2047	{
mbed_official	237:f3da66175598	2048	/* Change ADC state */
mbed_official	237:f3da66175598	2049	hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
mbed_official	237:f3da66175598	2050	}
mbed_official	237:f3da66175598	2051	else
mbed_official	237:f3da66175598	2052	{
mbed_official	237:f3da66175598	2053	/* Change ADC state */
mbed_official	237:f3da66175598	2054	hadc->State = HAL_ADC_STATE_BUSY_REG;
mbed_official	237:f3da66175598	2055	}
mbed_official	237:f3da66175598	2056
mbed_official	237:f3da66175598	2057	/* Set ADC error code to none */
mbed_official	237:f3da66175598	2058	__HAL_ADC_CLEAR_ERRORCODE(hadc);
mbed_official	237:f3da66175598	2059
mbed_official	237:f3da66175598	2060
mbed_official	237:f3da66175598	2061	/* Set the DMA transfer complete callback */
mbed_official	237:f3da66175598	2062	hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
mbed_official	237:f3da66175598	2063
mbed_official	237:f3da66175598	2064	/* Set the DMA half transfer complete callback */
mbed_official	237:f3da66175598	2065	hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
mbed_official	237:f3da66175598	2066
mbed_official	237:f3da66175598	2067	/* Set the DMA error callback */
mbed_official	237:f3da66175598	2068	hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
mbed_official	237:f3da66175598	2069
mbed_official	237:f3da66175598	2070
mbed_official	237:f3da66175598	2071	/* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */
mbed_official	237:f3da66175598	2072	/* start (in case of SW start): */
mbed_official	237:f3da66175598	2073
mbed_official	237:f3da66175598	2074	/* Clear regular group conversion flag and overrun flag */
mbed_official	237:f3da66175598	2075	/* (To ensure of no unknown state from potential previous ADC */
mbed_official	237:f3da66175598	2076	/* operations) */
mbed_official	237:f3da66175598	2077	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC \| ADC_FLAG_EOS \| ADC_FLAG_OVR));
mbed_official	237:f3da66175598	2078
mbed_official	237:f3da66175598	2079	/* Enable ADC overrun interrupt */
mbed_official	237:f3da66175598	2080	__HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
mbed_official	237:f3da66175598	2081
mbed_official	237:f3da66175598	2082	/* Enable ADC DMA mode */
mbed_official	237:f3da66175598	2083	hadc->Instance->CFGR \|= ADC_CFGR_DMAEN;
mbed_official	237:f3da66175598	2084
mbed_official	237:f3da66175598	2085	/* Start the DMA channel */
mbed_official	237:f3da66175598	2086	HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
mbed_official	237:f3da66175598	2087
mbed_official	237:f3da66175598	2088	/* Enable conversion of regular group. */
mbed_official	237:f3da66175598	2089	/* If software start has been selected, conversion starts immediately. */
mbed_official	237:f3da66175598	2090	/* If external trigger has been selected, conversion will start at next */
mbed_official	237:f3da66175598	2091	/* trigger event. */
mbed_official	237:f3da66175598	2092	hadc->Instance->CR \|= ADC_CR_ADSTART;
mbed_official	237:f3da66175598	2093
mbed_official	237:f3da66175598	2094	}
mbed_official	237:f3da66175598	2095	}
mbed_official	237:f3da66175598	2096	else
mbed_official	237:f3da66175598	2097	{
mbed_official	237:f3da66175598	2098	tmpHALStatus = HAL_ERROR;
mbed_official	237:f3da66175598	2099	}
mbed_official	237:f3da66175598	2100
mbed_official	237:f3da66175598	2101	/* Process unlocked */
mbed_official	237:f3da66175598	2102	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	2103
mbed_official	237:f3da66175598	2104	/* Return function status */
mbed_official	237:f3da66175598	2105	return tmpHALStatus;
mbed_official	237:f3da66175598	2106	}
mbed_official	237:f3da66175598	2107	#endif /* STM32F303xC \|\| STM32F358xx \|\| STM32F302xC \|\| STM32F303x8 \|\| STM32F328xx \|\| STM32F334x8 \|\| STM32F301x8 \|\| STM32F318xx \|\| STM32F302x8 */
mbed_official	237:f3da66175598	2108
mbed_official	237:f3da66175598	2109	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	237:f3da66175598	2110	/**
mbed_official	237:f3da66175598	2111	* @brief Enables ADC, starts conversion of regular group and transfers result
mbed_official	237:f3da66175598	2112	* through DMA.
mbed_official	237:f3da66175598	2113	* Interruptions enabled in this function:
mbed_official	237:f3da66175598	2114	* overrun (if available), DMA half transfer, DMA transfer complete.
mbed_official	237:f3da66175598	2115	* Each of these interruptions has its dedicated callback function.
mbed_official	237:f3da66175598	2116	* @note For devices with several ADCs: This function is for single-ADC mode
mbed_official	237:f3da66175598	2117	* only. For multimode, use the dedicated MultimodeStart function.
mbed_official	237:f3da66175598	2118	* @param hadc: ADC handle
mbed_official	237:f3da66175598	2119	* @param pData: The destination Buffer address.
mbed_official	237:f3da66175598	2120	* @param Length: The length of data to be transferred from ADC peripheral to memory.
mbed_official	237:f3da66175598	2121	* @retval None
mbed_official	237:f3da66175598	2122	*/
mbed_official	237:f3da66175598	2123	HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
mbed_official	237:f3da66175598	2124	{
mbed_official	237:f3da66175598	2125	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	237:f3da66175598	2126
mbed_official	237:f3da66175598	2127	/* Check the parameters */
mbed_official	237:f3da66175598	2128	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	2129
mbed_official	237:f3da66175598	2130	/* Process locked */
mbed_official	237:f3da66175598	2131	__HAL_LOCK(hadc);
mbed_official	237:f3da66175598	2132
mbed_official	237:f3da66175598	2133	/* Enable the ADC peripheral */
mbed_official	237:f3da66175598	2134	tmpHALStatus = ADC_Enable(hadc);
mbed_official	237:f3da66175598	2135
mbed_official	237:f3da66175598	2136	/* Start conversion if ADC is effectively enabled */
mbed_official	237:f3da66175598	2137	if (tmpHALStatus != HAL_ERROR)
mbed_official	237:f3da66175598	2138	{
mbed_official	237:f3da66175598	2139	/* State machine update: Check if an injected conversion is ongoing */
mbed_official	237:f3da66175598	2140	if(hadc->State == HAL_ADC_STATE_BUSY_INJ)
mbed_official	237:f3da66175598	2141	{
mbed_official	237:f3da66175598	2142	/* Change ADC state */
mbed_official	237:f3da66175598	2143	hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
mbed_official	237:f3da66175598	2144	}
mbed_official	237:f3da66175598	2145	else
mbed_official	237:f3da66175598	2146	{
mbed_official	237:f3da66175598	2147	/* Change ADC state */
mbed_official	237:f3da66175598	2148	hadc->State = HAL_ADC_STATE_BUSY_REG;
mbed_official	237:f3da66175598	2149	}
mbed_official	237:f3da66175598	2150
mbed_official	237:f3da66175598	2151	/* Set ADC error code to none */
mbed_official	237:f3da66175598	2152	__HAL_ADC_CLEAR_ERRORCODE(hadc);
mbed_official	237:f3da66175598	2153
mbed_official	237:f3da66175598	2154
mbed_official	237:f3da66175598	2155	/* Set the DMA transfer complete callback */
mbed_official	237:f3da66175598	2156	hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
mbed_official	237:f3da66175598	2157
mbed_official	237:f3da66175598	2158	/* Set the DMA half transfer complete callback */
mbed_official	237:f3da66175598	2159	hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
mbed_official	237:f3da66175598	2160
mbed_official	237:f3da66175598	2161	/* Set the DMA error callback */
mbed_official	237:f3da66175598	2162	hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
mbed_official	237:f3da66175598	2163
mbed_official	237:f3da66175598	2164
mbed_official	237:f3da66175598	2165	/* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */
mbed_official	237:f3da66175598	2166	/* start (in case of SW start): */
mbed_official	237:f3da66175598	2167
mbed_official	237:f3da66175598	2168	/* Clear regular group conversion flag and overrun flag */
mbed_official	237:f3da66175598	2169	/* (To ensure of no unknown state from potential previous ADC operations) */
mbed_official	237:f3da66175598	2170	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
mbed_official	237:f3da66175598	2171
mbed_official	237:f3da66175598	2172	/* Enable ADC DMA mode */
mbed_official	237:f3da66175598	2173	hadc->Instance->CR2 \|= ADC_CR2_DMA;
mbed_official	237:f3da66175598	2174
mbed_official	237:f3da66175598	2175	/* Start the DMA channel */
mbed_official	237:f3da66175598	2176	HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
mbed_official	237:f3da66175598	2177
mbed_official	237:f3da66175598	2178	/* Start conversion of regular group if software start has been selected. */
mbed_official	237:f3da66175598	2179	/* If external trigger has been selected, conversion will start at next */
mbed_official	237:f3da66175598	2180	/* trigger event. */
mbed_official	237:f3da66175598	2181	/* Note: Alternate trigger for single conversion could be to force an */
mbed_official	237:f3da66175598	2182	/* additional set of bit ADON "hadc->Instance->CR2 \|= ADC_CR2_ADON;"*/
mbed_official	237:f3da66175598	2183	if (__HAL_ADC_IS_SOFTWARE_START_REGULAR(hadc))
mbed_official	237:f3da66175598	2184	{
mbed_official	237:f3da66175598	2185	/* Start ADC conversion on regular group */
mbed_official	237:f3da66175598	2186	hadc->Instance->CR2 \|= ADC_CR2_SWSTART;
mbed_official	237:f3da66175598	2187	}
mbed_official	237:f3da66175598	2188	}
mbed_official	237:f3da66175598	2189
mbed_official	237:f3da66175598	2190	/* Process unlocked */
mbed_official	237:f3da66175598	2191	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	2192
mbed_official	237:f3da66175598	2193	/* Return function status */
mbed_official	237:f3da66175598	2194	return tmpHALStatus;
mbed_official	237:f3da66175598	2195	}
mbed_official	237:f3da66175598	2196	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	237:f3da66175598	2197
mbed_official	237:f3da66175598	2198	#if defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| defined(STM32F302xC) \|\| defined(STM32F303x8) \|\| defined(STM32F328xx) \|\| defined(STM32F334x8) \|\| defined(STM32F301x8) \|\| defined(STM32F318xx) \|\| defined(STM32F302x8)
mbed_official	237:f3da66175598	2199	/**
mbed_official	237:f3da66175598	2200	* @brief Stop ADC conversion of regular group (and injected channels in
mbed_official	237:f3da66175598	2201	* case of auto_injection mode), disable ADC DMA transfer, disable
mbed_official	237:f3da66175598	2202	* ADC peripheral.
mbed_official	237:f3da66175598	2203	* Each of these interruptions has its dedicated callback function.
mbed_official	237:f3da66175598	2204	* @note: ADC peripheral disable is forcing interruption of potential
mbed_official	237:f3da66175598	2205	* conversion on injected group. If injected group is under use, it
mbed_official	237:f3da66175598	2206	* should be preliminarily stopped using HAL_ADCEx_InjectedStop function.
mbed_official	237:f3da66175598	2207	* @note: Case of multimode enabled (for devices with several ADCs): This
mbed_official	237:f3da66175598	2208	* function is for single-ADC mode only. For multimode, use the
mbed_official	237:f3da66175598	2209	* dedicated MultimodeStop function.
mbed_official	237:f3da66175598	2210	* @param hadc: ADC handle
mbed_official	237:f3da66175598	2211	* @retval HAL status.
mbed_official	237:f3da66175598	2212	*/
mbed_official	237:f3da66175598	2213	HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc)
mbed_official	237:f3da66175598	2214	{
mbed_official	237:f3da66175598	2215	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	237:f3da66175598	2216
mbed_official	237:f3da66175598	2217	/* Check the parameters */
mbed_official	237:f3da66175598	2218	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	2219
mbed_official	237:f3da66175598	2220	/* Process locked */
mbed_official	237:f3da66175598	2221	__HAL_LOCK(hadc);
mbed_official	237:f3da66175598	2222
mbed_official	237:f3da66175598	2223	/* 1. Stop potential conversion on going, on regular and injected groups */
mbed_official	237:f3da66175598	2224	tmpHALStatus = ADC_ConversionStop(hadc, REGULAR_INJECTED_GROUP);
mbed_official	237:f3da66175598	2225
mbed_official	237:f3da66175598	2226	/* Disable ADC peripheral if conversions are effectively stopped */
mbed_official	237:f3da66175598	2227	if (tmpHALStatus == HAL_OK)
mbed_official	237:f3da66175598	2228	{
mbed_official	237:f3da66175598	2229	/* Disable ADC DMA (ADC DMA configuration ADC_CFGR_DMACFG is kept) */
mbed_official	237:f3da66175598	2230	hadc->Instance->CFGR &= ~ADC_CFGR_DMAEN;
mbed_official	237:f3da66175598	2231
mbed_official	237:f3da66175598	2232	/* Disable the DMA channel (in case of DMA in circular mode or stop while */
mbed_official	237:f3da66175598	2233	/* while DMA transfer is on going) */
mbed_official	237:f3da66175598	2234	tmpHALStatus = HAL_DMA_Abort(hadc->DMA_Handle);
mbed_official	237:f3da66175598	2235
mbed_official	237:f3da66175598	2236	/* Check if DMA channel effectively disabled */
mbed_official	237:f3da66175598	2237	if (tmpHALStatus != HAL_OK)
mbed_official	237:f3da66175598	2238	{
mbed_official	237:f3da66175598	2239	/* Update ADC state machine to error */
mbed_official	237:f3da66175598	2240	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	2241	}
mbed_official	237:f3da66175598	2242
mbed_official	237:f3da66175598	2243	/* Disable ADC overrun interrupt */
mbed_official	237:f3da66175598	2244	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
mbed_official	237:f3da66175598	2245
mbed_official	237:f3da66175598	2246	/* 2. Disable the ADC peripheral */
mbed_official	237:f3da66175598	2247	/* Update "tmpHALStatus" only if DMA channel disabling passed, to keep in */
mbed_official	237:f3da66175598	2248	/* memory a potential failing status. */
mbed_official	237:f3da66175598	2249	if (tmpHALStatus == HAL_OK)
mbed_official	237:f3da66175598	2250	{
mbed_official	237:f3da66175598	2251	tmpHALStatus = ADC_Disable(hadc);
mbed_official	237:f3da66175598	2252	}
mbed_official	237:f3da66175598	2253	else
mbed_official	237:f3da66175598	2254	{
mbed_official	237:f3da66175598	2255	ADC_Disable(hadc);
mbed_official	237:f3da66175598	2256	}
mbed_official	237:f3da66175598	2257
mbed_official	237:f3da66175598	2258	/* Check if ADC is effectively disabled */
mbed_official	237:f3da66175598	2259	if (tmpHALStatus != HAL_OK)
mbed_official	237:f3da66175598	2260	{
mbed_official	237:f3da66175598	2261	/* Change ADC state */
mbed_official	237:f3da66175598	2262	hadc->State = HAL_ADC_STATE_READY;
mbed_official	237:f3da66175598	2263	}
mbed_official	237:f3da66175598	2264
mbed_official	237:f3da66175598	2265	}
mbed_official	237:f3da66175598	2266
mbed_official	237:f3da66175598	2267	/* Process unlocked */
mbed_official	237:f3da66175598	2268	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	2269
mbed_official	237:f3da66175598	2270	/* Return function status */
mbed_official	237:f3da66175598	2271	return tmpHALStatus;
mbed_official	237:f3da66175598	2272	}
mbed_official	237:f3da66175598	2273	#endif /* STM32F303xC \|\| STM32F358xx \|\| STM32F302xC \|\| STM32F303x8 \|\| STM32F328xx \|\| STM32F334x8 \|\| STM32F301x8 \|\| STM32F318xx \|\| STM32F302x8 */
mbed_official	237:f3da66175598	2274
mbed_official	237:f3da66175598	2275	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	237:f3da66175598	2276	/**
mbed_official	237:f3da66175598	2277	* @brief Stop ADC conversion of regular group (and injected group in
mbed_official	237:f3da66175598	2278	* case of auto_injection mode), disable ADC DMA transfer, disable
mbed_official	237:f3da66175598	2279	* ADC peripheral.
mbed_official	237:f3da66175598	2280	* @note: ADC peripheral disable is forcing interruption of potential
mbed_official	237:f3da66175598	2281	* conversion on injected group. If injected group is under use, it
mbed_official	237:f3da66175598	2282	* should be preliminarily stopped using HAL_ADCEx_InjectedStop function.
mbed_official	237:f3da66175598	2283	* @note For devices with several ADCs: This function is for single-ADC mode
mbed_official	237:f3da66175598	2284	* only. For multimode, use the dedicated MultimodeStop function.
mbed_official	237:f3da66175598	2285	* @param hadc: ADC handle
mbed_official	237:f3da66175598	2286	* @retval HAL status.
mbed_official	237:f3da66175598	2287	*/
mbed_official	237:f3da66175598	2288	HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc)
mbed_official	237:f3da66175598	2289	{
mbed_official	237:f3da66175598	2290	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	237:f3da66175598	2291
mbed_official	237:f3da66175598	2292	/* Check the parameters */
mbed_official	237:f3da66175598	2293	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	2294
mbed_official	237:f3da66175598	2295	/* Process locked */
mbed_official	237:f3da66175598	2296	__HAL_LOCK(hadc);
mbed_official	237:f3da66175598	2297
mbed_official	237:f3da66175598	2298	/* Stop potential conversion on going, on regular and injected groups */
mbed_official	237:f3da66175598	2299	/* Disable ADC peripheral */
mbed_official	237:f3da66175598	2300	tmpHALStatus = ADC_ConversionStop_Disable(hadc);
mbed_official	237:f3da66175598	2301
mbed_official	237:f3da66175598	2302	/* Check if ADC is effectively disabled */
mbed_official	237:f3da66175598	2303	if (tmpHALStatus != HAL_ERROR)
mbed_official	237:f3da66175598	2304	{
mbed_official	237:f3da66175598	2305	/* Disable ADC DMA mode */
mbed_official	237:f3da66175598	2306	hadc->Instance->CR2 &= ~ADC_CR2_DMA;
mbed_official	237:f3da66175598	2307
mbed_official	237:f3da66175598	2308	/* Disable the DMA channel (in case of DMA in circular mode or stop while */
mbed_official	237:f3da66175598	2309	/* while DMA transfer is on going) */
mbed_official	237:f3da66175598	2310	tmpHALStatus = HAL_DMA_Abort(hadc->DMA_Handle);
mbed_official	237:f3da66175598	2311
mbed_official	237:f3da66175598	2312	/* Check if DMA channel effectively disabled */
mbed_official	237:f3da66175598	2313	if (tmpHALStatus == HAL_OK)
mbed_official	237:f3da66175598	2314	{
mbed_official	237:f3da66175598	2315	/* Change ADC state */
mbed_official	237:f3da66175598	2316	hadc->State = HAL_ADC_STATE_READY;
mbed_official	237:f3da66175598	2317	}
mbed_official	237:f3da66175598	2318	else
mbed_official	237:f3da66175598	2319	{
mbed_official	237:f3da66175598	2320	/* Update ADC state machine to error */
mbed_official	237:f3da66175598	2321	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	2322	}
mbed_official	237:f3da66175598	2323	}
mbed_official	237:f3da66175598	2324
mbed_official	237:f3da66175598	2325	/* Process unlocked */
mbed_official	237:f3da66175598	2326	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	2327
mbed_official	237:f3da66175598	2328	/* Return function status */
mbed_official	237:f3da66175598	2329	return tmpHALStatus;
mbed_official	237:f3da66175598	2330	}
mbed_official	237:f3da66175598	2331	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	237:f3da66175598	2332
mbed_official	237:f3da66175598	2333	#if defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| defined(STM32F302xC) \|\| defined(STM32F303x8) \|\| defined(STM32F328xx) \|\| defined(STM32F334x8) \|\| defined(STM32F301x8) \|\| defined(STM32F318xx) \|\| defined(STM32F302x8)
mbed_official	237:f3da66175598	2334	/**
mbed_official	237:f3da66175598	2335	* @brief Get ADC regular group conversion result.
mbed_official	237:f3da66175598	2336	* @param hadc: ADC handle
mbed_official	237:f3da66175598	2337	* @retval Converted value
mbed_official	237:f3da66175598	2338	*/
mbed_official	237:f3da66175598	2339	uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc)
mbed_official	237:f3da66175598	2340	{
mbed_official	237:f3da66175598	2341	/* Check the parameters */
mbed_official	237:f3da66175598	2342	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	2343
mbed_official	237:f3da66175598	2344	/* Note: EOC flag is automatically cleared by hardware when reading */
mbed_official	237:f3da66175598	2345	/* register DR. Additionally, clear flag EOS by software. */
mbed_official	237:f3da66175598	2346
mbed_official	237:f3da66175598	2347	/* Clear regular group conversion flag */
mbed_official	237:f3da66175598	2348	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC \| ADC_FLAG_EOS) );
mbed_official	237:f3da66175598	2349
mbed_official	237:f3da66175598	2350	/* Return ADC converted value */
mbed_official	237:f3da66175598	2351	return hadc->Instance->DR;
mbed_official	237:f3da66175598	2352	}
mbed_official	237:f3da66175598	2353	#endif /* STM32F303xC \|\| STM32F358xx \|\| STM32F302xC \|\| STM32F303x8 \|\| STM32F328xx \|\| STM32F334x8 \|\| STM32F301x8 \|\| STM32F318xx \|\| STM32F302x8 */
mbed_official	237:f3da66175598	2354
mbed_official	237:f3da66175598	2355	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	237:f3da66175598	2356	/**
mbed_official	237:f3da66175598	2357	* @brief Get ADC regular group conversion result.
mbed_official	237:f3da66175598	2358	* @param hadc: ADC handle
mbed_official	237:f3da66175598	2359	* @retval Converted value
mbed_official	237:f3da66175598	2360	*/
mbed_official	237:f3da66175598	2361	uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc)
mbed_official	237:f3da66175598	2362	{
mbed_official	237:f3da66175598	2363	/* Check the parameters */
mbed_official	237:f3da66175598	2364	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	2365
mbed_official	237:f3da66175598	2366	/* Note: EOC flag is not cleared here by software because automatically */
mbed_official	237:f3da66175598	2367	/* cleared by hardware when reading register DR. */
mbed_official	237:f3da66175598	2368
mbed_official	237:f3da66175598	2369	/* Return ADC converted value */
mbed_official	237:f3da66175598	2370	return hadc->Instance->DR;
mbed_official	237:f3da66175598	2371	}
mbed_official	237:f3da66175598	2372	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	237:f3da66175598	2373
mbed_official	237:f3da66175598	2374	/**
mbed_official	237:f3da66175598	2375	* @brief DMA transfer complete callback.
mbed_official	237:f3da66175598	2376	* @param hdma: pointer to DMA handle.
mbed_official	237:f3da66175598	2377	* @retval None
mbed_official	237:f3da66175598	2378	*/
mbed_official	237:f3da66175598	2379	static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
mbed_official	237:f3da66175598	2380	{
mbed_official	237:f3da66175598	2381	/* Retrieve ADC handle corresponding to current DMA handle */
mbed_official	237:f3da66175598	2382	ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	237:f3da66175598	2383
mbed_official	237:f3da66175598	2384	/* Update state machine on conversion status if not in error state */
mbed_official	237:f3da66175598	2385	if(hadc->State != HAL_ADC_STATE_ERROR)
mbed_official	237:f3da66175598	2386	{
mbed_official	237:f3da66175598	2387	/* Update ADC state machine */
mbed_official	237:f3da66175598	2388	if(hadc->State != HAL_ADC_STATE_EOC_INJ_REG)
mbed_official	237:f3da66175598	2389	{
mbed_official	237:f3da66175598	2390	/* Check if a conversion is ready on injected group */
mbed_official	237:f3da66175598	2391	if(hadc->State == HAL_ADC_STATE_EOC_INJ)
mbed_official	237:f3da66175598	2392	{
mbed_official	237:f3da66175598	2393	/* Change ADC state */
mbed_official	237:f3da66175598	2394	hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
mbed_official	237:f3da66175598	2395	}
mbed_official	237:f3da66175598	2396	else
mbed_official	237:f3da66175598	2397	{
mbed_official	237:f3da66175598	2398	/* Change ADC state */
mbed_official	237:f3da66175598	2399	hadc->State = HAL_ADC_STATE_EOC_REG;
mbed_official	237:f3da66175598	2400	}
mbed_official	237:f3da66175598	2401	}
mbed_official	237:f3da66175598	2402	}
mbed_official	237:f3da66175598	2403
mbed_official	237:f3da66175598	2404	/* Conversion complete callback */
mbed_official	237:f3da66175598	2405	HAL_ADC_ConvCpltCallback(hadc);
mbed_official	237:f3da66175598	2406	}
mbed_official	237:f3da66175598	2407
mbed_official	237:f3da66175598	2408	/**
mbed_official	237:f3da66175598	2409	* @brief DMA half transfer complete callback.
mbed_official	237:f3da66175598	2410	* @param hdma: pointer to DMA handle.
mbed_official	237:f3da66175598	2411	* @retval None
mbed_official	237:f3da66175598	2412	*/
mbed_official	237:f3da66175598	2413	static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)
mbed_official	237:f3da66175598	2414	{
mbed_official	237:f3da66175598	2415	/* Retrieve ADC handle corresponding to current DMA handle */
mbed_official	237:f3da66175598	2416	ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	237:f3da66175598	2417
mbed_official	237:f3da66175598	2418	/* Half conversion callback */
mbed_official	237:f3da66175598	2419	HAL_ADC_ConvHalfCpltCallback(hadc);
mbed_official	237:f3da66175598	2420	}
mbed_official	237:f3da66175598	2421
mbed_official	237:f3da66175598	2422	/**
mbed_official	237:f3da66175598	2423	* @brief DMA error callback
mbed_official	237:f3da66175598	2424	* @param hdma: pointer to DMA handle.
mbed_official	237:f3da66175598	2425	* @retval None
mbed_official	237:f3da66175598	2426	*/
mbed_official	237:f3da66175598	2427	static void ADC_DMAError(DMA_HandleTypeDef *hdma)
mbed_official	237:f3da66175598	2428	{
mbed_official	237:f3da66175598	2429	/* Retrieve ADC handle corresponding to current DMA handle */
mbed_official	237:f3da66175598	2430	ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	237:f3da66175598	2431
mbed_official	237:f3da66175598	2432	/* Change ADC state */
mbed_official	237:f3da66175598	2433	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	2434
mbed_official	237:f3da66175598	2435	/* Set ADC error code to DMA error */
mbed_official	237:f3da66175598	2436	hadc->ErrorCode \|= HAL_ADC_ERROR_DMA;
mbed_official	237:f3da66175598	2437
mbed_official	237:f3da66175598	2438	/* Error callback */
mbed_official	237:f3da66175598	2439	HAL_ADC_ErrorCallback(hadc);
mbed_official	237:f3da66175598	2440	}
mbed_official	237:f3da66175598	2441
mbed_official	237:f3da66175598	2442	#if defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| defined(STM32F302xC) \|\| defined(STM32F303x8) \|\| defined(STM32F328xx) \|\| defined(STM32F334x8) \|\| defined(STM32F301x8) \|\| defined(STM32F318xx) \|\| defined(STM32F302x8)
mbed_official	237:f3da66175598	2443	/**
mbed_official	237:f3da66175598	2444	* @brief Handles ADC interrupt request.
mbed_official	237:f3da66175598	2445	* @param hadc: ADC handle
mbed_official	237:f3da66175598	2446	* @retval None
mbed_official	237:f3da66175598	2447	*/
mbed_official	237:f3da66175598	2448	void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
mbed_official	237:f3da66175598	2449	{
mbed_official	237:f3da66175598	2450	/* Check the parameters */
mbed_official	237:f3da66175598	2451	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	2452	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
mbed_official	237:f3da66175598	2453	assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection));
mbed_official	237:f3da66175598	2454
mbed_official	237:f3da66175598	2455	/* ========== Check End of Conversion flag for regular group ========== */
mbed_official	237:f3da66175598	2456	if( (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOC)) \|\|
mbed_official	237:f3da66175598	2457	(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOS)) )
mbed_official	237:f3da66175598	2458	{
mbed_official	237:f3da66175598	2459	/* Update state machine on conversion status if not in error state */
mbed_official	237:f3da66175598	2460	if(hadc->State != HAL_ADC_STATE_ERROR)
mbed_official	237:f3da66175598	2461	{
mbed_official	237:f3da66175598	2462	/* Check if an injected conversion is ready */
mbed_official	237:f3da66175598	2463	if(hadc->State == HAL_ADC_STATE_EOC_INJ)
mbed_official	237:f3da66175598	2464	{
mbed_official	237:f3da66175598	2465	/* Change ADC state */
mbed_official	237:f3da66175598	2466	hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
mbed_official	237:f3da66175598	2467	}
mbed_official	237:f3da66175598	2468	else
mbed_official	237:f3da66175598	2469	{
mbed_official	237:f3da66175598	2470	/* Change ADC state */
mbed_official	237:f3da66175598	2471	hadc->State = HAL_ADC_STATE_EOC_REG;
mbed_official	237:f3da66175598	2472	}
mbed_official	237:f3da66175598	2473	}
mbed_official	237:f3da66175598	2474
mbed_official	237:f3da66175598	2475	/* Disable interruption if no further conversion upcoming by regular */
mbed_official	237:f3da66175598	2476	/* external trigger or by continuous mode, */
mbed_official	237:f3da66175598	2477	/* and if scan sequence if completed. */
mbed_official	237:f3da66175598	2478	if(__HAL_ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
mbed_official	237:f3da66175598	2479	(hadc->Init.ContinuousConvMode == DISABLE) )
mbed_official	237:f3da66175598	2480	{
mbed_official	237:f3da66175598	2481	/* If End of Sequence is reached, disable interrupts */
mbed_official	237:f3da66175598	2482	if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) )
mbed_official	237:f3da66175598	2483	{
mbed_official	237:f3da66175598	2484	/* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */
mbed_official	237:f3da66175598	2485	/* ADSTART==0 (no conversion on going) */
mbed_official	237:f3da66175598	2486	if (__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
mbed_official	237:f3da66175598	2487	{
mbed_official	237:f3da66175598	2488	/* Disable ADC end of sequence conversion interrupt */
mbed_official	237:f3da66175598	2489	/* Note: Overrun interrupt was enabled with EOC interrupt in */
mbed_official	237:f3da66175598	2490	/* HAL_Start_IT(), but is not disabled here because can be used */
mbed_official	237:f3da66175598	2491	/* by overrun IRQ process below. */
mbed_official	237:f3da66175598	2492	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC \| ADC_IT_EOS);
mbed_official	237:f3da66175598	2493	}
mbed_official	237:f3da66175598	2494	else
mbed_official	237:f3da66175598	2495	{
mbed_official	237:f3da66175598	2496	/* Change ADC state to error state */
mbed_official	237:f3da66175598	2497	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	2498
mbed_official	237:f3da66175598	2499	/* Set ADC error code to ADC IP internal error */
mbed_official	237:f3da66175598	2500	hadc->ErrorCode \|= HAL_ADC_ERROR_INTERNAL;
mbed_official	237:f3da66175598	2501	}
mbed_official	237:f3da66175598	2502	}
mbed_official	237:f3da66175598	2503	}
mbed_official	237:f3da66175598	2504
mbed_official	237:f3da66175598	2505	/* Conversion complete callback */
mbed_official	237:f3da66175598	2506	/* Note: into callback, to determine if conversion has been triggered */
mbed_official	237:f3da66175598	2507	/* from EOC or EOS, possibility to use: */
mbed_official	237:f3da66175598	2508	/* " if( __HAL_ADC_GET_FLAG(&hadc, ADC_FLAG_EOS)) " */
mbed_official	237:f3da66175598	2509	HAL_ADC_ConvCpltCallback(hadc);
mbed_official	237:f3da66175598	2510
mbed_official	237:f3da66175598	2511
mbed_official	237:f3da66175598	2512	/* Clear regular group conversion flag */
mbed_official	237:f3da66175598	2513	/* Note: in case of overrun set to OVR_DATA_PRESERVED, end of conversion */
mbed_official	237:f3da66175598	2514	/* flags clear induces the release of the preserved data. */
mbed_official	237:f3da66175598	2515	/* Therefore, if the preserved data value is needed, it must be */
mbed_official	237:f3da66175598	2516	/* read preliminarily into HAL_ADC_ConvCpltCallback(). */
mbed_official	237:f3da66175598	2517	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC \| ADC_FLAG_EOS) );
mbed_official	237:f3da66175598	2518	}
mbed_official	237:f3da66175598	2519
mbed_official	237:f3da66175598	2520
mbed_official	237:f3da66175598	2521	/* ========== Check End of Conversion flag for injected group ========== */
mbed_official	237:f3da66175598	2522	if( (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOC) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_JEOC)) \|\|
mbed_official	237:f3da66175598	2523	(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOS) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_JEOS)) )
mbed_official	237:f3da66175598	2524	{
mbed_official	237:f3da66175598	2525	/* Update state machine on conversion status if not in error state */
mbed_official	237:f3da66175598	2526	if(hadc->State != HAL_ADC_STATE_ERROR)
mbed_official	237:f3da66175598	2527	{
mbed_official	237:f3da66175598	2528	/* Check if a regular conversion is ready */
mbed_official	237:f3da66175598	2529	if(hadc->State == HAL_ADC_STATE_EOC_REG)
mbed_official	237:f3da66175598	2530	{
mbed_official	237:f3da66175598	2531	/* Change ADC state */
mbed_official	237:f3da66175598	2532	hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
mbed_official	237:f3da66175598	2533	}
mbed_official	237:f3da66175598	2534	else
mbed_official	237:f3da66175598	2535	{
mbed_official	237:f3da66175598	2536	/* Change ADC state */
mbed_official	237:f3da66175598	2537	hadc->State = HAL_ADC_STATE_EOC_INJ;
mbed_official	237:f3da66175598	2538	}
mbed_official	237:f3da66175598	2539	}
mbed_official	237:f3da66175598	2540
mbed_official	237:f3da66175598	2541	/* Disable interruption if no further conversion upcoming by injected */
mbed_official	237:f3da66175598	2542	/* external trigger or by automatic injected conversion with regular */
mbed_official	237:f3da66175598	2543	/* group having no further conversion upcoming (same conditions as */
mbed_official	237:f3da66175598	2544	/* regular group interruption disabling above), */
mbed_official	237:f3da66175598	2545	/* and if injected scan sequence is completed. */
mbed_official	237:f3da66175598	2546	if(__HAL_ADC_IS_SOFTWARE_START_INJECTED(hadc) \|\|
mbed_official	237:f3da66175598	2547	(HAL_IS_BIT_CLR(hadc->Instance->CFGR, ADC_CFGR_JAUTO) &&
mbed_official	237:f3da66175598	2548	(__HAL_ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
mbed_official	237:f3da66175598	2549	(hadc->Init.ContinuousConvMode == DISABLE) ) ) )
mbed_official	237:f3da66175598	2550	{
mbed_official	237:f3da66175598	2551	/* If End of Sequence is reached, disable interrupts */
mbed_official	237:f3da66175598	2552	if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOS))
mbed_official	237:f3da66175598	2553	{
mbed_official	237:f3da66175598	2554	/* Allowed to modify bits ADC_IT_JEOC/ADC_IT_JEOS only if bit */
mbed_official	237:f3da66175598	2555	/* JADSTART==0 (no conversion on going) */
mbed_official	237:f3da66175598	2556	if (__HAL_ADC_IS_CONVERSION_ONGOING_INJECTED(hadc) == RESET)
mbed_official	237:f3da66175598	2557	{
mbed_official	237:f3da66175598	2558	/* Disable ADC end of sequence conversion interrupt */
mbed_official	237:f3da66175598	2559	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC \| ADC_IT_JEOS);
mbed_official	237:f3da66175598	2560	}
mbed_official	237:f3da66175598	2561	else
mbed_official	237:f3da66175598	2562	{
mbed_official	237:f3da66175598	2563	/* Change ADC state to error state */
mbed_official	237:f3da66175598	2564	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	2565
mbed_official	237:f3da66175598	2566	/* Set ADC error code to ADC IP internal error */
mbed_official	237:f3da66175598	2567	hadc->ErrorCode \|= HAL_ADC_ERROR_INTERNAL;
mbed_official	237:f3da66175598	2568	}
mbed_official	237:f3da66175598	2569	}
mbed_official	237:f3da66175598	2570	}
mbed_official	237:f3da66175598	2571
mbed_official	237:f3da66175598	2572	/* Conversion complete callback */
mbed_official	237:f3da66175598	2573	/* Note: into callback, to determine if conversion has been triggered */
mbed_official	237:f3da66175598	2574	/* from JEOC or JEOS, possibility to use: */
mbed_official	237:f3da66175598	2575	/* " if( __HAL_ADC_GET_FLAG(&hadc, ADC_FLAG_JEOS)) " */
mbed_official	237:f3da66175598	2576	HAL_ADCEx_InjectedConvCpltCallback(hadc);
mbed_official	237:f3da66175598	2577
mbed_official	237:f3da66175598	2578	/* Clear injected group conversion flag */
mbed_official	237:f3da66175598	2579	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC \| ADC_FLAG_JEOS);
mbed_official	237:f3da66175598	2580	}
mbed_official	237:f3da66175598	2581
mbed_official	237:f3da66175598	2582
mbed_official	237:f3da66175598	2583	/* ========== Check Analog watchdog flags ========== */
mbed_official	237:f3da66175598	2584	if( (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD1) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD1)) \|\|
mbed_official	237:f3da66175598	2585	(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD2) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD2)) \|\|
mbed_official	237:f3da66175598	2586	(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD3) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD3)) )
mbed_official	237:f3da66175598	2587	{
mbed_official	237:f3da66175598	2588
mbed_official	237:f3da66175598	2589	if (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD1) != RESET)
mbed_official	237:f3da66175598	2590	{
mbed_official	237:f3da66175598	2591	/* Change ADC state */
mbed_official	237:f3da66175598	2592	hadc->State = HAL_ADC_STATE_AWD;
mbed_official	237:f3da66175598	2593
mbed_official	237:f3da66175598	2594	/* Clear ADC Analog watchdog flag */
mbed_official	237:f3da66175598	2595	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD1);
mbed_official	237:f3da66175598	2596	}
mbed_official	237:f3da66175598	2597	else if (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD2) != RESET)
mbed_official	237:f3da66175598	2598	{
mbed_official	237:f3da66175598	2599	/* Change ADC state */
mbed_official	237:f3da66175598	2600	hadc->State = HAL_ADC_STATE_AWD2;
mbed_official	237:f3da66175598	2601
mbed_official	237:f3da66175598	2602	/* Clear ADC Analog watchdog flag */
mbed_official	237:f3da66175598	2603	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD2);
mbed_official	237:f3da66175598	2604	}
mbed_official	237:f3da66175598	2605	else if (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD3) != RESET)
mbed_official	237:f3da66175598	2606	{
mbed_official	237:f3da66175598	2607	/* Change ADC state */
mbed_official	237:f3da66175598	2608	hadc->State = HAL_ADC_STATE_AWD3;
mbed_official	237:f3da66175598	2609
mbed_official	237:f3da66175598	2610	/* Clear ADC Analog watchdog flag */
mbed_official	237:f3da66175598	2611	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD3);
mbed_official	237:f3da66175598	2612	}
mbed_official	237:f3da66175598	2613	else
mbed_official	237:f3da66175598	2614	{
mbed_official	237:f3da66175598	2615	/* Change ADC state to error state */
mbed_official	237:f3da66175598	2616	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	2617	}
mbed_official	237:f3da66175598	2618
mbed_official	237:f3da66175598	2619	/* Level out of window callback */
mbed_official	237:f3da66175598	2620	/* Note: In case of several analog watchdog enabled, if needed to know */
mbed_official	237:f3da66175598	2621	/* which one triggered and on which ADCx, either: */
mbed_official	237:f3da66175598	2622	/* Test Analog Watchdog flags ADC_FLAG_AWD1/2/3 into function */
mbed_official	237:f3da66175598	2623	/* HAL_ADC_LevelOutOfWindowCallback(). */
mbed_official	237:f3da66175598	2624	/* For example: "if (__HAL_ADC_GET_FLAG(&hadc1, ADC_FLAG_AWD1) != RESET)" */
mbed_official	237:f3da66175598	2625	/* "if (__HAL_ADC_GET_FLAG(&hadc1, ADC_FLAG_AWD2) != RESET)" */
mbed_official	237:f3da66175598	2626	/* "if (__HAL_ADC_GET_FLAG(&hadc1, ADC_FLAG_AWD3) != RESET)" */
mbed_official	237:f3da66175598	2627	/* Test ADC state of Analog Watchdog flags HAL_ADC_STATE_AWD/2/3 into */
mbed_official	237:f3da66175598	2628	/* HAL_ADC_LevelOutOfWindowCallback(). */
mbed_official	237:f3da66175598	2629	/* For example: "if (HAL_ADC_GetState(&hadc1) == HAL_ADC_STATE_AWD) " */
mbed_official	237:f3da66175598	2630	/* "if (HAL_ADC_GetState(&hadc1) == HAL_ADC_STATE_AWD2)" */
mbed_official	237:f3da66175598	2631	/* "if (HAL_ADC_GetState(&hadc1) == HAL_ADC_STATE_AWD3)" */
mbed_official	237:f3da66175598	2632	HAL_ADC_LevelOutOfWindowCallback(hadc);
mbed_official	237:f3da66175598	2633	}
mbed_official	237:f3da66175598	2634
mbed_official	237:f3da66175598	2635
mbed_official	237:f3da66175598	2636	/* ========== Check Overrun flag ========== */
mbed_official	237:f3da66175598	2637	if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_OVR) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_OVR))
mbed_official	237:f3da66175598	2638	{
mbed_official	237:f3da66175598	2639	/* If overrun is set to overwrite previous data (default setting), */
mbed_official	237:f3da66175598	2640	/* overrun event is not considered as an error. */
mbed_official	237:f3da66175598	2641	/* (cf ref manual "Managing conversions without using the DMA and without */
mbed_official	237:f3da66175598	2642	/* overrun ") */
mbed_official	237:f3da66175598	2643	/* Exception for usage with DMA overrun event always considered as an */
mbed_official	237:f3da66175598	2644	/* error. */
mbed_official	237:f3da66175598	2645	if ((hadc->Init.Overrun == OVR_DATA_PRESERVED) \|\|
mbed_official	237:f3da66175598	2646	HAL_IS_BIT_SET(hadc->Instance->CFGR, ADC_CFGR_DMAEN) )
mbed_official	237:f3da66175598	2647	{
mbed_official	237:f3da66175598	2648	/* Change ADC state to error state */
mbed_official	237:f3da66175598	2649	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	2650
mbed_official	237:f3da66175598	2651	/* Set ADC error code to overrun */
mbed_official	237:f3da66175598	2652	hadc->ErrorCode \|= HAL_ADC_ERROR_OVR;
mbed_official	237:f3da66175598	2653
mbed_official	237:f3da66175598	2654	/* Error callback */
mbed_official	237:f3da66175598	2655	HAL_ADC_ErrorCallback(hadc);
mbed_official	237:f3da66175598	2656	}
mbed_official	237:f3da66175598	2657
mbed_official	237:f3da66175598	2658	/* Clear the Overrun flag */
mbed_official	237:f3da66175598	2659	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
mbed_official	237:f3da66175598	2660
mbed_official	237:f3da66175598	2661	}
mbed_official	237:f3da66175598	2662
mbed_official	237:f3da66175598	2663
mbed_official	237:f3da66175598	2664	/* ========== Check Injected context queue overflow flag ========== */
mbed_official	237:f3da66175598	2665	if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JQOVF) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_JQOVF))
mbed_official	237:f3da66175598	2666	{
mbed_official	237:f3da66175598	2667	/* Change ADC state to overrun state */
mbed_official	237:f3da66175598	2668	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	2669
mbed_official	237:f3da66175598	2670	/* Set ADC error code to Injected context queue overflow */
mbed_official	237:f3da66175598	2671	hadc->ErrorCode \|= HAL_ADC_ERROR_JQOVF;
mbed_official	237:f3da66175598	2672
mbed_official	237:f3da66175598	2673	/* Clear the Injected context queue overflow flag */
mbed_official	237:f3da66175598	2674	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JQOVF);
mbed_official	237:f3da66175598	2675
mbed_official	237:f3da66175598	2676	/* Error callback */
mbed_official	237:f3da66175598	2677	HAL_ADCEx_InjectedQueueOverflowCallback(hadc);
mbed_official	237:f3da66175598	2678	}
mbed_official	237:f3da66175598	2679
mbed_official	237:f3da66175598	2680	}
mbed_official	237:f3da66175598	2681	#endif /* STM32F303xC \|\| STM32F358xx \|\| STM32F302xC \|\| STM32F303x8 \|\| STM32F328xx \|\| STM32F334x8 \|\| STM32F301x8 \|\| STM32F318xx \|\| STM32F302x8 */
mbed_official	237:f3da66175598	2682
mbed_official	237:f3da66175598	2683	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	237:f3da66175598	2684	/**
mbed_official	237:f3da66175598	2685	* @brief Handles ADC interrupt request
mbed_official	237:f3da66175598	2686	* @param hadc: ADC handle
mbed_official	237:f3da66175598	2687	* @retval None
mbed_official	237:f3da66175598	2688	*/
mbed_official	237:f3da66175598	2689	void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
mbed_official	237:f3da66175598	2690	{
mbed_official	237:f3da66175598	2691	/* Check the parameters */
mbed_official	237:f3da66175598	2692	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	2693	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
mbed_official	237:f3da66175598	2694	assert_param(IS_ADC_REGULAR_NB_CONV(hadc->Init.NbrOfConversion));
mbed_official	237:f3da66175598	2695
mbed_official	237:f3da66175598	2696
mbed_official	237:f3da66175598	2697	/* ========== Check End of Conversion flag for regular group ========== */
mbed_official	237:f3da66175598	2698	if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOC))
mbed_official	237:f3da66175598	2699	{
mbed_official	237:f3da66175598	2700	/* Check if an injected conversion is ready */
mbed_official	237:f3da66175598	2701	if(hadc->State == HAL_ADC_STATE_EOC_INJ)
mbed_official	237:f3da66175598	2702	{
mbed_official	237:f3da66175598	2703	/* Change ADC state */
mbed_official	237:f3da66175598	2704	hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
mbed_official	237:f3da66175598	2705	}
mbed_official	237:f3da66175598	2706	else
mbed_official	237:f3da66175598	2707	{
mbed_official	237:f3da66175598	2708	/* Change ADC state */
mbed_official	237:f3da66175598	2709	hadc->State = HAL_ADC_STATE_EOC_REG;
mbed_official	237:f3da66175598	2710	}
mbed_official	237:f3da66175598	2711
mbed_official	237:f3da66175598	2712	/* Disable interruption if no further conversion upcoming regular */
mbed_official	237:f3da66175598	2713	/* external trigger or by continuous mode */
mbed_official	237:f3da66175598	2714	if(__HAL_ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
mbed_official	237:f3da66175598	2715	(hadc->Init.ContinuousConvMode == DISABLE) )
mbed_official	237:f3da66175598	2716	{
mbed_official	237:f3da66175598	2717	/* Disable ADC end of single conversion interrupt */
mbed_official	237:f3da66175598	2718	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
mbed_official	237:f3da66175598	2719	}
mbed_official	237:f3da66175598	2720
mbed_official	237:f3da66175598	2721	/* Conversion complete callback */
mbed_official	237:f3da66175598	2722	HAL_ADC_ConvCpltCallback(hadc);
mbed_official	237:f3da66175598	2723
mbed_official	237:f3da66175598	2724	/* Clear regular group conversion flag */
mbed_official	237:f3da66175598	2725	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_STRT \| ADC_FLAG_EOC);
mbed_official	237:f3da66175598	2726	}
mbed_official	237:f3da66175598	2727
mbed_official	237:f3da66175598	2728
mbed_official	237:f3da66175598	2729	/* ========== Check End of Conversion flag for injected group ========== */
mbed_official	237:f3da66175598	2730	if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOC) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_JEOC))
mbed_official	237:f3da66175598	2731	{
mbed_official	237:f3da66175598	2732	/* Check if a regular conversion is ready */
mbed_official	237:f3da66175598	2733	if(hadc->State == HAL_ADC_STATE_EOC_REG)
mbed_official	237:f3da66175598	2734	{
mbed_official	237:f3da66175598	2735	/* Change ADC state */
mbed_official	237:f3da66175598	2736	hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
mbed_official	237:f3da66175598	2737	}
mbed_official	237:f3da66175598	2738	else
mbed_official	237:f3da66175598	2739	{
mbed_official	237:f3da66175598	2740	/* Change ADC state */
mbed_official	237:f3da66175598	2741	hadc->State = HAL_ADC_STATE_EOC_INJ;
mbed_official	237:f3da66175598	2742	}
mbed_official	237:f3da66175598	2743
mbed_official	237:f3da66175598	2744	/* Disable interruption if no further conversion upcoming injected */
mbed_official	237:f3da66175598	2745	/* external trigger or by automatic injected conversion with regular */
mbed_official	237:f3da66175598	2746	/* group having no further conversion upcoming (same conditions as */
mbed_official	237:f3da66175598	2747	/* regular group interruption disabling above). */
mbed_official	237:f3da66175598	2748	if(__HAL_ADC_IS_SOFTWARE_START_INJECTED(hadc) \|\|
mbed_official	237:f3da66175598	2749	(HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) &&
mbed_official	237:f3da66175598	2750	(__HAL_ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
mbed_official	237:f3da66175598	2751	(hadc->Init.ContinuousConvMode == DISABLE) ) ) )
mbed_official	237:f3da66175598	2752	{
mbed_official	237:f3da66175598	2753	/* Disable ADC end of single conversion interrupt */
mbed_official	237:f3da66175598	2754	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
mbed_official	237:f3da66175598	2755	}
mbed_official	237:f3da66175598	2756
mbed_official	237:f3da66175598	2757	/* Conversion complete callback */
mbed_official	237:f3da66175598	2758	HAL_ADCEx_InjectedConvCpltCallback(hadc);
mbed_official	237:f3da66175598	2759
mbed_official	237:f3da66175598	2760	/* Clear injected group conversion flag (and regular conversion flag raised simultaneously) */
mbed_official	237:f3da66175598	2761	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JSTRT \| ADC_FLAG_JEOC \| ADC_FLAG_EOC));
mbed_official	237:f3da66175598	2762	}
mbed_official	237:f3da66175598	2763
mbed_official	237:f3da66175598	2764
mbed_official	237:f3da66175598	2765	/* ========== Check Analog watchdog flags ========== */
mbed_official	237:f3da66175598	2766	if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD))
mbed_official	237:f3da66175598	2767	{
mbed_official	237:f3da66175598	2768	/* Change ADC state */
mbed_official	237:f3da66175598	2769	hadc->State = HAL_ADC_STATE_AWD;
mbed_official	237:f3da66175598	2770
mbed_official	237:f3da66175598	2771	/* Clear the ADCx's Analog watchdog flag */
mbed_official	237:f3da66175598	2772	__HAL_ADC_CLEAR_FLAG(hadc,ADC_FLAG_AWD);
mbed_official	237:f3da66175598	2773
mbed_official	237:f3da66175598	2774	/* Level out of window callback */
mbed_official	237:f3da66175598	2775	HAL_ADC_LevelOutOfWindowCallback(hadc);
mbed_official	237:f3da66175598	2776	}
mbed_official	237:f3da66175598	2777
mbed_official	237:f3da66175598	2778	}
mbed_official	237:f3da66175598	2779	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	237:f3da66175598	2780
mbed_official	237:f3da66175598	2781
mbed_official	237:f3da66175598	2782	#if defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| defined(STM32F302xC) \|\| defined(STM32F303x8) \|\| defined(STM32F328xx) \|\| defined(STM32F334x8) \|\| defined(STM32F301x8) \|\| defined(STM32F318xx) \|\| defined(STM32F302x8)
mbed_official	237:f3da66175598	2783	/**
mbed_official	237:f3da66175598	2784	* @brief Perform an ADC automatic self-calibration
mbed_official	237:f3da66175598	2785	* Calibration prerequisite: ADC must be disabled (execute this
mbed_official	237:f3da66175598	2786	* function before HAL_ADC_Start() or after HAL_ADC_Stop() ).
mbed_official	237:f3da66175598	2787	* @param hadc: ADC handle
mbed_official	237:f3da66175598	2788	* @param SingleDiff: Selection of single-ended or differential input
mbed_official	237:f3da66175598	2789	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	2790	* @arg ADC_SINGLE_ENDED: Channel in mode input single ended
mbed_official	237:f3da66175598	2791	* @arg ADC_DIFFERENTIAL_ENDED: Channel in mode input differential ended
mbed_official	237:f3da66175598	2792	* @retval HAL status
mbed_official	237:f3da66175598	2793	*/
mbed_official	237:f3da66175598	2794	HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc, uint32_t SingleDiff)
mbed_official	237:f3da66175598	2795	{
mbed_official	237:f3da66175598	2796	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	237:f3da66175598	2797	uint32_t tickstart;
mbed_official	237:f3da66175598	2798
mbed_official	237:f3da66175598	2799	/* Check the parameters */
mbed_official	237:f3da66175598	2800	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	2801	assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
mbed_official	237:f3da66175598	2802
mbed_official	237:f3da66175598	2803	/* Process locked */
mbed_official	237:f3da66175598	2804	__HAL_LOCK(hadc);
mbed_official	237:f3da66175598	2805
mbed_official	237:f3da66175598	2806	/* Calibration prerequisite: ADC must be disabled. */
mbed_official	237:f3da66175598	2807
mbed_official	237:f3da66175598	2808	/* Disable the ADC (if not already disabled) */
mbed_official	237:f3da66175598	2809	tmpHALStatus = ADC_Disable(hadc);
mbed_official	237:f3da66175598	2810
mbed_official	237:f3da66175598	2811	/* Check if ADC is effectively disabled */
mbed_official	237:f3da66175598	2812	if (tmpHALStatus != HAL_ERROR)
mbed_official	237:f3da66175598	2813	{
mbed_official	237:f3da66175598	2814	/* Change ADC state */
mbed_official	237:f3da66175598	2815	hadc->State = HAL_ADC_STATE_READY;
mbed_official	237:f3da66175598	2816
mbed_official	237:f3da66175598	2817	/* Select calibration mode single ended or differential ended */
mbed_official	237:f3da66175598	2818	hadc->Instance->CR &= (~ADC_CR_ADCALDIF);
mbed_official	237:f3da66175598	2819	if (SingleDiff == ADC_DIFFERENTIAL_ENDED)
mbed_official	237:f3da66175598	2820	{
mbed_official	237:f3da66175598	2821	hadc->Instance->CR \|= ADC_CR_ADCALDIF;
mbed_official	237:f3da66175598	2822	}
mbed_official	237:f3da66175598	2823
mbed_official	237:f3da66175598	2824	/* Start ADC calibration */
mbed_official	237:f3da66175598	2825	hadc->Instance->CR \|= ADC_CR_ADCAL;
mbed_official	237:f3da66175598	2826
mbed_official	237:f3da66175598	2827	tickstart = HAL_GetTick();
mbed_official	237:f3da66175598	2828
mbed_official	237:f3da66175598	2829	/* Wait for calibration completion */
mbed_official	237:f3da66175598	2830	while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADCAL))
mbed_official	237:f3da66175598	2831	{
mbed_official	237:f3da66175598	2832	if((HAL_GetTick()-tickstart) > ADC_CALIBRATION_TIMEOUT)
mbed_official	237:f3da66175598	2833	{
mbed_official	237:f3da66175598	2834	/* Update ADC state machine to error */
mbed_official	237:f3da66175598	2835	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	2836
mbed_official	237:f3da66175598	2837	/* Process unlocked */
mbed_official	237:f3da66175598	2838	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	2839
mbed_official	237:f3da66175598	2840	return HAL_ERROR;
mbed_official	237:f3da66175598	2841	}
mbed_official	237:f3da66175598	2842	}
mbed_official	237:f3da66175598	2843	}
mbed_official	237:f3da66175598	2844	else
mbed_official	237:f3da66175598	2845	{
mbed_official	237:f3da66175598	2846	/* Update ADC state machine to error */
mbed_official	237:f3da66175598	2847	tmpHALStatus = HAL_ERROR;
mbed_official	237:f3da66175598	2848	}
mbed_official	237:f3da66175598	2849
mbed_official	237:f3da66175598	2850	/* Process unlocked */
mbed_official	237:f3da66175598	2851	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	2852
mbed_official	237:f3da66175598	2853	/* Return function status */
mbed_official	237:f3da66175598	2854	return tmpHALStatus;
mbed_official	237:f3da66175598	2855	}
mbed_official	237:f3da66175598	2856	#endif /* STM32F303xC \|\| STM32F358xx \|\| STM32F302xC \|\| STM32F303x8 \|\| STM32F328xx \|\| STM32F334x8 \|\| STM32F301x8 \|\| STM32F318xx \|\| STM32F302x8 */
mbed_official	237:f3da66175598	2857
mbed_official	237:f3da66175598	2858	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	237:f3da66175598	2859	/**
mbed_official	237:f3da66175598	2860	* @brief Perform an ADC automatic self-calibration
mbed_official	237:f3da66175598	2861	* Calibration prerequisite: ADC must be disabled (execute this
mbed_official	237:f3da66175598	2862	* function before HAL_ADC_Start() or after HAL_ADC_Stop() ).
mbed_official	237:f3da66175598	2863	* During calibration process, ADC is enabled. ADC is let enabled at
mbed_official	237:f3da66175598	2864	* the completion of this function.
mbed_official	237:f3da66175598	2865	* @param hadc: ADC handle
mbed_official	237:f3da66175598	2866	* @retval HAL status
mbed_official	237:f3da66175598	2867	*/
mbed_official	237:f3da66175598	2868	HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc)
mbed_official	237:f3da66175598	2869	{
mbed_official	237:f3da66175598	2870	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	237:f3da66175598	2871	uint32_t WaitLoopIndex = 0;
mbed_official	237:f3da66175598	2872	uint32_t tickstart;
mbed_official	237:f3da66175598	2873
mbed_official	237:f3da66175598	2874	/* Check the parameters */
mbed_official	237:f3da66175598	2875	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	2876
mbed_official	237:f3da66175598	2877	/* Process locked */
mbed_official	237:f3da66175598	2878	__HAL_LOCK(hadc);
mbed_official	237:f3da66175598	2879
mbed_official	237:f3da66175598	2880	/* 1. Calibration prerequisite: */
mbed_official	237:f3da66175598	2881	/* - ADC must be disabled for at least two ADC clock cycles in disable */
mbed_official	237:f3da66175598	2882	/* mode before ADC enable */
mbed_official	237:f3da66175598	2883	/* Stop potential conversion on going, on regular and injected groups */
mbed_official	237:f3da66175598	2884	/* Disable ADC peripheral */
mbed_official	237:f3da66175598	2885	tmpHALStatus = ADC_ConversionStop_Disable(hadc);
mbed_official	237:f3da66175598	2886
mbed_official	237:f3da66175598	2887	/* Check if ADC is effectively disabled */
mbed_official	237:f3da66175598	2888	if (tmpHALStatus != HAL_ERROR)
mbed_official	237:f3da66175598	2889	{
mbed_official	237:f3da66175598	2890
mbed_official	237:f3da66175598	2891	/* Wait two ADC clock cycles */
mbed_official	237:f3da66175598	2892	while(WaitLoopIndex < ADC_CYCLE_WORST_CASE_CPU_CYCLES *2)
mbed_official	237:f3da66175598	2893	{
mbed_official	237:f3da66175598	2894	WaitLoopIndex++;
mbed_official	237:f3da66175598	2895	}
mbed_official	237:f3da66175598	2896
mbed_official	237:f3da66175598	2897	/* 2. Enable the ADC peripheral */
mbed_official	237:f3da66175598	2898	ADC_Enable(hadc);
mbed_official	237:f3da66175598	2899
mbed_official	237:f3da66175598	2900
mbed_official	237:f3da66175598	2901	/* 3. Resets ADC calibration registers */
mbed_official	237:f3da66175598	2902	hadc->Instance->CR2 \|= ADC_CR2_RSTCAL;
mbed_official	237:f3da66175598	2903
mbed_official	237:f3da66175598	2904	tickstart = HAL_GetTick();
mbed_official	237:f3da66175598	2905
mbed_official	237:f3da66175598	2906	/* Wait for calibration reset completion */
mbed_official	237:f3da66175598	2907	while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_RSTCAL))
mbed_official	237:f3da66175598	2908	{
mbed_official	237:f3da66175598	2909	if((HAL_GetTick()-tickstart) > ADC_CALIBRATION_TIMEOUT)
mbed_official	237:f3da66175598	2910	{
mbed_official	237:f3da66175598	2911	/* Update ADC state machine to error */
mbed_official	237:f3da66175598	2912	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	2913
mbed_official	237:f3da66175598	2914	/* Process unlocked */
mbed_official	237:f3da66175598	2915	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	2916
mbed_official	237:f3da66175598	2917	return HAL_ERROR;
mbed_official	237:f3da66175598	2918	}
mbed_official	237:f3da66175598	2919	}
mbed_official	237:f3da66175598	2920
mbed_official	237:f3da66175598	2921
mbed_official	237:f3da66175598	2922	/* 4. Start ADC calibration */
mbed_official	237:f3da66175598	2923	hadc->Instance->CR2 \|= ADC_CR2_CAL;
mbed_official	237:f3da66175598	2924
mbed_official	237:f3da66175598	2925	tickstart = HAL_GetTick();
mbed_official	237:f3da66175598	2926
mbed_official	237:f3da66175598	2927	/* Wait for calibration completion */
mbed_official	237:f3da66175598	2928	while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_CAL))
mbed_official	237:f3da66175598	2929	{
mbed_official	237:f3da66175598	2930	if((HAL_GetTick()-tickstart) > ADC_CALIBRATION_TIMEOUT)
mbed_official	237:f3da66175598	2931	{
mbed_official	237:f3da66175598	2932	/* Update ADC state machine to error */
mbed_official	237:f3da66175598	2933	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	2934
mbed_official	237:f3da66175598	2935	/* Process unlocked */
mbed_official	237:f3da66175598	2936	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	2937
mbed_official	237:f3da66175598	2938	return HAL_ERROR;
mbed_official	237:f3da66175598	2939	}
mbed_official	237:f3da66175598	2940	}
mbed_official	237:f3da66175598	2941
mbed_official	237:f3da66175598	2942	}
mbed_official	237:f3da66175598	2943
mbed_official	237:f3da66175598	2944	/* Process unlocked */
mbed_official	237:f3da66175598	2945	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	2946
mbed_official	237:f3da66175598	2947	/* Return function status */
mbed_official	237:f3da66175598	2948	return tmpHALStatus;
mbed_official	237:f3da66175598	2949	}
mbed_official	237:f3da66175598	2950
mbed_official	237:f3da66175598	2951	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	237:f3da66175598	2952
mbed_official	237:f3da66175598	2953	#if defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| defined(STM32F302xC) \|\| defined(STM32F303x8) \|\| defined(STM32F328xx) \|\| defined(STM32F334x8) \|\| defined(STM32F301x8) \|\| defined(STM32F318xx) \|\| defined(STM32F302x8)
mbed_official	237:f3da66175598	2954	/**
mbed_official	237:f3da66175598	2955	* @brief Get the calibration factor from automatic conversion result
mbed_official	237:f3da66175598	2956	* @param hadc: ADC handle
mbed_official	237:f3da66175598	2957	* @param SingleDiff: Selection of single-ended or differential input
mbed_official	237:f3da66175598	2958	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	2959	* @arg ADC_SINGLE_ENDED: Channel in mode input single ended
mbed_official	237:f3da66175598	2960	* @arg ADC_DIFFERENTIAL_ENDED: Channel in mode input differential ended
mbed_official	237:f3da66175598	2961	* @retval Converted value
mbed_official	237:f3da66175598	2962	*/
mbed_official	237:f3da66175598	2963	uint32_t HAL_ADCEx_Calibration_GetValue(ADC_HandleTypeDef* hadc, uint32_t SingleDiff)
mbed_official	237:f3da66175598	2964	{
mbed_official	237:f3da66175598	2965	/* Check the parameters */
mbed_official	237:f3da66175598	2966	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	2967	assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
mbed_official	237:f3da66175598	2968
mbed_official	237:f3da66175598	2969	/* Return the selected ADC calibration value */
mbed_official	237:f3da66175598	2970	if (SingleDiff == ADC_DIFFERENTIAL_ENDED)
mbed_official	237:f3da66175598	2971	{
mbed_official	237:f3da66175598	2972	return __HAL_ADC_CALFACT_DIFF_GET(hadc->Instance->CALFACT);
mbed_official	237:f3da66175598	2973	}
mbed_official	237:f3da66175598	2974	else
mbed_official	237:f3da66175598	2975	{
mbed_official	237:f3da66175598	2976	return ((hadc->Instance->CALFACT) & 0x0000007F);
mbed_official	237:f3da66175598	2977	}
mbed_official	237:f3da66175598	2978	}
mbed_official	237:f3da66175598	2979	#endif /* STM32F303xC \|\| STM32F358xx \|\| STM32F302xC \|\| STM32F303x8 \|\| STM32F328xx \|\| STM32F334x8 \|\| STM32F301x8 \|\| STM32F318xx \|\| STM32F302x8 */
mbed_official	237:f3da66175598	2980
mbed_official	237:f3da66175598	2981	#if defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| defined(STM32F302xC) \|\| defined(STM32F303x8) \|\| defined(STM32F328xx) \|\| defined(STM32F334x8) \|\| defined(STM32F301x8) \|\| defined(STM32F318xx) \|\| defined(STM32F302x8)
mbed_official	237:f3da66175598	2982	/**
mbed_official	237:f3da66175598	2983	* @brief Set the calibration factor to overwrite automatic conversion result. ADC must be enabled and no conversion on going.
mbed_official	237:f3da66175598	2984	* @param hadc: ADC handle
mbed_official	237:f3da66175598	2985	* @param SingleDiff: Selection of single-ended or differential input
mbed_official	237:f3da66175598	2986	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	2987	* @arg ADC_SINGLE_ENDED: Channel in mode input single ended
mbed_official	237:f3da66175598	2988	* @arg ADC_DIFFERENTIAL_ENDED: Channel in mode input differential ended
mbed_official	237:f3da66175598	2989	* @param CalibrationFactor: Calibration factor (coded on 7 bits maximum)
mbed_official	237:f3da66175598	2990	* @retval HAL state
mbed_official	237:f3da66175598	2991	*/
mbed_official	237:f3da66175598	2992	HAL_StatusTypeDef HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef* hadc, uint32_t SingleDiff, uint32_t CalibrationFactor)
mbed_official	237:f3da66175598	2993	{
mbed_official	237:f3da66175598	2994	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	237:f3da66175598	2995
mbed_official	237:f3da66175598	2996	/* Check the parameters */
mbed_official	237:f3da66175598	2997	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	2998	assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
mbed_official	237:f3da66175598	2999	assert_param(IS_ADC_CALFACT(CalibrationFactor));
mbed_official	237:f3da66175598	3000
mbed_official	237:f3da66175598	3001	/* Process locked */
mbed_official	237:f3da66175598	3002	__HAL_LOCK(hadc);
mbed_official	237:f3da66175598	3003
mbed_official	237:f3da66175598	3004	/* Verification of hardware constraints before modifying the calibration */
mbed_official	237:f3da66175598	3005	/* factors register: ADC must be enabled, no conversion on going. */
mbed_official	237:f3da66175598	3006	if ( (__HAL_ADC_IS_ENABLED(hadc) != RESET) &&
mbed_official	237:f3da66175598	3007	(__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET) )
mbed_official	237:f3da66175598	3008	{
mbed_official	237:f3da66175598	3009	/* Set the selected ADC calibration value */
mbed_official	237:f3da66175598	3010	if (SingleDiff == ADC_DIFFERENTIAL_ENDED)
mbed_official	237:f3da66175598	3011	{
mbed_official	237:f3da66175598	3012	hadc->Instance->CALFACT &= ~ADC_CALFACT_CALFACT_D;
mbed_official	237:f3da66175598	3013	hadc->Instance->CALFACT \|= __HAL_ADC_CALFACT_DIFF_SET(CalibrationFactor);
mbed_official	237:f3da66175598	3014	}
mbed_official	237:f3da66175598	3015	else
mbed_official	237:f3da66175598	3016	{
mbed_official	237:f3da66175598	3017	hadc->Instance->CALFACT &= ~ADC_CALFACT_CALFACT_S;
mbed_official	237:f3da66175598	3018	hadc->Instance->CALFACT \|= CalibrationFactor;
mbed_official	237:f3da66175598	3019	}
mbed_official	237:f3da66175598	3020	}
mbed_official	237:f3da66175598	3021	else
mbed_official	237:f3da66175598	3022	{
mbed_official	237:f3da66175598	3023	/* Update ADC state machine to error */
mbed_official	237:f3da66175598	3024	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	3025
mbed_official	237:f3da66175598	3026	/* Update ADC state machine to error */
mbed_official	237:f3da66175598	3027	tmpHALStatus = HAL_ERROR;
mbed_official	237:f3da66175598	3028	}
mbed_official	237:f3da66175598	3029
mbed_official	237:f3da66175598	3030	/* Process unlocked */
mbed_official	237:f3da66175598	3031	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	3032
mbed_official	237:f3da66175598	3033	/* Return function status */
mbed_official	237:f3da66175598	3034	return tmpHALStatus;
mbed_official	237:f3da66175598	3035	}
mbed_official	237:f3da66175598	3036	#endif /* STM32F303xC \|\| STM32F358xx \|\| STM32F302xC \|\| STM32F303x8 \|\| STM32F328xx \|\| STM32F334x8 \|\| STM32F301x8 \|\| STM32F318xx \|\| STM32F302x8 */
mbed_official	237:f3da66175598	3037
mbed_official	237:f3da66175598	3038	#if defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| defined(STM32F302xC) \|\| defined(STM32F303x8) \|\| defined(STM32F328xx) \|\| defined(STM32F334x8) \|\| defined(STM32F301x8) \|\| defined(STM32F318xx) \|\| defined(STM32F302x8)
mbed_official	237:f3da66175598	3039	/**
mbed_official	237:f3da66175598	3040	* @brief Enables ADC, starts conversion of injected group.
mbed_official	237:f3da66175598	3041	* Interruptions enabled in this function: None.
mbed_official	237:f3da66175598	3042	* @note: Case of multimode enabled (for devices with several ADCs): This
mbed_official	237:f3da66175598	3043	* function must be called for ADC slave first, then ADC master.
mbed_official	237:f3da66175598	3044	* For ADC slave, ADC is enabled only (conversion is not started).
mbed_official	237:f3da66175598	3045	* For ADC master, ADC is enabled and multimode conversion is started.
mbed_official	237:f3da66175598	3046	* @param hadc: ADC handle
mbed_official	237:f3da66175598	3047	* @retval HAL status
mbed_official	237:f3da66175598	3048	*/
mbed_official	237:f3da66175598	3049	HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc)
mbed_official	237:f3da66175598	3050	{
mbed_official	237:f3da66175598	3051	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	237:f3da66175598	3052
mbed_official	237:f3da66175598	3053	/* Check the parameters */
mbed_official	237:f3da66175598	3054	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	3055
mbed_official	237:f3da66175598	3056	/* Process locked */
mbed_official	237:f3da66175598	3057	__HAL_LOCK(hadc);
mbed_official	237:f3da66175598	3058
mbed_official	237:f3da66175598	3059	/* Enable the ADC peripheral */
mbed_official	237:f3da66175598	3060	tmpHALStatus = ADC_Enable(hadc);
mbed_official	237:f3da66175598	3061
mbed_official	237:f3da66175598	3062	/* Start conversion if ADC is effectively enabled */
mbed_official	237:f3da66175598	3063	if (tmpHALStatus != HAL_ERROR)
mbed_official	237:f3da66175598	3064	{
mbed_official	237:f3da66175598	3065	/* Check if a regular conversion is ongoing */
mbed_official	237:f3da66175598	3066	if(hadc->State == HAL_ADC_STATE_BUSY_REG)
mbed_official	237:f3da66175598	3067	{
mbed_official	237:f3da66175598	3068	/* Change ADC state */
mbed_official	237:f3da66175598	3069	hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
mbed_official	237:f3da66175598	3070	}
mbed_official	237:f3da66175598	3071	else
mbed_official	237:f3da66175598	3072	{
mbed_official	237:f3da66175598	3073	/* Change ADC state */
mbed_official	237:f3da66175598	3074	hadc->State = HAL_ADC_STATE_BUSY_INJ;
mbed_official	237:f3da66175598	3075	}
mbed_official	237:f3da66175598	3076
mbed_official	237:f3da66175598	3077	/* Set ADC error code to none */
mbed_official	237:f3da66175598	3078	__HAL_ADC_CLEAR_ERRORCODE(hadc);
mbed_official	237:f3da66175598	3079
mbed_official	237:f3da66175598	3080	/* Clear injected group conversion flag */
mbed_official	237:f3da66175598	3081	/* (To ensure of no unknown state from potential previous ADC operations) */
mbed_official	237:f3da66175598	3082	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC \| ADC_FLAG_JEOS));
mbed_official	237:f3da66175598	3083
mbed_official	237:f3da66175598	3084	/* Enable conversion of injected group, if automatic injected conversion */
mbed_official	237:f3da66175598	3085	/* is disabled. */
mbed_official	237:f3da66175598	3086	/* If software start has been selected, conversion starts immediately. */
mbed_official	237:f3da66175598	3087	/* If external trigger has been selected, conversion will start at next */
mbed_official	237:f3da66175598	3088	/* trigger event. */
mbed_official	237:f3da66175598	3089	/* Case of multimode enabled (for devices with several ADCs): if ADC is */
mbed_official	237:f3da66175598	3090	/* slave, ADC is enabled only (conversion is not started). If ADC is */
mbed_official	237:f3da66175598	3091	/* master, ADC is enabled and conversion is started. */
mbed_official	237:f3da66175598	3092	if (
mbed_official	237:f3da66175598	3093	HAL_IS_BIT_CLR(hadc->Instance->CFGR, ADC_CFGR_JAUTO) &&
mbed_official	237:f3da66175598	3094	__HAL_ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc) )
mbed_official	237:f3da66175598	3095	{
mbed_official	237:f3da66175598	3096	hadc->Instance->CR \|= ADC_CR_JADSTART;
mbed_official	237:f3da66175598	3097	}
mbed_official	237:f3da66175598	3098	}
mbed_official	237:f3da66175598	3099
mbed_official	237:f3da66175598	3100	/* Process unlocked */
mbed_official	237:f3da66175598	3101	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	3102
mbed_official	237:f3da66175598	3103	/* Return function status */
mbed_official	237:f3da66175598	3104	return tmpHALStatus;
mbed_official	237:f3da66175598	3105	}
mbed_official	237:f3da66175598	3106	#endif /* STM32F303xC \|\| STM32F358xx \|\| STM32F302xC \|\| STM32F303x8 \|\| STM32F328xx \|\| STM32F334x8 \|\| STM32F301x8 \|\| STM32F318xx \|\| STM32F302x8 */
mbed_official	237:f3da66175598	3107
mbed_official	237:f3da66175598	3108	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	237:f3da66175598	3109	/**
mbed_official	237:f3da66175598	3110	* @brief Enables ADC, starts conversion of injected group.
mbed_official	237:f3da66175598	3111	* Interruptions enabled in this function: None.
mbed_official	237:f3da66175598	3112	* @param hadc: ADC handle
mbed_official	237:f3da66175598	3113	* @retval HAL status
mbed_official	237:f3da66175598	3114	*/
mbed_official	237:f3da66175598	3115	HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc)
mbed_official	237:f3da66175598	3116	{
mbed_official	237:f3da66175598	3117	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	237:f3da66175598	3118
mbed_official	237:f3da66175598	3119	/* Check the parameters */
mbed_official	237:f3da66175598	3120	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	3121
mbed_official	237:f3da66175598	3122	/* Process locked */
mbed_official	237:f3da66175598	3123	__HAL_LOCK(hadc);
mbed_official	237:f3da66175598	3124
mbed_official	237:f3da66175598	3125	/* Enable the ADC peripheral */
mbed_official	237:f3da66175598	3126	tmpHALStatus = ADC_Enable(hadc);
mbed_official	237:f3da66175598	3127
mbed_official	237:f3da66175598	3128	/* Start conversion if ADC is effectively enabled */
mbed_official	237:f3da66175598	3129	if (tmpHALStatus != HAL_ERROR)
mbed_official	237:f3da66175598	3130	{
mbed_official	237:f3da66175598	3131	/* Check if a regular conversion is ongoing */
mbed_official	237:f3da66175598	3132	if(hadc->State == HAL_ADC_STATE_BUSY_REG)
mbed_official	237:f3da66175598	3133	{
mbed_official	237:f3da66175598	3134	/* Change ADC state */
mbed_official	237:f3da66175598	3135	hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
mbed_official	237:f3da66175598	3136	}
mbed_official	237:f3da66175598	3137	else
mbed_official	237:f3da66175598	3138	{
mbed_official	237:f3da66175598	3139	/* Change ADC state */
mbed_official	237:f3da66175598	3140	hadc->State = HAL_ADC_STATE_BUSY_INJ;
mbed_official	237:f3da66175598	3141	}
mbed_official	237:f3da66175598	3142
mbed_official	237:f3da66175598	3143	/* Set ADC error code to none */
mbed_official	237:f3da66175598	3144	__HAL_ADC_CLEAR_ERRORCODE(hadc);
mbed_official	237:f3da66175598	3145
mbed_official	237:f3da66175598	3146	/* Clear injected group conversion flag */
mbed_official	237:f3da66175598	3147	/* (To ensure of no unknown state from potential previous ADC operations) */
mbed_official	237:f3da66175598	3148	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
mbed_official	237:f3da66175598	3149
mbed_official	237:f3da66175598	3150	/* Start conversion of injected group if software start has been selected */
mbed_official	237:f3da66175598	3151	/* and if automatic injected conversion is disabled. */
mbed_official	237:f3da66175598	3152	/* If external trigger has been selected, conversion will start at next */
mbed_official	237:f3da66175598	3153	/* trigger event. */
mbed_official	237:f3da66175598	3154	/* If automatic injected conversion is enabled, conversion will start */
mbed_official	237:f3da66175598	3155	/* after next regular group conversion. */
mbed_official	237:f3da66175598	3156	if (__HAL_ADC_IS_SOFTWARE_START_INJECTED(hadc) &&
mbed_official	237:f3da66175598	3157	HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) )
mbed_official	237:f3da66175598	3158	{
mbed_official	237:f3da66175598	3159	/* Enable ADC software conversion for injected channels */
mbed_official	237:f3da66175598	3160	hadc->Instance->CR2 \|= ADC_CR2_JSWSTART;
mbed_official	237:f3da66175598	3161	}
mbed_official	237:f3da66175598	3162	}
mbed_official	237:f3da66175598	3163
mbed_official	237:f3da66175598	3164	/* Process unlocked */
mbed_official	237:f3da66175598	3165	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	3166
mbed_official	237:f3da66175598	3167	/* Return function status */
mbed_official	237:f3da66175598	3168	return tmpHALStatus;
mbed_official	237:f3da66175598	3169	}
mbed_official	237:f3da66175598	3170	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	237:f3da66175598	3171
mbed_official	237:f3da66175598	3172	#if defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| defined(STM32F302xC) \|\| defined(STM32F303x8) \|\| defined(STM32F328xx) \|\| defined(STM32F334x8) \|\| defined(STM32F301x8) \|\| defined(STM32F318xx) \|\| defined(STM32F302x8)
mbed_official	237:f3da66175598	3173	/**
mbed_official	237:f3da66175598	3174	* @brief Stop conversion of injected channels. Disable ADC peripheral if
mbed_official	237:f3da66175598	3175	* no regular conversion is on going.
mbed_official	237:f3da66175598	3176	* @note If ADC must be disabled with this function and if regular conversion
mbed_official	237:f3da66175598	3177	* is on going, function HAL_ADC_Stop must be used preliminarily.
mbed_official	237:f3da66175598	3178	* @note In case of auto-injection mode, HAL_ADC_Stop must be used.
mbed_official	237:f3da66175598	3179	* @note: Case of multimode enabled (for devices with several ADCs): This
mbed_official	237:f3da66175598	3180	* function must be called for ADC master first, then ADC slave.
mbed_official	237:f3da66175598	3181	* For ADC master, conversion is stopped and ADC is disabled.
mbed_official	237:f3da66175598	3182	* For ADC slave, ADC is disabled only (conversion stop of ADC master
mbed_official	237:f3da66175598	3183	* has already stopped conversion of ADC slave).
mbed_official	237:f3da66175598	3184	* @param hadc: ADC handle
mbed_official	237:f3da66175598	3185	* @retval None
mbed_official	237:f3da66175598	3186	*/
mbed_official	237:f3da66175598	3187	HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc)
mbed_official	237:f3da66175598	3188	{
mbed_official	237:f3da66175598	3189	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	237:f3da66175598	3190
mbed_official	237:f3da66175598	3191	/* Check the parameters */
mbed_official	237:f3da66175598	3192	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	3193
mbed_official	237:f3da66175598	3194	/* Process locked */
mbed_official	237:f3da66175598	3195	__HAL_LOCK(hadc);
mbed_official	237:f3da66175598	3196
mbed_official	237:f3da66175598	3197	/* 1. Stop potential conversion on going on injected group only. */
mbed_official	237:f3da66175598	3198	tmpHALStatus = ADC_ConversionStop(hadc, INJECTED_GROUP);
mbed_official	237:f3da66175598	3199
mbed_official	237:f3da66175598	3200	/* Disable ADC peripheral if injected conversions are effectively stopped */
mbed_official	237:f3da66175598	3201	/* and if no conversion on the other group (regular group) is intended to */
mbed_official	237:f3da66175598	3202	/* continue. */
mbed_official	237:f3da66175598	3203	if (tmpHALStatus != HAL_ERROR)
mbed_official	237:f3da66175598	3204	{
mbed_official	237:f3da66175598	3205	if((__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) &&
mbed_official	237:f3da66175598	3206	(hadc->State != HAL_ADC_STATE_BUSY_REG) &&
mbed_official	237:f3da66175598	3207	(hadc->State != HAL_ADC_STATE_BUSY_INJ_REG) )
mbed_official	237:f3da66175598	3208	{
mbed_official	237:f3da66175598	3209	/* 2. Disable the ADC peripheral */
mbed_official	237:f3da66175598	3210	tmpHALStatus = ADC_Disable(hadc);
mbed_official	237:f3da66175598	3211
mbed_official	237:f3da66175598	3212	/* Check if ADC is effectively disabled */
mbed_official	237:f3da66175598	3213	if (tmpHALStatus != HAL_ERROR)
mbed_official	237:f3da66175598	3214	{
mbed_official	237:f3da66175598	3215	/* Change ADC state */
mbed_official	237:f3da66175598	3216	hadc->State = HAL_ADC_STATE_READY;
mbed_official	237:f3da66175598	3217	}
mbed_official	237:f3da66175598	3218	}
mbed_official	237:f3da66175598	3219	/* Conversion on injected group is stopped, but ADC not disabled since */
mbed_official	237:f3da66175598	3220	/* conversion on regular group is still running. */
mbed_official	237:f3da66175598	3221	else
mbed_official	237:f3da66175598	3222	{
mbed_official	237:f3da66175598	3223	hadc->State = HAL_ADC_STATE_BUSY_REG;
mbed_official	237:f3da66175598	3224	}
mbed_official	237:f3da66175598	3225	}
mbed_official	237:f3da66175598	3226
mbed_official	237:f3da66175598	3227	/* Process unlocked */
mbed_official	237:f3da66175598	3228	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	3229
mbed_official	237:f3da66175598	3230	/* Return function status */
mbed_official	237:f3da66175598	3231	return tmpHALStatus;
mbed_official	237:f3da66175598	3232	}
mbed_official	237:f3da66175598	3233	#endif /* STM32F303xC \|\| STM32F358xx \|\| STM32F302xC \|\| STM32F303x8 \|\| STM32F328xx \|\| STM32F334x8 \|\| STM32F301x8 \|\| STM32F318xx \|\| STM32F302x8 */
mbed_official	237:f3da66175598	3234
mbed_official	237:f3da66175598	3235	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	237:f3da66175598	3236	/**
mbed_official	237:f3da66175598	3237	* @brief Stop conversion of injected channels. Disable ADC peripheral if
mbed_official	237:f3da66175598	3238	* no regular conversion is on going.
mbed_official	237:f3da66175598	3239	* @note If ADC must be disabled with this function and if regular conversion
mbed_official	237:f3da66175598	3240	* is on going, function HAL_ADC_Stop must be used preliminarily.
mbed_official	237:f3da66175598	3241	* @note In case of auto-injection mode, HAL_ADC_Stop must be used.
mbed_official	237:f3da66175598	3242	* @param hadc: ADC handle
mbed_official	237:f3da66175598	3243	* @retval None
mbed_official	237:f3da66175598	3244	*/
mbed_official	237:f3da66175598	3245	HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc)
mbed_official	237:f3da66175598	3246	{
mbed_official	237:f3da66175598	3247	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	237:f3da66175598	3248
mbed_official	237:f3da66175598	3249	/* Check the parameters */
mbed_official	237:f3da66175598	3250	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	3251
mbed_official	237:f3da66175598	3252	/* Process locked */
mbed_official	237:f3da66175598	3253	__HAL_LOCK(hadc);
mbed_official	237:f3da66175598	3254
mbed_official	237:f3da66175598	3255	/* Stop potential conversion and disable ADC peripheral */
mbed_official	237:f3da66175598	3256	/* Conditioned to: */
mbed_official	237:f3da66175598	3257	/* - No conversion on the other group (regular group) is intended to */
mbed_official	237:f3da66175598	3258	/* continue (injected and regular groups stop conversion and ADC disable */
mbed_official	237:f3da66175598	3259	/* are common) */
mbed_official	237:f3da66175598	3260	/* - In case of auto-injection mode, HAL_ADC_Stop must be used. */
mbed_official	237:f3da66175598	3261	if((hadc->State != HAL_ADC_STATE_BUSY_REG) &&
mbed_official	237:f3da66175598	3262	(hadc->State != HAL_ADC_STATE_BUSY_INJ_REG) &&
mbed_official	237:f3da66175598	3263	HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) )
mbed_official	237:f3da66175598	3264	{
mbed_official	237:f3da66175598	3265	/* Stop potential conversion on going, on regular and injected groups */
mbed_official	237:f3da66175598	3266	/* Disable ADC peripheral */
mbed_official	237:f3da66175598	3267	tmpHALStatus = ADC_ConversionStop_Disable(hadc);
mbed_official	237:f3da66175598	3268
mbed_official	237:f3da66175598	3269	/* Check if ADC is effectively disabled */
mbed_official	237:f3da66175598	3270	if (tmpHALStatus != HAL_ERROR)
mbed_official	237:f3da66175598	3271	{
mbed_official	237:f3da66175598	3272	/* Change ADC state */
mbed_official	237:f3da66175598	3273	hadc->State = HAL_ADC_STATE_READY;
mbed_official	237:f3da66175598	3274	}
mbed_official	237:f3da66175598	3275	}
mbed_official	237:f3da66175598	3276	else
mbed_official	237:f3da66175598	3277	{
mbed_official	237:f3da66175598	3278	/* Update ADC state machine to error */
mbed_official	237:f3da66175598	3279	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	3280
mbed_official	237:f3da66175598	3281	tmpHALStatus = HAL_ERROR;
mbed_official	237:f3da66175598	3282	}
mbed_official	237:f3da66175598	3283
mbed_official	237:f3da66175598	3284	/* Process unlocked */
mbed_official	237:f3da66175598	3285	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	3286
mbed_official	237:f3da66175598	3287	/* Return function status */
mbed_official	237:f3da66175598	3288	return tmpHALStatus;
mbed_official	237:f3da66175598	3289	}
mbed_official	237:f3da66175598	3290	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	237:f3da66175598	3291
mbed_official	237:f3da66175598	3292	#if defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| defined(STM32F302xC) \|\| defined(STM32F303x8) \|\| defined(STM32F328xx) \|\| defined(STM32F334x8) \|\| defined(STM32F301x8) \|\| defined(STM32F318xx) \|\| defined(STM32F302x8)
mbed_official	237:f3da66175598	3293	/**
mbed_official	237:f3da66175598	3294	* @brief Wait for injected group conversion to be completed.
mbed_official	237:f3da66175598	3295	* @param hadc: ADC handle
mbed_official	237:f3da66175598	3296	* @param Timeout: Timeout value in millisecond.
mbed_official	237:f3da66175598	3297	* @retval HAL status
mbed_official	237:f3da66175598	3298	*/
mbed_official	237:f3da66175598	3299	HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
mbed_official	237:f3da66175598	3300	{
mbed_official	237:f3da66175598	3301	uint32_t tickstart;
mbed_official	237:f3da66175598	3302	uint32_t tmp_Flag_EOC;
mbed_official	237:f3da66175598	3303
mbed_official	237:f3da66175598	3304	/* Check the parameters */
mbed_official	237:f3da66175598	3305	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	3306
mbed_official	237:f3da66175598	3307	/* If end of conversion selected to end of sequence */
mbed_official	237:f3da66175598	3308	if (hadc->Init.EOCSelection == EOC_SEQ_CONV)
mbed_official	237:f3da66175598	3309	{
mbed_official	237:f3da66175598	3310	tmp_Flag_EOC = ADC_FLAG_JEOS;
mbed_official	237:f3da66175598	3311	}
mbed_official	237:f3da66175598	3312	/* If end of conversion selected to end of each conversion */
mbed_official	237:f3da66175598	3313	else /* EOC_SINGLE_CONV */
mbed_official	237:f3da66175598	3314	{
mbed_official	237:f3da66175598	3315	tmp_Flag_EOC = (ADC_FLAG_JEOC \| ADC_FLAG_JEOS);
mbed_official	237:f3da66175598	3316	}
mbed_official	237:f3da66175598	3317
mbed_official	237:f3da66175598	3318	/* Get timeout */
mbed_official	237:f3da66175598	3319	tickstart = HAL_GetTick();
mbed_official	237:f3da66175598	3320
mbed_official	237:f3da66175598	3321	/* Wait until End of Conversion flag is raised */
mbed_official	237:f3da66175598	3322	while(HAL_IS_BIT_CLR(hadc->Instance->ISR, tmp_Flag_EOC))
mbed_official	237:f3da66175598	3323	{
mbed_official	237:f3da66175598	3324	/* Check if timeout is disabled (set to infinite wait) */
mbed_official	237:f3da66175598	3325	if(Timeout != HAL_MAX_DELAY)
mbed_official	237:f3da66175598	3326	{
mbed_official	237:f3da66175598	3327	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) > Timeout))
mbed_official	237:f3da66175598	3328	{
mbed_official	237:f3da66175598	3329	/* Update ADC state machine to timeout */
mbed_official	237:f3da66175598	3330	hadc->State = HAL_ADC_STATE_TIMEOUT;
mbed_official	237:f3da66175598	3331
mbed_official	237:f3da66175598	3332	/* Process unlocked */
mbed_official	237:f3da66175598	3333	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	3334
mbed_official	237:f3da66175598	3335	return HAL_ERROR;
mbed_official	237:f3da66175598	3336	}
mbed_official	237:f3da66175598	3337	}
mbed_official	237:f3da66175598	3338	}
mbed_official	237:f3da66175598	3339
mbed_official	237:f3da66175598	3340	/* Clear end of conversion flag of injected group if low power feature */
mbed_official	237:f3da66175598	3341	/* "Auto Wait" is disabled, to not interfere with this feature until data */
mbed_official	237:f3da66175598	3342	/* register is read using function HAL_ADC_GetValue(). */
mbed_official	237:f3da66175598	3343	if (hadc->Init.LowPowerAutoWait == DISABLE)
mbed_official	237:f3da66175598	3344	{
mbed_official	237:f3da66175598	3345	/* Clear injected group conversion flag */
mbed_official	237:f3da66175598	3346	__HAL_ADC_CLEAR_FLAG(hadc,(ADC_FLAG_JEOC \| ADC_FLAG_JEOS));
mbed_official	237:f3da66175598	3347	}
mbed_official	237:f3da66175598	3348
mbed_official	237:f3da66175598	3349
mbed_official	237:f3da66175598	3350	/* Update ADC state machine */
mbed_official	237:f3da66175598	3351	if(hadc->State != HAL_ADC_STATE_EOC_INJ_REG)
mbed_official	237:f3da66175598	3352	{
mbed_official	237:f3da66175598	3353	/* Check if a conversion is ready on regular group */
mbed_official	237:f3da66175598	3354	if(hadc->State == HAL_ADC_STATE_EOC_REG)
mbed_official	237:f3da66175598	3355	{
mbed_official	237:f3da66175598	3356	/* Change ADC state */
mbed_official	237:f3da66175598	3357	hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
mbed_official	237:f3da66175598	3358	}
mbed_official	237:f3da66175598	3359	else
mbed_official	237:f3da66175598	3360	{
mbed_official	237:f3da66175598	3361	/* Change ADC state */
mbed_official	237:f3da66175598	3362	hadc->State = HAL_ADC_STATE_EOC_INJ;
mbed_official	237:f3da66175598	3363	}
mbed_official	237:f3da66175598	3364	}
mbed_official	237:f3da66175598	3365
mbed_official	237:f3da66175598	3366	/* Return ADC state */
mbed_official	237:f3da66175598	3367	return HAL_OK;
mbed_official	237:f3da66175598	3368	}
mbed_official	237:f3da66175598	3369	#endif /* STM32F303xC \|\| STM32F358xx \|\| STM32F302xC \|\| STM32F303x8 \|\| STM32F328xx \|\| STM32F334x8 \|\| STM32F301x8 \|\| STM32F318xx \|\| STM32F302x8 */
mbed_official	237:f3da66175598	3370
mbed_official	237:f3da66175598	3371	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	237:f3da66175598	3372	/**
mbed_official	237:f3da66175598	3373	* @brief Wait for injected group conversion to be completed.
mbed_official	237:f3da66175598	3374	* @param hadc: ADC handle
mbed_official	237:f3da66175598	3375	* @param Timeout: Timeout value in millisecond.
mbed_official	237:f3da66175598	3376	* @retval HAL status
mbed_official	237:f3da66175598	3377	*/
mbed_official	237:f3da66175598	3378	HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
mbed_official	237:f3da66175598	3379	{
mbed_official	237:f3da66175598	3380	uint32_t tickstart;
mbed_official	237:f3da66175598	3381
mbed_official	237:f3da66175598	3382	/* Variables for polling in case of scan mode enabled */
mbed_official	237:f3da66175598	3383	uint32_t Conversion_Timeout_CPU_cycles_max =0;
mbed_official	237:f3da66175598	3384	uint32_t Conversion_Timeout_CPU_cycles =0;
mbed_official	237:f3da66175598	3385
mbed_official	237:f3da66175598	3386	/* Check the parameters */
mbed_official	237:f3da66175598	3387	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	3388
mbed_official	237:f3da66175598	3389	/* Get timeout */
mbed_official	237:f3da66175598	3390	tickstart = HAL_GetTick();
mbed_official	237:f3da66175598	3391
mbed_official	237:f3da66175598	3392	/* Polling for end of conversion: differentiation if single/sequence */
mbed_official	237:f3da66175598	3393	/* conversion. */
mbed_official	237:f3da66175598	3394	/* For injected group, flag JEOC is set only at the end of the sequence, */
mbed_official	237:f3da66175598	3395	/* not for each conversion within the sequence. */
mbed_official	237:f3da66175598	3396	/* - If single conversion for injected group (scan mode disabled or */
mbed_official	237:f3da66175598	3397	/* InjectedNbrOfConversion ==1), flag jEOC is used to determine the */
mbed_official	237:f3da66175598	3398	/* conversion completion. */
mbed_official	237:f3da66175598	3399	/* - If sequence conversion for injected group (scan mode enabled and */
mbed_official	237:f3da66175598	3400	/* InjectedNbrOfConversion >=2), flag JEOC is set only at the end of the */
mbed_official	237:f3da66175598	3401	/* sequence. */
mbed_official	237:f3da66175598	3402	/* To poll for each conversion, the maximum conversion time is computed */
mbed_official	237:f3da66175598	3403	/* from ADC conversion time (selected sampling time + conversion time of */
mbed_official	237:f3da66175598	3404	/* 12.5 ADC clock cycles) and APB2/ADC clock prescalers (depending on */
mbed_official	237:f3da66175598	3405	/* settings, conversion time range can be from 28 to 32256 CPU cycles). */
mbed_official	237:f3da66175598	3406	if ((hadc->Instance->JSQR & ADC_JSQR_JL) == RESET)
mbed_official	237:f3da66175598	3407	{
mbed_official	237:f3da66175598	3408	/* Wait until End of Conversion flag is raised */
mbed_official	237:f3da66175598	3409	while(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_JEOC))
mbed_official	237:f3da66175598	3410	{
mbed_official	237:f3da66175598	3411	/* Check if timeout is disabled (set to infinite wait) */
mbed_official	237:f3da66175598	3412	if(Timeout != HAL_MAX_DELAY)
mbed_official	237:f3da66175598	3413	{
mbed_official	237:f3da66175598	3414	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) > Timeout))
mbed_official	237:f3da66175598	3415	{
mbed_official	237:f3da66175598	3416	/* Update ADC state machine to timeout */
mbed_official	237:f3da66175598	3417	hadc->State = HAL_ADC_STATE_TIMEOUT;
mbed_official	237:f3da66175598	3418
mbed_official	237:f3da66175598	3419	/* Process unlocked */
mbed_official	237:f3da66175598	3420	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	3421
mbed_official	237:f3da66175598	3422	return HAL_ERROR;
mbed_official	237:f3da66175598	3423	}
mbed_official	237:f3da66175598	3424	}
mbed_official	237:f3da66175598	3425	}
mbed_official	237:f3da66175598	3426	}
mbed_official	237:f3da66175598	3427	else
mbed_official	237:f3da66175598	3428	{
mbed_official	237:f3da66175598	3429	/* Calculation of CPU cycles corresponding to ADC conversion cycles. */
mbed_official	237:f3da66175598	3430	/* Retrieve ADC clock prescaler and ADC maximum conversion cycles on all */
mbed_official	237:f3da66175598	3431	/* channels. */
mbed_official	237:f3da66175598	3432	Conversion_Timeout_CPU_cycles_max = __HAL_ADC_CLOCK_PRECSALER_RANGE() ;
mbed_official	237:f3da66175598	3433	Conversion_Timeout_CPU_cycles_max *= __HAL_ADC_CONVCYCLES_MAX_RANGE(hadc);
mbed_official	237:f3da66175598	3434
mbed_official	237:f3da66175598	3435	/* Maximum conversion cycles taking in account offset of 34 CPU cycles: */
mbed_official	237:f3da66175598	3436	/* number of CPU cycles for processing of conversion cycles estimation. */
mbed_official	237:f3da66175598	3437	Conversion_Timeout_CPU_cycles = 34;
mbed_official	237:f3da66175598	3438
mbed_official	237:f3da66175598	3439	/* Poll with maximum conversion time */
mbed_official	237:f3da66175598	3440	while(Conversion_Timeout_CPU_cycles < Conversion_Timeout_CPU_cycles_max)
mbed_official	237:f3da66175598	3441	{
mbed_official	237:f3da66175598	3442	/* Check if timeout is disabled (set to infinite wait) */
mbed_official	237:f3da66175598	3443	if(Timeout != HAL_MAX_DELAY)
mbed_official	237:f3da66175598	3444	{
mbed_official	237:f3da66175598	3445	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) > Timeout))
mbed_official	237:f3da66175598	3446	{
mbed_official	237:f3da66175598	3447	/* Update ADC state machine to timeout */
mbed_official	237:f3da66175598	3448	hadc->State = HAL_ADC_STATE_TIMEOUT;
mbed_official	237:f3da66175598	3449
mbed_official	237:f3da66175598	3450	/* Process unlocked */
mbed_official	237:f3da66175598	3451	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	3452
mbed_official	237:f3da66175598	3453	return HAL_ERROR;
mbed_official	237:f3da66175598	3454	}
mbed_official	237:f3da66175598	3455	}
mbed_official	237:f3da66175598	3456	Conversion_Timeout_CPU_cycles ++;
mbed_official	237:f3da66175598	3457	}
mbed_official	237:f3da66175598	3458	}
mbed_official	237:f3da66175598	3459
mbed_official	237:f3da66175598	3460
mbed_official	237:f3da66175598	3461	/* Clear injected group conversion flag (and regular conversion flag raised simultaneously) */
mbed_official	237:f3da66175598	3462	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JSTRT \| ADC_FLAG_JEOC \| ADC_FLAG_EOC);
mbed_official	237:f3da66175598	3463
mbed_official	237:f3da66175598	3464	/* Check if a regular conversion is ready */
mbed_official	237:f3da66175598	3465	if(hadc->State == HAL_ADC_STATE_EOC_REG)
mbed_official	237:f3da66175598	3466	{
mbed_official	237:f3da66175598	3467	/* Change ADC state */
mbed_official	237:f3da66175598	3468	hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
mbed_official	237:f3da66175598	3469	}
mbed_official	237:f3da66175598	3470	else
mbed_official	237:f3da66175598	3471	{
mbed_official	237:f3da66175598	3472	/* Change ADC state */
mbed_official	237:f3da66175598	3473	hadc->State = HAL_ADC_STATE_EOC_INJ;
mbed_official	237:f3da66175598	3474	}
mbed_official	237:f3da66175598	3475
mbed_official	237:f3da66175598	3476	/* Return ADC state */
mbed_official	237:f3da66175598	3477	return HAL_OK;
mbed_official	237:f3da66175598	3478	}
mbed_official	237:f3da66175598	3479	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	237:f3da66175598	3480
mbed_official	237:f3da66175598	3481	#if defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| defined(STM32F302xC) \|\| defined(STM32F303x8) \|\| defined(STM32F328xx) \|\| defined(STM32F334x8) \|\| defined(STM32F301x8) \|\| defined(STM32F318xx) \|\| defined(STM32F302x8)
mbed_official	237:f3da66175598	3482	/**
mbed_official	237:f3da66175598	3483	* @brief Enables ADC, starts conversion of injected group with interruption.
mbed_official	237:f3da66175598	3484	* Interruptions enabled in this function: JEOC (end of conversion),
mbed_official	237:f3da66175598	3485	* overrun (if available).
mbed_official	237:f3da66175598	3486	* Each of these interruptions has its dedicated callback function.
mbed_official	237:f3da66175598	3487	* @note: Case of multimode enabled (for devices with several ADCs): This
mbed_official	237:f3da66175598	3488	* function must be called for ADC slave first, then ADC master.
mbed_official	237:f3da66175598	3489	* For ADC slave, ADC is enabled only (conversion is not started).
mbed_official	237:f3da66175598	3490	* For ADC master, ADC is enabled and multimode conversion is started.
mbed_official	237:f3da66175598	3491	* @param hadc: ADC handle
mbed_official	237:f3da66175598	3492	* @retval HAL status.
mbed_official	237:f3da66175598	3493	*/
mbed_official	237:f3da66175598	3494	HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc)
mbed_official	237:f3da66175598	3495	{
mbed_official	237:f3da66175598	3496	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	237:f3da66175598	3497
mbed_official	237:f3da66175598	3498	/* Check the parameters */
mbed_official	237:f3da66175598	3499	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	3500
mbed_official	237:f3da66175598	3501	/* Process locked */
mbed_official	237:f3da66175598	3502	__HAL_LOCK(hadc);
mbed_official	237:f3da66175598	3503
mbed_official	237:f3da66175598	3504	/* Enable the ADC peripheral */
mbed_official	237:f3da66175598	3505	tmpHALStatus = ADC_Enable(hadc);
mbed_official	237:f3da66175598	3506
mbed_official	237:f3da66175598	3507	/* Start conversion if ADC is effectively enabled */
mbed_official	237:f3da66175598	3508	if (tmpHALStatus != HAL_ERROR)
mbed_official	237:f3da66175598	3509	{
mbed_official	237:f3da66175598	3510	/* Check if a regular conversion is ongoing */
mbed_official	237:f3da66175598	3511	if(hadc->State == HAL_ADC_STATE_BUSY_REG)
mbed_official	237:f3da66175598	3512	{
mbed_official	237:f3da66175598	3513	/* Change ADC state */
mbed_official	237:f3da66175598	3514	hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
mbed_official	237:f3da66175598	3515	}
mbed_official	237:f3da66175598	3516	else
mbed_official	237:f3da66175598	3517	{
mbed_official	237:f3da66175598	3518	/* Change ADC state */
mbed_official	237:f3da66175598	3519	hadc->State = HAL_ADC_STATE_BUSY_INJ;
mbed_official	237:f3da66175598	3520	}
mbed_official	237:f3da66175598	3521
mbed_official	237:f3da66175598	3522	/* Set ADC error code to none */
mbed_official	237:f3da66175598	3523	__HAL_ADC_CLEAR_ERRORCODE(hadc);
mbed_official	237:f3da66175598	3524
mbed_official	237:f3da66175598	3525	/* Clear injected group conversion flag */
mbed_official	237:f3da66175598	3526	/* (To ensure of no unknown state from potential previous ADC operations) */
mbed_official	237:f3da66175598	3527	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC \| ADC_FLAG_JEOS));
mbed_official	237:f3da66175598	3528
mbed_official	237:f3da66175598	3529	/* Enable ADC Injected context queue overflow interrupt if this feature */
mbed_official	237:f3da66175598	3530	/* is enabled. */
mbed_official	237:f3da66175598	3531	if ((hadc->Instance->CFGR & ADC_CFGR_JQM) != RESET)
mbed_official	237:f3da66175598	3532	{
mbed_official	237:f3da66175598	3533	__HAL_ADC_ENABLE_IT(hadc, ADC_FLAG_JQOVF);
mbed_official	237:f3da66175598	3534	}
mbed_official	237:f3da66175598	3535
mbed_official	237:f3da66175598	3536	/* Enable ADC end of conversion interrupt */
mbed_official	237:f3da66175598	3537	switch(hadc->Init.EOCSelection)
mbed_official	237:f3da66175598	3538	{
mbed_official	237:f3da66175598	3539	case EOC_SEQ_CONV:
mbed_official	237:f3da66175598	3540	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
mbed_official	237:f3da66175598	3541	__HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOS);
mbed_official	237:f3da66175598	3542	break;
mbed_official	237:f3da66175598	3543	/* case EOC_SINGLE_CONV */
mbed_official	237:f3da66175598	3544	default:
mbed_official	237:f3da66175598	3545	__HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC \| ADC_IT_JEOS);
mbed_official	237:f3da66175598	3546	break;
mbed_official	237:f3da66175598	3547	}
mbed_official	237:f3da66175598	3548
mbed_official	237:f3da66175598	3549	/* Enable conversion of injected group, if automatic injected conversion */
mbed_official	237:f3da66175598	3550	/* is disabled. */
mbed_official	237:f3da66175598	3551	/* If software start has been selected, conversion starts immediately. */
mbed_official	237:f3da66175598	3552	/* If external trigger has been selected, conversion will start at next */
mbed_official	237:f3da66175598	3553	/* trigger event. */
mbed_official	237:f3da66175598	3554	/* Case of multimode enabled (for devices with several ADCs): if ADC is */
mbed_official	237:f3da66175598	3555	/* slave, ADC is enabled only (conversion is not started). If ADC is */
mbed_official	237:f3da66175598	3556	/* master, ADC is enabled and conversion is started. */
mbed_official	237:f3da66175598	3557	if (
mbed_official	237:f3da66175598	3558	HAL_IS_BIT_CLR(hadc->Instance->CFGR, ADC_CFGR_JAUTO) &&
mbed_official	237:f3da66175598	3559	__HAL_ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc) )
mbed_official	237:f3da66175598	3560	{
mbed_official	237:f3da66175598	3561	hadc->Instance->CR \|= ADC_CR_JADSTART;
mbed_official	237:f3da66175598	3562	}
mbed_official	237:f3da66175598	3563	}
mbed_official	237:f3da66175598	3564
mbed_official	237:f3da66175598	3565	/* Process unlocked */
mbed_official	237:f3da66175598	3566	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	3567
mbed_official	237:f3da66175598	3568	/* Return function status */
mbed_official	237:f3da66175598	3569	return tmpHALStatus;
mbed_official	237:f3da66175598	3570	}
mbed_official	237:f3da66175598	3571	#endif /* STM32F303xC \|\| STM32F358xx \|\| STM32F302xC \|\| STM32F303x8 \|\| STM32F328xx \|\| STM32F334x8 \|\| STM32F301x8 \|\| STM32F318xx \|\| STM32F302x8 */
mbed_official	237:f3da66175598	3572
mbed_official	237:f3da66175598	3573	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	237:f3da66175598	3574	/**
mbed_official	237:f3da66175598	3575	* @brief Enables ADC, starts conversion of injected group with interruption.
mbed_official	237:f3da66175598	3576	* Interruptions enabled in this function: JEOC (end of conversion),
mbed_official	237:f3da66175598	3577	* overrun (if available).
mbed_official	237:f3da66175598	3578	* Each of these interruptions has its dedicated callback function.
mbed_official	237:f3da66175598	3579	* @param hadc: ADC handle
mbed_official	237:f3da66175598	3580	* @retval HAL status.
mbed_official	237:f3da66175598	3581	*/
mbed_official	237:f3da66175598	3582	HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc)
mbed_official	237:f3da66175598	3583	{
mbed_official	237:f3da66175598	3584	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	237:f3da66175598	3585
mbed_official	237:f3da66175598	3586	/* Check the parameters */
mbed_official	237:f3da66175598	3587	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	3588
mbed_official	237:f3da66175598	3589	/* Process locked */
mbed_official	237:f3da66175598	3590	__HAL_LOCK(hadc);
mbed_official	237:f3da66175598	3591
mbed_official	237:f3da66175598	3592	/* Enable the ADC peripheral */
mbed_official	237:f3da66175598	3593	tmpHALStatus = ADC_Enable(hadc);
mbed_official	237:f3da66175598	3594
mbed_official	237:f3da66175598	3595	/* Start conversion if ADC is effectively enabled */
mbed_official	237:f3da66175598	3596	if (tmpHALStatus != HAL_ERROR)
mbed_official	237:f3da66175598	3597	{
mbed_official	237:f3da66175598	3598	/* Check if a regular conversion is ongoing */
mbed_official	237:f3da66175598	3599	if(hadc->State == HAL_ADC_STATE_BUSY_REG)
mbed_official	237:f3da66175598	3600	{
mbed_official	237:f3da66175598	3601	/* Change ADC state */
mbed_official	237:f3da66175598	3602	hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
mbed_official	237:f3da66175598	3603	}
mbed_official	237:f3da66175598	3604	else
mbed_official	237:f3da66175598	3605	{
mbed_official	237:f3da66175598	3606	/* Change ADC state */
mbed_official	237:f3da66175598	3607	hadc->State = HAL_ADC_STATE_BUSY_INJ;
mbed_official	237:f3da66175598	3608	}
mbed_official	237:f3da66175598	3609
mbed_official	237:f3da66175598	3610	/* Set ADC error code to none */
mbed_official	237:f3da66175598	3611	__HAL_ADC_CLEAR_ERRORCODE(hadc);
mbed_official	237:f3da66175598	3612
mbed_official	237:f3da66175598	3613	/* Clear injected group conversion flag */
mbed_official	237:f3da66175598	3614	/* (To ensure of no unknown state from potential previous ADC operations) */
mbed_official	237:f3da66175598	3615	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
mbed_official	237:f3da66175598	3616
mbed_official	237:f3da66175598	3617	/* Enable end of conversion interrupt for injected channels */
mbed_official	237:f3da66175598	3618	__HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC);
mbed_official	237:f3da66175598	3619
mbed_official	237:f3da66175598	3620	/* Start conversion of injected group if software start has been selected */
mbed_official	237:f3da66175598	3621	/* and if automatic injected conversion is disabled. */
mbed_official	237:f3da66175598	3622	/* If external trigger has been selected, conversion will start at next */
mbed_official	237:f3da66175598	3623	/* trigger event. */
mbed_official	237:f3da66175598	3624	/* If automatic injected conversion is enabled, conversion will start */
mbed_official	237:f3da66175598	3625	/* after next regular group conversion. */
mbed_official	237:f3da66175598	3626	if (__HAL_ADC_IS_SOFTWARE_START_INJECTED(hadc) &&
mbed_official	237:f3da66175598	3627	HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) )
mbed_official	237:f3da66175598	3628	{
mbed_official	237:f3da66175598	3629	/* Enable ADC software conversion for injected channels */
mbed_official	237:f3da66175598	3630	hadc->Instance->CR2 \|= ADC_CR2_JSWSTART;
mbed_official	237:f3da66175598	3631	}
mbed_official	237:f3da66175598	3632	}
mbed_official	237:f3da66175598	3633
mbed_official	237:f3da66175598	3634	/* Process unlocked */
mbed_official	237:f3da66175598	3635	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	3636
mbed_official	237:f3da66175598	3637	/* Return function status */
mbed_official	237:f3da66175598	3638	return tmpHALStatus;
mbed_official	237:f3da66175598	3639	}
mbed_official	237:f3da66175598	3640	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	237:f3da66175598	3641
mbed_official	237:f3da66175598	3642	#if defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| defined(STM32F302xC) \|\| defined(STM32F303x8) \|\| defined(STM32F328xx) \|\| defined(STM32F334x8) \|\| defined(STM32F301x8) \|\| defined(STM32F318xx) \|\| defined(STM32F302x8)
mbed_official	237:f3da66175598	3643	/**
mbed_official	237:f3da66175598	3644	* @brief Stop conversion of injected channels, disable interruption of
mbed_official	237:f3da66175598	3645	* end-of-conversion. Disable ADC peripheral if no regular conversion
mbed_official	237:f3da66175598	3646	* is on going.
mbed_official	237:f3da66175598	3647	* @note If ADC must be disabled with this function and if regular conversion
mbed_official	237:f3da66175598	3648	* is on going, function HAL_ADC_Stop must be used preliminarily.
mbed_official	237:f3da66175598	3649	* @note: Case of multimode enabled (for devices with several ADCs): This
mbed_official	237:f3da66175598	3650	* function must be called for ADC master first, then ADC slave.
mbed_official	237:f3da66175598	3651	* For ADC master, conversion is stopped and ADC is disabled.
mbed_official	237:f3da66175598	3652	* For ADC slave, ADC is disabled only (conversion stop of ADC master
mbed_official	237:f3da66175598	3653	* has already stopped conversion of ADC slave).
mbed_official	237:f3da66175598	3654	* @note In case of auto-injection mode, HAL_ADC_Stop must be used.
mbed_official	237:f3da66175598	3655	* @param hadc: ADC handle
mbed_official	237:f3da66175598	3656	* @retval None
mbed_official	237:f3da66175598	3657	*/
mbed_official	237:f3da66175598	3658	HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc)
mbed_official	237:f3da66175598	3659	{
mbed_official	237:f3da66175598	3660	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	237:f3da66175598	3661
mbed_official	237:f3da66175598	3662	/* Check the parameters */
mbed_official	237:f3da66175598	3663	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	3664
mbed_official	237:f3da66175598	3665	/* Process locked */
mbed_official	237:f3da66175598	3666	__HAL_LOCK(hadc);
mbed_official	237:f3da66175598	3667
mbed_official	237:f3da66175598	3668	/* 1. Stop potential conversion on going on injected group only. */
mbed_official	237:f3da66175598	3669	tmpHALStatus = ADC_ConversionStop(hadc, INJECTED_GROUP);
mbed_official	237:f3da66175598	3670
mbed_official	237:f3da66175598	3671	/* Disable ADC peripheral if injected conversions are effectively stopped */
mbed_official	237:f3da66175598	3672	/* and if no conversion on the other group (regular group) is intended to */
mbed_official	237:f3da66175598	3673	/* continue. */
mbed_official	237:f3da66175598	3674	if (tmpHALStatus != HAL_ERROR)
mbed_official	237:f3da66175598	3675	{
mbed_official	237:f3da66175598	3676	/* Disable ADC end of conversion interrupt for injected channels */
mbed_official	237:f3da66175598	3677	__HAL_ADC_DISABLE_IT(hadc, (ADC_IT_JEOC \| ADC_IT_JEOS));
mbed_official	237:f3da66175598	3678
mbed_official	237:f3da66175598	3679	if((__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) &&
mbed_official	237:f3da66175598	3680	(hadc->State != HAL_ADC_STATE_BUSY_REG) &&
mbed_official	237:f3da66175598	3681	(hadc->State != HAL_ADC_STATE_BUSY_INJ_REG) )
mbed_official	237:f3da66175598	3682	{
mbed_official	237:f3da66175598	3683	/* 2. Disable the ADC peripheral */
mbed_official	237:f3da66175598	3684	tmpHALStatus = ADC_Disable(hadc);
mbed_official	237:f3da66175598	3685
mbed_official	237:f3da66175598	3686	/* Check if ADC is effectively disabled */
mbed_official	237:f3da66175598	3687	if (tmpHALStatus != HAL_ERROR)
mbed_official	237:f3da66175598	3688	{
mbed_official	237:f3da66175598	3689	/* Change ADC state */
mbed_official	237:f3da66175598	3690	hadc->State = HAL_ADC_STATE_READY;
mbed_official	237:f3da66175598	3691	}
mbed_official	237:f3da66175598	3692	}
mbed_official	237:f3da66175598	3693	/* Conversion on injected group is stopped, but ADC not disabled since */
mbed_official	237:f3da66175598	3694	/* conversion on regular group is still running. */
mbed_official	237:f3da66175598	3695	else
mbed_official	237:f3da66175598	3696	{
mbed_official	237:f3da66175598	3697	hadc->State = HAL_ADC_STATE_BUSY_REG;
mbed_official	237:f3da66175598	3698	}
mbed_official	237:f3da66175598	3699	}
mbed_official	237:f3da66175598	3700
mbed_official	237:f3da66175598	3701	/* Process unlocked */
mbed_official	237:f3da66175598	3702	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	3703
mbed_official	237:f3da66175598	3704	/* Return function status */
mbed_official	237:f3da66175598	3705	return tmpHALStatus;
mbed_official	237:f3da66175598	3706	}
mbed_official	237:f3da66175598	3707	#endif /* STM32F303xC \|\| STM32F358xx \|\| STM32F302xC \|\| STM32F303x8 \|\| STM32F328xx \|\| STM32F334x8 \|\| STM32F301x8 \|\| STM32F318xx \|\| STM32F302x8 */
mbed_official	237:f3da66175598	3708
mbed_official	237:f3da66175598	3709	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	237:f3da66175598	3710	/**
mbed_official	237:f3da66175598	3711	* @brief Stop conversion of injected channels, disable interruption of
mbed_official	237:f3da66175598	3712	* end-of-conversion. Disable ADC peripheral if no regular conversion
mbed_official	237:f3da66175598	3713	* is on going.
mbed_official	237:f3da66175598	3714	* @note If ADC must be disabled with this function and if regular conversion
mbed_official	237:f3da66175598	3715	* is on going, function HAL_ADC_Stop must be used preliminarily.
mbed_official	237:f3da66175598	3716	* @param hadc: ADC handle
mbed_official	237:f3da66175598	3717	* @retval None
mbed_official	237:f3da66175598	3718	*/
mbed_official	237:f3da66175598	3719	HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc)
mbed_official	237:f3da66175598	3720	{
mbed_official	237:f3da66175598	3721	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	237:f3da66175598	3722
mbed_official	237:f3da66175598	3723	/* Check the parameters */
mbed_official	237:f3da66175598	3724	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	3725
mbed_official	237:f3da66175598	3726	/* Process locked */
mbed_official	237:f3da66175598	3727	__HAL_LOCK(hadc);
mbed_official	237:f3da66175598	3728
mbed_official	237:f3da66175598	3729	/* Stop potential conversion and disable ADC peripheral */
mbed_official	237:f3da66175598	3730	/* Conditioned to: */
mbed_official	237:f3da66175598	3731	/* - No conversion on the other group (regular group) is intended to */
mbed_official	237:f3da66175598	3732	/* continue (injected and regular groups stop conversion and ADC disable */
mbed_official	237:f3da66175598	3733	/* are common) */
mbed_official	237:f3da66175598	3734	/* - In case of auto-injection mode, HAL_ADC_Stop must be used. */
mbed_official	237:f3da66175598	3735	if((hadc->State != HAL_ADC_STATE_BUSY_REG) &&
mbed_official	237:f3da66175598	3736	(hadc->State != HAL_ADC_STATE_BUSY_INJ_REG) &&
mbed_official	237:f3da66175598	3737	HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) )
mbed_official	237:f3da66175598	3738	{
mbed_official	237:f3da66175598	3739	/* Stop potential conversion on going, on regular and injected groups */
mbed_official	237:f3da66175598	3740	/* Disable ADC peripheral */
mbed_official	237:f3da66175598	3741	tmpHALStatus = ADC_ConversionStop_Disable(hadc);
mbed_official	237:f3da66175598	3742
mbed_official	237:f3da66175598	3743	/* Check if ADC is effectively disabled */
mbed_official	237:f3da66175598	3744	if (tmpHALStatus != HAL_ERROR)
mbed_official	237:f3da66175598	3745	{
mbed_official	237:f3da66175598	3746	/* Disable ADC end of conversion interrupt for injected channels */
mbed_official	237:f3da66175598	3747	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
mbed_official	237:f3da66175598	3748
mbed_official	237:f3da66175598	3749	/* Change ADC state */
mbed_official	237:f3da66175598	3750	hadc->State = HAL_ADC_STATE_READY;
mbed_official	237:f3da66175598	3751	}
mbed_official	237:f3da66175598	3752	}
mbed_official	237:f3da66175598	3753	else
mbed_official	237:f3da66175598	3754	{
mbed_official	237:f3da66175598	3755	/* Update ADC state machine to error */
mbed_official	237:f3da66175598	3756	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	3757
mbed_official	237:f3da66175598	3758	tmpHALStatus = HAL_ERROR;
mbed_official	237:f3da66175598	3759	}
mbed_official	237:f3da66175598	3760
mbed_official	237:f3da66175598	3761	/* Process unlocked */
mbed_official	237:f3da66175598	3762	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	3763
mbed_official	237:f3da66175598	3764	/* Return function status */
mbed_official	237:f3da66175598	3765	return tmpHALStatus;
mbed_official	237:f3da66175598	3766	}
mbed_official	237:f3da66175598	3767	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	237:f3da66175598	3768
mbed_official	237:f3da66175598	3769	#if defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| defined(STM32F302xC) \|\| defined(STM32F303x8) \|\| defined(STM32F328xx) \|\| defined(STM32F334x8)
mbed_official	237:f3da66175598	3770	/**
mbed_official	237:f3da66175598	3771	* @brief Enables ADC, starts conversion of regular group and transfers result
mbed_official	237:f3da66175598	3772	* through DMA.
mbed_official	237:f3da66175598	3773	* Multimode must have been previously configured using
mbed_official	237:f3da66175598	3774	* HAL_ADCEx_MultiModeConfigChannel() function.
mbed_official	237:f3da66175598	3775	* Interruptions enabled in this function:
mbed_official	237:f3da66175598	3776	* overrun, DMA half transfer, DMA transfer complete.
mbed_official	237:f3da66175598	3777	* Each of these interruptions has its dedicated callback function.
mbed_official	237:f3da66175598	3778	* @note: ADC slave can be enabled preliminarily using single-mode
mbed_official	237:f3da66175598	3779	* HAL_ADC_Start() function.
mbed_official	237:f3da66175598	3780	* @param hadc: ADC handle of ADC master (handle of ADC slave must not be used)
mbed_official	237:f3da66175598	3781	* @param pData: The destination Buffer address.
mbed_official	237:f3da66175598	3782	* @param Length: The length of data to be transferred from ADC peripheral to memory.
mbed_official	237:f3da66175598	3783	* @retval None
mbed_official	237:f3da66175598	3784	*/
mbed_official	237:f3da66175598	3785	HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
mbed_official	237:f3da66175598	3786	{
mbed_official	237:f3da66175598	3787	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	237:f3da66175598	3788	ADC_HandleTypeDef tmphadcSlave;
mbed_official	237:f3da66175598	3789	ADC_Common_TypeDef *tmpADC_Common;
mbed_official	237:f3da66175598	3790
mbed_official	237:f3da66175598	3791	/* Check the parameters */
mbed_official	237:f3da66175598	3792	assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	3793	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
mbed_official	237:f3da66175598	3794	assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
mbed_official	237:f3da66175598	3795	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests));
mbed_official	237:f3da66175598	3796
mbed_official	237:f3da66175598	3797	/* Process locked */
mbed_official	237:f3da66175598	3798	__HAL_LOCK(hadc);
mbed_official	237:f3da66175598	3799
mbed_official	237:f3da66175598	3800	/* Set a temporary handle of the ADC slave associated to the ADC master */
mbed_official	237:f3da66175598	3801	/* (Depending on STM32F3 product, there may be up to 2 ADC slaves) */
mbed_official	237:f3da66175598	3802	__HAL_ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
mbed_official	237:f3da66175598	3803
mbed_official	237:f3da66175598	3804	if (tmphadcSlave.Instance == NULL)
mbed_official	237:f3da66175598	3805	{
mbed_official	237:f3da66175598	3806	/* Update ADC state machine to error */
mbed_official	237:f3da66175598	3807	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	3808
mbed_official	237:f3da66175598	3809	/* Process unlocked */
mbed_official	237:f3da66175598	3810	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	3811
mbed_official	237:f3da66175598	3812	return HAL_ERROR;
mbed_official	237:f3da66175598	3813	}
mbed_official	237:f3da66175598	3814
mbed_official	237:f3da66175598	3815
mbed_official	237:f3da66175598	3816	/* Enable the ADC peripherals: master and slave (in case if not already */
mbed_official	237:f3da66175598	3817	/* enabled previously) */
mbed_official	237:f3da66175598	3818	tmpHALStatus = ADC_Enable(hadc);
mbed_official	237:f3da66175598	3819	if (tmpHALStatus != HAL_ERROR)
mbed_official	237:f3da66175598	3820	{
mbed_official	237:f3da66175598	3821	tmpHALStatus = ADC_Enable(&tmphadcSlave);
mbed_official	237:f3da66175598	3822	}
mbed_official	237:f3da66175598	3823
mbed_official	237:f3da66175598	3824	/* Start conversion all ADCs of multimode are effectively enabled */
mbed_official	237:f3da66175598	3825	if (tmpHALStatus != HAL_ERROR)
mbed_official	237:f3da66175598	3826	{
mbed_official	237:f3da66175598	3827	/* State machine update (ADC master): Check if an injected conversion is */
mbed_official	237:f3da66175598	3828	/* ongoing. */
mbed_official	237:f3da66175598	3829	if(hadc->State == HAL_ADC_STATE_BUSY_INJ)
mbed_official	237:f3da66175598	3830	{
mbed_official	237:f3da66175598	3831	/* Change ADC state */
mbed_official	237:f3da66175598	3832	hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
mbed_official	237:f3da66175598	3833	}
mbed_official	237:f3da66175598	3834	else
mbed_official	237:f3da66175598	3835	{
mbed_official	237:f3da66175598	3836	/* Change ADC state */
mbed_official	237:f3da66175598	3837	hadc->State = HAL_ADC_STATE_BUSY_REG;
mbed_official	237:f3da66175598	3838	}
mbed_official	237:f3da66175598	3839
mbed_official	237:f3da66175598	3840	/* Set ADC error code to none */
mbed_official	237:f3da66175598	3841	__HAL_ADC_CLEAR_ERRORCODE(hadc);
mbed_official	237:f3da66175598	3842
mbed_official	237:f3da66175598	3843
mbed_official	237:f3da66175598	3844	/* Set the DMA transfer complete callback */
mbed_official	237:f3da66175598	3845	hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
mbed_official	237:f3da66175598	3846
mbed_official	237:f3da66175598	3847	/* Set the DMA half transfer complete callback */
mbed_official	237:f3da66175598	3848	hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
mbed_official	237:f3da66175598	3849
mbed_official	237:f3da66175598	3850	/* Set the DMA error callback */
mbed_official	237:f3da66175598	3851	hadc->DMA_Handle->XferErrorCallback = ADC_DMAError ;
mbed_official	237:f3da66175598	3852
mbed_official	237:f3da66175598	3853	/* Pointer to the common control register to which is belonging hadc */
mbed_official	237:f3da66175598	3854	/* (Depending on STM32F3 product, there may be up to 4 ADC and 2 common */
mbed_official	237:f3da66175598	3855	/* control registers) */
mbed_official	237:f3da66175598	3856	tmpADC_Common = __HAL_ADC_COMMON_REGISTER(hadc);
mbed_official	237:f3da66175598	3857
mbed_official	237:f3da66175598	3858
mbed_official	237:f3da66175598	3859	/* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */
mbed_official	237:f3da66175598	3860	/* start (in case of SW start): */
mbed_official	237:f3da66175598	3861
mbed_official	237:f3da66175598	3862	/* Clear regular group conversion flag and overrun flag */
mbed_official	237:f3da66175598	3863	/* (To ensure of no unknown state from potential previous ADC operations) */
mbed_official	237:f3da66175598	3864	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC \| ADC_FLAG_EOS \| ADC_FLAG_OVR));
mbed_official	237:f3da66175598	3865
mbed_official	237:f3da66175598	3866	/* Enable ADC overrun interrupt */
mbed_official	237:f3da66175598	3867	__HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
mbed_official	237:f3da66175598	3868
mbed_official	237:f3da66175598	3869	/* Start the DMA channel */
mbed_official	237:f3da66175598	3870	HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&tmpADC_Common->CDR, (uint32_t)pData, Length);
mbed_official	237:f3da66175598	3871
mbed_official	237:f3da66175598	3872	/* Enable conversion of regular group. */
mbed_official	237:f3da66175598	3873	/* If software start has been selected, conversion starts immediately. */
mbed_official	237:f3da66175598	3874	/* If external trigger has been selected, conversion will start at next */
mbed_official	237:f3da66175598	3875	/* trigger event. */
mbed_official	237:f3da66175598	3876	hadc->Instance->CR \|= ADC_CR_ADSTART;
mbed_official	237:f3da66175598	3877
mbed_official	237:f3da66175598	3878	}
mbed_official	237:f3da66175598	3879
mbed_official	237:f3da66175598	3880	/* Process unlocked */
mbed_official	237:f3da66175598	3881	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	3882
mbed_official	237:f3da66175598	3883	/* Return function status */
mbed_official	237:f3da66175598	3884	return tmpHALStatus;
mbed_official	237:f3da66175598	3885	}
mbed_official	237:f3da66175598	3886
mbed_official	237:f3da66175598	3887	/**
mbed_official	237:f3da66175598	3888	* @brief Stop ADC conversion of regular group (and injected channels in
mbed_official	237:f3da66175598	3889	* case of auto_injection mode), disable ADC DMA transfer, disable
mbed_official	237:f3da66175598	3890	* ADC peripheral.
mbed_official	237:f3da66175598	3891	* @note Multimode is kept enabled after this function. To disable multimode
mbed_official	237:f3da66175598	3892	* (set with HAL_ADCEx_MultiModeConfigChannel(), ADC must be
mbed_official	237:f3da66175598	3893	* reinitialized using HAL_ADC_Init() or HAL_ADC_ReInit().
mbed_official	237:f3da66175598	3894	* @note In case of DMA configured in circular mode, function
mbed_official	237:f3da66175598	3895	* HAL_ADC_Stop_DMA must be called after this function with handle of
mbed_official	237:f3da66175598	3896	* ADC slave, to properly disable the DMA channel.
mbed_official	237:f3da66175598	3897	* @param hadc: ADC handle of ADC master (handle of ADC slave must not be used)
mbed_official	237:f3da66175598	3898	* @retval None
mbed_official	237:f3da66175598	3899	*/
mbed_official	237:f3da66175598	3900	HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc)
mbed_official	237:f3da66175598	3901	{
mbed_official	237:f3da66175598	3902	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	237:f3da66175598	3903	uint32_t tickstart;
mbed_official	237:f3da66175598	3904	ADC_HandleTypeDef tmphadcSlave;
mbed_official	237:f3da66175598	3905	ADC_Common_TypeDef *tmpADC_Common;
mbed_official	237:f3da66175598	3906
mbed_official	237:f3da66175598	3907	/* Check the parameters */
mbed_official	237:f3da66175598	3908	assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	3909
mbed_official	237:f3da66175598	3910	/* Process locked */
mbed_official	237:f3da66175598	3911	__HAL_LOCK(hadc);
mbed_official	237:f3da66175598	3912
mbed_official	237:f3da66175598	3913
mbed_official	237:f3da66175598	3914	/* 1. Stop potential multimode conversion on going, on regular and injected groups */
mbed_official	237:f3da66175598	3915	tmpHALStatus = ADC_ConversionStop(hadc, REGULAR_INJECTED_GROUP);
mbed_official	237:f3da66175598	3916
mbed_official	237:f3da66175598	3917	/* Disable ADC peripheral if conversions are effectively stopped */
mbed_official	237:f3da66175598	3918	if (tmpHALStatus != HAL_ERROR)
mbed_official	237:f3da66175598	3919	{
mbed_official	237:f3da66175598	3920	/* Set a temporary handle of the ADC slave associated to the ADC master */
mbed_official	237:f3da66175598	3921	/* (Depending on STM32F3 product, there may be up to 2 ADC slaves) */
mbed_official	237:f3da66175598	3922	__HAL_ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
mbed_official	237:f3da66175598	3923
mbed_official	237:f3da66175598	3924	if (tmphadcSlave.Instance == NULL)
mbed_official	237:f3da66175598	3925	{
mbed_official	237:f3da66175598	3926	/* Update ADC state machine to error */
mbed_official	237:f3da66175598	3927	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	3928
mbed_official	237:f3da66175598	3929	/* Process unlocked */
mbed_official	237:f3da66175598	3930	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	3931
mbed_official	237:f3da66175598	3932	return HAL_ERROR;
mbed_official	237:f3da66175598	3933	}
mbed_official	237:f3da66175598	3934
mbed_official	237:f3da66175598	3935	/* Procedure to disable the ADC peripheral: wait for conversions */
mbed_official	237:f3da66175598	3936	/* effectively stopped (ADC master and ADC slave), then disable ADC */
mbed_official	237:f3da66175598	3937
mbed_official	237:f3da66175598	3938	/* 1. Wait until ADSTP=0 for ADC master and ADC slave*/
mbed_official	237:f3da66175598	3939	tickstart = HAL_GetTick();
mbed_official	237:f3da66175598	3940
mbed_official	237:f3da66175598	3941	while(__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) \|\|
mbed_official	237:f3da66175598	3942	__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR(&tmphadcSlave) )
mbed_official	237:f3da66175598	3943	{
mbed_official	237:f3da66175598	3944	if((HAL_GetTick()-tickstart) > ADC_STOP_CONVERSION_TIMEOUT)
mbed_official	237:f3da66175598	3945	{
mbed_official	237:f3da66175598	3946	/* Update ADC state machine to error */
mbed_official	237:f3da66175598	3947	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	3948
mbed_official	237:f3da66175598	3949	/* Process unlocked */
mbed_official	237:f3da66175598	3950	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	3951
mbed_official	237:f3da66175598	3952	return HAL_ERROR;
mbed_official	237:f3da66175598	3953	}
mbed_official	237:f3da66175598	3954	}
mbed_official	237:f3da66175598	3955
mbed_official	237:f3da66175598	3956
mbed_official	237:f3da66175598	3957	/* Pointer to the common control register to which is belonging hadc */
mbed_official	237:f3da66175598	3958	/* (Depending on STM32F3 product, there may be up to 4 ADC and 2 common */
mbed_official	237:f3da66175598	3959	/* control registers) */
mbed_official	237:f3da66175598	3960	tmpADC_Common = __HAL_ADC_COMMON_REGISTER(hadc);
mbed_official	237:f3da66175598	3961
mbed_official	237:f3da66175598	3962	/* Reset configuration of ADC DMA continuous request for dual mode */
mbed_official	237:f3da66175598	3963	tmpADC_Common->CCR &= ~ADC_CCR_DMACFG;
mbed_official	237:f3da66175598	3964
mbed_official	237:f3da66175598	3965	/* Disable the DMA channel (in case of DMA in circular mode or stop while */
mbed_official	237:f3da66175598	3966	/* while DMA transfer is on going) */
mbed_official	237:f3da66175598	3967	/* Note: DMA channel of ADC slave should stopped after this function with */
mbed_official	237:f3da66175598	3968	/* function HAL_ADC_Stop_DMA. */
mbed_official	237:f3da66175598	3969	tmpHALStatus = HAL_DMA_Abort(hadc->DMA_Handle);
mbed_official	237:f3da66175598	3970
mbed_official	237:f3da66175598	3971	/* Check if DMA channel effectively disabled */
mbed_official	237:f3da66175598	3972	if (tmpHALStatus != HAL_OK)
mbed_official	237:f3da66175598	3973	{
mbed_official	237:f3da66175598	3974	/* Update ADC state machine to error */
mbed_official	237:f3da66175598	3975	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	3976	}
mbed_official	237:f3da66175598	3977
mbed_official	237:f3da66175598	3978	/* Disable ADC overrun interrupt */
mbed_official	237:f3da66175598	3979	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
mbed_official	237:f3da66175598	3980
mbed_official	237:f3da66175598	3981
mbed_official	237:f3da66175598	3982
mbed_official	237:f3da66175598	3983	/* 2. Disable the ADC peripherals: master and slave */
mbed_official	237:f3da66175598	3984	/* Update "tmpHALStatus" only if DMA channel disabling passed, to keep in */
mbed_official	237:f3da66175598	3985	/* memory a potential failing status. */
mbed_official	237:f3da66175598	3986	if (tmpHALStatus != HAL_ERROR)
mbed_official	237:f3da66175598	3987	{
mbed_official	237:f3da66175598	3988	/* Check if ADC are effectively disabled */
mbed_official	237:f3da66175598	3989	if ((ADC_Disable(hadc) != HAL_ERROR) &&
mbed_official	237:f3da66175598	3990	(ADC_Disable(&tmphadcSlave) != HAL_ERROR) )
mbed_official	237:f3da66175598	3991	{
mbed_official	237:f3da66175598	3992	tmpHALStatus = HAL_OK;
mbed_official	237:f3da66175598	3993
mbed_official	237:f3da66175598	3994	/* Change ADC state (ADC master) */
mbed_official	237:f3da66175598	3995	hadc->State = HAL_ADC_STATE_READY;
mbed_official	237:f3da66175598	3996	}
mbed_official	237:f3da66175598	3997	}
mbed_official	237:f3da66175598	3998	else
mbed_official	237:f3da66175598	3999	{
mbed_official	237:f3da66175598	4000	ADC_Disable(hadc);
mbed_official	237:f3da66175598	4001	ADC_Disable(&tmphadcSlave);
mbed_official	237:f3da66175598	4002	}
mbed_official	237:f3da66175598	4003
mbed_official	237:f3da66175598	4004	}
mbed_official	237:f3da66175598	4005
mbed_official	237:f3da66175598	4006	/* Process unlocked */
mbed_official	237:f3da66175598	4007	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	4008
mbed_official	237:f3da66175598	4009	/* Return function status */
mbed_official	237:f3da66175598	4010	return tmpHALStatus;
mbed_official	237:f3da66175598	4011	}
mbed_official	237:f3da66175598	4012
mbed_official	237:f3da66175598	4013	/**
mbed_official	237:f3da66175598	4014	* @brief Returns the last ADC Master&Slave regular conversions results data
mbed_official	237:f3da66175598	4015	* in the selected multi mode.
mbed_official	237:f3da66175598	4016	* @param hadc: ADC handle of ADC master (handle of ADC slave must not be used)
mbed_official	237:f3da66175598	4017	* @retval The converted data value.
mbed_official	237:f3da66175598	4018	*/
mbed_official	237:f3da66175598	4019	uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc)
mbed_official	237:f3da66175598	4020	{
mbed_official	237:f3da66175598	4021	ADC_Common_TypeDef *tmpADC_Common;
mbed_official	237:f3da66175598	4022
mbed_official	237:f3da66175598	4023	/* Check the parameters */
mbed_official	237:f3da66175598	4024	assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	4025
mbed_official	237:f3da66175598	4026	/* Pointer to the common control register to which is belonging hadc */
mbed_official	237:f3da66175598	4027	/* (Depending on STM32F3 product, there may be up to 4 ADC and 2 common */
mbed_official	237:f3da66175598	4028	/* control registers) */
mbed_official	237:f3da66175598	4029	tmpADC_Common = __HAL_ADC_COMMON_REGISTER(hadc);
mbed_official	237:f3da66175598	4030
mbed_official	237:f3da66175598	4031	/* Return the multi mode conversion value */
mbed_official	237:f3da66175598	4032	return tmpADC_Common->CDR;
mbed_official	237:f3da66175598	4033	}
mbed_official	237:f3da66175598	4034	#endif /* STM32F303xC \|\| STM32F358xx \|\| STM32F302xC \|\| STM32F303x8 \|\| STM32F328xx \|\| STM32F334x8 */
mbed_official	237:f3da66175598	4035
mbed_official	237:f3da66175598	4036	#if defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| defined(STM32F302xC) \|\| defined(STM32F303x8) \|\| defined(STM32F328xx) \|\| defined(STM32F334x8) \|\| defined(STM32F301x8) \|\| defined(STM32F318xx) \|\| defined(STM32F302x8)
mbed_official	237:f3da66175598	4037	/**
mbed_official	237:f3da66175598	4038	* @brief Get ADC injected group conversion result.
mbed_official	237:f3da66175598	4039	* @param hadc: ADC handle
mbed_official	237:f3da66175598	4040	* @param InjectedRank: the converted ADC injected rank.
mbed_official	237:f3da66175598	4041	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	4042	* @arg ADC_INJECTED_RANK_1: Injected Channel1 selected
mbed_official	237:f3da66175598	4043	* @arg ADC_INJECTED_RANK_2: Injected Channel2 selected
mbed_official	237:f3da66175598	4044	* @arg ADC_INJECTED_RANK_3: Injected Channel3 selected
mbed_official	237:f3da66175598	4045	* @arg ADC_INJECTED_RANK_4: Injected Channel4 selected
mbed_official	237:f3da66175598	4046	* @retval None
mbed_official	237:f3da66175598	4047	*/
mbed_official	237:f3da66175598	4048	uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank)
mbed_official	237:f3da66175598	4049	{
mbed_official	237:f3da66175598	4050	/* Check the parameters */
mbed_official	237:f3da66175598	4051	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	4052	assert_param(IS_ADC_INJECTED_RANK(InjectedRank));
mbed_official	237:f3da66175598	4053
mbed_official	237:f3da66175598	4054	/* Clear injected group conversion flag to have similar behaviour as */
mbed_official	237:f3da66175598	4055	/* regular group: reading data register also clears end of conversion flag, */
mbed_official	237:f3da66175598	4056	/* and in case of usage of ADC feature "LowPowerAutoWait". */
mbed_official	237:f3da66175598	4057	__HAL_ADC_CLEAR_FLAG(hadc,(ADC_FLAG_JEOC \| ADC_FLAG_JEOS));
mbed_official	237:f3da66175598	4058
mbed_official	237:f3da66175598	4059	/* Return ADC converted value */
mbed_official	237:f3da66175598	4060	switch(InjectedRank)
mbed_official	237:f3da66175598	4061	{
mbed_official	237:f3da66175598	4062	case ADC_INJECTED_RANK_4:
mbed_official	237:f3da66175598	4063	return hadc->Instance->JDR4;
mbed_official	237:f3da66175598	4064	case ADC_INJECTED_RANK_3:
mbed_official	237:f3da66175598	4065	return hadc->Instance->JDR3;
mbed_official	237:f3da66175598	4066	case ADC_INJECTED_RANK_2:
mbed_official	237:f3da66175598	4067	return hadc->Instance->JDR2;
mbed_official	237:f3da66175598	4068	case ADC_INJECTED_RANK_1:
mbed_official	237:f3da66175598	4069	default:
mbed_official	237:f3da66175598	4070	return hadc->Instance->JDR1;
mbed_official	237:f3da66175598	4071	}
mbed_official	237:f3da66175598	4072	}
mbed_official	237:f3da66175598	4073	#endif /* STM32F303xC \|\| STM32F358xx \|\| STM32F302xC \|\| STM32F303x8 \|\| STM32F328xx \|\| STM32F334x8 \|\| STM32F301x8 \|\| STM32F318xx \|\| STM32F302x8 */
mbed_official	237:f3da66175598	4074
mbed_official	237:f3da66175598	4075	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	237:f3da66175598	4076	/**
mbed_official	237:f3da66175598	4077	* @brief Get ADC injected group conversion result.
mbed_official	237:f3da66175598	4078	* @param hadc: ADC handle
mbed_official	237:f3da66175598	4079	* @param InjectedRank: the converted ADC injected rank.
mbed_official	237:f3da66175598	4080	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	4081	* @arg ADC_INJECTED_RANK_1: Injected Channel1 selected
mbed_official	237:f3da66175598	4082	* @arg ADC_INJECTED_RANK_2: Injected Channel2 selected
mbed_official	237:f3da66175598	4083	* @arg ADC_INJECTED_RANK_3: Injected Channel3 selected
mbed_official	237:f3da66175598	4084	* @arg ADC_INJECTED_RANK_4: Injected Channel4 selected
mbed_official	237:f3da66175598	4085	* @retval None
mbed_official	237:f3da66175598	4086	*/
mbed_official	237:f3da66175598	4087	uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank)
mbed_official	237:f3da66175598	4088	{
mbed_official	237:f3da66175598	4089	/* Check the parameters */
mbed_official	237:f3da66175598	4090	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	4091	assert_param(IS_ADC_INJECTED_RANK(InjectedRank));
mbed_official	237:f3da66175598	4092
mbed_official	237:f3da66175598	4093	/* Clear injected group conversion flag to have similar behaviour as */
mbed_official	237:f3da66175598	4094	/* regular group: reading data register also clears end of conversion flag. */
mbed_official	237:f3da66175598	4095	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
mbed_official	237:f3da66175598	4096
mbed_official	237:f3da66175598	4097	/* Return ADC converted value */
mbed_official	237:f3da66175598	4098	switch(InjectedRank)
mbed_official	237:f3da66175598	4099	{
mbed_official	237:f3da66175598	4100	case ADC_INJECTED_RANK_4:
mbed_official	237:f3da66175598	4101	return hadc->Instance->JDR4;
mbed_official	237:f3da66175598	4102	case ADC_INJECTED_RANK_3:
mbed_official	237:f3da66175598	4103	return hadc->Instance->JDR3;
mbed_official	237:f3da66175598	4104	case ADC_INJECTED_RANK_2:
mbed_official	237:f3da66175598	4105	return hadc->Instance->JDR2;
mbed_official	237:f3da66175598	4106	case ADC_INJECTED_RANK_1:
mbed_official	237:f3da66175598	4107	default:
mbed_official	237:f3da66175598	4108	return hadc->Instance->JDR1;
mbed_official	237:f3da66175598	4109	}
mbed_official	237:f3da66175598	4110	}
mbed_official	237:f3da66175598	4111	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	237:f3da66175598	4112
mbed_official	237:f3da66175598	4113	/**
mbed_official	237:f3da66175598	4114	* @brief Injected conversion complete callback in non blocking mode
mbed_official	237:f3da66175598	4115	* @param hadc: ADC handle
mbed_official	237:f3da66175598	4116	* @retval None
mbed_official	237:f3da66175598	4117	*/
mbed_official	237:f3da66175598	4118	__weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc)
mbed_official	237:f3da66175598	4119	{
mbed_official	237:f3da66175598	4120	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	237:f3da66175598	4121	the HAL_ADCEx_InjectedConvCpltCallback could be implemented in the user file
mbed_official	237:f3da66175598	4122	*/
mbed_official	237:f3da66175598	4123	}
mbed_official	237:f3da66175598	4124
mbed_official	237:f3da66175598	4125	#if defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| defined(STM32F302xC) \|\| defined(STM32F303x8) \|\| defined(STM32F328xx) \|\| defined(STM32F334x8) \|\| defined(STM32F301x8) \|\| defined(STM32F318xx) \|\| defined(STM32F302x8)
mbed_official	237:f3da66175598	4126	/**
mbed_official	237:f3da66175598	4127	* @brief Injected context queue overflow flag callback.
mbed_official	237:f3da66175598	4128	* @note: This callback is called if injected context queue is enabled
mbed_official	237:f3da66175598	4129	(parameter "QueueInjectedContext" in injected channel configuration)
mbed_official	237:f3da66175598	4130	and if a new injected context is set when queue is full (maximum 2
mbed_official	237:f3da66175598	4131	contexts).
mbed_official	237:f3da66175598	4132	* @param hadc: ADC handle
mbed_official	237:f3da66175598	4133	* @retval None
mbed_official	237:f3da66175598	4134	*/
mbed_official	237:f3da66175598	4135	__weak void HAL_ADCEx_InjectedQueueOverflowCallback(ADC_HandleTypeDef* hadc)
mbed_official	237:f3da66175598	4136	{
mbed_official	237:f3da66175598	4137	/* NOTE : This function should not be modified. When the callback is needed,
mbed_official	237:f3da66175598	4138	function HAL_ADCEx_InjectedQueueOverflowCallback must be implemented
mbed_official	237:f3da66175598	4139	in the user file.
mbed_official	237:f3da66175598	4140	*/
mbed_official	237:f3da66175598	4141	}
mbed_official	237:f3da66175598	4142	#endif /* STM32F303xC \|\| STM32F358xx \|\| STM32F302xC \|\| STM32F303x8 \|\| STM32F328xx \|\| STM32F334x8 \|\| STM32F301x8 \|\| STM32F318xx \|\| STM32F302x8 */
mbed_official	237:f3da66175598	4143
mbed_official	237:f3da66175598	4144
mbed_official	237:f3da66175598	4145
mbed_official	237:f3da66175598	4146	/**
mbed_official	237:f3da66175598	4147	* @}
mbed_official	237:f3da66175598	4148	*/
mbed_official	237:f3da66175598	4149
mbed_official	237:f3da66175598	4150	/** @defgroup ADCEx_Group3 Extended Peripheral Control functions
mbed_official	237:f3da66175598	4151	* @brief Extended Peripheral Control functions
mbed_official	237:f3da66175598	4152	*
mbed_official	237:f3da66175598	4153	@verbatim
mbed_official	237:f3da66175598	4154	===============================================================================
mbed_official	237:f3da66175598	4155	##### Peripheral Control functions #####
mbed_official	237:f3da66175598	4156	===============================================================================
mbed_official	237:f3da66175598	4157	[..] This section provides functions allowing to:
mbed_official	237:f3da66175598	4158	(+) Configure channels on regular group
mbed_official	237:f3da66175598	4159	(+) Configure channels on injected group
mbed_official	237:f3da66175598	4160	(+) Configure multimode
mbed_official	237:f3da66175598	4161	(+) Configure the analog watchdog
mbed_official	237:f3da66175598	4162
mbed_official	237:f3da66175598	4163	@endverbatim
mbed_official	237:f3da66175598	4164	* @{
mbed_official	237:f3da66175598	4165	*/
mbed_official	237:f3da66175598	4166
mbed_official	237:f3da66175598	4167
mbed_official	237:f3da66175598	4168	#if defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| defined(STM32F302xC) \|\| defined(STM32F303x8) \|\| defined(STM32F328xx) \|\| defined(STM32F334x8) \|\| defined(STM32F301x8) \|\| defined(STM32F318xx) \|\| defined(STM32F302x8)
mbed_official	237:f3da66175598	4169	/**
mbed_official	237:f3da66175598	4170	* @brief Configures the the selected channel to be linked to the regular
mbed_official	237:f3da66175598	4171	* group.
mbed_official	237:f3da66175598	4172	* @note In case of usage of internal measurement channels:
mbed_official	237:f3da66175598	4173	* Vbat/VrefInt/TempSensor.
mbed_official	237:f3da66175598	4174	* The recommended sampling time is at least:
mbed_official	237:f3da66175598	4175	* - For devices STM32F37x: 17.1us for temperature sensor
mbed_official	237:f3da66175598	4176	* - For the other STM32F3 devices: 2.2us for each of channels
mbed_official	237:f3da66175598	4177	* Vbat/VrefInt/TempSensor.
mbed_official	237:f3da66175598	4178	* These internal paths can be be disabled using function
mbed_official	237:f3da66175598	4179	* HAL_ADC_DeInit().
mbed_official	237:f3da66175598	4180	* @note Possibility to update parameters on the fly:
mbed_official	237:f3da66175598	4181	* This function initializes channel into regular group, following
mbed_official	237:f3da66175598	4182	* calls to this function can be used to reconfigure some parameters
mbed_official	237:f3da66175598	4183	* of structure "ADC_ChannelConfTypeDef" on the fly, without reseting
mbed_official	237:f3da66175598	4184	* the ADC.
mbed_official	237:f3da66175598	4185	* The setting of these parameters is conditioned to ADC state.
mbed_official	237:f3da66175598	4186	* For parameters constraints, see comments of structure
mbed_official	237:f3da66175598	4187	* "ADC_ChannelConfTypeDef".
mbed_official	237:f3da66175598	4188	* @param hadc: ADC handle
mbed_official	237:f3da66175598	4189	* @param sConfig: Structure ADC channel for regular group.
mbed_official	237:f3da66175598	4190	* @retval HAL status
mbed_official	237:f3da66175598	4191	*/
mbed_official	237:f3da66175598	4192	HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
mbed_official	237:f3da66175598	4193	{
mbed_official	237:f3da66175598	4194	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	237:f3da66175598	4195	ADC_Common_TypeDef *tmpADC_Common;
mbed_official	237:f3da66175598	4196	ADC_HandleTypeDef tmphadcSharingSameCommonRegister;
mbed_official	237:f3da66175598	4197	uint32_t tmpOffsetShifted;
mbed_official	237:f3da66175598	4198	uint32_t WaitLoopIndex = 0;
mbed_official	237:f3da66175598	4199
mbed_official	237:f3da66175598	4200	/* Check the parameters */
mbed_official	237:f3da66175598	4201	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	4202	assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank));
mbed_official	237:f3da66175598	4203	assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
mbed_official	237:f3da66175598	4204	assert_param(IS_ADC_SINGLE_DIFFERENTIAL(sConfig->SingleDiff));
mbed_official	237:f3da66175598	4205	assert_param(IS_ADC_OFFSET_NUMBER(sConfig->OffsetNumber));
mbed_official	237:f3da66175598	4206	assert_param(IS_ADC_RANGE(__HAL_ADC_GET_RESOLUTION(hadc), sConfig->Offset));
mbed_official	237:f3da66175598	4207
mbed_official	237:f3da66175598	4208
mbed_official	237:f3da66175598	4209	/* Verification of channel number: Channels 1 to 14 are available in */
mbed_official	237:f3da66175598	4210	/* differential mode. Channels 15, 16, 17, 18 can be used only in */
mbed_official	237:f3da66175598	4211	/* single-ended mode. */
mbed_official	237:f3da66175598	4212	if (sConfig->SingleDiff != ADC_DIFFERENTIAL_ENDED)
mbed_official	237:f3da66175598	4213	{
mbed_official	237:f3da66175598	4214	assert_param(IS_ADC_CHANNEL(sConfig->Channel));
mbed_official	237:f3da66175598	4215	}
mbed_official	237:f3da66175598	4216	else
mbed_official	237:f3da66175598	4217	{
mbed_official	237:f3da66175598	4218	assert_param(IS_ADC_DIFF_CHANNEL(sConfig->Channel));
mbed_official	237:f3da66175598	4219	}
mbed_official	237:f3da66175598	4220
mbed_official	237:f3da66175598	4221	/* Process locked */
mbed_official	237:f3da66175598	4222	__HAL_LOCK(hadc);
mbed_official	237:f3da66175598	4223
mbed_official	237:f3da66175598	4224
mbed_official	237:f3da66175598	4225	/* Parameters update conditioned to ADC state: */
mbed_official	237:f3da66175598	4226	/* Parameters that can be updated when ADC is disabled or enabled without */
mbed_official	237:f3da66175598	4227	/* conversion on going on regular group: */
mbed_official	237:f3da66175598	4228	/* - Channel number */
mbed_official	237:f3da66175598	4229	/* - Channel rank */
mbed_official	237:f3da66175598	4230	if (__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
mbed_official	237:f3da66175598	4231	{
mbed_official	237:f3da66175598	4232	/* Regular sequence configuration */
mbed_official	237:f3da66175598	4233	/* For Rank 1 to 4 */
mbed_official	237:f3da66175598	4234	if (sConfig->Rank < 5)
mbed_official	237:f3da66175598	4235	{
mbed_official	237:f3da66175598	4236	/* Clear the old SQx bits for the selected rank */
mbed_official	237:f3da66175598	4237	hadc->Instance->SQR1 &= ~__HAL_ADC_SQR1_RK(ADC_SQR2_SQ5, sConfig->Rank);
mbed_official	237:f3da66175598	4238
mbed_official	237:f3da66175598	4239	/* Set the SQx bits for the selected rank */
mbed_official	237:f3da66175598	4240	hadc->Instance->SQR1 \|= __HAL_ADC_SQR1_RK(sConfig->Channel, sConfig->Rank);
mbed_official	237:f3da66175598	4241	}
mbed_official	237:f3da66175598	4242	/* For Rank 5 to 9 */
mbed_official	237:f3da66175598	4243	else if (sConfig->Rank < 10)
mbed_official	237:f3da66175598	4244	{
mbed_official	237:f3da66175598	4245	/* Clear the old SQx bits for the selected rank */
mbed_official	237:f3da66175598	4246	hadc->Instance->SQR2 &= ~__HAL_ADC_SQR2_RK(ADC_SQR2_SQ5, sConfig->Rank);
mbed_official	237:f3da66175598	4247
mbed_official	237:f3da66175598	4248	/* Set the SQx bits for the selected rank */
mbed_official	237:f3da66175598	4249	hadc->Instance->SQR2 \|= __HAL_ADC_SQR2_RK(sConfig->Channel, sConfig->Rank);
mbed_official	237:f3da66175598	4250	}
mbed_official	237:f3da66175598	4251	/* For Rank 10 to 14 */
mbed_official	237:f3da66175598	4252	else if (sConfig->Rank < 15)
mbed_official	237:f3da66175598	4253	{
mbed_official	237:f3da66175598	4254	/* Clear the old SQx bits for the selected rank */
mbed_official	237:f3da66175598	4255	hadc->Instance->SQR3 &= ~__HAL_ADC_SQR3_RK(ADC_SQR3_SQ10, sConfig->Rank);
mbed_official	237:f3da66175598	4256
mbed_official	237:f3da66175598	4257	/* Set the SQx bits for the selected rank */
mbed_official	237:f3da66175598	4258	hadc->Instance->SQR3 \|= __HAL_ADC_SQR3_RK(sConfig->Channel, sConfig->Rank);
mbed_official	237:f3da66175598	4259	}
mbed_official	237:f3da66175598	4260	/* For Rank 15 to 16 */
mbed_official	237:f3da66175598	4261	else
mbed_official	237:f3da66175598	4262	{
mbed_official	237:f3da66175598	4263	/* Clear the old SQx bits for the selected rank */
mbed_official	237:f3da66175598	4264	hadc->Instance->SQR4 &= ~__HAL_ADC_SQR4_RK(ADC_SQR4_SQ15, sConfig->Rank);
mbed_official	237:f3da66175598	4265
mbed_official	237:f3da66175598	4266	/* Set the SQx bits for the selected rank */
mbed_official	237:f3da66175598	4267	hadc->Instance->SQR4 \|= __HAL_ADC_SQR4_RK(sConfig->Channel, sConfig->Rank);
mbed_official	237:f3da66175598	4268	}
mbed_official	237:f3da66175598	4269
mbed_official	237:f3da66175598	4270
mbed_official	237:f3da66175598	4271	/* Parameters update conditioned to ADC state: */
mbed_official	237:f3da66175598	4272	/* Parameters that can be updated when ADC is disabled or enabled without */
mbed_official	237:f3da66175598	4273	/* conversion on going on regular group: */
mbed_official	237:f3da66175598	4274	/* - Channel sampling time */
mbed_official	237:f3da66175598	4275	/* - Channel offset */
mbed_official	237:f3da66175598	4276	if (__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET)
mbed_official	237:f3da66175598	4277	{
mbed_official	237:f3da66175598	4278	/* Channel sampling time configuration */
mbed_official	237:f3da66175598	4279	/* For channels 10 to 18 */
mbed_official	237:f3da66175598	4280	if (sConfig->Channel > ADC_CHANNEL_10)
mbed_official	237:f3da66175598	4281	{
mbed_official	237:f3da66175598	4282	/* Clear the old sample time */
mbed_official	237:f3da66175598	4283	hadc->Instance->SMPR2 &= ~__HAL_ADC_SMPR2(ADC_SMPR1_SMP0, sConfig->Channel);
mbed_official	237:f3da66175598	4284
mbed_official	237:f3da66175598	4285	/* Set the new sample time */
mbed_official	237:f3da66175598	4286	hadc->Instance->SMPR2 \|= __HAL_ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel);
mbed_official	237:f3da66175598	4287	}
mbed_official	237:f3da66175598	4288	else /* For channels 0 to 9 */
mbed_official	237:f3da66175598	4289	{
mbed_official	237:f3da66175598	4290	/* Clear the old sample time */
mbed_official	237:f3da66175598	4291	hadc->Instance->SMPR1 &= ~__HAL_ADC_SMPR1(ADC_SMPR2_SMP10, sConfig->Channel);
mbed_official	237:f3da66175598	4292
mbed_official	237:f3da66175598	4293	/* Set the new sample time */
mbed_official	237:f3da66175598	4294	hadc->Instance->SMPR1 \|= __HAL_ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel);
mbed_official	237:f3da66175598	4295	}
mbed_official	237:f3da66175598	4296
mbed_official	237:f3da66175598	4297
mbed_official	237:f3da66175598	4298	/* Configure the offset: offset enable/disable, channel, offset value */
mbed_official	237:f3da66175598	4299
mbed_official	237:f3da66175598	4300	/* Shift the offset in function of the selected ADC resolution. */
mbed_official	237:f3da66175598	4301	/* Offset has to be left-aligned on bit 11, the LSB (right bits) are set to 0 */
mbed_official	237:f3da66175598	4302	tmpOffsetShifted = __HAL_ADC_OFFSET_SHIFT_RESOLUTION(hadc, sConfig->Offset);
mbed_official	237:f3da66175598	4303
mbed_official	237:f3da66175598	4304	switch (sConfig->OffsetNumber)
mbed_official	237:f3da66175598	4305	{
mbed_official	237:f3da66175598	4306	case ADC_OFFSET_1:
mbed_official	237:f3da66175598	4307	/* Configure offset register 1: */
mbed_official	237:f3da66175598	4308	/* - Enable offset */
mbed_official	237:f3da66175598	4309	/* - Set channel number */
mbed_official	237:f3da66175598	4310	/* - Set offset value */
mbed_official	237:f3da66175598	4311	hadc->Instance->OFR1 &= ~( ADC_OFR1_OFFSET1_CH \|
mbed_official	237:f3da66175598	4312	ADC_OFR1_OFFSET1 );
mbed_official	237:f3da66175598	4313	hadc->Instance->OFR1 \|= ( ADC_OFR1_OFFSET1_EN \|
mbed_official	237:f3da66175598	4314	__HAL_ADC_OFR_CHANNEL(sConfig->Channel) \|
mbed_official	237:f3da66175598	4315	tmpOffsetShifted );
mbed_official	237:f3da66175598	4316	break;
mbed_official	237:f3da66175598	4317
mbed_official	237:f3da66175598	4318	case ADC_OFFSET_2:
mbed_official	237:f3da66175598	4319	/* Configure offset register 2: */
mbed_official	237:f3da66175598	4320	/* - Enable offset */
mbed_official	237:f3da66175598	4321	/* - Set channel number */
mbed_official	237:f3da66175598	4322	/* - Set offset value */
mbed_official	237:f3da66175598	4323	hadc->Instance->OFR2 &= ~( ADC_OFR2_OFFSET2_CH \|
mbed_official	237:f3da66175598	4324	ADC_OFR2_OFFSET2 );
mbed_official	237:f3da66175598	4325	hadc->Instance->OFR2 \|= ( ADC_OFR2_OFFSET2_EN \|
mbed_official	237:f3da66175598	4326	__HAL_ADC_OFR_CHANNEL(sConfig->Channel) \|
mbed_official	237:f3da66175598	4327	tmpOffsetShifted );
mbed_official	237:f3da66175598	4328	break;
mbed_official	237:f3da66175598	4329
mbed_official	237:f3da66175598	4330	case ADC_OFFSET_3:
mbed_official	237:f3da66175598	4331	/* Configure offset register 3: */
mbed_official	237:f3da66175598	4332	/* - Enable offset */
mbed_official	237:f3da66175598	4333	/* - Set channel number */
mbed_official	237:f3da66175598	4334	/* - Set offset value */
mbed_official	237:f3da66175598	4335	hadc->Instance->OFR3 &= ~( ADC_OFR3_OFFSET3_CH \|
mbed_official	237:f3da66175598	4336	ADC_OFR3_OFFSET3 );
mbed_official	237:f3da66175598	4337	hadc->Instance->OFR3 \|= ( ADC_OFR3_OFFSET3_EN \|
mbed_official	237:f3da66175598	4338	__HAL_ADC_OFR_CHANNEL(sConfig->Channel) \|
mbed_official	237:f3da66175598	4339	tmpOffsetShifted );
mbed_official	237:f3da66175598	4340	break;
mbed_official	237:f3da66175598	4341
mbed_official	237:f3da66175598	4342	case ADC_OFFSET_4:
mbed_official	237:f3da66175598	4343	/* Configure offset register 1: */
mbed_official	237:f3da66175598	4344	/* - Enable offset */
mbed_official	237:f3da66175598	4345	/* - Set channel number */
mbed_official	237:f3da66175598	4346	/* - Set offset value */
mbed_official	237:f3da66175598	4347	hadc->Instance->OFR4 &= ~( ADC_OFR4_OFFSET4_CH \|
mbed_official	237:f3da66175598	4348	ADC_OFR4_OFFSET4 );
mbed_official	237:f3da66175598	4349	hadc->Instance->OFR4 \|= ( ADC_OFR4_OFFSET4_EN \|
mbed_official	237:f3da66175598	4350	__HAL_ADC_OFR_CHANNEL(sConfig->Channel) \|
mbed_official	237:f3da66175598	4351	tmpOffsetShifted );
mbed_official	237:f3da66175598	4352	break;
mbed_official	237:f3da66175598	4353
mbed_official	237:f3da66175598	4354	/* Case ADC_OFFSET_NONE */
mbed_official	237:f3da66175598	4355	default :
mbed_official	237:f3da66175598	4356	/* Scan OFR1, OFR2, OFR3, OFR4 to check if the selected channel is enabled. If this is the case, offset OFRx is disabled. */
mbed_official	237:f3da66175598	4357	if (((hadc->Instance->OFR1) & ADC_OFR1_OFFSET1_CH) == __HAL_ADC_OFR_CHANNEL(sConfig->Channel))
mbed_official	237:f3da66175598	4358	{
mbed_official	237:f3da66175598	4359	/* Disable offset OFR1*/
mbed_official	237:f3da66175598	4360	hadc->Instance->OFR1 &= ~ADC_OFR1_OFFSET1_EN;
mbed_official	237:f3da66175598	4361	}
mbed_official	237:f3da66175598	4362	if (((hadc->Instance->OFR2) & ADC_OFR2_OFFSET2_CH) == __HAL_ADC_OFR_CHANNEL(sConfig->Channel))
mbed_official	237:f3da66175598	4363	{
mbed_official	237:f3da66175598	4364	/* Disable offset OFR2*/
mbed_official	237:f3da66175598	4365	hadc->Instance->OFR2 &= ~ADC_OFR2_OFFSET2_EN;
mbed_official	237:f3da66175598	4366	}
mbed_official	237:f3da66175598	4367	if (((hadc->Instance->OFR3) & ADC_OFR3_OFFSET3_CH) == __HAL_ADC_OFR_CHANNEL(sConfig->Channel))
mbed_official	237:f3da66175598	4368	{
mbed_official	237:f3da66175598	4369	/* Disable offset OFR3*/
mbed_official	237:f3da66175598	4370	hadc->Instance->OFR3 &= ~ADC_OFR3_OFFSET3_EN;
mbed_official	237:f3da66175598	4371	}
mbed_official	237:f3da66175598	4372	if (((hadc->Instance->OFR4) & ADC_OFR4_OFFSET4_CH) == __HAL_ADC_OFR_CHANNEL(sConfig->Channel))
mbed_official	237:f3da66175598	4373	{
mbed_official	237:f3da66175598	4374	/* Disable offset OFR4*/
mbed_official	237:f3da66175598	4375	hadc->Instance->OFR4 &= ~ADC_OFR4_OFFSET4_EN;
mbed_official	237:f3da66175598	4376	}
mbed_official	237:f3da66175598	4377	break;
mbed_official	237:f3da66175598	4378	}
mbed_official	237:f3da66175598	4379
mbed_official	237:f3da66175598	4380	}
mbed_official	237:f3da66175598	4381
mbed_official	237:f3da66175598	4382
mbed_official	237:f3da66175598	4383	/* Parameters update conditioned to ADC state: */
mbed_official	237:f3da66175598	4384	/* Parameters that can be updated only when ADC is disabled: */
mbed_official	237:f3da66175598	4385	/* - Single or differential mode */
mbed_official	237:f3da66175598	4386	/* - Internal measurement channels: Vbat/VrefInt/TempSensor */
mbed_official	237:f3da66175598	4387	if (__HAL_ADC_IS_ENABLED(hadc) == RESET)
mbed_official	237:f3da66175598	4388	{
mbed_official	237:f3da66175598	4389	/* Configuration of differential mode */
mbed_official	237:f3da66175598	4390	if (sConfig->SingleDiff != ADC_DIFFERENTIAL_ENDED)
mbed_official	237:f3da66175598	4391	{
mbed_official	237:f3da66175598	4392	/* Disable differential mode (default mode: single-ended) */
mbed_official	237:f3da66175598	4393	hadc->Instance->DIFSEL &= ~(__HAL_ADC_DIFSEL_CHANNEL(sConfig->Channel));
mbed_official	237:f3da66175598	4394	}
mbed_official	237:f3da66175598	4395	else
mbed_official	237:f3da66175598	4396	{
mbed_official	237:f3da66175598	4397	/* Enable differential mode */
mbed_official	237:f3da66175598	4398	hadc->Instance->DIFSEL \|= __HAL_ADC_DIFSEL_CHANNEL(sConfig->Channel);
mbed_official	237:f3da66175598	4399
mbed_official	237:f3da66175598	4400	/* Sampling time configuration of channel ADC_IN+1 (negative input) */
mbed_official	237:f3da66175598	4401	/* For channels 10 to 18 */
mbed_official	237:f3da66175598	4402	if (sConfig->Channel > ADC_CHANNEL_10)
mbed_official	237:f3da66175598	4403	{
mbed_official	237:f3da66175598	4404	/* Clear the old sample time */
mbed_official	237:f3da66175598	4405	hadc->Instance->SMPR2 &= ~__HAL_ADC_SMPR2(ADC_SMPR1_SMP0, (sConfig->Channel +1));
mbed_official	237:f3da66175598	4406
mbed_official	237:f3da66175598	4407	/* Set the new sample time */
mbed_official	237:f3da66175598	4408	hadc->Instance->SMPR2 \|= __HAL_ADC_SMPR2(sConfig->SamplingTime, (sConfig->Channel +1));
mbed_official	237:f3da66175598	4409	}
mbed_official	237:f3da66175598	4410	else /* For channels 0 to 9 */
mbed_official	237:f3da66175598	4411	{
mbed_official	237:f3da66175598	4412	/* Clear the old sample time */
mbed_official	237:f3da66175598	4413	hadc->Instance->SMPR1 &= ~__HAL_ADC_SMPR1(ADC_SMPR2_SMP10, (sConfig->Channel +1));
mbed_official	237:f3da66175598	4414
mbed_official	237:f3da66175598	4415	/* Set the new sample time */
mbed_official	237:f3da66175598	4416	hadc->Instance->SMPR1 \|= __HAL_ADC_SMPR1(sConfig->SamplingTime, (sConfig->Channel +1));
mbed_official	237:f3da66175598	4417	}
mbed_official	237:f3da66175598	4418	}
mbed_official	237:f3da66175598	4419
mbed_official	237:f3da66175598	4420
mbed_official	237:f3da66175598	4421	/* Management of internal measurement channels: Vbat/VrefInt/TempSensor */
mbed_official	237:f3da66175598	4422	/* internal measurement paths enable: If internal channel selected, */
mbed_official	237:f3da66175598	4423	/* enable dedicated internal buffers and path. */
mbed_official	237:f3da66175598	4424	/* Note: these internal measurement paths can be disabled using */
mbed_official	237:f3da66175598	4425	/* HAL_ADC_DeInit(). */
mbed_official	237:f3da66175598	4426
mbed_official	237:f3da66175598	4427	/* Configuration of common ADC parameters */
mbed_official	237:f3da66175598	4428	/* Pointer to the common control register to which is belonging hadc */
mbed_official	237:f3da66175598	4429	/* (Depending on STM32F3 product, there may be up to 4 ADC and 2 common */
mbed_official	237:f3da66175598	4430	/* control registers) */
mbed_official	237:f3da66175598	4431	tmpADC_Common = __HAL_ADC_COMMON_REGISTER(hadc);
mbed_official	237:f3da66175598	4432
mbed_official	237:f3da66175598	4433	/* If the requested internal measurement path has already been enabled, */
mbed_official	237:f3da66175598	4434	/* bypass the configuration processing. */
mbed_official	237:f3da66175598	4435	if (( (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) &&
mbed_official	237:f3da66175598	4436	(HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_TSEN)) ) \|\|
mbed_official	237:f3da66175598	4437	( (sConfig->Channel == ADC_CHANNEL_VBAT) &&
mbed_official	237:f3da66175598	4438	(HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_VBATEN)) ) \|\|
mbed_official	237:f3da66175598	4439	( (sConfig->Channel == ADC_CHANNEL_VREFINT) &&
mbed_official	237:f3da66175598	4440	(HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_VREFEN)))
mbed_official	237:f3da66175598	4441	)
mbed_official	237:f3da66175598	4442	{
mbed_official	237:f3da66175598	4443	/* Configuration of common ADC parameters (continuation) */
mbed_official	237:f3da66175598	4444	/* Set handle of the other ADC sharing the same common register */
mbed_official	237:f3da66175598	4445	__HAL_ADC_COMMON_ADC_OTHER(hadc, &tmphadcSharingSameCommonRegister);
mbed_official	237:f3da66175598	4446
mbed_official	237:f3da66175598	4447	/* Software is allowed to change common parameters only when all ADCs */
mbed_official	237:f3da66175598	4448	/* of the common group are disabled. */
mbed_official	237:f3da66175598	4449	if ((__HAL_ADC_IS_ENABLED(hadc) == RESET) &&
mbed_official	237:f3da66175598	4450	( (tmphadcSharingSameCommonRegister.Instance == NULL) \|\|
mbed_official	237:f3da66175598	4451	(__HAL_ADC_IS_ENABLED(&tmphadcSharingSameCommonRegister) == RESET) ))
mbed_official	237:f3da66175598	4452	{
mbed_official	237:f3da66175598	4453	/* If Channel_16 is selected, enable Temp. sensor measurement path */
mbed_official	237:f3da66175598	4454	/* Note: Temp. sensor internal channels available on ADC1 only */
mbed_official	237:f3da66175598	4455	if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) && (hadc->Instance == ADC1))
mbed_official	237:f3da66175598	4456	{
mbed_official	237:f3da66175598	4457	tmpADC_Common->CCR \|= ADC_CCR_TSEN;
mbed_official	237:f3da66175598	4458
mbed_official	237:f3da66175598	4459	/* Delay for temperature sensor stabilization time */
mbed_official	237:f3da66175598	4460	while(WaitLoopIndex < ADC_TEMPSENSOR_DELAY_CPU_CYCLES)
mbed_official	237:f3da66175598	4461	{
mbed_official	237:f3da66175598	4462	WaitLoopIndex++;
mbed_official	237:f3da66175598	4463	}
mbed_official	237:f3da66175598	4464	}
mbed_official	237:f3da66175598	4465	/* If Channel_17 is selected, enable VBAT measurement path */
mbed_official	237:f3da66175598	4466	/* Note: VBAT internal channels available on ADC1 only */
mbed_official	237:f3da66175598	4467	else if ((sConfig->Channel == ADC_CHANNEL_VBAT) && (hadc->Instance == ADC1))
mbed_official	237:f3da66175598	4468	{
mbed_official	237:f3da66175598	4469	tmpADC_Common->CCR \|= ADC_CCR_VBATEN;
mbed_official	237:f3da66175598	4470	}
mbed_official	237:f3da66175598	4471	/* If Channel_18 is selected, enable VREFINT measurement path */
mbed_official	237:f3da66175598	4472	/* Note: VrefInt internal channels available on all ADCs, but only */
mbed_official	237:f3da66175598	4473	/* one ADC is allowed to be connected to VrefInt at the same */
mbed_official	237:f3da66175598	4474	/* time. */
mbed_official	237:f3da66175598	4475	else if (sConfig->Channel == ADC_CHANNEL_VREFINT)
mbed_official	237:f3da66175598	4476	{
mbed_official	237:f3da66175598	4477	tmpADC_Common->CCR \|= ADC_CCR_VREFEN;
mbed_official	237:f3da66175598	4478	}
mbed_official	237:f3da66175598	4479	}
mbed_official	237:f3da66175598	4480	/* If the requested internal measurement path has already been */
mbed_official	237:f3da66175598	4481	/* enabled and other ADC of the common group are enabled, internal */
mbed_official	237:f3da66175598	4482	/* measurement paths cannot be enabled. */
mbed_official	237:f3da66175598	4483	else
mbed_official	237:f3da66175598	4484	{
mbed_official	237:f3da66175598	4485	/* Update ADC state machine to error */
mbed_official	237:f3da66175598	4486	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	4487
mbed_official	237:f3da66175598	4488	tmpHALStatus = HAL_ERROR;
mbed_official	237:f3da66175598	4489	}
mbed_official	237:f3da66175598	4490	}
mbed_official	237:f3da66175598	4491
mbed_official	237:f3da66175598	4492	}
mbed_official	237:f3da66175598	4493
mbed_official	237:f3da66175598	4494	}
mbed_official	237:f3da66175598	4495	/* If a conversion is on going on regular group, no update on regular */
mbed_official	237:f3da66175598	4496	/* channel could be done on neither of the channel configuration structure */
mbed_official	237:f3da66175598	4497	/* parameters. */
mbed_official	237:f3da66175598	4498	else
mbed_official	237:f3da66175598	4499	{
mbed_official	237:f3da66175598	4500	/* Update ADC state machine to error */
mbed_official	237:f3da66175598	4501	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	4502
mbed_official	237:f3da66175598	4503	tmpHALStatus = HAL_ERROR;
mbed_official	237:f3da66175598	4504	}
mbed_official	237:f3da66175598	4505
mbed_official	237:f3da66175598	4506	/* Process unlocked */
mbed_official	237:f3da66175598	4507	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	4508
mbed_official	237:f3da66175598	4509	/* Return function status */
mbed_official	237:f3da66175598	4510	return tmpHALStatus;
mbed_official	237:f3da66175598	4511	}
mbed_official	237:f3da66175598	4512	#endif /* STM32F303xC \|\| STM32F358xx \|\| STM32F302xC \|\| STM32F303x8 \|\| STM32F328xx \|\| STM32F334x8 \|\| STM32F301x8 \|\| STM32F318xx \|\| STM32F302x8 */
mbed_official	237:f3da66175598	4513
mbed_official	237:f3da66175598	4514	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	237:f3da66175598	4515	/**
mbed_official	237:f3da66175598	4516	* @brief Configures the the selected channel to be linked to the regular
mbed_official	237:f3da66175598	4517	* group.
mbed_official	237:f3da66175598	4518	* @note In case of usage of internal measurement channels:
mbed_official	237:f3da66175598	4519	* Vbat/VrefInt/TempSensor.
mbed_official	237:f3da66175598	4520	* The recommended sampling time is at least:
mbed_official	237:f3da66175598	4521	* - For devices STM32F37x: 17.1us for temperature sensor
mbed_official	237:f3da66175598	4522	* - For the other STM32F3 devices: 2.2us for each of channels
mbed_official	237:f3da66175598	4523	* Vbat/VrefInt/TempSensor.
mbed_official	237:f3da66175598	4524	* These internal paths can be be disabled using function
mbed_official	237:f3da66175598	4525	* HAL_ADC_DeInit().
mbed_official	237:f3da66175598	4526	* @note Possibility to update parameters on the fly:
mbed_official	237:f3da66175598	4527	* This function initializes channel into regular group, following
mbed_official	237:f3da66175598	4528	* calls to this function can be used to reconfigure some parameters
mbed_official	237:f3da66175598	4529	* of structure "ADC_ChannelConfTypeDef" on the fly, without reseting
mbed_official	237:f3da66175598	4530	* the ADC.
mbed_official	237:f3da66175598	4531	* The setting of these parameters is conditioned to ADC state.
mbed_official	237:f3da66175598	4532	* For parameters constraints, see comments of structure
mbed_official	237:f3da66175598	4533	* "ADC_ChannelConfTypeDef".
mbed_official	237:f3da66175598	4534	* @param hadc: ADC handle
mbed_official	237:f3da66175598	4535	* @param sConfig: Structure of ADC channel for regular group.
mbed_official	237:f3da66175598	4536	* @retval HAL status
mbed_official	237:f3da66175598	4537	*/
mbed_official	237:f3da66175598	4538	HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
mbed_official	237:f3da66175598	4539	{
mbed_official	237:f3da66175598	4540	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	237:f3da66175598	4541
mbed_official	237:f3da66175598	4542	/* Check the parameters */
mbed_official	237:f3da66175598	4543	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	4544	assert_param(IS_ADC_CHANNEL(sConfig->Channel));
mbed_official	237:f3da66175598	4545	assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank));
mbed_official	237:f3da66175598	4546	assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
mbed_official	237:f3da66175598	4547
mbed_official	237:f3da66175598	4548	/* Process locked */
mbed_official	237:f3da66175598	4549	__HAL_LOCK(hadc);
mbed_official	237:f3da66175598	4550
mbed_official	237:f3da66175598	4551
mbed_official	237:f3da66175598	4552	/* Regular sequence configuration */
mbed_official	237:f3da66175598	4553	/* For Rank 1 to 6 */
mbed_official	237:f3da66175598	4554	if (sConfig->Rank < 7)
mbed_official	237:f3da66175598	4555	{
mbed_official	237:f3da66175598	4556	/* Clear the old SQx bits for the selected rank */
mbed_official	237:f3da66175598	4557	hadc->Instance->SQR3 &= ~__HAL_ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank);
mbed_official	237:f3da66175598	4558
mbed_official	237:f3da66175598	4559	/* Set the SQx bits for the selected rank */
mbed_official	237:f3da66175598	4560	hadc->Instance->SQR3 \|= __HAL_ADC_SQR3_RK(sConfig->Channel, sConfig->Rank);
mbed_official	237:f3da66175598	4561	}
mbed_official	237:f3da66175598	4562	/* For Rank 7 to 12 */
mbed_official	237:f3da66175598	4563	else if (sConfig->Rank < 13)
mbed_official	237:f3da66175598	4564	{
mbed_official	237:f3da66175598	4565	/* Clear the old SQx bits for the selected rank */
mbed_official	237:f3da66175598	4566	hadc->Instance->SQR2 &= ~__HAL_ADC_SQR2_RK(ADC_SQR2_SQ7, sConfig->Rank);
mbed_official	237:f3da66175598	4567
mbed_official	237:f3da66175598	4568	/* Set the SQx bits for the selected rank */
mbed_official	237:f3da66175598	4569	hadc->Instance->SQR2 \|= __HAL_ADC_SQR2_RK(sConfig->Channel, sConfig->Rank);
mbed_official	237:f3da66175598	4570	}
mbed_official	237:f3da66175598	4571	/* For Rank 13 to 16 */
mbed_official	237:f3da66175598	4572	else
mbed_official	237:f3da66175598	4573	{
mbed_official	237:f3da66175598	4574	/* Clear the old SQx bits for the selected rank */
mbed_official	237:f3da66175598	4575	hadc->Instance->SQR1 &= ~__HAL_ADC_SQR1_RK(ADC_SQR1_SQ13, sConfig->Rank);
mbed_official	237:f3da66175598	4576
mbed_official	237:f3da66175598	4577	/* Set the SQx bits for the selected rank */
mbed_official	237:f3da66175598	4578	hadc->Instance->SQR1 \|= __HAL_ADC_SQR1_RK(sConfig->Channel, sConfig->Rank);
mbed_official	237:f3da66175598	4579	}
mbed_official	237:f3da66175598	4580
mbed_official	237:f3da66175598	4581	/* Channel sampling time configuration */
mbed_official	237:f3da66175598	4582	/* For channels 10 to 18 */
mbed_official	237:f3da66175598	4583	if (sConfig->Channel > ADC_CHANNEL_10)
mbed_official	237:f3da66175598	4584	{
mbed_official	237:f3da66175598	4585	/* Clear the old sample time */
mbed_official	237:f3da66175598	4586	hadc->Instance->SMPR1 &= ~__HAL_ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel);
mbed_official	237:f3da66175598	4587
mbed_official	237:f3da66175598	4588	/* Set the new sample time */
mbed_official	237:f3da66175598	4589	hadc->Instance->SMPR1 \|= __HAL_ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel);
mbed_official	237:f3da66175598	4590	}
mbed_official	237:f3da66175598	4591	else /* For channels 0 to 9 */
mbed_official	237:f3da66175598	4592	{
mbed_official	237:f3da66175598	4593	/* Clear the old sample time */
mbed_official	237:f3da66175598	4594	hadc->Instance->SMPR2 &= ~__HAL_ADC_SMPR2(ADC_SMPR2_SMP0, sConfig->Channel);
mbed_official	237:f3da66175598	4595
mbed_official	237:f3da66175598	4596	/* Set the new sample time */
mbed_official	237:f3da66175598	4597	hadc->Instance->SMPR2 \|= __HAL_ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel);
mbed_official	237:f3da66175598	4598	}
mbed_official	237:f3da66175598	4599
mbed_official	237:f3da66175598	4600	/* if ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor / VREFINT measurement path */
mbed_official	237:f3da66175598	4601	if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) \|\| (sConfig->Channel == ADC_CHANNEL_VREFINT))
mbed_official	237:f3da66175598	4602	{
mbed_official	237:f3da66175598	4603	hadc->Instance->CR2 \|= ADC_CR2_TSVREFE;
mbed_official	237:f3da66175598	4604	}
mbed_official	237:f3da66175598	4605
mbed_official	237:f3da66175598	4606	/* if ADC1 Channel_17 is selected, enable VBAT measurement path */
mbed_official	237:f3da66175598	4607	else if (sConfig->Channel == ADC_CHANNEL_VBAT)
mbed_official	237:f3da66175598	4608	{
mbed_official	237:f3da66175598	4609	SYSCFG->CFGR1 \|= SYSCFG_CFGR1_VBAT;
mbed_official	237:f3da66175598	4610	}
mbed_official	237:f3da66175598	4611
mbed_official	237:f3da66175598	4612
mbed_official	237:f3da66175598	4613	/* Process unlocked */
mbed_official	237:f3da66175598	4614	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	4615
mbed_official	237:f3da66175598	4616	/* Return function status */
mbed_official	237:f3da66175598	4617	return tmpHALStatus;
mbed_official	237:f3da66175598	4618	}
mbed_official	237:f3da66175598	4619	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	237:f3da66175598	4620
mbed_official	237:f3da66175598	4621	#if defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| defined(STM32F302xC) \|\| defined(STM32F303x8) \|\| defined(STM32F328xx) \|\| defined(STM32F334x8) \|\| defined(STM32F301x8) \|\| defined(STM32F318xx) \|\| defined(STM32F302x8)
mbed_official	237:f3da66175598	4622	/**
mbed_official	237:f3da66175598	4623	* @brief Configures the ADC injected group and the selected channel to be
mbed_official	237:f3da66175598	4624	* linked to the injected group.
mbed_official	237:f3da66175598	4625	* @note Possibility to update parameters on the fly:
mbed_official	237:f3da66175598	4626	* This function initializes injected group, following calls to this
mbed_official	237:f3da66175598	4627	* function can be used to reconfigure some parameters of structure
mbed_official	237:f3da66175598	4628	* "ADC_InjectionConfTypeDef" on the fly, without reseting the ADC.
mbed_official	237:f3da66175598	4629	* The setting of these parameters is conditioned to ADC state.
mbed_official	237:f3da66175598	4630	* For parameters constraints, see comments of structure
mbed_official	237:f3da66175598	4631	* "ADC_InjectionConfTypeDef".
mbed_official	237:f3da66175598	4632	* @note In case of usage of internal measurement channels:
mbed_official	237:f3da66175598	4633	* Vbat/VrefInt/TempSensor.
mbed_official	237:f3da66175598	4634	* The recommended sampling time is at least:
mbed_official	237:f3da66175598	4635	* - For devices STM32F37x: 17.1us for temperature sensor
mbed_official	237:f3da66175598	4636	* - For the other STM32F3 devices: 2.2us for each of channels
mbed_official	237:f3da66175598	4637	* Vbat/VrefInt/TempSensor.
mbed_official	237:f3da66175598	4638	* These internal paths can be be disabled using function
mbed_official	237:f3da66175598	4639	* HAL_ADC_DeInit().
mbed_official	237:f3da66175598	4640	* @note To reset injected sequencer, function HAL_ADCEx_InjectedStop() can
mbed_official	237:f3da66175598	4641	* be used.
mbed_official	237:f3da66175598	4642	* @note Caution: For Injected Context Queue use: a context must be fully
mbed_official	237:f3da66175598	4643	* defined before start of injected conversion: all channels configured
mbed_official	237:f3da66175598	4644	* consecutively for the same ADC instance. Therefore, Number of calls of
mbed_official	237:f3da66175598	4645	* HAL_ADCEx_InjectedConfigChannel() must correspond to value of parameter
mbed_official	237:f3da66175598	4646	* InjectedNbrOfConversion for each context.
mbed_official	237:f3da66175598	4647	* - Example 1: If 1 context intended to be used (or not use of this feature:
mbed_official	237:f3da66175598	4648	* QueueInjectedContext=DISABLE) and usage of the 3 first injected ranks
mbed_official	237:f3da66175598	4649	* (InjectedNbrOfConversion=3), HAL_ADCEx_InjectedConfigChannel() must be
mbed_official	237:f3da66175598	4650	* called once for each channel (3 times) before launching a conversion.
mbed_official	237:f3da66175598	4651	* This function must not be called to configure the 4th injected channel:
mbed_official	237:f3da66175598	4652	* it would start a new context into context queue.
mbed_official	237:f3da66175598	4653	* - Example 2: If 2 contexts intended to be used and usage of the 3 first
mbed_official	237:f3da66175598	4654	* injected ranks (InjectedNbrOfConversion=3),
mbed_official	237:f3da66175598	4655	* HAL_ADCEx_InjectedConfigChannel() must be called once for each channel and
mbed_official	237:f3da66175598	4656	* for each context (3 channels x 2 contexts = 6 calls). Conversion can
mbed_official	237:f3da66175598	4657	* start once the 1st context is set. The 2nd context can be set on the fly.
mbed_official	237:f3da66175598	4658	* @param hadc: ADC handle
mbed_official	237:f3da66175598	4659	* @param sConfigInjected: Structure of ADC injected group and ADC channel for
mbed_official	237:f3da66175598	4660	* injected group.
mbed_official	237:f3da66175598	4661	* @retval None
mbed_official	237:f3da66175598	4662	*/
mbed_official	237:f3da66175598	4663	HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_InjectionConfTypeDef* sConfigInjected)
mbed_official	237:f3da66175598	4664	{
mbed_official	237:f3da66175598	4665	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	237:f3da66175598	4666	ADC_Common_TypeDef *tmpADC_Common;
mbed_official	237:f3da66175598	4667	ADC_HandleTypeDef tmphadcSharingSameCommonRegister;
mbed_official	237:f3da66175598	4668	uint32_t tmpOffsetShifted;
mbed_official	237:f3da66175598	4669	uint32_t WaitLoopIndex = 0;
mbed_official	237:f3da66175598	4670
mbed_official	237:f3da66175598	4671	/* Injected context queue feature: temporary JSQR variables defined in */
mbed_official	237:f3da66175598	4672	/* static to be passed over calls of this function */
mbed_official	237:f3da66175598	4673	static uint32_t tmp_JSQR_ContextQueueBeingBuilt_ADCInstance = 0;
mbed_official	237:f3da66175598	4674	static uint32_t tmp_JSQR_ContextQueueBeingBuilt_Channel_Count = 0;
mbed_official	237:f3da66175598	4675	static uint32_t tmp_JSQR_ContextQueueBeingBuilt;
mbed_official	237:f3da66175598	4676
mbed_official	237:f3da66175598	4677	/* Check the parameters */
mbed_official	237:f3da66175598	4678	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	4679	assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank));
mbed_official	237:f3da66175598	4680	assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime));
mbed_official	237:f3da66175598	4681	assert_param(IS_ADC_SINGLE_DIFFERENTIAL(sConfigInjected->InjectedSingleDiff));
mbed_official	237:f3da66175598	4682	assert_param(IS_ADC_INJECTED_NB_CONV(sConfigInjected->InjectedNbrOfConversion));
mbed_official	237:f3da66175598	4683	assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode));
mbed_official	237:f3da66175598	4684	assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv));
mbed_official	237:f3da66175598	4685	assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->QueueInjectedContext));
mbed_official	237:f3da66175598	4686	assert_param(IS_ADC_EXTTRIGINJEC_EDGE(sConfigInjected->ExternalTrigInjecConvEdge));
mbed_official	237:f3da66175598	4687	assert_param(IS_ADC_EXTTRIGINJEC(sConfigInjected->ExternalTrigInjecConv));
mbed_official	237:f3da66175598	4688	assert_param(IS_ADC_OFFSET_NUMBER(sConfigInjected->InjectedOffsetNumber));
mbed_official	237:f3da66175598	4689	assert_param(IS_ADC_RANGE(__HAL_ADC_GET_RESOLUTION(hadc), sConfigInjected->InjectedOffset));
mbed_official	237:f3da66175598	4690
mbed_official	237:f3da66175598	4691	/* Verification of channel number: Channels 1 to 14 are available in */
mbed_official	237:f3da66175598	4692	/* differential mode. Channels 15, 16, 17, 18 can be used only in */
mbed_official	237:f3da66175598	4693	/* single-ended mode. */
mbed_official	237:f3da66175598	4694	if (sConfigInjected->InjectedSingleDiff != ADC_DIFFERENTIAL_ENDED)
mbed_official	237:f3da66175598	4695	{
mbed_official	237:f3da66175598	4696	assert_param(IS_ADC_CHANNEL(sConfigInjected->InjectedChannel));
mbed_official	237:f3da66175598	4697	}
mbed_official	237:f3da66175598	4698	else
mbed_official	237:f3da66175598	4699	{
mbed_official	237:f3da66175598	4700	assert_param(IS_ADC_DIFF_CHANNEL(sConfigInjected->InjectedChannel));
mbed_official	237:f3da66175598	4701	}
mbed_official	237:f3da66175598	4702
mbed_official	237:f3da66175598	4703	/* Process locked */
mbed_official	237:f3da66175598	4704	__HAL_LOCK(hadc);
mbed_official	237:f3da66175598	4705
mbed_official	237:f3da66175598	4706
mbed_official	237:f3da66175598	4707	/* Configuration of Injected group sequencer. */
mbed_official	237:f3da66175598	4708	/* Hardware constraint: Must fully define injected context register JSQR */
mbed_official	237:f3da66175598	4709	/* before make it entering into injected sequencer queue. */
mbed_official	237:f3da66175598	4710	/* */
mbed_official	237:f3da66175598	4711	/* - if scan mode is disabled: */
mbed_official	237:f3da66175598	4712	/* * Injected channels sequence length is set to 0x00: 1 channel */
mbed_official	237:f3da66175598	4713	/* converted (channel on injected rank 1) */
mbed_official	237:f3da66175598	4714	/* Parameter "InjectedNbrOfConversion" is discarded. */
mbed_official	237:f3da66175598	4715	/* * Injected context register JSQR setting is simple: register is fully */
mbed_official	237:f3da66175598	4716	/* defined on one call of this function (for injected rank 1) and can */
mbed_official	237:f3da66175598	4717	/* be entered into queue directly. */
mbed_official	237:f3da66175598	4718	/* - if scan mode is enabled: */
mbed_official	237:f3da66175598	4719	/* * Injected channels sequence length is set to parameter */
mbed_official	237:f3da66175598	4720	/* "InjectedNbrOfConversion". */
mbed_official	237:f3da66175598	4721	/* * Injected context register JSQR setting more complex: register is */
mbed_official	237:f3da66175598	4722	/* fully defined over successive calls of this function, for each */
mbed_official	237:f3da66175598	4723	/* injected channel rank. It is entered into queue only when all */
mbed_official	237:f3da66175598	4724	/* injected ranks have been set. */
mbed_official	237:f3da66175598	4725	/* Note: Scan mode is not present by hardware on this device, but used */
mbed_official	237:f3da66175598	4726	/* by software for alignment over all STM32 devices. */
mbed_official	237:f3da66175598	4727
mbed_official	237:f3da66175598	4728	if ((hadc->Init.ScanConvMode == ADC_SCAN_DISABLE) \|\|
mbed_official	237:f3da66175598	4729	(sConfigInjected->InjectedNbrOfConversion == 1) )
mbed_official	237:f3da66175598	4730	{
mbed_official	237:f3da66175598	4731	/* Configuration of context register JSQR: */
mbed_official	237:f3da66175598	4732	/* - number of ranks in injected group sequencer: fixed to 1st rank */
mbed_official	237:f3da66175598	4733	/* (scan mode disabled, only rank 1 used) */
mbed_official	237:f3da66175598	4734	/* - external trigger to start conversion */
mbed_official	237:f3da66175598	4735	/* - external trigger polarity */
mbed_official	237:f3da66175598	4736	/* - channel set to rank 1 (scan mode disabled, only rank 1 used) */
mbed_official	237:f3da66175598	4737
mbed_official	237:f3da66175598	4738	if (sConfigInjected->InjectedRank == ADC_INJECTED_RANK_1)
mbed_official	237:f3da66175598	4739	{
mbed_official	237:f3da66175598	4740	tmp_JSQR_ContextQueueBeingBuilt = 0;
mbed_official	237:f3da66175598	4741
mbed_official	237:f3da66175598	4742	/* Enable external trigger if trigger selection is different of */
mbed_official	237:f3da66175598	4743	/* software start. */
mbed_official	237:f3da66175598	4744	/* Note: This configuration keeps the hardware feature of parameter */
mbed_official	237:f3da66175598	4745	/* ExternalTrigInjecConvEdge "trigger edge none" equivalent to */
mbed_official	237:f3da66175598	4746	/* software start. */
mbed_official	237:f3da66175598	4747	if (sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
mbed_official	237:f3da66175598	4748	{
mbed_official	237:f3da66175598	4749	tmp_JSQR_ContextQueueBeingBuilt \|= ( __HAL_ADC_JSQR_RK(sConfigInjected->InjectedChannel, ADC_INJECTED_RANK_1) \|
mbed_official	237:f3da66175598	4750	__HAL_ADC_JSQR_JEXTSEL(hadc, sConfigInjected->ExternalTrigInjecConv) \|
mbed_official	237:f3da66175598	4751	sConfigInjected->ExternalTrigInjecConvEdge );
mbed_official	237:f3da66175598	4752	}
mbed_official	237:f3da66175598	4753	else
mbed_official	237:f3da66175598	4754	{
mbed_official	237:f3da66175598	4755	tmp_JSQR_ContextQueueBeingBuilt \|= ( __HAL_ADC_JSQR_RK(sConfigInjected->InjectedChannel, ADC_INJECTED_RANK_1) );
mbed_official	237:f3da66175598	4756	}
mbed_official	237:f3da66175598	4757
mbed_official	237:f3da66175598	4758	hadc->Instance->JSQR = tmp_JSQR_ContextQueueBeingBuilt;
mbed_official	237:f3da66175598	4759
mbed_official	237:f3da66175598	4760	}
mbed_official	237:f3da66175598	4761	/* If another injected rank than rank1 was intended to be set, and could */
mbed_official	237:f3da66175598	4762	/* not due to ScanConvMode disabled, error is reported. */
mbed_official	237:f3da66175598	4763	else
mbed_official	237:f3da66175598	4764	{
mbed_official	237:f3da66175598	4765	/* Update ADC state machine to error */
mbed_official	237:f3da66175598	4766	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	4767
mbed_official	237:f3da66175598	4768	tmpHALStatus = HAL_ERROR;
mbed_official	237:f3da66175598	4769	}
mbed_official	237:f3da66175598	4770
mbed_official	237:f3da66175598	4771	}
mbed_official	237:f3da66175598	4772	else
mbed_official	237:f3da66175598	4773	{
mbed_official	237:f3da66175598	4774	/* Case of scan mode enabled, several channels to set into injected group */
mbed_official	237:f3da66175598	4775	/* sequencer. */
mbed_official	237:f3da66175598	4776	/* Procedure to define injected context register JSQR over successive */
mbed_official	237:f3da66175598	4777	/* calls of this function, for each injected channel rank: */
mbed_official	237:f3da66175598	4778
mbed_official	237:f3da66175598	4779	/* 1. Start new context and set parameters related to all injected */
mbed_official	237:f3da66175598	4780	/* channels: injected sequence length and trigger */
mbed_official	237:f3da66175598	4781	if (tmp_JSQR_ContextQueueBeingBuilt_Channel_Count == 0)
mbed_official	237:f3da66175598	4782	{
mbed_official	237:f3da66175598	4783	/* Memorize ADC instance on the context being built */
mbed_official	237:f3da66175598	4784	tmp_JSQR_ContextQueueBeingBuilt_ADCInstance = (uint32_t)hadc->Instance;
mbed_official	237:f3da66175598	4785	/* Initialize number of channels that will be configured on the context */
mbed_official	237:f3da66175598	4786	/* being built */
mbed_official	237:f3da66175598	4787	tmp_JSQR_ContextQueueBeingBuilt_Channel_Count = sConfigInjected->InjectedNbrOfConversion;
mbed_official	237:f3da66175598	4788	/* Initialize value that will be set into register JSQR */
mbed_official	237:f3da66175598	4789	tmp_JSQR_ContextQueueBeingBuilt = (uint32_t)0x00000000;
mbed_official	237:f3da66175598	4790
mbed_official	237:f3da66175598	4791	/* Configuration of context register JSQR: */
mbed_official	237:f3da66175598	4792	/* - number of ranks in injected group sequencer */
mbed_official	237:f3da66175598	4793	/* - external trigger to start conversion */
mbed_official	237:f3da66175598	4794	/* - external trigger polarity */
mbed_official	237:f3da66175598	4795	tmp_JSQR_ContextQueueBeingBuilt = 0;
mbed_official	237:f3da66175598	4796
mbed_official	237:f3da66175598	4797	/* Enable external trigger if trigger selection is different of */
mbed_official	237:f3da66175598	4798	/* software start. */
mbed_official	237:f3da66175598	4799	/* Note: This configuration keeps the hardware feature of parameter */
mbed_official	237:f3da66175598	4800	/* ExternalTrigInjecConvEdge "trigger edge none" equivalent to */
mbed_official	237:f3da66175598	4801	/* software start. */
mbed_official	237:f3da66175598	4802	if (sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
mbed_official	237:f3da66175598	4803	{
mbed_official	237:f3da66175598	4804	tmp_JSQR_ContextQueueBeingBuilt \|= ((sConfigInjected->InjectedNbrOfConversion - (uint32_t)1) \|
mbed_official	237:f3da66175598	4805	__HAL_ADC_JSQR_JEXTSEL(hadc, sConfigInjected->ExternalTrigInjecConv) \|
mbed_official	237:f3da66175598	4806	sConfigInjected->ExternalTrigInjecConvEdge );
mbed_official	237:f3da66175598	4807	}
mbed_official	237:f3da66175598	4808	else
mbed_official	237:f3da66175598	4809	{
mbed_official	237:f3da66175598	4810	tmp_JSQR_ContextQueueBeingBuilt \|= ((sConfigInjected->InjectedNbrOfConversion - (uint32_t)1) );
mbed_official	237:f3da66175598	4811	}
mbed_official	237:f3da66175598	4812
mbed_official	237:f3da66175598	4813	}
mbed_official	237:f3da66175598	4814
mbed_official	237:f3da66175598	4815	/* Verification that context being built is still targeting the same ADC */
mbed_official	237:f3da66175598	4816	/* instance. If ADC instance mixing during context being built, ADC state */
mbed_official	237:f3da66175598	4817	/* changed to error */
mbed_official	237:f3da66175598	4818	if ((uint32_t)hadc->Instance == tmp_JSQR_ContextQueueBeingBuilt_ADCInstance)
mbed_official	237:f3da66175598	4819	{
mbed_official	237:f3da66175598	4820	/* 2. Continue setting of context under definition with parameter */
mbed_official	237:f3da66175598	4821	/* related to each channel: channel rank sequence */
mbed_official	237:f3da66175598	4822	/* Clear the old JSQx bits for the selected rank */
mbed_official	237:f3da66175598	4823	tmp_JSQR_ContextQueueBeingBuilt &= ~__HAL_ADC_JSQR_RK(ADC_SQR3_SQ10, sConfigInjected->InjectedRank);
mbed_official	237:f3da66175598	4824
mbed_official	237:f3da66175598	4825	/* Set the JSQx bits for the selected rank */
mbed_official	237:f3da66175598	4826	tmp_JSQR_ContextQueueBeingBuilt \|= __HAL_ADC_JSQR_RK(sConfigInjected->InjectedChannel, sConfigInjected->InjectedRank);
mbed_official	237:f3da66175598	4827
mbed_official	237:f3da66175598	4828	/* Decrease channel count after setting into temporary JSQR variable */
mbed_official	237:f3da66175598	4829	tmp_JSQR_ContextQueueBeingBuilt_Channel_Count --;
mbed_official	237:f3da66175598	4830
mbed_official	237:f3da66175598	4831	/* 3. End of context setting: If last channel set, then write context */
mbed_official	237:f3da66175598	4832	/* into register JSQR and make it enter into queue */
mbed_official	237:f3da66175598	4833	if (tmp_JSQR_ContextQueueBeingBuilt_Channel_Count == 0)
mbed_official	237:f3da66175598	4834	{
mbed_official	237:f3da66175598	4835	hadc->Instance->JSQR = tmp_JSQR_ContextQueueBeingBuilt;
mbed_official	237:f3da66175598	4836
mbed_official	237:f3da66175598	4837	/* Reset context channels count for next context configuration */
mbed_official	237:f3da66175598	4838	tmp_JSQR_ContextQueueBeingBuilt_Channel_Count =0;
mbed_official	237:f3da66175598	4839	}
mbed_official	237:f3da66175598	4840	}
mbed_official	237:f3da66175598	4841	else
mbed_official	237:f3da66175598	4842	{
mbed_official	237:f3da66175598	4843	/* Update ADC state machine to error */
mbed_official	237:f3da66175598	4844	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	4845
mbed_official	237:f3da66175598	4846	/* Process unlocked */
mbed_official	237:f3da66175598	4847	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	4848
mbed_official	237:f3da66175598	4849	return HAL_ERROR;
mbed_official	237:f3da66175598	4850	}
mbed_official	237:f3da66175598	4851	}
mbed_official	237:f3da66175598	4852
mbed_official	237:f3da66175598	4853
mbed_official	237:f3da66175598	4854	/* Parameters update conditioned to ADC state: */
mbed_official	237:f3da66175598	4855	/* Parameters that can be updated when ADC is disabled or enabled without */
mbed_official	237:f3da66175598	4856	/* conversion on going on injected group: */
mbed_official	237:f3da66175598	4857	/* - Injected context queue: Queue disable (active context is kept) or */
mbed_official	237:f3da66175598	4858	/* enable (context decremented, up to 2 contexts queued) */
mbed_official	237:f3da66175598	4859	/* - Injected discontinuous mode: can be enabled only if auto-injected */
mbed_official	237:f3da66175598	4860	/* mode is disabled. */
mbed_official	237:f3da66175598	4861	if (__HAL_ADC_IS_CONVERSION_ONGOING_INJECTED(hadc) == RESET)
mbed_official	237:f3da66175598	4862	{
mbed_official	237:f3da66175598	4863	hadc->Instance->CFGR &= ~(ADC_CFGR_JQM \|
mbed_official	237:f3da66175598	4864	ADC_CFGR_JDISCEN );
mbed_official	237:f3da66175598	4865
mbed_official	237:f3da66175598	4866	/* If auto-injected mode is disabled: no constraint */
mbed_official	237:f3da66175598	4867	if (sConfigInjected->AutoInjectedConv == DISABLE)
mbed_official	237:f3da66175598	4868	{
mbed_official	237:f3da66175598	4869	hadc->Instance->CFGR \|= (__HAL_ADC_CFGR_INJECT_CONTEXT_QUEUE(sConfigInjected->QueueInjectedContext) \|
mbed_official	237:f3da66175598	4870	__HAL_ADC_CFGR_INJECT_DISCCONTINUOUS(sConfigInjected->InjectedDiscontinuousConvMode) );
mbed_official	237:f3da66175598	4871	}
mbed_official	237:f3da66175598	4872	/* If auto-injected mode is enabled: Injected discontinuous setting is */
mbed_official	237:f3da66175598	4873	/* discarded. */
mbed_official	237:f3da66175598	4874	else
mbed_official	237:f3da66175598	4875	{
mbed_official	237:f3da66175598	4876	hadc->Instance->CFGR \|= __HAL_ADC_CFGR_INJECT_CONTEXT_QUEUE(sConfigInjected->QueueInjectedContext);
mbed_official	237:f3da66175598	4877
mbed_official	237:f3da66175598	4878	/* If injected discontinuous mode was intended to be set and could not */
mbed_official	237:f3da66175598	4879	/* due to auto-injected enabled, error is reported. */
mbed_official	237:f3da66175598	4880	if (sConfigInjected->InjectedDiscontinuousConvMode == ENABLE)
mbed_official	237:f3da66175598	4881	{
mbed_official	237:f3da66175598	4882	/* Update ADC state machine to error */
mbed_official	237:f3da66175598	4883	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	4884
mbed_official	237:f3da66175598	4885	tmpHALStatus = HAL_ERROR;
mbed_official	237:f3da66175598	4886	}
mbed_official	237:f3da66175598	4887	}
mbed_official	237:f3da66175598	4888
mbed_official	237:f3da66175598	4889	}
mbed_official	237:f3da66175598	4890
mbed_official	237:f3da66175598	4891
mbed_official	237:f3da66175598	4892	/* Parameters update conditioned to ADC state: */
mbed_official	237:f3da66175598	4893	/* Parameters that can be updated when ADC is disabled or enabled without */
mbed_official	237:f3da66175598	4894	/* conversion on going on regular and injected groups: */
mbed_official	237:f3da66175598	4895	/* - Automatic injected conversion: can be enabled if injected group */
mbed_official	237:f3da66175598	4896	/* external triggers are disabled. */
mbed_official	237:f3da66175598	4897	/* - Channel sampling time */
mbed_official	237:f3da66175598	4898	/* - Channel offset */
mbed_official	237:f3da66175598	4899	if (__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET)
mbed_official	237:f3da66175598	4900	{
mbed_official	237:f3da66175598	4901	/* Configure Automatic injected conversion */
mbed_official	237:f3da66175598	4902	hadc->Instance->CFGR &= ~(ADC_CFGR_JAUTO);
mbed_official	237:f3da66175598	4903
mbed_official	237:f3da66175598	4904	/* If injected group external triggers are disabled (set to injected */
mbed_official	237:f3da66175598	4905	/* software start): no constraint */
mbed_official	237:f3da66175598	4906	if (sConfigInjected->ExternalTrigInjecConv == ADC_INJECTED_SOFTWARE_START)
mbed_official	237:f3da66175598	4907	{
mbed_official	237:f3da66175598	4908	hadc->Instance->CFGR \|= __HAL_ADC_CFGR_INJECT_AUTO_CONVERSION(sConfigInjected->AutoInjectedConv);
mbed_official	237:f3da66175598	4909	}
mbed_official	237:f3da66175598	4910	/* If Automatic injected conversion was intended to be set and could not */
mbed_official	237:f3da66175598	4911	/* due to injected group external triggers enabled, error is reported. */
mbed_official	237:f3da66175598	4912	else
mbed_official	237:f3da66175598	4913	{
mbed_official	237:f3da66175598	4914	if (sConfigInjected->AutoInjectedConv == ENABLE)
mbed_official	237:f3da66175598	4915	{
mbed_official	237:f3da66175598	4916	/* Update ADC state machine to error */
mbed_official	237:f3da66175598	4917	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	4918
mbed_official	237:f3da66175598	4919	tmpHALStatus = HAL_ERROR;
mbed_official	237:f3da66175598	4920	}
mbed_official	237:f3da66175598	4921	}
mbed_official	237:f3da66175598	4922
mbed_official	237:f3da66175598	4923
mbed_official	237:f3da66175598	4924	/* Sampling time configuration of the selected channel */
mbed_official	237:f3da66175598	4925	/* if ADC_Channel_10 ... ADC_Channel_18 is selected */
mbed_official	237:f3da66175598	4926	if (sConfigInjected->InjectedChannel > ADC_CHANNEL_10)
mbed_official	237:f3da66175598	4927	{
mbed_official	237:f3da66175598	4928	/* Clear the old sample time */
mbed_official	237:f3da66175598	4929	hadc->Instance->SMPR2 &= ~__HAL_ADC_SMPR2(ADC_SMPR1_SMP0, sConfigInjected->InjectedChannel);
mbed_official	237:f3da66175598	4930
mbed_official	237:f3da66175598	4931	/* Set the new sample time */
mbed_official	237:f3da66175598	4932	hadc->Instance->SMPR2 \|= __HAL_ADC_SMPR2(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel);
mbed_official	237:f3da66175598	4933	}
mbed_official	237:f3da66175598	4934	else /* ADC_Channel include in ADC_Channel_[0..9] */
mbed_official	237:f3da66175598	4935	{
mbed_official	237:f3da66175598	4936	/* Clear the old sample time */
mbed_official	237:f3da66175598	4937	hadc->Instance->SMPR1 &= ~__HAL_ADC_SMPR1(ADC_SMPR2_SMP10, sConfigInjected->InjectedChannel);
mbed_official	237:f3da66175598	4938
mbed_official	237:f3da66175598	4939	/* Set the new sample time */
mbed_official	237:f3da66175598	4940	hadc->Instance->SMPR1 \|= __HAL_ADC_SMPR1(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel);
mbed_official	237:f3da66175598	4941	}
mbed_official	237:f3da66175598	4942
mbed_official	237:f3da66175598	4943	/* Configure the offset: offset enable/disable, channel, offset value */
mbed_official	237:f3da66175598	4944
mbed_official	237:f3da66175598	4945	/* Shift the offset in function of the selected ADC resolution. */
mbed_official	237:f3da66175598	4946	/* Offset has to be left-aligned on bit 11, the LSB (right bits) are set to 0 */
mbed_official	237:f3da66175598	4947	tmpOffsetShifted = __HAL_ADC_OFFSET_SHIFT_RESOLUTION(hadc, sConfigInjected->InjectedOffset);
mbed_official	237:f3da66175598	4948
mbed_official	237:f3da66175598	4949	switch (sConfigInjected->InjectedOffsetNumber)
mbed_official	237:f3da66175598	4950	{
mbed_official	237:f3da66175598	4951	case ADC_OFFSET_1:
mbed_official	237:f3da66175598	4952	/* Configure offset register 1: */
mbed_official	237:f3da66175598	4953	/* - Enable offset */
mbed_official	237:f3da66175598	4954	/* - Set channel number */
mbed_official	237:f3da66175598	4955	/* - Set offset value */
mbed_official	237:f3da66175598	4956	hadc->Instance->OFR1 &= ~( ADC_OFR1_OFFSET1_CH \|
mbed_official	237:f3da66175598	4957	ADC_OFR1_OFFSET1 );
mbed_official	237:f3da66175598	4958	hadc->Instance->OFR1 \|= ( ADC_OFR1_OFFSET1_EN \|
mbed_official	237:f3da66175598	4959	__HAL_ADC_OFR_CHANNEL(sConfigInjected->InjectedChannel) \|
mbed_official	237:f3da66175598	4960	tmpOffsetShifted );
mbed_official	237:f3da66175598	4961	break;
mbed_official	237:f3da66175598	4962
mbed_official	237:f3da66175598	4963	case ADC_OFFSET_2:
mbed_official	237:f3da66175598	4964	/* Configure offset register 2: */
mbed_official	237:f3da66175598	4965	/* - Enable offset */
mbed_official	237:f3da66175598	4966	/* - Set channel number */
mbed_official	237:f3da66175598	4967	/* - Set offset value */
mbed_official	237:f3da66175598	4968	hadc->Instance->OFR2 &= ~( ADC_OFR2_OFFSET2_CH \|
mbed_official	237:f3da66175598	4969	ADC_OFR2_OFFSET2 );
mbed_official	237:f3da66175598	4970	hadc->Instance->OFR2 \|= ( ADC_OFR2_OFFSET2_EN \|
mbed_official	237:f3da66175598	4971	__HAL_ADC_OFR_CHANNEL(sConfigInjected->InjectedChannel) \|
mbed_official	237:f3da66175598	4972	tmpOffsetShifted );
mbed_official	237:f3da66175598	4973	break;
mbed_official	237:f3da66175598	4974
mbed_official	237:f3da66175598	4975	case ADC_OFFSET_3:
mbed_official	237:f3da66175598	4976	/* Configure offset register 3: */
mbed_official	237:f3da66175598	4977	/* - Enable offset */
mbed_official	237:f3da66175598	4978	/* - Set channel number */
mbed_official	237:f3da66175598	4979	/* - Set offset value */
mbed_official	237:f3da66175598	4980	hadc->Instance->OFR3 &= ~( ADC_OFR3_OFFSET3_CH \|
mbed_official	237:f3da66175598	4981	ADC_OFR3_OFFSET3 );
mbed_official	237:f3da66175598	4982	hadc->Instance->OFR3 \|= ( ADC_OFR3_OFFSET3_EN \|
mbed_official	237:f3da66175598	4983	__HAL_ADC_OFR_CHANNEL(sConfigInjected->InjectedChannel) \|
mbed_official	237:f3da66175598	4984	tmpOffsetShifted );
mbed_official	237:f3da66175598	4985	break;
mbed_official	237:f3da66175598	4986
mbed_official	237:f3da66175598	4987	case ADC_OFFSET_4:
mbed_official	237:f3da66175598	4988	/* Configure offset register 1: */
mbed_official	237:f3da66175598	4989	/* - Enable offset */
mbed_official	237:f3da66175598	4990	/* - Set channel number */
mbed_official	237:f3da66175598	4991	/* - Set offset value */
mbed_official	237:f3da66175598	4992	hadc->Instance->OFR4 &= ~( ADC_OFR4_OFFSET4_CH \|
mbed_official	237:f3da66175598	4993	ADC_OFR4_OFFSET4 );
mbed_official	237:f3da66175598	4994	hadc->Instance->OFR4 \|= ( ADC_OFR4_OFFSET4_EN \|
mbed_official	237:f3da66175598	4995	__HAL_ADC_OFR_CHANNEL(sConfigInjected->InjectedChannel) \|
mbed_official	237:f3da66175598	4996	tmpOffsetShifted );
mbed_official	237:f3da66175598	4997	break;
mbed_official	237:f3da66175598	4998
mbed_official	237:f3da66175598	4999	/* Case ADC_OFFSET_NONE */
mbed_official	237:f3da66175598	5000	default :
mbed_official	237:f3da66175598	5001	/* Scan OFR1, OFR2, OFR3, OFR4 to check if the selected channel is enabled. If this is the case, offset OFRx is disabled. */
mbed_official	237:f3da66175598	5002	if (((hadc->Instance->OFR1) & ADC_OFR1_OFFSET1_CH) == __HAL_ADC_OFR_CHANNEL(sConfigInjected->InjectedChannel))
mbed_official	237:f3da66175598	5003	{
mbed_official	237:f3da66175598	5004	/* Disable offset OFR1*/
mbed_official	237:f3da66175598	5005	hadc->Instance->OFR1 &= ~ADC_OFR1_OFFSET1_EN;
mbed_official	237:f3da66175598	5006	}
mbed_official	237:f3da66175598	5007	if (((hadc->Instance->OFR2) & ADC_OFR2_OFFSET2_CH) == __HAL_ADC_OFR_CHANNEL(sConfigInjected->InjectedChannel))
mbed_official	237:f3da66175598	5008	{
mbed_official	237:f3da66175598	5009	/* Disable offset OFR2*/
mbed_official	237:f3da66175598	5010	hadc->Instance->OFR2 &= ~ADC_OFR2_OFFSET2_EN;
mbed_official	237:f3da66175598	5011	}
mbed_official	237:f3da66175598	5012	if (((hadc->Instance->OFR3) & ADC_OFR3_OFFSET3_CH) == __HAL_ADC_OFR_CHANNEL(sConfigInjected->InjectedChannel))
mbed_official	237:f3da66175598	5013	{
mbed_official	237:f3da66175598	5014	/* Disable offset OFR3*/
mbed_official	237:f3da66175598	5015	hadc->Instance->OFR3 &= ~ADC_OFR3_OFFSET3_EN;
mbed_official	237:f3da66175598	5016	}
mbed_official	237:f3da66175598	5017	if (((hadc->Instance->OFR4) & ADC_OFR4_OFFSET4_CH) == __HAL_ADC_OFR_CHANNEL(sConfigInjected->InjectedChannel))
mbed_official	237:f3da66175598	5018	{
mbed_official	237:f3da66175598	5019	/* Disable offset OFR4*/
mbed_official	237:f3da66175598	5020	hadc->Instance->OFR4 &= ~ADC_OFR4_OFFSET4_EN;
mbed_official	237:f3da66175598	5021	}
mbed_official	237:f3da66175598	5022	break;
mbed_official	237:f3da66175598	5023	}
mbed_official	237:f3da66175598	5024
mbed_official	237:f3da66175598	5025	}
mbed_official	237:f3da66175598	5026
mbed_official	237:f3da66175598	5027
mbed_official	237:f3da66175598	5028	/* Parameters update conditioned to ADC state: */
mbed_official	237:f3da66175598	5029	/* Parameters that can be updated only when ADC is disabled: */
mbed_official	237:f3da66175598	5030	/* - Single or differential mode */
mbed_official	237:f3da66175598	5031	/* - Internal measurement channels: Vbat/VrefInt/TempSensor */
mbed_official	237:f3da66175598	5032	if (__HAL_ADC_IS_ENABLED(hadc) == RESET)
mbed_official	237:f3da66175598	5033	{
mbed_official	237:f3da66175598	5034	/* Configuration of differential mode */
mbed_official	237:f3da66175598	5035	if (sConfigInjected->InjectedSingleDiff != ADC_DIFFERENTIAL_ENDED)
mbed_official	237:f3da66175598	5036	{
mbed_official	237:f3da66175598	5037	/* Disable differential mode (default mode: single-ended) */
mbed_official	237:f3da66175598	5038	hadc->Instance->DIFSEL &= ~(__HAL_ADC_DIFSEL_CHANNEL(sConfigInjected->InjectedChannel));
mbed_official	237:f3da66175598	5039	}
mbed_official	237:f3da66175598	5040	else
mbed_official	237:f3da66175598	5041	{
mbed_official	237:f3da66175598	5042	/* Enable differential mode */
mbed_official	237:f3da66175598	5043	hadc->Instance->DIFSEL \|= __HAL_ADC_DIFSEL_CHANNEL(sConfigInjected->InjectedChannel);
mbed_official	237:f3da66175598	5044
mbed_official	237:f3da66175598	5045	/* Sampling time configuration of channel ADC_IN+1 (negative input) */
mbed_official	237:f3da66175598	5046	/* For channels 10 to 18 */
mbed_official	237:f3da66175598	5047	if (sConfigInjected->InjectedChannel > ADC_CHANNEL_10)
mbed_official	237:f3da66175598	5048	{
mbed_official	237:f3da66175598	5049	/* Clear the old sample time */
mbed_official	237:f3da66175598	5050	hadc->Instance->SMPR2 &= ~__HAL_ADC_SMPR2(ADC_SMPR1_SMP0, (sConfigInjected->InjectedChannel +1));
mbed_official	237:f3da66175598	5051
mbed_official	237:f3da66175598	5052	/* Set the new sample time */
mbed_official	237:f3da66175598	5053	hadc->Instance->SMPR2 \|= __HAL_ADC_SMPR2(sConfigInjected->InjectedSamplingTime, (sConfigInjected->InjectedChannel +1));
mbed_official	237:f3da66175598	5054	}
mbed_official	237:f3da66175598	5055	else /* For channels 0 to 9 */
mbed_official	237:f3da66175598	5056	{
mbed_official	237:f3da66175598	5057	/* Clear the old sample time */
mbed_official	237:f3da66175598	5058	hadc->Instance->SMPR1 &= ~__HAL_ADC_SMPR1(ADC_SMPR2_SMP10, (sConfigInjected->InjectedChannel +1));
mbed_official	237:f3da66175598	5059
mbed_official	237:f3da66175598	5060	/* Set the new sample time */
mbed_official	237:f3da66175598	5061	hadc->Instance->SMPR1 \|= __HAL_ADC_SMPR1(sConfigInjected->InjectedSamplingTime, (sConfigInjected->InjectedChannel +1));
mbed_official	237:f3da66175598	5062	}
mbed_official	237:f3da66175598	5063	}
mbed_official	237:f3da66175598	5064
mbed_official	237:f3da66175598	5065
mbed_official	237:f3da66175598	5066	/* Management of internal measurement channels: Vbat/VrefInt/TempSensor */
mbed_official	237:f3da66175598	5067	/* internal measurement paths enable: If internal channel selected, */
mbed_official	237:f3da66175598	5068	/* enable dedicated internal buffers and path. */
mbed_official	237:f3da66175598	5069	/* Note: these internal measurement paths can be disabled using */
mbed_official	237:f3da66175598	5070	/* HAL_ADC_deInit(). */
mbed_official	237:f3da66175598	5071
mbed_official	237:f3da66175598	5072	/* Configuration of common ADC parameters */
mbed_official	237:f3da66175598	5073	/* Pointer to the common control register to which is belonging hadc */
mbed_official	237:f3da66175598	5074	/* (Depending on STM32F3 product, there may be up to 4 ADC and 2 common */
mbed_official	237:f3da66175598	5075	/* control registers) */
mbed_official	237:f3da66175598	5076	tmpADC_Common = __HAL_ADC_COMMON_REGISTER(hadc);
mbed_official	237:f3da66175598	5077
mbed_official	237:f3da66175598	5078	/* If the requested internal measurement path has already been enabled, */
mbed_official	237:f3da66175598	5079	/* bypass the configuration processing. */
mbed_official	237:f3da66175598	5080	if (( (sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) &&
mbed_official	237:f3da66175598	5081	(HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_TSEN)) ) \|\|
mbed_official	237:f3da66175598	5082	( (sConfigInjected->InjectedChannel == ADC_CHANNEL_VBAT) &&
mbed_official	237:f3da66175598	5083	(HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_VBATEN)) ) \|\|
mbed_official	237:f3da66175598	5084	( (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT) &&
mbed_official	237:f3da66175598	5085	(HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_VREFEN)))
mbed_official	237:f3da66175598	5086	)
mbed_official	237:f3da66175598	5087	{
mbed_official	237:f3da66175598	5088	/* Configuration of common ADC parameters (continuation) */
mbed_official	237:f3da66175598	5089	/* Set handle of the other ADC sharing the same common register */
mbed_official	237:f3da66175598	5090	__HAL_ADC_COMMON_ADC_OTHER(hadc, &tmphadcSharingSameCommonRegister);
mbed_official	237:f3da66175598	5091
mbed_official	237:f3da66175598	5092	/* Software is allowed to change common parameters only when all ADCs */
mbed_official	237:f3da66175598	5093	/* of the common group are disabled. */
mbed_official	237:f3da66175598	5094	if ((__HAL_ADC_IS_ENABLED(hadc) == RESET) &&
mbed_official	237:f3da66175598	5095	( (tmphadcSharingSameCommonRegister.Instance == NULL) \|\|
mbed_official	237:f3da66175598	5096	(__HAL_ADC_IS_ENABLED(&tmphadcSharingSameCommonRegister) == RESET) ))
mbed_official	237:f3da66175598	5097	{
mbed_official	237:f3da66175598	5098	/* If Channel_16 is selected, enable Temp. sensor measurement path */
mbed_official	237:f3da66175598	5099	/* Note: Temp. sensor internal channels available on ADC1 only */
mbed_official	237:f3da66175598	5100	if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) && (hadc->Instance == ADC1))
mbed_official	237:f3da66175598	5101	{
mbed_official	237:f3da66175598	5102	tmpADC_Common->CCR \|= ADC_CCR_TSEN;
mbed_official	237:f3da66175598	5103	}
mbed_official	237:f3da66175598	5104	/* If Channel_17 is selected, enable VBAT measurement path */
mbed_official	237:f3da66175598	5105	/* Note: VBAT internal channels available on ADC1 only */
mbed_official	237:f3da66175598	5106	else if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_VBAT) && (hadc->Instance == ADC1))
mbed_official	237:f3da66175598	5107	{
mbed_official	237:f3da66175598	5108	tmpADC_Common->CCR \|= ADC_CCR_VBATEN;
mbed_official	237:f3da66175598	5109
mbed_official	237:f3da66175598	5110	/* Delay for temperature sensor stabilization time */
mbed_official	237:f3da66175598	5111	while(WaitLoopIndex < ADC_TEMPSENSOR_DELAY_CPU_CYCLES)
mbed_official	237:f3da66175598	5112	{
mbed_official	237:f3da66175598	5113	WaitLoopIndex++;
mbed_official	237:f3da66175598	5114	}
mbed_official	237:f3da66175598	5115	}
mbed_official	237:f3da66175598	5116	/* If Channel_18 is selected, enable VREFINT measurement path */
mbed_official	237:f3da66175598	5117	/* Note: VrefInt internal channels available on all ADCs, but only */
mbed_official	237:f3da66175598	5118	/* one ADC is allowed to be connected to VrefInt at the same */
mbed_official	237:f3da66175598	5119	/* time. */
mbed_official	237:f3da66175598	5120	else if (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT)
mbed_official	237:f3da66175598	5121	{
mbed_official	237:f3da66175598	5122	tmpADC_Common->CCR \|= ADC_CCR_VREFEN;
mbed_official	237:f3da66175598	5123	}
mbed_official	237:f3da66175598	5124	}
mbed_official	237:f3da66175598	5125	/* If the requested internal measurement path has already been enabled */
mbed_official	237:f3da66175598	5126	/* and other ADC of the common group are enabled, internal */
mbed_official	237:f3da66175598	5127	/* measurement paths cannot be enabled. */
mbed_official	237:f3da66175598	5128	else
mbed_official	237:f3da66175598	5129	{
mbed_official	237:f3da66175598	5130	/* Update ADC state machine to error */
mbed_official	237:f3da66175598	5131	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	5132
mbed_official	237:f3da66175598	5133	tmpHALStatus = HAL_ERROR;
mbed_official	237:f3da66175598	5134	}
mbed_official	237:f3da66175598	5135	}
mbed_official	237:f3da66175598	5136
mbed_official	237:f3da66175598	5137	}
mbed_official	237:f3da66175598	5138
mbed_official	237:f3da66175598	5139	/* Process unlocked */
mbed_official	237:f3da66175598	5140	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	5141
mbed_official	237:f3da66175598	5142	/* Return function status */
mbed_official	237:f3da66175598	5143	return tmpHALStatus;
mbed_official	237:f3da66175598	5144	}
mbed_official	237:f3da66175598	5145	#endif /* STM32F303xC \|\| STM32F358xx \|\| STM32F302xC \|\| STM32F303x8 \|\| STM32F328xx \|\| STM32F334x8 \|\| STM32F301x8 \|\| STM32F318xx \|\| STM32F302x8 */
mbed_official	237:f3da66175598	5146
mbed_official	237:f3da66175598	5147	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	237:f3da66175598	5148	/**
mbed_official	237:f3da66175598	5149	* @brief Configures the ADC injected group and the selected channel to be
mbed_official	237:f3da66175598	5150	* linked to the injected group.
mbed_official	237:f3da66175598	5151	* @note Possibility to update parameters on the fly:
mbed_official	237:f3da66175598	5152	* This function initializes injected group, following calls to this
mbed_official	237:f3da66175598	5153	* function can be used to reconfigure some parameters of structure
mbed_official	237:f3da66175598	5154	* "ADC_InjectionConfTypeDef" on the fly, without reseting the ADC.
mbed_official	237:f3da66175598	5155	* The setting of these parameters is conditioned to ADC state:
mbed_official	237:f3da66175598	5156	* this function must be called when ADC is not under conversion.
mbed_official	237:f3da66175598	5157	* @note In case of usage of internal measurement channels:
mbed_official	237:f3da66175598	5158	* Vbat/VrefInt/TempSensor.
mbed_official	237:f3da66175598	5159	* The recommended sampling time is at least:
mbed_official	237:f3da66175598	5160	* - For devices STM32F37x: 17.1us for temperature sensor
mbed_official	237:f3da66175598	5161	* - For the other STM32F3 devices: 2.2us for each of channels
mbed_official	237:f3da66175598	5162	* Vbat/VrefInt/TempSensor.
mbed_official	237:f3da66175598	5163	* These internal paths can be be disabled using function
mbed_official	237:f3da66175598	5164	* HAL_ADC_DeInit().
mbed_official	237:f3da66175598	5165	* @param hadc: ADC handle
mbed_official	237:f3da66175598	5166	* @param sConfigInjected: Structure of ADC injected group and ADC channel for
mbed_official	237:f3da66175598	5167	* injected group.
mbed_official	237:f3da66175598	5168	* @retval None
mbed_official	237:f3da66175598	5169	*/
mbed_official	237:f3da66175598	5170	HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_InjectionConfTypeDef* sConfigInjected)
mbed_official	237:f3da66175598	5171	{
mbed_official	237:f3da66175598	5172	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	237:f3da66175598	5173
mbed_official	237:f3da66175598	5174	/* Check the parameters */
mbed_official	237:f3da66175598	5175	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	5176	assert_param(IS_ADC_CHANNEL(sConfigInjected->InjectedChannel));
mbed_official	237:f3da66175598	5177	assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank));
mbed_official	237:f3da66175598	5178	assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime));
mbed_official	237:f3da66175598	5179	assert_param(IS_ADC_INJECTED_NB_CONV(sConfigInjected->InjectedNbrOfConversion));
mbed_official	237:f3da66175598	5180	assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode));
mbed_official	237:f3da66175598	5181	assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv));
mbed_official	237:f3da66175598	5182	assert_param(IS_ADC_EXTTRIGINJEC(sConfigInjected->ExternalTrigInjecConv));
mbed_official	237:f3da66175598	5183	assert_param(IS_ADC_RANGE(sConfigInjected->InjectedOffset));
mbed_official	237:f3da66175598	5184
mbed_official	237:f3da66175598	5185	/* Process locked */
mbed_official	237:f3da66175598	5186	__HAL_LOCK(hadc);
mbed_official	237:f3da66175598	5187
mbed_official	237:f3da66175598	5188
mbed_official	237:f3da66175598	5189	/* Configuration of injected group sequencer: */
mbed_official	237:f3da66175598	5190	/* - if scan mode is disabled, injected channels sequence length is set to */
mbed_official	237:f3da66175598	5191	/* 0x00: 1 channel converted (channel on regular rank 1) */
mbed_official	237:f3da66175598	5192	/* Parameter "InjectedNbrOfConversion" is discarded. */
mbed_official	237:f3da66175598	5193	/* Note: Scan mode is present by hardware on this device and, if */
mbed_official	237:f3da66175598	5194	/* disabled, discards automatically nb of conversions. Anyway, nb of */
mbed_official	237:f3da66175598	5195	/* conversions is forced to 0x00 for alignment over all STM32 devices. */
mbed_official	237:f3da66175598	5196	/* - if scan mode is enabled, injected channels sequence length is set to */
mbed_official	237:f3da66175598	5197	/* parameter ""InjectedNbrOfConversion". */
mbed_official	237:f3da66175598	5198	if (hadc->Init.ScanConvMode == ADC_SCAN_DISABLE)
mbed_official	237:f3da66175598	5199	{
mbed_official	237:f3da66175598	5200	if (sConfigInjected->InjectedRank == ADC_INJECTED_RANK_1)
mbed_official	237:f3da66175598	5201	{
mbed_official	237:f3da66175598	5202	/* Clear the old SQx bits for all injected ranks */
mbed_official	237:f3da66175598	5203	hadc->Instance->JSQR &= ~ (ADC_JSQR_JL \|
mbed_official	237:f3da66175598	5204	ADC_JSQR_JSQ4 \|
mbed_official	237:f3da66175598	5205	ADC_JSQR_JSQ3 \|
mbed_official	237:f3da66175598	5206	ADC_JSQR_JSQ2 \|
mbed_official	237:f3da66175598	5207	ADC_JSQR_JSQ1 );
mbed_official	237:f3da66175598	5208
mbed_official	237:f3da66175598	5209	/* Set the SQx bits for the selected rank */
mbed_official	237:f3da66175598	5210	hadc->Instance->JSQR \|= __HAL_ADC_JSQR_RK(sConfigInjected->InjectedChannel,
mbed_official	237:f3da66175598	5211	ADC_INJECTED_RANK_1,
mbed_official	237:f3da66175598	5212	0x01);
mbed_official	237:f3da66175598	5213	}
mbed_official	237:f3da66175598	5214	/* If another injected rank than rank1 was intended to be set, and could */
mbed_official	237:f3da66175598	5215	/* not due to ScanConvMode disabled, error is reported. */
mbed_official	237:f3da66175598	5216	else
mbed_official	237:f3da66175598	5217	{
mbed_official	237:f3da66175598	5218	/* Update ADC state machine to error */
mbed_official	237:f3da66175598	5219	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	5220
mbed_official	237:f3da66175598	5221	tmpHALStatus = HAL_ERROR;
mbed_official	237:f3da66175598	5222	}
mbed_official	237:f3da66175598	5223	}
mbed_official	237:f3da66175598	5224	else
mbed_official	237:f3da66175598	5225	{
mbed_official	237:f3da66175598	5226	/* Clear the old SQx bits for the selected rank */
mbed_official	237:f3da66175598	5227	hadc->Instance->JSQR &= ~ (ADC_JSQR_JL \|
mbed_official	237:f3da66175598	5228	__HAL_ADC_JSQR_RK(ADC_JSQR_JSQ1,
mbed_official	237:f3da66175598	5229	sConfigInjected->InjectedRank,
mbed_official	237:f3da66175598	5230	sConfigInjected->InjectedNbrOfConversion) );
mbed_official	237:f3da66175598	5231
mbed_official	237:f3da66175598	5232	/* Since injected channels rank conv. order depends on total number of */
mbed_official	237:f3da66175598	5233	/* injected conversions, selected rank must be below or equal to total */
mbed_official	237:f3da66175598	5234	/* number of injected conversions to be updated. */
mbed_official	237:f3da66175598	5235	if (sConfigInjected->InjectedRank <= sConfigInjected->InjectedNbrOfConversion)
mbed_official	237:f3da66175598	5236	{
mbed_official	237:f3da66175598	5237	/* Set the SQx bits for the selected rank */
mbed_official	237:f3da66175598	5238	hadc->Instance->JSQR \|= (__HAL_ADC_JSQR_JL(sConfigInjected->InjectedNbrOfConversion) \|
mbed_official	237:f3da66175598	5239	__HAL_ADC_JSQR_RK(sConfigInjected->InjectedChannel,
mbed_official	237:f3da66175598	5240	sConfigInjected->InjectedRank,
mbed_official	237:f3da66175598	5241	sConfigInjected->InjectedNbrOfConversion) );
mbed_official	237:f3da66175598	5242	}
mbed_official	237:f3da66175598	5243	}
mbed_official	237:f3da66175598	5244
mbed_official	237:f3da66175598	5245
mbed_official	237:f3da66175598	5246	/* Configuration of injected group: external trigger */
mbed_official	237:f3da66175598	5247	/* - external trigger to start conversion */
mbed_official	237:f3da66175598	5248	/* - external trigger polarity */
mbed_official	237:f3da66175598	5249	/* If Automatic injected conversion disabled: always set to 1, */
mbed_official	237:f3da66175598	5250	/* because needed for all triggers: external trigger of SW start) */
mbed_official	237:f3da66175598	5251	/* Hardware constraint: ADC must be disabled */
mbed_official	237:f3da66175598	5252	/* Note: In case of ADC already enabled, caution to not launch an unwanted */
mbed_official	237:f3da66175598	5253	/* conversion while modifying register CR2 by writing 1 to bit ADON */
mbed_official	237:f3da66175598	5254	/* These settings are modified only if required parameters are different as */
mbed_official	237:f3da66175598	5255	/* current setting */
mbed_official	237:f3da66175598	5256	if ((__HAL_ADC_IS_ENABLED(hadc) == RESET) &&
mbed_official	237:f3da66175598	5257	((hadc->Instance->CR2 & ADC_CR2_JEXTSEL) != sConfigInjected->ExternalTrigInjecConv) )
mbed_official	237:f3da66175598	5258	{
mbed_official	237:f3da66175598	5259	hadc->Instance->CR2 &= ~( ADC_CR2_JEXTSEL \|
mbed_official	237:f3da66175598	5260	ADC_CR2_JEXTTRIG \|
mbed_official	237:f3da66175598	5261	ADC_CR2_ADON );
mbed_official	237:f3da66175598	5262
mbed_official	237:f3da66175598	5263	/* If automatic injected conversion is intended to be enabled and */
mbed_official	237:f3da66175598	5264	/* conditions are fulfilled (injected group external triggers are */
mbed_official	237:f3da66175598	5265	/* disabled), then keep injected external trigger JEXTTRIG cleared */
mbed_official	237:f3da66175598	5266	if (!((sConfigInjected->AutoInjectedConv == ENABLE) &&
mbed_official	237:f3da66175598	5267	(sConfigInjected->ExternalTrigInjecConv == ADC_INJECTED_SOFTWARE_START)))
mbed_official	237:f3da66175598	5268	{
mbed_official	237:f3da66175598	5269	hadc->Instance->CR2 \|= ( sConfigInjected->ExternalTrigInjecConv \|
mbed_official	237:f3da66175598	5270	ADC_CR2_JEXTTRIG );
mbed_official	237:f3da66175598	5271	}
mbed_official	237:f3da66175598	5272	else
mbed_official	237:f3da66175598	5273	{
mbed_official	237:f3da66175598	5274	hadc->Instance->CR2 \|= ( sConfigInjected->ExternalTrigInjecConv );
mbed_official	237:f3da66175598	5275	}
mbed_official	237:f3da66175598	5276	}
mbed_official	237:f3da66175598	5277
mbed_official	237:f3da66175598	5278
mbed_official	237:f3da66175598	5279	/* Configuration of injected group */
mbed_official	237:f3da66175598	5280	/* - Automatic injected conversion */
mbed_official	237:f3da66175598	5281	/* - Injected discontinuous mode */
mbed_official	237:f3da66175598	5282	hadc->Instance->CR1 &= ~(ADC_CR1_JAUTO \|
mbed_official	237:f3da66175598	5283	ADC_CR1_JDISCEN );
mbed_official	237:f3da66175598	5284
mbed_official	237:f3da66175598	5285	/* Automatic injected conversion can be enabled if injected group */
mbed_official	237:f3da66175598	5286	/* external triggers are disabled. */
mbed_official	237:f3da66175598	5287	if (sConfigInjected->AutoInjectedConv == ENABLE)
mbed_official	237:f3da66175598	5288	{
mbed_official	237:f3da66175598	5289	if (sConfigInjected->ExternalTrigInjecConv == ADC_INJECTED_SOFTWARE_START)
mbed_official	237:f3da66175598	5290	{
mbed_official	237:f3da66175598	5291	hadc->Instance->CR1 \|= ADC_CR1_JAUTO;
mbed_official	237:f3da66175598	5292	}
mbed_official	237:f3da66175598	5293	else
mbed_official	237:f3da66175598	5294	{
mbed_official	237:f3da66175598	5295	/* Update ADC state machine to error */
mbed_official	237:f3da66175598	5296	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	5297
mbed_official	237:f3da66175598	5298	tmpHALStatus = HAL_ERROR;
mbed_official	237:f3da66175598	5299	}
mbed_official	237:f3da66175598	5300	}
mbed_official	237:f3da66175598	5301
mbed_official	237:f3da66175598	5302	/* Injected discontinuous can be enabled only if auto-injected mode is */
mbed_official	237:f3da66175598	5303	/* disabled. */
mbed_official	237:f3da66175598	5304	if (sConfigInjected->InjectedDiscontinuousConvMode == ENABLE)
mbed_official	237:f3da66175598	5305	{
mbed_official	237:f3da66175598	5306	if (sConfigInjected->AutoInjectedConv == DISABLE)
mbed_official	237:f3da66175598	5307	{
mbed_official	237:f3da66175598	5308	hadc->Instance->CR1 \|= ADC_CR1_JDISCEN;
mbed_official	237:f3da66175598	5309	}
mbed_official	237:f3da66175598	5310	else
mbed_official	237:f3da66175598	5311	{
mbed_official	237:f3da66175598	5312	/* Update ADC state machine to error */
mbed_official	237:f3da66175598	5313	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	5314
mbed_official	237:f3da66175598	5315	tmpHALStatus = HAL_ERROR;
mbed_official	237:f3da66175598	5316	}
mbed_official	237:f3da66175598	5317	}
mbed_official	237:f3da66175598	5318
mbed_official	237:f3da66175598	5319
mbed_official	237:f3da66175598	5320	/* Channel sampling time configuration */
mbed_official	237:f3da66175598	5321	/* For channels 10 to 18 */
mbed_official	237:f3da66175598	5322	if (sConfigInjected->InjectedChannel > ADC_CHANNEL_10)
mbed_official	237:f3da66175598	5323	{
mbed_official	237:f3da66175598	5324	/* Clear the old sample time */
mbed_official	237:f3da66175598	5325	hadc->Instance->SMPR1 &= ~__HAL_ADC_SMPR1(ADC_SMPR1_SMP10, sConfigInjected->InjectedChannel);
mbed_official	237:f3da66175598	5326
mbed_official	237:f3da66175598	5327	/* Set the new sample time */
mbed_official	237:f3da66175598	5328	hadc->Instance->SMPR1 \|= __HAL_ADC_SMPR1(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel);
mbed_official	237:f3da66175598	5329	}
mbed_official	237:f3da66175598	5330	else /* For channels 0 to 9 */
mbed_official	237:f3da66175598	5331	{
mbed_official	237:f3da66175598	5332	/* Clear the old sample time */
mbed_official	237:f3da66175598	5333	hadc->Instance->SMPR2 &= ~__HAL_ADC_SMPR2(ADC_SMPR2_SMP0, sConfigInjected->InjectedChannel);
mbed_official	237:f3da66175598	5334
mbed_official	237:f3da66175598	5335	/* Set the new sample time */
mbed_official	237:f3da66175598	5336	hadc->Instance->SMPR2 \|= __HAL_ADC_SMPR2(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel);
mbed_official	237:f3da66175598	5337	}
mbed_official	237:f3da66175598	5338
mbed_official	237:f3da66175598	5339	/* Configure the offset: offset enable/disable, InjectedChannel, offset value */
mbed_official	237:f3da66175598	5340	switch(sConfigInjected->InjectedRank)
mbed_official	237:f3da66175598	5341	{
mbed_official	237:f3da66175598	5342	case 1:
mbed_official	237:f3da66175598	5343	/* Set injected channel 1 offset */
mbed_official	237:f3da66175598	5344	hadc->Instance->JOFR1 &= ~(ADC_JOFR1_JOFFSET1);
mbed_official	237:f3da66175598	5345	hadc->Instance->JOFR1 \|= sConfigInjected->InjectedOffset;
mbed_official	237:f3da66175598	5346	break;
mbed_official	237:f3da66175598	5347	case 2:
mbed_official	237:f3da66175598	5348	/* Set injected channel 2 offset */
mbed_official	237:f3da66175598	5349	hadc->Instance->JOFR2 &= ~(ADC_JOFR2_JOFFSET2);
mbed_official	237:f3da66175598	5350	hadc->Instance->JOFR2 \|= sConfigInjected->InjectedOffset;
mbed_official	237:f3da66175598	5351	break;
mbed_official	237:f3da66175598	5352	case 3:
mbed_official	237:f3da66175598	5353	/* Set injected channel 3 offset */
mbed_official	237:f3da66175598	5354	hadc->Instance->JOFR3 &= ~(ADC_JOFR3_JOFFSET3);
mbed_official	237:f3da66175598	5355	hadc->Instance->JOFR3 \|= sConfigInjected->InjectedOffset;
mbed_official	237:f3da66175598	5356	break;
mbed_official	237:f3da66175598	5357	default:
mbed_official	237:f3da66175598	5358	/* Set injected channel 4 offset */
mbed_official	237:f3da66175598	5359	hadc->Instance->JOFR4 &= ~(ADC_JOFR4_JOFFSET4);
mbed_official	237:f3da66175598	5360	hadc->Instance->JOFR4 \|= sConfigInjected->InjectedOffset;
mbed_official	237:f3da66175598	5361	break;
mbed_official	237:f3da66175598	5362	}
mbed_official	237:f3da66175598	5363
mbed_official	237:f3da66175598	5364	/* if ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor / VREFINT measurement path */
mbed_official	237:f3da66175598	5365	if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) \|\| (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT))
mbed_official	237:f3da66175598	5366	{
mbed_official	237:f3da66175598	5367	hadc->Instance->CR2 \|= ADC_CR2_TSVREFE;
mbed_official	237:f3da66175598	5368	}
mbed_official	237:f3da66175598	5369	/* if ADC1 Channel_17 is selected, enable VBAT measurement path */
mbed_official	237:f3da66175598	5370	else if (sConfigInjected->InjectedChannel == ADC_CHANNEL_VBAT)
mbed_official	237:f3da66175598	5371	{
mbed_official	237:f3da66175598	5372	SYSCFG->CFGR1 \|= SYSCFG_CFGR1_VBAT;
mbed_official	237:f3da66175598	5373	}
mbed_official	237:f3da66175598	5374
mbed_official	237:f3da66175598	5375	/* Process unlocked */
mbed_official	237:f3da66175598	5376	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	5377
mbed_official	237:f3da66175598	5378	/* Return function status */
mbed_official	237:f3da66175598	5379	return tmpHALStatus;
mbed_official	237:f3da66175598	5380	}
mbed_official	237:f3da66175598	5381	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	237:f3da66175598	5382
mbed_official	237:f3da66175598	5383	#if defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| defined(STM32F302xC) \|\| defined(STM32F303x8) \|\| defined(STM32F328xx) \|\| defined(STM32F334x8) \|\| defined(STM32F301x8) \|\| defined(STM32F318xx) \|\| defined(STM32F302x8)
mbed_official	237:f3da66175598	5384	/**
mbed_official	237:f3da66175598	5385	* @brief Configures the analog watchdog.
mbed_official	237:f3da66175598	5386	* @note Possibility to update parameters on the fly:
mbed_official	237:f3da66175598	5387	* This function initializes the selected analog watchdog, following
mbed_official	237:f3da66175598	5388	* calls to this function can be used to reconfigure some parameters
mbed_official	237:f3da66175598	5389	* of structure "ADC_AnalogWDGConfTypeDef" on the fly, without reseting
mbed_official	237:f3da66175598	5390	* the ADC.
mbed_official	237:f3da66175598	5391	* The setting of these parameters is conditioned to ADC state.
mbed_official	237:f3da66175598	5392	* For parameters constraints, see comments of structure
mbed_official	237:f3da66175598	5393	* "ADC_AnalogWDGConfTypeDef".
mbed_official	237:f3da66175598	5394	* @param hadc: ADC handle
mbed_official	237:f3da66175598	5395	* @param AnalogWDGConfig: Structure of ADC analog watchdog configuration
mbed_official	237:f3da66175598	5396	* @retval HAL status
mbed_official	237:f3da66175598	5397	*/
mbed_official	237:f3da66175598	5398	HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig)
mbed_official	237:f3da66175598	5399	{
mbed_official	237:f3da66175598	5400	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	237:f3da66175598	5401
mbed_official	237:f3da66175598	5402	uint32_t tmpAWDHighThresholdShifted;
mbed_official	237:f3da66175598	5403	uint32_t tmpAWDLowThresholdShifted;
mbed_official	237:f3da66175598	5404
mbed_official	237:f3da66175598	5405	uint32_t tmpADCFlagAWD2orAWD3;
mbed_official	237:f3da66175598	5406	uint32_t tmpADCITAWD2orAWD3;
mbed_official	237:f3da66175598	5407
mbed_official	237:f3da66175598	5408	/* Check the parameters */
mbed_official	237:f3da66175598	5409	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	5410	assert_param(IS_ADC_ANALOG_WATCHDOG_NUMBER(AnalogWDGConfig->WatchdogNumber));
mbed_official	237:f3da66175598	5411	assert_param(IS_ADC_ANALOG_WATCHDOG_MODE(AnalogWDGConfig->WatchdogMode));
mbed_official	237:f3da66175598	5412	assert_param(IS_ADC_CHANNEL(AnalogWDGConfig->Channel));
mbed_official	237:f3da66175598	5413	assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode));
mbed_official	237:f3da66175598	5414
mbed_official	237:f3da66175598	5415	/* Verify if threshold is within the selected ADC resolution */
mbed_official	237:f3da66175598	5416	assert_param(IS_ADC_RANGE(__HAL_ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->HighThreshold));
mbed_official	237:f3da66175598	5417	assert_param(IS_ADC_RANGE(__HAL_ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->LowThreshold));
mbed_official	237:f3da66175598	5418
mbed_official	237:f3da66175598	5419	/* Process locked */
mbed_official	237:f3da66175598	5420	__HAL_LOCK(hadc);
mbed_official	237:f3da66175598	5421
mbed_official	237:f3da66175598	5422	/* Parameters update conditioned to ADC state: */
mbed_official	237:f3da66175598	5423	/* Parameters that can be updated when ADC is disabled or enabled without */
mbed_official	237:f3da66175598	5424	/* conversion on going on regular and injected groups: */
mbed_official	237:f3da66175598	5425	/* - Analog watchdog channels */
mbed_official	237:f3da66175598	5426	/* - Analog watchdog thresholds */
mbed_official	237:f3da66175598	5427	if (__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET)
mbed_official	237:f3da66175598	5428	{
mbed_official	237:f3da66175598	5429
mbed_official	237:f3da66175598	5430	/* Analog watchdogs configuration */
mbed_official	237:f3da66175598	5431	if(AnalogWDGConfig->WatchdogNumber == ADC_ANALOGWATCHDOG_1)
mbed_official	237:f3da66175598	5432	{
mbed_official	237:f3da66175598	5433	/* Configuration of analog watchdog: */
mbed_official	237:f3da66175598	5434	/* - Set the analog watchdog enable mode: regular and/or injected */
mbed_official	237:f3da66175598	5435	/* groups, one or overall group of channels. */
mbed_official	237:f3da66175598	5436	/* - Set the Analog watchdog channel (is not used if watchdog */
mbed_official	237:f3da66175598	5437	/* mode "all channels": ADC_CFGR_AWD1SGL=0). */
mbed_official	237:f3da66175598	5438	hadc->Instance->CFGR &= ~( ADC_CFGR_AWD1SGL \|
mbed_official	237:f3da66175598	5439	ADC_CFGR_JAWD1EN \|
mbed_official	237:f3da66175598	5440	ADC_CFGR_AWD1EN \|
mbed_official	237:f3da66175598	5441	ADC_CFGR_AWD1CH );
mbed_official	237:f3da66175598	5442
mbed_official	237:f3da66175598	5443	hadc->Instance->CFGR \|= ( AnalogWDGConfig->WatchdogMode \|
mbed_official	237:f3da66175598	5444	__HAL_ADC_CFGR_AWD1CH(AnalogWDGConfig->Channel) );
mbed_official	237:f3da66175598	5445
mbed_official	237:f3da66175598	5446	/* Shift the offset in function of the selected ADC resolution: */
mbed_official	237:f3da66175598	5447	/* Thresholds have to be left-aligned on bit 11, the LSB (right bits) */
mbed_official	237:f3da66175598	5448	/* are set to 0 */
mbed_official	237:f3da66175598	5449	tmpAWDHighThresholdShifted = __HAL_ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->HighThreshold);
mbed_official	237:f3da66175598	5450	tmpAWDLowThresholdShifted = __HAL_ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThreshold);
mbed_official	237:f3da66175598	5451
mbed_official	237:f3da66175598	5452	/* Set the high and low thresholds */
mbed_official	237:f3da66175598	5453	hadc->Instance->TR1 &= ~(ADC_TR1_HT1 \| ADC_TR1_LT1);
mbed_official	237:f3da66175598	5454	hadc->Instance->TR1 \|= ( __HAL_ADC_TRX_HIGHTHRESHOLD (tmpAWDHighThresholdShifted) \|
mbed_official	237:f3da66175598	5455	tmpAWDLowThresholdShifted );
mbed_official	237:f3da66175598	5456
mbed_official	237:f3da66175598	5457	/* Clear the ADC Analog watchdog flag (in case of let enabled by */
mbed_official	237:f3da66175598	5458	/* previous ADC operations) to be ready to use for HAL_ADC_IRQHandler() */
mbed_official	237:f3da66175598	5459	/* or HAL_ADC_PollForEvent(). */
mbed_official	237:f3da66175598	5460	__HAL_ADC_CLEAR_FLAG(hadc, ADC_IT_AWD1);
mbed_official	237:f3da66175598	5461
mbed_official	237:f3da66175598	5462	/* Configure ADC Analog watchdog interrupt */
mbed_official	237:f3da66175598	5463	if(AnalogWDGConfig->ITMode == ENABLE)
mbed_official	237:f3da66175598	5464	{
mbed_official	237:f3da66175598	5465	/* Enable the ADC Analog watchdog interrupt */
mbed_official	237:f3da66175598	5466	__HAL_ADC_ENABLE_IT(hadc, ADC_IT_AWD1);
mbed_official	237:f3da66175598	5467	}
mbed_official	237:f3da66175598	5468	else
mbed_official	237:f3da66175598	5469	{
mbed_official	237:f3da66175598	5470	/* Disable the ADC Analog watchdog interrupt */
mbed_official	237:f3da66175598	5471	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_AWD1);
mbed_official	237:f3da66175598	5472	}
mbed_official	237:f3da66175598	5473
mbed_official	237:f3da66175598	5474	}
mbed_official	237:f3da66175598	5475	/* Case of ADC_ANALOGWATCHDOG_2 and ADC_ANALOGWATCHDOG_3 */
mbed_official	237:f3da66175598	5476	else
mbed_official	237:f3da66175598	5477	{
mbed_official	237:f3da66175598	5478	/* Shift the threshold in function of the selected ADC resolution */
mbed_official	237:f3da66175598	5479	/* have to be left-aligned on bit 7, the LSB (right bits) are set to 0 */
mbed_official	237:f3da66175598	5480	tmpAWDHighThresholdShifted = __HAL_ADC_AWD23THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->HighThreshold);
mbed_official	237:f3da66175598	5481	tmpAWDLowThresholdShifted = __HAL_ADC_AWD23THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThreshold);
mbed_official	237:f3da66175598	5482
mbed_official	237:f3da66175598	5483	if (AnalogWDGConfig->WatchdogNumber == ADC_ANALOGWATCHDOG_2)
mbed_official	237:f3da66175598	5484	{
mbed_official	237:f3da66175598	5485	/* Set the Analog watchdog channel or group of channels. This also */
mbed_official	237:f3da66175598	5486	/* enables the watchdog. */
mbed_official	237:f3da66175598	5487	/* Note: Conditionnal register reset, because several channels can be */
mbed_official	237:f3da66175598	5488	/* set by successive calls of this function. */
mbed_official	237:f3da66175598	5489	if (AnalogWDGConfig->WatchdogMode != ADC_ANALOGWATCHDOG_NONE)
mbed_official	237:f3da66175598	5490	{
mbed_official	237:f3da66175598	5491	hadc->Instance->AWD2CR \|= __HAL_ADC_CFGR_AWD23CR(AnalogWDGConfig->Channel);
mbed_official	237:f3da66175598	5492	}
mbed_official	237:f3da66175598	5493	else
mbed_official	237:f3da66175598	5494	{
mbed_official	237:f3da66175598	5495	hadc->Instance->AWD2CR &= ~ADC_AWD2CR_AWD2CH;
mbed_official	237:f3da66175598	5496	}
mbed_official	237:f3da66175598	5497
mbed_official	237:f3da66175598	5498	/* Set the high and low thresholds */
mbed_official	237:f3da66175598	5499	hadc->Instance->TR2 &= ~(ADC_TR2_HT2 \| ADC_TR2_LT2);
mbed_official	237:f3da66175598	5500	hadc->Instance->TR2 \|= ( __HAL_ADC_TRX_HIGHTHRESHOLD (tmpAWDHighThresholdShifted) \|
mbed_official	237:f3da66175598	5501	tmpAWDLowThresholdShifted );
mbed_official	237:f3da66175598	5502
mbed_official	237:f3da66175598	5503	/* Set temporary variable to flag and IT of AWD2 or AWD3 for further */
mbed_official	237:f3da66175598	5504	/* settings. */
mbed_official	237:f3da66175598	5505	tmpADCFlagAWD2orAWD3 = ADC_FLAG_AWD2;
mbed_official	237:f3da66175598	5506	tmpADCITAWD2orAWD3 = ADC_IT_AWD2;
mbed_official	237:f3da66175598	5507	}
mbed_official	237:f3da66175598	5508	/* (AnalogWDGConfig->WatchdogNumber == ADC_ANALOGWATCHDOG_3) */
mbed_official	237:f3da66175598	5509	else
mbed_official	237:f3da66175598	5510	{
mbed_official	237:f3da66175598	5511	/* Set the Analog watchdog channel or group of channels. This also */
mbed_official	237:f3da66175598	5512	/* enables the watchdog. */
mbed_official	237:f3da66175598	5513	/* Note: Conditionnal register reset, because several channels can be */
mbed_official	237:f3da66175598	5514	/* set by successive calls of this function. */
mbed_official	237:f3da66175598	5515	if (AnalogWDGConfig->WatchdogMode != ADC_ANALOGWATCHDOG_NONE)
mbed_official	237:f3da66175598	5516	{
mbed_official	237:f3da66175598	5517	hadc->Instance->AWD3CR \|= __HAL_ADC_CFGR_AWD23CR(AnalogWDGConfig->Channel);
mbed_official	237:f3da66175598	5518	}
mbed_official	237:f3da66175598	5519	else
mbed_official	237:f3da66175598	5520	{
mbed_official	237:f3da66175598	5521	hadc->Instance->AWD3CR &= ~ADC_AWD3CR_AWD3CH;
mbed_official	237:f3da66175598	5522	}
mbed_official	237:f3da66175598	5523
mbed_official	237:f3da66175598	5524	/* Set the high and low thresholds */
mbed_official	237:f3da66175598	5525	hadc->Instance->TR3 &= ~(ADC_TR3_HT3 \| ADC_TR3_LT3);
mbed_official	237:f3da66175598	5526	hadc->Instance->TR3 \|= ( __HAL_ADC_TRX_HIGHTHRESHOLD (tmpAWDHighThresholdShifted) \|
mbed_official	237:f3da66175598	5527	tmpAWDLowThresholdShifted );
mbed_official	237:f3da66175598	5528
mbed_official	237:f3da66175598	5529	/* Set temporary variable to flag and IT of AWD2 or AWD3 for further */
mbed_official	237:f3da66175598	5530	/* settings. */
mbed_official	237:f3da66175598	5531	tmpADCFlagAWD2orAWD3 = ADC_FLAG_AWD3;
mbed_official	237:f3da66175598	5532	tmpADCITAWD2orAWD3 = ADC_IT_AWD3;
mbed_official	237:f3da66175598	5533	}
mbed_official	237:f3da66175598	5534
mbed_official	237:f3da66175598	5535	/* Clear the ADC Analog watchdog flag (in case of let enabled by */
mbed_official	237:f3da66175598	5536	/* previous ADC operations) to be ready to use for HAL_ADC_IRQHandler() */
mbed_official	237:f3da66175598	5537	/* or HAL_ADC_PollForEvent(). */
mbed_official	237:f3da66175598	5538	__HAL_ADC_CLEAR_FLAG(hadc, tmpADCFlagAWD2orAWD3);
mbed_official	237:f3da66175598	5539
mbed_official	237:f3da66175598	5540	/* Configure ADC Analog watchdog interrupt */
mbed_official	237:f3da66175598	5541	if(AnalogWDGConfig->ITMode == ENABLE)
mbed_official	237:f3da66175598	5542	{
mbed_official	237:f3da66175598	5543	__HAL_ADC_ENABLE_IT(hadc, tmpADCITAWD2orAWD3);
mbed_official	237:f3da66175598	5544	}
mbed_official	237:f3da66175598	5545	else
mbed_official	237:f3da66175598	5546	{
mbed_official	237:f3da66175598	5547	__HAL_ADC_DISABLE_IT(hadc, tmpADCITAWD2orAWD3);
mbed_official	237:f3da66175598	5548	}
mbed_official	237:f3da66175598	5549	}
mbed_official	237:f3da66175598	5550
mbed_official	237:f3da66175598	5551	}
mbed_official	237:f3da66175598	5552	/* If a conversion is on going on regular or injected groups, no update */
mbed_official	237:f3da66175598	5553	/* could be done on neither of the AWD configuration structure parameters. */
mbed_official	237:f3da66175598	5554	else
mbed_official	237:f3da66175598	5555	{
mbed_official	237:f3da66175598	5556	/* Update ADC state machine to error */
mbed_official	237:f3da66175598	5557	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	5558
mbed_official	237:f3da66175598	5559	tmpHALStatus = HAL_ERROR;
mbed_official	237:f3da66175598	5560	}
mbed_official	237:f3da66175598	5561
mbed_official	237:f3da66175598	5562
mbed_official	237:f3da66175598	5563	/* Process unlocked */
mbed_official	237:f3da66175598	5564	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	5565
mbed_official	237:f3da66175598	5566	/* Return function status */
mbed_official	237:f3da66175598	5567	return tmpHALStatus;
mbed_official	237:f3da66175598	5568	}
mbed_official	237:f3da66175598	5569	#endif /* STM32F303xC \|\| STM32F358xx \|\| STM32F302xC \|\| STM32F303x8 \|\| STM32F328xx \|\| STM32F334x8 \|\| STM32F301x8 \|\| STM32F318xx \|\| STM32F302x8 */
mbed_official	237:f3da66175598	5570
mbed_official	237:f3da66175598	5571	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	237:f3da66175598	5572	/**
mbed_official	237:f3da66175598	5573	* @brief Configures the analog watchdog.
mbed_official	237:f3da66175598	5574	* @param hadc: ADC handle
mbed_official	237:f3da66175598	5575	* @param AnalogWDGConfig: Structure of ADC analog watchdog configuration
mbed_official	237:f3da66175598	5576	* @retval HAL status
mbed_official	237:f3da66175598	5577	*/
mbed_official	237:f3da66175598	5578	HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig)
mbed_official	237:f3da66175598	5579	{
mbed_official	237:f3da66175598	5580	/* Check the parameters */
mbed_official	237:f3da66175598	5581	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	5582	assert_param(IS_ADC_ANALOG_WATCHDOG_MODE(AnalogWDGConfig->WatchdogMode));
mbed_official	237:f3da66175598	5583	assert_param(IS_ADC_CHANNEL(AnalogWDGConfig->Channel));
mbed_official	237:f3da66175598	5584	assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode));
mbed_official	237:f3da66175598	5585	assert_param(IS_ADC_RANGE(AnalogWDGConfig->HighThreshold));
mbed_official	237:f3da66175598	5586	assert_param(IS_ADC_RANGE(AnalogWDGConfig->LowThreshold));
mbed_official	237:f3da66175598	5587
mbed_official	237:f3da66175598	5588	/* Process locked */
mbed_official	237:f3da66175598	5589	__HAL_LOCK(hadc);
mbed_official	237:f3da66175598	5590
mbed_official	237:f3da66175598	5591	/* Analog watchdog configuration */
mbed_official	237:f3da66175598	5592
mbed_official	237:f3da66175598	5593	/* Configure ADC Analog watchdog interrupt */
mbed_official	237:f3da66175598	5594	if(AnalogWDGConfig->ITMode == ENABLE)
mbed_official	237:f3da66175598	5595	{
mbed_official	237:f3da66175598	5596	/* Enable the ADC Analog watchdog interrupt */
mbed_official	237:f3da66175598	5597	__HAL_ADC_ENABLE_IT(hadc, ADC_IT_AWD);
mbed_official	237:f3da66175598	5598	}
mbed_official	237:f3da66175598	5599	else
mbed_official	237:f3da66175598	5600	{
mbed_official	237:f3da66175598	5601	/* Disable the ADC Analog watchdog interrupt */
mbed_official	237:f3da66175598	5602	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_AWD);
mbed_official	237:f3da66175598	5603	}
mbed_official	237:f3da66175598	5604
mbed_official	237:f3da66175598	5605	/* Configuration of analog watchdog: */
mbed_official	237:f3da66175598	5606	/* - Set the analog watchdog enable mode: regular and/or injected groups, */
mbed_official	237:f3da66175598	5607	/* one or all channels. */
mbed_official	237:f3da66175598	5608	/* - Set the Analog watchdog channel (is not used if watchdog */
mbed_official	237:f3da66175598	5609	/* mode "all channels": ADC_CFGR_AWD1SGL=0). */
mbed_official	237:f3da66175598	5610	hadc->Instance->CR1 &= ~( ADC_CR1_AWDSGL \|
mbed_official	237:f3da66175598	5611	ADC_CR1_JAWDEN \|
mbed_official	237:f3da66175598	5612	ADC_CR1_AWDEN \|
mbed_official	237:f3da66175598	5613	ADC_CR1_AWDCH );
mbed_official	237:f3da66175598	5614
mbed_official	237:f3da66175598	5615	hadc->Instance->CR1 \|= ( AnalogWDGConfig->WatchdogMode \|
mbed_official	237:f3da66175598	5616	AnalogWDGConfig->Channel );
mbed_official	237:f3da66175598	5617
mbed_official	237:f3da66175598	5618	/* Set the high threshold */
mbed_official	237:f3da66175598	5619	hadc->Instance->HTR = AnalogWDGConfig->HighThreshold;
mbed_official	237:f3da66175598	5620
mbed_official	237:f3da66175598	5621	/* Set the low threshold */
mbed_official	237:f3da66175598	5622	hadc->Instance->LTR = AnalogWDGConfig->LowThreshold;
mbed_official	237:f3da66175598	5623
mbed_official	237:f3da66175598	5624	/* Process unlocked */
mbed_official	237:f3da66175598	5625	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	5626
mbed_official	237:f3da66175598	5627	/* Return function status */
mbed_official	237:f3da66175598	5628	return HAL_OK;
mbed_official	237:f3da66175598	5629	}
mbed_official	237:f3da66175598	5630	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	237:f3da66175598	5631
mbed_official	237:f3da66175598	5632
mbed_official	237:f3da66175598	5633	#if defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| defined(STM32F302xC) \|\| defined(STM32F303x8) \|\| defined(STM32F328xx) \|\| defined(STM32F334x8)/**
mbed_official	237:f3da66175598	5634	* @brief Enable ADC multimode and configure multimode parameters
mbed_official	237:f3da66175598	5635	* @note Possibility to update parameters on the fly:
mbed_official	237:f3da66175598	5636	* This function initializes multimode parameters, following
mbed_official	237:f3da66175598	5637	* calls to this function can be used to reconfigure some parameters
mbed_official	237:f3da66175598	5638	* of structure "ADC_MultiModeTypeDef" on the fly, without reseting
mbed_official	237:f3da66175598	5639	* the ADCs (both ADCs of the common group).
mbed_official	237:f3da66175598	5640	* The setting of these parameters is conditioned to ADC state.
mbed_official	237:f3da66175598	5641	* For parameters constraints, see comments of structure
mbed_official	237:f3da66175598	5642	* "ADC_MultiModeTypeDef".
mbed_official	237:f3da66175598	5643	* @note To change back configuration from multimode to single mode, ADC must
mbed_official	237:f3da66175598	5644	* be reset (using function HAL_ADC_Init() ).
mbed_official	237:f3da66175598	5645	* @param hadc: ADC handle
mbed_official	237:f3da66175598	5646	* @param multimode : Structure of ADC multimode configuration
mbed_official	237:f3da66175598	5647	* @retval HAL status
mbed_official	237:f3da66175598	5648	*/
mbed_official	237:f3da66175598	5649	HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode)
mbed_official	237:f3da66175598	5650	{
mbed_official	237:f3da66175598	5651	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	237:f3da66175598	5652	ADC_Common_TypeDef *tmpADC_Common;
mbed_official	237:f3da66175598	5653	ADC_HandleTypeDef tmphadcSharingSameCommonRegister;
mbed_official	237:f3da66175598	5654
mbed_official	237:f3da66175598	5655	/* Check the parameters */
mbed_official	237:f3da66175598	5656	assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	5657	assert_param(IS_ADC_MODE(multimode->Mode));
mbed_official	237:f3da66175598	5658	assert_param(IS_ADC_DMA_ACCESS_MODE(multimode->DMAAccessMode));
mbed_official	237:f3da66175598	5659	assert_param(IS_ADC_SAMPLING_DELAY(multimode->TwoSamplingDelay));
mbed_official	237:f3da66175598	5660
mbed_official	237:f3da66175598	5661	/* Process locked */
mbed_official	237:f3da66175598	5662	__HAL_LOCK(hadc);
mbed_official	237:f3da66175598	5663
mbed_official	237:f3da66175598	5664
mbed_official	237:f3da66175598	5665	/* Set handle of the other ADC sharing the same common register */
mbed_official	237:f3da66175598	5666	__HAL_ADC_COMMON_ADC_OTHER(hadc, &tmphadcSharingSameCommonRegister);
mbed_official	237:f3da66175598	5667
mbed_official	237:f3da66175598	5668	/* Parameters update conditioned to ADC state: */
mbed_official	237:f3da66175598	5669	/* Parameters that can be updated when ADC is disabled or enabled without */
mbed_official	237:f3da66175598	5670	/* conversion on going on regular group: */
mbed_official	237:f3da66175598	5671	/* - Multimode DMA configuration */
mbed_official	237:f3da66175598	5672	/* - Multimode DMA mode */
mbed_official	237:f3da66175598	5673	/* Parameters that can be updated only when ADC is disabled: */
mbed_official	237:f3da66175598	5674	/* - Multimode mode selection */
mbed_official	237:f3da66175598	5675	/* - Multimode delay */
mbed_official	237:f3da66175598	5676	/* To optimize code, all multimode settings can be set when both ADCs of */
mbed_official	237:f3da66175598	5677	/* the common group are in state: disabled. */
mbed_official	237:f3da66175598	5678	if ((__HAL_ADC_IS_ENABLED(hadc) == RESET) &&
mbed_official	237:f3da66175598	5679	(__HAL_ADC_IS_ENABLED(&tmphadcSharingSameCommonRegister) == RESET) )
mbed_official	237:f3da66175598	5680	{
mbed_official	237:f3da66175598	5681
mbed_official	237:f3da66175598	5682	/* Pointer to the common control register to which is belonging hadc */
mbed_official	237:f3da66175598	5683	/* (Depending on STM32F3 product, there may have up to 4 ADC and 2 common */
mbed_official	237:f3da66175598	5684	/* control registers) */
mbed_official	237:f3da66175598	5685	tmpADC_Common = __HAL_ADC_COMMON_REGISTER(hadc);
mbed_official	237:f3da66175598	5686
mbed_official	237:f3da66175598	5687	/* Configuration of ADC common group ADC1&ADC2, ADC3&ADC4 if available */
mbed_official	237:f3da66175598	5688	/* (ADC2, ADC3, ADC4 availability depends on STM32 product) */
mbed_official	237:f3da66175598	5689	/* - set the selected multimode */
mbed_official	237:f3da66175598	5690	/* - DMA access mode */
mbed_official	237:f3da66175598	5691	/* - Set delay between two sampling phases */
mbed_official	237:f3da66175598	5692	/* Note: Delay range depends on selected resolution: */
mbed_official	237:f3da66175598	5693	/* from 1 to 12 clock cycles for 12 bits */
mbed_official	237:f3da66175598	5694	/* from 1 to 10 clock cycles for 10 bits, */
mbed_official	237:f3da66175598	5695	/* from 1 to 8 clock cycles for 8 bits */
mbed_official	237:f3da66175598	5696	/* from 1 to 6 clock cycles for 6 bits */
mbed_official	237:f3da66175598	5697	/* If a higher delay is selected, it will be clamped to maximum delay */
mbed_official	237:f3da66175598	5698	/* range */
mbed_official	237:f3da66175598	5699	tmpADC_Common->CCR &= ~( ADC_CCR_MULTI \|
mbed_official	237:f3da66175598	5700	ADC_CCR_MDMA \|
mbed_official	237:f3da66175598	5701	ADC_CCR_DELAY \|
mbed_official	237:f3da66175598	5702	ADC_CCR_DMACFG );
mbed_official	237:f3da66175598	5703
mbed_official	237:f3da66175598	5704	tmpADC_Common->CCR \|= ( multimode->Mode \|
mbed_official	237:f3da66175598	5705	multimode->DMAAccessMode \|
mbed_official	237:f3da66175598	5706	multimode->TwoSamplingDelay \|
mbed_official	237:f3da66175598	5707	__HAL_ADC_CCR_MULTI_DMACONTREQ(hadc->Init.DMAContinuousRequests) );
mbed_official	237:f3da66175598	5708	}
mbed_official	237:f3da66175598	5709	/* If one of the ADC sharing the same common group is enabled, no update */
mbed_official	237:f3da66175598	5710	/* could be done on neither of the multimode structure parameters. */
mbed_official	237:f3da66175598	5711	else
mbed_official	237:f3da66175598	5712	{
mbed_official	237:f3da66175598	5713	/* Update ADC state machine to error */
mbed_official	237:f3da66175598	5714	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	5715
mbed_official	237:f3da66175598	5716	tmpHALStatus = HAL_ERROR;
mbed_official	237:f3da66175598	5717	}
mbed_official	237:f3da66175598	5718
mbed_official	237:f3da66175598	5719
mbed_official	237:f3da66175598	5720	/* Process unlocked */
mbed_official	237:f3da66175598	5721	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	5722
mbed_official	237:f3da66175598	5723	/* Return function status */
mbed_official	237:f3da66175598	5724	return tmpHALStatus;
mbed_official	237:f3da66175598	5725	}
mbed_official	237:f3da66175598	5726	#endif /* STM32F303xC \|\| STM32F358xx \|\| STM32F302xC \|\| STM32F303x8 \|\| STM32F328xx \|\| STM32F334x8 */
mbed_official	237:f3da66175598	5727
mbed_official	237:f3da66175598	5728	/**
mbed_official	237:f3da66175598	5729	* @}
mbed_official	237:f3da66175598	5730	*/
mbed_official	237:f3da66175598	5731
mbed_official	237:f3da66175598	5732	/** @defgroup ADCEx_Group4 Extended Peripheral State functions
mbed_official	237:f3da66175598	5733	* @brief Extended Peripheral State functions
mbed_official	237:f3da66175598	5734	*
mbed_official	237:f3da66175598	5735	@verbatim
mbed_official	237:f3da66175598	5736	===============================================================================
mbed_official	237:f3da66175598	5737	##### Peripheral state and errors functions #####
mbed_official	237:f3da66175598	5738	===============================================================================
mbed_official	237:f3da66175598	5739	[..]
mbed_official	237:f3da66175598	5740	This subsection provides functions to get in run-time the status of the
mbed_official	237:f3da66175598	5741	peripheral.
mbed_official	237:f3da66175598	5742	(+) Check the ADC state
mbed_official	237:f3da66175598	5743	(+) Check the ADC error code
mbed_official	237:f3da66175598	5744
mbed_official	237:f3da66175598	5745	@endverbatim
mbed_official	237:f3da66175598	5746	* @{
mbed_official	237:f3da66175598	5747	*/
mbed_official	237:f3da66175598	5748
mbed_official	237:f3da66175598	5749	/**
mbed_official	237:f3da66175598	5750	* @}
mbed_official	237:f3da66175598	5751	*/
mbed_official	237:f3da66175598	5752
mbed_official	237:f3da66175598	5753	#if defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| defined(STM32F302xC) \|\| defined(STM32F303x8) \|\| defined(STM32F328xx) \|\| defined(STM32F334x8) \|\| defined(STM32F301x8) \|\| defined(STM32F318xx) \|\| defined(STM32F302x8)
mbed_official	237:f3da66175598	5754	/**
mbed_official	237:f3da66175598	5755	* @brief Enable the selected ADC.
mbed_official	237:f3da66175598	5756	* @note Prerequisite condition to use this function: ADC must be disabled
mbed_official	237:f3da66175598	5757	* and voltage regulator must be enabled (done into HAL_ADC_Init()).
mbed_official	237:f3da66175598	5758	* @param hadc: ADC handle
mbed_official	237:f3da66175598	5759	* @retval HAL status.
mbed_official	237:f3da66175598	5760	*/
mbed_official	237:f3da66175598	5761	static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc)
mbed_official	237:f3da66175598	5762	{
mbed_official	237:f3da66175598	5763	uint32_t tickstart = 0;
mbed_official	237:f3da66175598	5764
mbed_official	237:f3da66175598	5765	/* ADC enable and wait for ADC ready (in case of ADC is disabled or */
mbed_official	237:f3da66175598	5766	/* enabling phase not yet completed: flag ADC ready not yet set). */
mbed_official	237:f3da66175598	5767	/* Timeout implemented to not be stuck if ADC cannot be enabled (possible */
mbed_official	237:f3da66175598	5768	/* causes: ADC clock not running, ...). */
mbed_official	237:f3da66175598	5769	if (__HAL_ADC_IS_ENABLED(hadc) == RESET)
mbed_official	237:f3da66175598	5770	{
mbed_official	237:f3da66175598	5771	/* Check if conditions to enable the ADC are fulfilled */
mbed_official	237:f3da66175598	5772	if (__HAL_ADC_ENABLING_CONDITIONS(hadc) == RESET)
mbed_official	237:f3da66175598	5773	{
mbed_official	237:f3da66175598	5774	/* Update ADC state machine to error */
mbed_official	237:f3da66175598	5775	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	5776
mbed_official	237:f3da66175598	5777	/* Set ADC error code to ADC IP internal error */
mbed_official	237:f3da66175598	5778	hadc->ErrorCode \|= HAL_ADC_ERROR_INTERNAL;
mbed_official	237:f3da66175598	5779
mbed_official	237:f3da66175598	5780	return HAL_ERROR;
mbed_official	237:f3da66175598	5781	}
mbed_official	237:f3da66175598	5782
mbed_official	237:f3da66175598	5783	/* Enable the ADC peripheral */
mbed_official	237:f3da66175598	5784	__HAL_ADC_ENABLE(hadc);
mbed_official	237:f3da66175598	5785
mbed_official	237:f3da66175598	5786	/* Wait for ADC effectively enabled */
mbed_official	237:f3da66175598	5787	tickstart = HAL_GetTick();
mbed_official	237:f3da66175598	5788
mbed_official	237:f3da66175598	5789	while(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == RESET)
mbed_official	237:f3da66175598	5790	{
mbed_official	237:f3da66175598	5791	if((HAL_GetTick()-tickstart) > ADC_ENABLE_TIMEOUT)
mbed_official	237:f3da66175598	5792	{
mbed_official	237:f3da66175598	5793	/* Update ADC state machine to error */
mbed_official	237:f3da66175598	5794	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	5795
mbed_official	237:f3da66175598	5796	/* Set ADC error code to ADC IP internal error */
mbed_official	237:f3da66175598	5797	hadc->ErrorCode \|= HAL_ADC_ERROR_INTERNAL;
mbed_official	237:f3da66175598	5798
mbed_official	237:f3da66175598	5799	return HAL_ERROR;
mbed_official	237:f3da66175598	5800	}
mbed_official	237:f3da66175598	5801	}
mbed_official	237:f3da66175598	5802	}
mbed_official	237:f3da66175598	5803
mbed_official	237:f3da66175598	5804	/* Return HAL status */
mbed_official	237:f3da66175598	5805	return HAL_OK;
mbed_official	237:f3da66175598	5806	}
mbed_official	237:f3da66175598	5807
mbed_official	237:f3da66175598	5808	/**
mbed_official	237:f3da66175598	5809	* @brief Disable the selected ADC.
mbed_official	237:f3da66175598	5810	* @note Prerequisite condition to use this function: ADC conversions must be
mbed_official	237:f3da66175598	5811	* stopped.
mbed_official	237:f3da66175598	5812	* @param hadc: ADC handle
mbed_official	237:f3da66175598	5813	* @retval HAL status.
mbed_official	237:f3da66175598	5814	*/
mbed_official	237:f3da66175598	5815	static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc)
mbed_official	237:f3da66175598	5816	{
mbed_official	237:f3da66175598	5817	uint32_t tickstart = 0;
mbed_official	237:f3da66175598	5818
mbed_official	237:f3da66175598	5819	/* Verification if ADC is not already disabled: */
mbed_official	237:f3da66175598	5820	/* Note: forbidden to disable ADC (set bit ADC_CR_ADDIS) if ADC is already */
mbed_official	237:f3da66175598	5821	/* disabled. */
mbed_official	237:f3da66175598	5822	if (__HAL_ADC_IS_ENABLED(hadc) != RESET )
mbed_official	237:f3da66175598	5823	{
mbed_official	237:f3da66175598	5824	/* Check if conditions to disable the ADC are fulfilled */
mbed_official	237:f3da66175598	5825	if (__HAL_ADC_DISABLING_CONDITIONS(hadc) != RESET)
mbed_official	237:f3da66175598	5826	{
mbed_official	237:f3da66175598	5827	/* Disable the ADC peripheral */
mbed_official	237:f3da66175598	5828	__HAL_ADC_DISABLE(hadc);
mbed_official	237:f3da66175598	5829	}
mbed_official	237:f3da66175598	5830	else
mbed_official	237:f3da66175598	5831	{
mbed_official	237:f3da66175598	5832	/* Update ADC state machine to error */
mbed_official	237:f3da66175598	5833	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	5834
mbed_official	237:f3da66175598	5835	/* Set ADC error code to ADC IP internal error */
mbed_official	237:f3da66175598	5836	hadc->ErrorCode \|= HAL_ADC_ERROR_INTERNAL;
mbed_official	237:f3da66175598	5837
mbed_official	237:f3da66175598	5838	return HAL_ERROR;
mbed_official	237:f3da66175598	5839	}
mbed_official	237:f3da66175598	5840
mbed_official	237:f3da66175598	5841	/* Wait for ADC effectively disabled */
mbed_official	237:f3da66175598	5842	tickstart = HAL_GetTick();
mbed_official	237:f3da66175598	5843
mbed_official	237:f3da66175598	5844	while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN))
mbed_official	237:f3da66175598	5845	{
mbed_official	237:f3da66175598	5846	if((HAL_GetTick()-tickstart) > ADC_DISABLE_TIMEOUT)
mbed_official	237:f3da66175598	5847	{
mbed_official	237:f3da66175598	5848	/* Update ADC state machine to error */
mbed_official	237:f3da66175598	5849	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	5850
mbed_official	237:f3da66175598	5851	/* Set ADC error code to ADC IP internal error */
mbed_official	237:f3da66175598	5852	hadc->ErrorCode \|= HAL_ADC_ERROR_INTERNAL;
mbed_official	237:f3da66175598	5853
mbed_official	237:f3da66175598	5854	return HAL_ERROR;
mbed_official	237:f3da66175598	5855	}
mbed_official	237:f3da66175598	5856	}
mbed_official	237:f3da66175598	5857	}
mbed_official	237:f3da66175598	5858
mbed_official	237:f3da66175598	5859	/* Return HAL status */
mbed_official	237:f3da66175598	5860	return HAL_OK;
mbed_official	237:f3da66175598	5861	}
mbed_official	237:f3da66175598	5862
mbed_official	237:f3da66175598	5863
mbed_official	237:f3da66175598	5864	/**
mbed_official	237:f3da66175598	5865	* @brief Stop ADC conversion.
mbed_official	237:f3da66175598	5866	* @note Prerequisite condition to use this function: ADC conversions must be
mbed_official	237:f3da66175598	5867	* stopped to disable the ADC.
mbed_official	237:f3da66175598	5868	* @param hadc: ADC handle
mbed_official	237:f3da66175598	5869	* @param ConversionGroup: ADC group regular and/or injected.
mbed_official	237:f3da66175598	5870	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	5871	* @arg REGULAR_GROUP: ADC regular conversion type.
mbed_official	237:f3da66175598	5872	* @arg INJECTED_GROUP: ADC injected conversion type.
mbed_official	237:f3da66175598	5873	* @arg REGULAR_INJECTED_GROUP: ADC regular and injected conversion type.
mbed_official	237:f3da66175598	5874	* @retval HAL status.
mbed_official	237:f3da66175598	5875	*/
mbed_official	237:f3da66175598	5876	static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc, uint32_t ConversionGroup)
mbed_official	237:f3da66175598	5877	{
mbed_official	237:f3da66175598	5878	uint32_t tmp_ADC_CR_ADSTART_JADSTART = 0;
mbed_official	237:f3da66175598	5879	uint32_t tickstart = 0;
mbed_official	237:f3da66175598	5880	uint32_t Conversion_Timeout_CPU_cycles = 0;
mbed_official	237:f3da66175598	5881
mbed_official	237:f3da66175598	5882	/* Check the parameters */
mbed_official	237:f3da66175598	5883	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	237:f3da66175598	5884	assert_param(IS_ADC_CONVERSION_GROUP(ConversionGroup));
mbed_official	237:f3da66175598	5885
mbed_official	237:f3da66175598	5886	/* Verification if ADC is not already stopped (on regular and injected */
mbed_official	237:f3da66175598	5887	/* groups) to bypass this function if not needed. */
mbed_official	237:f3da66175598	5888	if (__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc))
mbed_official	237:f3da66175598	5889	{
mbed_official	237:f3da66175598	5890	/* Particular case of continuous auto-injection mode combined with */
mbed_official	237:f3da66175598	5891	/* auto-delay mode. */
mbed_official	237:f3da66175598	5892	/* In auto-injection mode, regular group stop ADC_CR_ADSTP is used (not */
mbed_official	237:f3da66175598	5893	/* injected group stop ADC_CR_JADSTP). */
mbed_official	237:f3da66175598	5894	/* Procedure to be followed: Wait until JEOS=1, clear JEOS, set ADSTP=1 */
mbed_official	237:f3da66175598	5895	/* (see reference manual). */
mbed_official	237:f3da66175598	5896	if ((HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CFGR_JAUTO))
mbed_official	237:f3da66175598	5897	&& (hadc->Init.ContinuousConvMode==ENABLE)
mbed_official	237:f3da66175598	5898	&& (hadc->Init.LowPowerAutoWait==ENABLE))
mbed_official	237:f3da66175598	5899	{
mbed_official	237:f3da66175598	5900	/* Use stop of regular group */
mbed_official	237:f3da66175598	5901	ConversionGroup = REGULAR_GROUP;
mbed_official	237:f3da66175598	5902
mbed_official	237:f3da66175598	5903	/* Wait until JEOS=1 (maximum Timeout: 4 injected conversions) */
mbed_official	237:f3da66175598	5904	while(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOS) == RESET)
mbed_official	237:f3da66175598	5905	{
mbed_official	237:f3da66175598	5906	if (Conversion_Timeout_CPU_cycles >= (ADC_CONVERSION_TIME_MAX_CPU_CYCLES *4))
mbed_official	237:f3da66175598	5907	{
mbed_official	237:f3da66175598	5908	/* Update ADC state machine to error */
mbed_official	237:f3da66175598	5909	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	5910
mbed_official	237:f3da66175598	5911	/* Set ADC error code to ADC IP internal error */
mbed_official	237:f3da66175598	5912	hadc->ErrorCode \|= HAL_ADC_ERROR_INTERNAL;
mbed_official	237:f3da66175598	5913
mbed_official	237:f3da66175598	5914	return HAL_ERROR;
mbed_official	237:f3da66175598	5915	}
mbed_official	237:f3da66175598	5916	Conversion_Timeout_CPU_cycles ++;
mbed_official	237:f3da66175598	5917	}
mbed_official	237:f3da66175598	5918
mbed_official	237:f3da66175598	5919	/* Clear JEOS */
mbed_official	237:f3da66175598	5920	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOS);
mbed_official	237:f3da66175598	5921	}
mbed_official	237:f3da66175598	5922
mbed_official	237:f3da66175598	5923	/* Stop potential conversion on going on regular group */
mbed_official	237:f3da66175598	5924	if (ConversionGroup != INJECTED_GROUP)
mbed_official	237:f3da66175598	5925	{
mbed_official	237:f3da66175598	5926	/* Software is allowed to set ADSTP only when ADSTART=1 and ADDIS=0 */
mbed_official	237:f3da66175598	5927	if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADSTART) &&
mbed_official	237:f3da66175598	5928	HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADDIS) )
mbed_official	237:f3da66175598	5929	{
mbed_official	237:f3da66175598	5930	/* Stop conversions on regular group */
mbed_official	237:f3da66175598	5931	hadc->Instance->CR \|= ADC_CR_ADSTP;
mbed_official	237:f3da66175598	5932	}
mbed_official	237:f3da66175598	5933	}
mbed_official	237:f3da66175598	5934
mbed_official	237:f3da66175598	5935	/* Stop potential conversion on going on injected group */
mbed_official	237:f3da66175598	5936	if (ConversionGroup != REGULAR_GROUP)
mbed_official	237:f3da66175598	5937	{
mbed_official	237:f3da66175598	5938	/* Software is allowed to set JADSTP only when JADSTART=1 and ADDIS=0 */
mbed_official	237:f3da66175598	5939	if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_JADSTART) &&
mbed_official	237:f3da66175598	5940	HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADDIS) )
mbed_official	237:f3da66175598	5941	{
mbed_official	237:f3da66175598	5942	/* Stop conversions on injected group */
mbed_official	237:f3da66175598	5943	hadc->Instance->CR \|= ADC_CR_JADSTP;
mbed_official	237:f3da66175598	5944	}
mbed_official	237:f3da66175598	5945	}
mbed_official	237:f3da66175598	5946
mbed_official	237:f3da66175598	5947	/* Selection of start and stop bits in function of regular or injected group */
mbed_official	237:f3da66175598	5948	switch(ConversionGroup)
mbed_official	237:f3da66175598	5949	{
mbed_official	237:f3da66175598	5950	case REGULAR_INJECTED_GROUP:
mbed_official	237:f3da66175598	5951	tmp_ADC_CR_ADSTART_JADSTART = (ADC_CR_ADSTART \| ADC_CR_JADSTART);
mbed_official	237:f3da66175598	5952	break;
mbed_official	237:f3da66175598	5953	case INJECTED_GROUP:
mbed_official	237:f3da66175598	5954	tmp_ADC_CR_ADSTART_JADSTART = ADC_CR_JADSTART;
mbed_official	237:f3da66175598	5955	break;
mbed_official	237:f3da66175598	5956	/* Case REGULAR_GROUP */
mbed_official	237:f3da66175598	5957	default:
mbed_official	237:f3da66175598	5958	tmp_ADC_CR_ADSTART_JADSTART = ADC_CR_ADSTART;
mbed_official	237:f3da66175598	5959	break;
mbed_official	237:f3da66175598	5960	}
mbed_official	237:f3da66175598	5961
mbed_official	237:f3da66175598	5962	/* Wait for conversion effectively stopped */
mbed_official	237:f3da66175598	5963	tickstart = HAL_GetTick();
mbed_official	237:f3da66175598	5964
mbed_official	237:f3da66175598	5965	while((hadc->Instance->CR & tmp_ADC_CR_ADSTART_JADSTART) != RESET)
mbed_official	237:f3da66175598	5966	{
mbed_official	237:f3da66175598	5967	if((HAL_GetTick()-tickstart) > ADC_STOP_CONVERSION_TIMEOUT)
mbed_official	237:f3da66175598	5968	{
mbed_official	237:f3da66175598	5969	/* Update ADC state machine to error */
mbed_official	237:f3da66175598	5970	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	5971
mbed_official	237:f3da66175598	5972	/* Set ADC error code to ADC IP internal error */
mbed_official	237:f3da66175598	5973	hadc->ErrorCode \|= HAL_ADC_ERROR_INTERNAL;
mbed_official	237:f3da66175598	5974
mbed_official	237:f3da66175598	5975	return HAL_ERROR;
mbed_official	237:f3da66175598	5976	}
mbed_official	237:f3da66175598	5977	}
mbed_official	237:f3da66175598	5978
mbed_official	237:f3da66175598	5979	}
mbed_official	237:f3da66175598	5980
mbed_official	237:f3da66175598	5981	/* Return HAL status */
mbed_official	237:f3da66175598	5982	return HAL_OK;
mbed_official	237:f3da66175598	5983	}
mbed_official	237:f3da66175598	5984	#endif /* STM32F303xC \|\| STM32F358xx \|\| STM32F302xC \|\| STM32F303x8 \|\| STM32F328xx \|\| STM32F334x8 \|\| STM32F301x8 \|\| STM32F318xx \|\| STM32F302x8 */
mbed_official	237:f3da66175598	5985
mbed_official	237:f3da66175598	5986	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	237:f3da66175598	5987	/**
mbed_official	237:f3da66175598	5988	* @brief Enable the selected ADC.
mbed_official	237:f3da66175598	5989	* @note Prerequisite condition to use this function: ADC must be disabled
mbed_official	237:f3da66175598	5990	* and voltage regulator must be enabled (done into HAL_ADC_Init()).
mbed_official	237:f3da66175598	5991	* @param hadc: ADC handle
mbed_official	237:f3da66175598	5992	* @retval HAL status.
mbed_official	237:f3da66175598	5993	*/
mbed_official	237:f3da66175598	5994	static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc)
mbed_official	237:f3da66175598	5995	{
mbed_official	237:f3da66175598	5996	uint32_t WaitLoopIndex = 0;
mbed_official	237:f3da66175598	5997	uint32_t tickstart=0;
mbed_official	237:f3da66175598	5998
mbed_official	237:f3da66175598	5999	/* ADC enable and wait for ADC ready (in case of ADC is disabled or */
mbed_official	237:f3da66175598	6000	/* enabling phase not yet completed: flag ADC ready not yet set). */
mbed_official	237:f3da66175598	6001	/* Timeout implemented to not be stuck if ADC cannot be enabled (possible */
mbed_official	237:f3da66175598	6002	/* causes: ADC clock not running, ...). */
mbed_official	237:f3da66175598	6003	if (__HAL_ADC_IS_ENABLED(hadc) == RESET)
mbed_official	237:f3da66175598	6004	{
mbed_official	237:f3da66175598	6005	/* Enable the Peripheral */
mbed_official	237:f3da66175598	6006	__HAL_ADC_ENABLE(hadc);
mbed_official	237:f3da66175598	6007
mbed_official	237:f3da66175598	6008	/* Delay for ADC stabilization time. */
mbed_official	237:f3da66175598	6009	/* Delay fixed to worst case: maximum CPU frequency */
mbed_official	237:f3da66175598	6010	while(WaitLoopIndex < ADC_STAB_DELAY_CPU_CYCLES)
mbed_official	237:f3da66175598	6011	{
mbed_official	237:f3da66175598	6012	WaitLoopIndex++;
mbed_official	237:f3da66175598	6013	}
mbed_official	237:f3da66175598	6014
mbed_official	237:f3da66175598	6015	/* Get timeout */
mbed_official	237:f3da66175598	6016	tickstart = HAL_GetTick();
mbed_official	237:f3da66175598	6017
mbed_official	237:f3da66175598	6018	/* Wait for ADC effectively enabled */
mbed_official	237:f3da66175598	6019	while(HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_ADON))
mbed_official	237:f3da66175598	6020	{
mbed_official	237:f3da66175598	6021	if((HAL_GetTick()-tickstart) > ADC_ENABLE_TIMEOUT)
mbed_official	237:f3da66175598	6022	{
mbed_official	237:f3da66175598	6023	/* Update ADC state machine to error */
mbed_official	237:f3da66175598	6024	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	6025
mbed_official	237:f3da66175598	6026	/* Set ADC error code to ADC IP internal error */
mbed_official	237:f3da66175598	6027	hadc->ErrorCode \|= HAL_ADC_ERROR_INTERNAL;
mbed_official	237:f3da66175598	6028
mbed_official	237:f3da66175598	6029	/* Process unlocked */
mbed_official	237:f3da66175598	6030	__HAL_UNLOCK(hadc);
mbed_official	237:f3da66175598	6031
mbed_official	237:f3da66175598	6032	return HAL_ERROR;
mbed_official	237:f3da66175598	6033	}
mbed_official	237:f3da66175598	6034	}
mbed_official	237:f3da66175598	6035	}
mbed_official	237:f3da66175598	6036
mbed_official	237:f3da66175598	6037	/* Return HAL status */
mbed_official	237:f3da66175598	6038	return HAL_OK;
mbed_official	237:f3da66175598	6039	}
mbed_official	237:f3da66175598	6040
mbed_official	237:f3da66175598	6041	/**
mbed_official	237:f3da66175598	6042	* @brief Stop ADC conversion and disable the selected ADC
mbed_official	237:f3da66175598	6043	* @note Prerequisite condition to use this function: ADC conversions must be
mbed_official	237:f3da66175598	6044	* stopped to disable the ADC.
mbed_official	237:f3da66175598	6045	* @param hadc: ADC handle
mbed_official	237:f3da66175598	6046	* @retval HAL status.
mbed_official	237:f3da66175598	6047	*/
mbed_official	237:f3da66175598	6048	static HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc)
mbed_official	237:f3da66175598	6049	{
mbed_official	237:f3da66175598	6050	uint32_t tickstart = 0;
mbed_official	237:f3da66175598	6051
mbed_official	237:f3da66175598	6052	/* Verification if ADC is not already disabled: */
mbed_official	237:f3da66175598	6053	if (__HAL_ADC_IS_ENABLED(hadc) != RESET)
mbed_official	237:f3da66175598	6054	{
mbed_official	237:f3da66175598	6055	/* Disable the ADC peripheral */
mbed_official	237:f3da66175598	6056	__HAL_ADC_DISABLE(hadc);
mbed_official	237:f3da66175598	6057
mbed_official	237:f3da66175598	6058	/* Get timeout */
mbed_official	237:f3da66175598	6059	tickstart = HAL_GetTick();
mbed_official	237:f3da66175598	6060
mbed_official	237:f3da66175598	6061	/* Wait for ADC effectively disabled */
mbed_official	237:f3da66175598	6062	while(__HAL_ADC_IS_ENABLED(hadc) != RESET)
mbed_official	237:f3da66175598	6063	{
mbed_official	237:f3da66175598	6064	if((HAL_GetTick()-tickstart) > ADC_ENABLE_TIMEOUT)
mbed_official	237:f3da66175598	6065	{
mbed_official	237:f3da66175598	6066	/* Update ADC state machine to error */
mbed_official	237:f3da66175598	6067	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	237:f3da66175598	6068
mbed_official	237:f3da66175598	6069	/* Set ADC error code to ADC IP internal error */
mbed_official	237:f3da66175598	6070	hadc->ErrorCode \|= HAL_ADC_ERROR_INTERNAL;
mbed_official	237:f3da66175598	6071
mbed_official	237:f3da66175598	6072	return HAL_ERROR;
mbed_official	237:f3da66175598	6073	}
mbed_official	237:f3da66175598	6074	}
mbed_official	237:f3da66175598	6075	}
mbed_official	237:f3da66175598	6076
mbed_official	237:f3da66175598	6077	/* Return HAL status */
mbed_official	237:f3da66175598	6078	return HAL_OK;
mbed_official	237:f3da66175598	6079	}
mbed_official	237:f3da66175598	6080	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	237:f3da66175598	6081
mbed_official	237:f3da66175598	6082	/**
mbed_official	237:f3da66175598	6083	* @}
mbed_official	237:f3da66175598	6084	*/
mbed_official	237:f3da66175598	6085
mbed_official	237:f3da66175598	6086
mbed_official	237:f3da66175598	6087	/**
mbed_official	237:f3da66175598	6088	* @}
mbed_official	237:f3da66175598	6089	*/
mbed_official	237:f3da66175598	6090
mbed_official	237:f3da66175598	6091	/**
mbed_official	237:f3da66175598	6092	* @}
mbed_official	237:f3da66175598	6093	*/
mbed_official	237:f3da66175598	6094
mbed_official	237:f3da66175598	6095	#endif /* HAL_ADC_MODULE_ENABLED */
mbed_official	237:f3da66175598	6096	/**
mbed_official	237:f3da66175598	6097	* @}
mbed_official	237:f3da66175598	6098	*/
mbed_official	237:f3da66175598	6099
mbed_official	237:f3da66175598	6100	/**
mbed_official	237:f3da66175598	6101	* @}
mbed_official	237:f3da66175598	6102	*/
mbed_official	237:f3da66175598	6103
mbed_official	237:f3da66175598	6104	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	13 Sep 2014
Imports:	4
Forks:	0
Commits:	324
Dependents:	1
Dependencies:	0
Followers:	2

targets/cmsis/TARGET_STM/TARGET_NUCLEO_F334R8/stm32f3xx_hal_adc_ex.c@323:9e901b0a5aa1, 2014-09-13 (annotated)

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