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targets/cmsis/TARGET_STM/TARGET_DISCO_F051R8/stm32f0xx_tim.h@323:9e901b0a5aa1, 2014-09-13 (annotated)

Committer:: shaoziyang
Date:: Sat Sep 13 14:25:46 2014 +0000
Revision:: 323:9e901b0a5aa1
Parent:: 130:1dec54e4aec3

test with CLOCK_SETUP = 0

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User	Revision	Line number	New contents of line
mbed_official	130:1dec54e4aec3	1	/**
mbed_official	130:1dec54e4aec3	2	******************************************************************************
mbed_official	130:1dec54e4aec3	3	* @file stm32f0xx_tim.h
mbed_official	130:1dec54e4aec3	4	* @author MCD Application Team
mbed_official	130:1dec54e4aec3	5	* @version V1.3.0
mbed_official	130:1dec54e4aec3	6	* @date 16-January-2014
mbed_official	130:1dec54e4aec3	7	* @brief This file contains all the functions prototypes for the TIM
mbed_official	130:1dec54e4aec3	8	* firmware library.
mbed_official	130:1dec54e4aec3	9	******************************************************************************
mbed_official	130:1dec54e4aec3	10	* @attention
mbed_official	130:1dec54e4aec3	11	*
mbed_official	130:1dec54e4aec3	12	* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official	130:1dec54e4aec3	13	*
mbed_official	130:1dec54e4aec3	14	* Redistribution and use in source and binary forms, with or without modification,
mbed_official	130:1dec54e4aec3	15	* are permitted provided that the following conditions are met:
mbed_official	130:1dec54e4aec3	16	* 1. Redistributions of source code must retain the above copyright notice,
mbed_official	130:1dec54e4aec3	17	* this list of conditions and the following disclaimer.
mbed_official	130:1dec54e4aec3	18	* 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official	130:1dec54e4aec3	19	* this list of conditions and the following disclaimer in the documentation
mbed_official	130:1dec54e4aec3	20	* and/or other materials provided with the distribution.
mbed_official	130:1dec54e4aec3	21	* 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official	130:1dec54e4aec3	22	* may be used to endorse or promote products derived from this software
mbed_official	130:1dec54e4aec3	23	* without specific prior written permission.
mbed_official	130:1dec54e4aec3	24	*
mbed_official	130:1dec54e4aec3	25	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official	130:1dec54e4aec3	26	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official	130:1dec54e4aec3	27	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official	130:1dec54e4aec3	28	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official	130:1dec54e4aec3	29	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official	130:1dec54e4aec3	30	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official	130:1dec54e4aec3	31	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official	130:1dec54e4aec3	32	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official	130:1dec54e4aec3	33	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official	130:1dec54e4aec3	34	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official	130:1dec54e4aec3	35	*
mbed_official	130:1dec54e4aec3	36	******************************************************************************
mbed_official	130:1dec54e4aec3	37	*/
mbed_official	130:1dec54e4aec3	38
mbed_official	130:1dec54e4aec3	39	/* Define to prevent recursive inclusion -------------------------------------*/
mbed_official	130:1dec54e4aec3	40	#ifndef __STM32F0XX_TIM_H
mbed_official	130:1dec54e4aec3	41	#define __STM32F0XX_TIM_H
mbed_official	130:1dec54e4aec3	42
mbed_official	130:1dec54e4aec3	43	#ifdef __cplusplus
mbed_official	130:1dec54e4aec3	44	extern "C" {
mbed_official	130:1dec54e4aec3	45	#endif
mbed_official	130:1dec54e4aec3	46
mbed_official	130:1dec54e4aec3	47	/* Includes ------------------------------------------------------------------*/
mbed_official	130:1dec54e4aec3	48	#include "stm32f0xx.h"
mbed_official	130:1dec54e4aec3	49
mbed_official	130:1dec54e4aec3	50	/** @addtogroup STM32F0xx_StdPeriph_Driver
mbed_official	130:1dec54e4aec3	51	* @{
mbed_official	130:1dec54e4aec3	52	*/
mbed_official	130:1dec54e4aec3	53
mbed_official	130:1dec54e4aec3	54	/** @addtogroup TIM
mbed_official	130:1dec54e4aec3	55	* @{
mbed_official	130:1dec54e4aec3	56	*/
mbed_official	130:1dec54e4aec3	57
mbed_official	130:1dec54e4aec3	58	/* Exported types ------------------------------------------------------------*/
mbed_official	130:1dec54e4aec3	59
mbed_official	130:1dec54e4aec3	60	/**
mbed_official	130:1dec54e4aec3	61	* @brief TIM Time Base Init structure definition
mbed_official	130:1dec54e4aec3	62	* @note This sturcture is used with all TIMx.
mbed_official	130:1dec54e4aec3	63	*/
mbed_official	130:1dec54e4aec3	64
mbed_official	130:1dec54e4aec3	65	typedef struct
mbed_official	130:1dec54e4aec3	66	{
mbed_official	130:1dec54e4aec3	67	uint16_t TIM_Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock.
mbed_official	130:1dec54e4aec3	68	This parameter can be a number between 0x0000 and 0xFFFF */
mbed_official	130:1dec54e4aec3	69
mbed_official	130:1dec54e4aec3	70	uint16_t TIM_CounterMode; /*!< Specifies the counter mode.
mbed_official	130:1dec54e4aec3	71	This parameter can be a value of @ref TIM_Counter_Mode */
mbed_official	130:1dec54e4aec3	72
mbed_official	130:1dec54e4aec3	73	uint32_t TIM_Period; /*!< Specifies the period value to be loaded into the active
mbed_official	130:1dec54e4aec3	74	Auto-Reload Register at the next update event.
mbed_official	130:1dec54e4aec3	75	This parameter must be a number between 0x0000 and 0xFFFF. */
mbed_official	130:1dec54e4aec3	76
mbed_official	130:1dec54e4aec3	77	uint16_t TIM_ClockDivision; /*!< Specifies the clock division.
mbed_official	130:1dec54e4aec3	78	This parameter can be a value of @ref TIM_Clock_Division_CKD */
mbed_official	130:1dec54e4aec3	79
mbed_official	130:1dec54e4aec3	80	uint8_t TIM_RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter
mbed_official	130:1dec54e4aec3	81	reaches zero, an update event is generated and counting restarts
mbed_official	130:1dec54e4aec3	82	from the RCR value (N).
mbed_official	130:1dec54e4aec3	83	This means in PWM mode that (N+1) corresponds to:
mbed_official	130:1dec54e4aec3	84	- the number of PWM periods in edge-aligned mode
mbed_official	130:1dec54e4aec3	85	- the number of half PWM period in center-aligned mode
mbed_official	130:1dec54e4aec3	86	This parameter must be a number between 0x00 and 0xFF.
mbed_official	130:1dec54e4aec3	87	@note This parameter is valid only for TIM1. */
mbed_official	130:1dec54e4aec3	88	} TIM_TimeBaseInitTypeDef;
mbed_official	130:1dec54e4aec3	89
mbed_official	130:1dec54e4aec3	90	/**
mbed_official	130:1dec54e4aec3	91	* @brief TIM Output Compare Init structure definition
mbed_official	130:1dec54e4aec3	92	*/
mbed_official	130:1dec54e4aec3	93
mbed_official	130:1dec54e4aec3	94	typedef struct
mbed_official	130:1dec54e4aec3	95	{
mbed_official	130:1dec54e4aec3	96	uint16_t TIM_OCMode; /*!< Specifies the TIM mode.
mbed_official	130:1dec54e4aec3	97	This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */
mbed_official	130:1dec54e4aec3	98
mbed_official	130:1dec54e4aec3	99	uint16_t TIM_OutputState; /*!< Specifies the TIM Output Compare state.
mbed_official	130:1dec54e4aec3	100	This parameter can be a value of @ref TIM_Output_Compare_state */
mbed_official	130:1dec54e4aec3	101
mbed_official	130:1dec54e4aec3	102	uint16_t TIM_OutputNState; /*!< Specifies the TIM complementary Output Compare state.
mbed_official	130:1dec54e4aec3	103	This parameter can be a value of @ref TIM_Output_Compare_N_state
mbed_official	130:1dec54e4aec3	104	@note This parameter is valid only for TIM1. */
mbed_official	130:1dec54e4aec3	105
mbed_official	130:1dec54e4aec3	106	uint32_t TIM_Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
mbed_official	130:1dec54e4aec3	107	This parameter can be a number between 0x0000 and 0xFFFF ( or 0xFFFFFFFF
mbed_official	130:1dec54e4aec3	108	for TIM2) */
mbed_official	130:1dec54e4aec3	109
mbed_official	130:1dec54e4aec3	110	uint16_t TIM_OCPolarity; /*!< Specifies the output polarity.
mbed_official	130:1dec54e4aec3	111	This parameter can be a value of @ref TIM_Output_Compare_Polarity */
mbed_official	130:1dec54e4aec3	112
mbed_official	130:1dec54e4aec3	113	uint16_t TIM_OCNPolarity; /*!< Specifies the complementary output polarity.
mbed_official	130:1dec54e4aec3	114	This parameter can be a value of @ref TIM_Output_Compare_N_Polarity
mbed_official	130:1dec54e4aec3	115	@note This parameter is valid only for TIM1. */
mbed_official	130:1dec54e4aec3	116
mbed_official	130:1dec54e4aec3	117	uint16_t TIM_OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
mbed_official	130:1dec54e4aec3	118	This parameter can be a value of @ref TIM_Output_Compare_Idle_State
mbed_official	130:1dec54e4aec3	119	@note This parameter is valid only for TIM1. */
mbed_official	130:1dec54e4aec3	120
mbed_official	130:1dec54e4aec3	121	uint16_t TIM_OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
mbed_official	130:1dec54e4aec3	122	This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State
mbed_official	130:1dec54e4aec3	123	@note This parameter is valid only for TIM1. */
mbed_official	130:1dec54e4aec3	124	} TIM_OCInitTypeDef;
mbed_official	130:1dec54e4aec3	125
mbed_official	130:1dec54e4aec3	126	/**
mbed_official	130:1dec54e4aec3	127	* @brief TIM Input Capture Init structure definition
mbed_official	130:1dec54e4aec3	128	*/
mbed_official	130:1dec54e4aec3	129
mbed_official	130:1dec54e4aec3	130	typedef struct
mbed_official	130:1dec54e4aec3	131	{
mbed_official	130:1dec54e4aec3	132
mbed_official	130:1dec54e4aec3	133	uint16_t TIM_Channel; /*!< Specifies the TIM channel.
mbed_official	130:1dec54e4aec3	134	This parameter can be a value of @ref TIM_Channel */
mbed_official	130:1dec54e4aec3	135
mbed_official	130:1dec54e4aec3	136	uint16_t TIM_ICPolarity; /*!< Specifies the active edge of the input signal.
mbed_official	130:1dec54e4aec3	137	This parameter can be a value of @ref TIM_Input_Capture_Polarity */
mbed_official	130:1dec54e4aec3	138
mbed_official	130:1dec54e4aec3	139	uint16_t TIM_ICSelection; /*!< Specifies the input.
mbed_official	130:1dec54e4aec3	140	This parameter can be a value of @ref TIM_Input_Capture_Selection */
mbed_official	130:1dec54e4aec3	141
mbed_official	130:1dec54e4aec3	142	uint16_t TIM_ICPrescaler; /*!< Specifies the Input Capture Prescaler.
mbed_official	130:1dec54e4aec3	143	This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
mbed_official	130:1dec54e4aec3	144
mbed_official	130:1dec54e4aec3	145	uint16_t TIM_ICFilter; /*!< Specifies the input capture filter.
mbed_official	130:1dec54e4aec3	146	This parameter can be a number between 0x0 and 0xF */
mbed_official	130:1dec54e4aec3	147	} TIM_ICInitTypeDef;
mbed_official	130:1dec54e4aec3	148
mbed_official	130:1dec54e4aec3	149	/**
mbed_official	130:1dec54e4aec3	150	* @brief TIM_BDTR structure definition
mbed_official	130:1dec54e4aec3	151	* @note This sturcture is used only with TIM1.
mbed_official	130:1dec54e4aec3	152	*/
mbed_official	130:1dec54e4aec3	153
mbed_official	130:1dec54e4aec3	154	typedef struct
mbed_official	130:1dec54e4aec3	155	{
mbed_official	130:1dec54e4aec3	156
mbed_official	130:1dec54e4aec3	157	uint16_t TIM_OSSRState; /*!< Specifies the Off-State selection used in Run mode.
mbed_official	130:1dec54e4aec3	158	This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */
mbed_official	130:1dec54e4aec3	159
mbed_official	130:1dec54e4aec3	160	uint16_t TIM_OSSIState; /*!< Specifies the Off-State used in Idle state.
mbed_official	130:1dec54e4aec3	161	This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */
mbed_official	130:1dec54e4aec3	162
mbed_official	130:1dec54e4aec3	163	uint16_t TIM_LOCKLevel; /*!< Specifies the LOCK level parameters.
mbed_official	130:1dec54e4aec3	164	This parameter can be a value of @ref TIM_Lock_level */
mbed_official	130:1dec54e4aec3	165
mbed_official	130:1dec54e4aec3	166	uint16_t TIM_DeadTime; /*!< Specifies the delay time between the switching-off and the
mbed_official	130:1dec54e4aec3	167	switching-on of the outputs.
mbed_official	130:1dec54e4aec3	168	This parameter can be a number between 0x00 and 0xFF */
mbed_official	130:1dec54e4aec3	169
mbed_official	130:1dec54e4aec3	170	uint16_t TIM_Break; /*!< Specifies whether the TIM Break input is enabled or not.
mbed_official	130:1dec54e4aec3	171	This parameter can be a value of @ref TIM_Break_Input_enable_disable */
mbed_official	130:1dec54e4aec3	172
mbed_official	130:1dec54e4aec3	173	uint16_t TIM_BreakPolarity; /*!< Specifies the TIM Break Input pin polarity.
mbed_official	130:1dec54e4aec3	174	This parameter can be a value of @ref TIM_Break_Polarity */
mbed_official	130:1dec54e4aec3	175
mbed_official	130:1dec54e4aec3	176	uint16_t TIM_AutomaticOutput; /*!< Specifies whether the TIM Automatic Output feature is enabled or not.
mbed_official	130:1dec54e4aec3	177	This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */
mbed_official	130:1dec54e4aec3	178	} TIM_BDTRInitTypeDef;
mbed_official	130:1dec54e4aec3	179
mbed_official	130:1dec54e4aec3	180	/**
mbed_official	130:1dec54e4aec3	181	* @brief TIM Input Capture Init structure definition
mbed_official	130:1dec54e4aec3	182	*/
mbed_official	130:1dec54e4aec3	183
mbed_official	130:1dec54e4aec3	184	/* Exported constants --------------------------------------------------------*/
mbed_official	130:1dec54e4aec3	185
mbed_official	130:1dec54e4aec3	186
mbed_official	130:1dec54e4aec3	187	/** @defgroup TIM_Exported_constants
mbed_official	130:1dec54e4aec3	188	* @{
mbed_official	130:1dec54e4aec3	189	*/
mbed_official	130:1dec54e4aec3	190
mbed_official	130:1dec54e4aec3	191	#define IS_TIM_ALL_PERIPH(PERIPH) (((PERIPH) == TIM1) \|\| \
mbed_official	130:1dec54e4aec3	192	((PERIPH) == TIM2) \|\| \
mbed_official	130:1dec54e4aec3	193	((PERIPH) == TIM3) \|\| \
mbed_official	130:1dec54e4aec3	194	((PERIPH) == TIM6) \|\| \
mbed_official	130:1dec54e4aec3	195	((PERIPH) == TIM7) \|\| \
mbed_official	130:1dec54e4aec3	196	((PERIPH) == TIM14)\|\| \
mbed_official	130:1dec54e4aec3	197	((PERIPH) == TIM15)\|\| \
mbed_official	130:1dec54e4aec3	198	((PERIPH) == TIM16)\|\| \
mbed_official	130:1dec54e4aec3	199	((PERIPH) == TIM17))
mbed_official	130:1dec54e4aec3	200
mbed_official	130:1dec54e4aec3	201	/* LIST1: TIM 1 */
mbed_official	130:1dec54e4aec3	202	#define IS_TIM_LIST1_PERIPH(PERIPH) ((PERIPH) == TIM1)
mbed_official	130:1dec54e4aec3	203
mbed_official	130:1dec54e4aec3	204	/* LIST2: TIM 1, 15, 16 and 17 */
mbed_official	130:1dec54e4aec3	205	#define IS_TIM_LIST2_PERIPH(PERIPH) (((PERIPH) == TIM1) \|\| \
mbed_official	130:1dec54e4aec3	206	((PERIPH) == TIM15)\|\| \
mbed_official	130:1dec54e4aec3	207	((PERIPH) == TIM16)\|\| \
mbed_official	130:1dec54e4aec3	208	((PERIPH) == TIM17))
mbed_official	130:1dec54e4aec3	209
mbed_official	130:1dec54e4aec3	210	/* LIST3: TIM 1, 2 and 3 */
mbed_official	130:1dec54e4aec3	211	#define IS_TIM_LIST3_PERIPH(PERIPH) (((PERIPH) == TIM1) \|\| \
mbed_official	130:1dec54e4aec3	212	((PERIPH) == TIM2) \|\| \
mbed_official	130:1dec54e4aec3	213	((PERIPH) == TIM3))
mbed_official	130:1dec54e4aec3	214
mbed_official	130:1dec54e4aec3	215	/* LIST4: TIM 1, 2, 3, 14, 15, 16 and 17 */
mbed_official	130:1dec54e4aec3	216	#define IS_TIM_LIST4_PERIPH(PERIPH) (((PERIPH) == TIM1) \|\| \
mbed_official	130:1dec54e4aec3	217	((PERIPH) == TIM2) \|\| \
mbed_official	130:1dec54e4aec3	218	((PERIPH) == TIM3) \|\| \
mbed_official	130:1dec54e4aec3	219	((PERIPH) == TIM14) \|\| \
mbed_official	130:1dec54e4aec3	220	((PERIPH) == TIM15)\|\| \
mbed_official	130:1dec54e4aec3	221	((PERIPH) == TIM16)\|\| \
mbed_official	130:1dec54e4aec3	222	((PERIPH) == TIM17))
mbed_official	130:1dec54e4aec3	223
mbed_official	130:1dec54e4aec3	224	/* LIST5: TIM 1, 2, 3, 15, 16 and 17 */
mbed_official	130:1dec54e4aec3	225	#define IS_TIM_LIST5_PERIPH(PERIPH) (((PERIPH) == TIM1) \|\| \
mbed_official	130:1dec54e4aec3	226	((PERIPH) == TIM2) \|\| \
mbed_official	130:1dec54e4aec3	227	((PERIPH) == TIM3) \|\| \
mbed_official	130:1dec54e4aec3	228	((PERIPH) == TIM15)\|\| \
mbed_official	130:1dec54e4aec3	229	((PERIPH) == TIM16)\|\| \
mbed_official	130:1dec54e4aec3	230	((PERIPH) == TIM17))
mbed_official	130:1dec54e4aec3	231
mbed_official	130:1dec54e4aec3	232	/* LIST6: TIM 1, 2, 3 and 15 */
mbed_official	130:1dec54e4aec3	233	#define IS_TIM_LIST6_PERIPH(PERIPH) (((PERIPH) == TIM1) \|\| \
mbed_official	130:1dec54e4aec3	234	((PERIPH) == TIM2) \|\| \
mbed_official	130:1dec54e4aec3	235	((PERIPH) == TIM3) \|\| \
mbed_official	130:1dec54e4aec3	236	((PERIPH) == TIM15))
mbed_official	130:1dec54e4aec3	237
mbed_official	130:1dec54e4aec3	238	/* LIST7: TIM 1, 2, 3, 6, 7 and 14 */
mbed_official	130:1dec54e4aec3	239	#define IS_TIM_LIST7_PERIPH(PERIPH) (((PERIPH) == TIM1) \|\| \
mbed_official	130:1dec54e4aec3	240	((PERIPH) == TIM2) \|\| \
mbed_official	130:1dec54e4aec3	241	((PERIPH) == TIM3) \|\| \
mbed_official	130:1dec54e4aec3	242	((PERIPH) == TIM6) \|\| \
mbed_official	130:1dec54e4aec3	243	((PERIPH) == TIM7) \|\| \
mbed_official	130:1dec54e4aec3	244	((PERIPH) == TIM14))
mbed_official	130:1dec54e4aec3	245
mbed_official	130:1dec54e4aec3	246	/* LIST8: TIM 1, 2, 3 and 14 */
mbed_official	130:1dec54e4aec3	247	#define IS_TIM_LIST8_PERIPH(PERIPH) (((PERIPH) == TIM1) \|\| \
mbed_official	130:1dec54e4aec3	248	((PERIPH) == TIM2) \|\| \
mbed_official	130:1dec54e4aec3	249	((PERIPH) == TIM3) \|\| \
mbed_official	130:1dec54e4aec3	250	((PERIPH) == TIM14))
mbed_official	130:1dec54e4aec3	251
mbed_official	130:1dec54e4aec3	252	/* LIST9: TIM 1, 2, 3, 6, 7 and 15 */
mbed_official	130:1dec54e4aec3	253	#define IS_TIM_LIST9_PERIPH(PERIPH) (((PERIPH) == TIM1) \|\| \
mbed_official	130:1dec54e4aec3	254	((PERIPH) == TIM2) \|\| \
mbed_official	130:1dec54e4aec3	255	((PERIPH) == TIM3) \|\| \
mbed_official	130:1dec54e4aec3	256	((PERIPH) == TIM6) \|\| \
mbed_official	130:1dec54e4aec3	257	((PERIPH) == TIM7) \|\| \
mbed_official	130:1dec54e4aec3	258	((PERIPH) == TIM15))
mbed_official	130:1dec54e4aec3	259
mbed_official	130:1dec54e4aec3	260	/* LIST10: TIM 1, 2, 3, 6, 7, 15, 16 and 17 */
mbed_official	130:1dec54e4aec3	261	#define IS_TIM_LIST10_PERIPH(PERIPH) (((PERIPH) == TIM1) \|\| \
mbed_official	130:1dec54e4aec3	262	((PERIPH) == TIM2) \|\| \
mbed_official	130:1dec54e4aec3	263	((PERIPH) == TIM3) \|\| \
mbed_official	130:1dec54e4aec3	264	((PERIPH) == TIM6) \|\| \
mbed_official	130:1dec54e4aec3	265	((PERIPH) == TIM7) \|\| \
mbed_official	130:1dec54e4aec3	266	((PERIPH) == TIM15)\|\| \
mbed_official	130:1dec54e4aec3	267	((PERIPH) == TIM16)\|\| \
mbed_official	130:1dec54e4aec3	268	((PERIPH) == TIM17))
mbed_official	130:1dec54e4aec3	269
mbed_official	130:1dec54e4aec3	270	/* LIST1: TIM 11 */
mbed_official	130:1dec54e4aec3	271	#define IS_TIM_LIST11_PERIPH(PERIPH) ((PERIPH) == TIM14)
mbed_official	130:1dec54e4aec3	272
mbed_official	130:1dec54e4aec3	273
mbed_official	130:1dec54e4aec3	274	/**
mbed_official	130:1dec54e4aec3	275	* @}
mbed_official	130:1dec54e4aec3	276	*/
mbed_official	130:1dec54e4aec3	277
mbed_official	130:1dec54e4aec3	278	/** @defgroup TIM_Output_Compare_and_PWM_modes
mbed_official	130:1dec54e4aec3	279	* @{
mbed_official	130:1dec54e4aec3	280	*/
mbed_official	130:1dec54e4aec3	281
mbed_official	130:1dec54e4aec3	282	#define TIM_OCMode_Timing ((uint16_t)0x0000)
mbed_official	130:1dec54e4aec3	283	#define TIM_OCMode_Active ((uint16_t)0x0010)
mbed_official	130:1dec54e4aec3	284	#define TIM_OCMode_Inactive ((uint16_t)0x0020)
mbed_official	130:1dec54e4aec3	285	#define TIM_OCMode_Toggle ((uint16_t)0x0030)
mbed_official	130:1dec54e4aec3	286	#define TIM_OCMode_PWM1 ((uint16_t)0x0060)
mbed_official	130:1dec54e4aec3	287	#define TIM_OCMode_PWM2 ((uint16_t)0x0070)
mbed_official	130:1dec54e4aec3	288	#define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMode_Timing) \|\| \
mbed_official	130:1dec54e4aec3	289	((MODE) == TIM_OCMode_Active) \|\| \
mbed_official	130:1dec54e4aec3	290	((MODE) == TIM_OCMode_Inactive) \|\| \
mbed_official	130:1dec54e4aec3	291	((MODE) == TIM_OCMode_Toggle)\|\| \
mbed_official	130:1dec54e4aec3	292	((MODE) == TIM_OCMode_PWM1) \|\| \
mbed_official	130:1dec54e4aec3	293	((MODE) == TIM_OCMode_PWM2))
mbed_official	130:1dec54e4aec3	294	#define IS_TIM_OCM(MODE) (((MODE) == TIM_OCMode_Timing) \|\| \
mbed_official	130:1dec54e4aec3	295	((MODE) == TIM_OCMode_Active) \|\| \
mbed_official	130:1dec54e4aec3	296	((MODE) == TIM_OCMode_Inactive) \|\| \
mbed_official	130:1dec54e4aec3	297	((MODE) == TIM_OCMode_Toggle)\|\| \
mbed_official	130:1dec54e4aec3	298	((MODE) == TIM_OCMode_PWM1) \|\| \
mbed_official	130:1dec54e4aec3	299	((MODE) == TIM_OCMode_PWM2) \|\| \
mbed_official	130:1dec54e4aec3	300	((MODE) == TIM_ForcedAction_Active) \|\| \
mbed_official	130:1dec54e4aec3	301	((MODE) == TIM_ForcedAction_InActive))
mbed_official	130:1dec54e4aec3	302	/**
mbed_official	130:1dec54e4aec3	303	* @}
mbed_official	130:1dec54e4aec3	304	*/
mbed_official	130:1dec54e4aec3	305
mbed_official	130:1dec54e4aec3	306	/** @defgroup TIM_One_Pulse_Mode
mbed_official	130:1dec54e4aec3	307	* @{
mbed_official	130:1dec54e4aec3	308	*/
mbed_official	130:1dec54e4aec3	309
mbed_official	130:1dec54e4aec3	310	#define TIM_OPMode_Single ((uint16_t)0x0008)
mbed_official	130:1dec54e4aec3	311	#define TIM_OPMode_Repetitive ((uint16_t)0x0000)
mbed_official	130:1dec54e4aec3	312	#define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMode_Single) \|\| \
mbed_official	130:1dec54e4aec3	313	((MODE) == TIM_OPMode_Repetitive))
mbed_official	130:1dec54e4aec3	314	/**
mbed_official	130:1dec54e4aec3	315	* @}
mbed_official	130:1dec54e4aec3	316	*/
mbed_official	130:1dec54e4aec3	317
mbed_official	130:1dec54e4aec3	318	/** @defgroup TIM_Channel
mbed_official	130:1dec54e4aec3	319	* @{
mbed_official	130:1dec54e4aec3	320	*/
mbed_official	130:1dec54e4aec3	321
mbed_official	130:1dec54e4aec3	322	#define TIM_Channel_1 ((uint16_t)0x0000)
mbed_official	130:1dec54e4aec3	323	#define TIM_Channel_2 ((uint16_t)0x0004)
mbed_official	130:1dec54e4aec3	324	#define TIM_Channel_3 ((uint16_t)0x0008)
mbed_official	130:1dec54e4aec3	325	#define TIM_Channel_4 ((uint16_t)0x000C)
mbed_official	130:1dec54e4aec3	326
mbed_official	130:1dec54e4aec3	327	#define IS_TIM_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) \|\| \
mbed_official	130:1dec54e4aec3	328	((CHANNEL) == TIM_Channel_2) \|\| \
mbed_official	130:1dec54e4aec3	329	((CHANNEL) == TIM_Channel_3) \|\| \
mbed_official	130:1dec54e4aec3	330	((CHANNEL) == TIM_Channel_4))
mbed_official	130:1dec54e4aec3	331	#define IS_TIM_COMPLEMENTARY_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) \|\| \
mbed_official	130:1dec54e4aec3	332	((CHANNEL) == TIM_Channel_2) \|\| \
mbed_official	130:1dec54e4aec3	333	((CHANNEL) == TIM_Channel_3))
mbed_official	130:1dec54e4aec3	334	#define IS_TIM_PWMI_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) \|\| \
mbed_official	130:1dec54e4aec3	335	((CHANNEL) == TIM_Channel_2))
mbed_official	130:1dec54e4aec3	336
mbed_official	130:1dec54e4aec3	337	/**
mbed_official	130:1dec54e4aec3	338	* @}
mbed_official	130:1dec54e4aec3	339	*/
mbed_official	130:1dec54e4aec3	340
mbed_official	130:1dec54e4aec3	341	/** @defgroup TIM_Clock_Division_CKD
mbed_official	130:1dec54e4aec3	342	* @{
mbed_official	130:1dec54e4aec3	343	*/
mbed_official	130:1dec54e4aec3	344
mbed_official	130:1dec54e4aec3	345	#define TIM_CKD_DIV1 ((uint16_t)0x0000)
mbed_official	130:1dec54e4aec3	346	#define TIM_CKD_DIV2 ((uint16_t)0x0100)
mbed_official	130:1dec54e4aec3	347	#define TIM_CKD_DIV4 ((uint16_t)0x0200)
mbed_official	130:1dec54e4aec3	348	#define IS_TIM_CKD_DIV(DIV) (((DIV) == TIM_CKD_DIV1) \|\| \
mbed_official	130:1dec54e4aec3	349	((DIV) == TIM_CKD_DIV2) \|\| \
mbed_official	130:1dec54e4aec3	350	((DIV) == TIM_CKD_DIV4))
mbed_official	130:1dec54e4aec3	351	/**
mbed_official	130:1dec54e4aec3	352	* @}
mbed_official	130:1dec54e4aec3	353	*/
mbed_official	130:1dec54e4aec3	354
mbed_official	130:1dec54e4aec3	355	/** @defgroup TIM_Counter_Mode
mbed_official	130:1dec54e4aec3	356	* @{
mbed_official	130:1dec54e4aec3	357	*/
mbed_official	130:1dec54e4aec3	358
mbed_official	130:1dec54e4aec3	359	#define TIM_CounterMode_Up ((uint16_t)0x0000)
mbed_official	130:1dec54e4aec3	360	#define TIM_CounterMode_Down ((uint16_t)0x0010)
mbed_official	130:1dec54e4aec3	361	#define TIM_CounterMode_CenterAligned1 ((uint16_t)0x0020)
mbed_official	130:1dec54e4aec3	362	#define TIM_CounterMode_CenterAligned2 ((uint16_t)0x0040)
mbed_official	130:1dec54e4aec3	363	#define TIM_CounterMode_CenterAligned3 ((uint16_t)0x0060)
mbed_official	130:1dec54e4aec3	364	#define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_CounterMode_Up) \|\| \
mbed_official	130:1dec54e4aec3	365	((MODE) == TIM_CounterMode_Down) \|\| \
mbed_official	130:1dec54e4aec3	366	((MODE) == TIM_CounterMode_CenterAligned1) \|\| \
mbed_official	130:1dec54e4aec3	367	((MODE) == TIM_CounterMode_CenterAligned2) \|\| \
mbed_official	130:1dec54e4aec3	368	((MODE) == TIM_CounterMode_CenterAligned3))
mbed_official	130:1dec54e4aec3	369	/**
mbed_official	130:1dec54e4aec3	370	* @}
mbed_official	130:1dec54e4aec3	371	*/
mbed_official	130:1dec54e4aec3	372
mbed_official	130:1dec54e4aec3	373	/** @defgroup TIM_Output_Compare_Polarity
mbed_official	130:1dec54e4aec3	374	* @{
mbed_official	130:1dec54e4aec3	375	*/
mbed_official	130:1dec54e4aec3	376
mbed_official	130:1dec54e4aec3	377	#define TIM_OCPolarity_High ((uint16_t)0x0000)
mbed_official	130:1dec54e4aec3	378	#define TIM_OCPolarity_Low ((uint16_t)0x0002)
mbed_official	130:1dec54e4aec3	379	#define IS_TIM_OC_POLARITY(POLARITY) (((POLARITY) == TIM_OCPolarity_High) \|\| \
mbed_official	130:1dec54e4aec3	380	((POLARITY) == TIM_OCPolarity_Low))
mbed_official	130:1dec54e4aec3	381	/**
mbed_official	130:1dec54e4aec3	382	* @}
mbed_official	130:1dec54e4aec3	383	*/
mbed_official	130:1dec54e4aec3	384
mbed_official	130:1dec54e4aec3	385	/** @defgroup TIM_Output_Compare_N_Polarity
mbed_official	130:1dec54e4aec3	386	* @{
mbed_official	130:1dec54e4aec3	387	*/
mbed_official	130:1dec54e4aec3	388
mbed_official	130:1dec54e4aec3	389	#define TIM_OCNPolarity_High ((uint16_t)0x0000)
mbed_official	130:1dec54e4aec3	390	#define TIM_OCNPolarity_Low ((uint16_t)0x0008)
mbed_official	130:1dec54e4aec3	391	#define IS_TIM_OCN_POLARITY(POLARITY) (((POLARITY) == TIM_OCNPolarity_High) \|\| \
mbed_official	130:1dec54e4aec3	392	((POLARITY) == TIM_OCNPolarity_Low))
mbed_official	130:1dec54e4aec3	393	/**
mbed_official	130:1dec54e4aec3	394	* @}
mbed_official	130:1dec54e4aec3	395	*/
mbed_official	130:1dec54e4aec3	396
mbed_official	130:1dec54e4aec3	397	/** @defgroup TIM_Output_Compare_state
mbed_official	130:1dec54e4aec3	398	* @{
mbed_official	130:1dec54e4aec3	399	*/
mbed_official	130:1dec54e4aec3	400
mbed_official	130:1dec54e4aec3	401	#define TIM_OutputState_Disable ((uint16_t)0x0000)
mbed_official	130:1dec54e4aec3	402	#define TIM_OutputState_Enable ((uint16_t)0x0001)
mbed_official	130:1dec54e4aec3	403	#define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OutputState_Disable) \|\| \
mbed_official	130:1dec54e4aec3	404	((STATE) == TIM_OutputState_Enable))
mbed_official	130:1dec54e4aec3	405	/**
mbed_official	130:1dec54e4aec3	406	* @}
mbed_official	130:1dec54e4aec3	407	*/
mbed_official	130:1dec54e4aec3	408
mbed_official	130:1dec54e4aec3	409	/** @defgroup TIM_Output_Compare_N_state
mbed_official	130:1dec54e4aec3	410	* @{
mbed_official	130:1dec54e4aec3	411	*/
mbed_official	130:1dec54e4aec3	412
mbed_official	130:1dec54e4aec3	413	#define TIM_OutputNState_Disable ((uint16_t)0x0000)
mbed_official	130:1dec54e4aec3	414	#define TIM_OutputNState_Enable ((uint16_t)0x0004)
mbed_official	130:1dec54e4aec3	415	#define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OutputNState_Disable) \|\| \
mbed_official	130:1dec54e4aec3	416	((STATE) == TIM_OutputNState_Enable))
mbed_official	130:1dec54e4aec3	417	/**
mbed_official	130:1dec54e4aec3	418	* @}
mbed_official	130:1dec54e4aec3	419	*/
mbed_official	130:1dec54e4aec3	420
mbed_official	130:1dec54e4aec3	421	/** @defgroup TIM_Capture_Compare_state
mbed_official	130:1dec54e4aec3	422	* @{
mbed_official	130:1dec54e4aec3	423	*/
mbed_official	130:1dec54e4aec3	424
mbed_official	130:1dec54e4aec3	425	#define TIM_CCx_Enable ((uint16_t)0x0001)
mbed_official	130:1dec54e4aec3	426	#define TIM_CCx_Disable ((uint16_t)0x0000)
mbed_official	130:1dec54e4aec3	427	#define IS_TIM_CCX(CCX) (((CCX) == TIM_CCx_Enable) \|\| \
mbed_official	130:1dec54e4aec3	428	((CCX) == TIM_CCx_Disable))
mbed_official	130:1dec54e4aec3	429	/**
mbed_official	130:1dec54e4aec3	430	* @}
mbed_official	130:1dec54e4aec3	431	*/
mbed_official	130:1dec54e4aec3	432
mbed_official	130:1dec54e4aec3	433	/** @defgroup TIM_Capture_Compare_N_state
mbed_official	130:1dec54e4aec3	434	* @{
mbed_official	130:1dec54e4aec3	435	*/
mbed_official	130:1dec54e4aec3	436
mbed_official	130:1dec54e4aec3	437	#define TIM_CCxN_Enable ((uint16_t)0x0004)
mbed_official	130:1dec54e4aec3	438	#define TIM_CCxN_Disable ((uint16_t)0x0000)
mbed_official	130:1dec54e4aec3	439	#define IS_TIM_CCXN(CCXN) (((CCXN) == TIM_CCxN_Enable) \|\| \
mbed_official	130:1dec54e4aec3	440	((CCXN) == TIM_CCxN_Disable))
mbed_official	130:1dec54e4aec3	441	/**
mbed_official	130:1dec54e4aec3	442	* @}
mbed_official	130:1dec54e4aec3	443	*/
mbed_official	130:1dec54e4aec3	444
mbed_official	130:1dec54e4aec3	445	/** @defgroup TIM_Break_Input_enable_disable
mbed_official	130:1dec54e4aec3	446	* @{
mbed_official	130:1dec54e4aec3	447	*/
mbed_official	130:1dec54e4aec3	448
mbed_official	130:1dec54e4aec3	449	#define TIM_Break_Enable ((uint16_t)0x1000)
mbed_official	130:1dec54e4aec3	450	#define TIM_Break_Disable ((uint16_t)0x0000)
mbed_official	130:1dec54e4aec3	451	#define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_Break_Enable) \|\| \
mbed_official	130:1dec54e4aec3	452	((STATE) == TIM_Break_Disable))
mbed_official	130:1dec54e4aec3	453	/**
mbed_official	130:1dec54e4aec3	454	* @}
mbed_official	130:1dec54e4aec3	455	*/
mbed_official	130:1dec54e4aec3	456
mbed_official	130:1dec54e4aec3	457	/** @defgroup TIM_Break_Polarity
mbed_official	130:1dec54e4aec3	458	* @{
mbed_official	130:1dec54e4aec3	459	*/
mbed_official	130:1dec54e4aec3	460
mbed_official	130:1dec54e4aec3	461	#define TIM_BreakPolarity_Low ((uint16_t)0x0000)
mbed_official	130:1dec54e4aec3	462	#define TIM_BreakPolarity_High ((uint16_t)0x2000)
mbed_official	130:1dec54e4aec3	463	#define IS_TIM_BREAK_POLARITY(POLARITY) (((POLARITY) == TIM_BreakPolarity_Low) \|\| \
mbed_official	130:1dec54e4aec3	464	((POLARITY) == TIM_BreakPolarity_High))
mbed_official	130:1dec54e4aec3	465	/**
mbed_official	130:1dec54e4aec3	466	* @}
mbed_official	130:1dec54e4aec3	467	*/
mbed_official	130:1dec54e4aec3	468
mbed_official	130:1dec54e4aec3	469	/** @defgroup TIM_AOE_Bit_Set_Reset
mbed_official	130:1dec54e4aec3	470	* @{
mbed_official	130:1dec54e4aec3	471	*/
mbed_official	130:1dec54e4aec3	472
mbed_official	130:1dec54e4aec3	473	#define TIM_AutomaticOutput_Enable ((uint16_t)0x4000)
mbed_official	130:1dec54e4aec3	474	#define TIM_AutomaticOutput_Disable ((uint16_t)0x0000)
mbed_official	130:1dec54e4aec3	475	#define IS_TIM_AUTOMATIC_OUTPUT_STATE(STATE) (((STATE) == TIM_AutomaticOutput_Enable) \|\| \
mbed_official	130:1dec54e4aec3	476	((STATE) == TIM_AutomaticOutput_Disable))
mbed_official	130:1dec54e4aec3	477	/**
mbed_official	130:1dec54e4aec3	478	* @}
mbed_official	130:1dec54e4aec3	479	*/
mbed_official	130:1dec54e4aec3	480
mbed_official	130:1dec54e4aec3	481	/** @defgroup TIM_Lock_level
mbed_official	130:1dec54e4aec3	482	* @{
mbed_official	130:1dec54e4aec3	483	*/
mbed_official	130:1dec54e4aec3	484
mbed_official	130:1dec54e4aec3	485	#define TIM_LOCKLevel_OFF ((uint16_t)0x0000)
mbed_official	130:1dec54e4aec3	486	#define TIM_LOCKLevel_1 ((uint16_t)0x0100)
mbed_official	130:1dec54e4aec3	487	#define TIM_LOCKLevel_2 ((uint16_t)0x0200)
mbed_official	130:1dec54e4aec3	488	#define TIM_LOCKLevel_3 ((uint16_t)0x0300)
mbed_official	130:1dec54e4aec3	489	#define IS_TIM_LOCK_LEVEL(LEVEL) (((LEVEL) == TIM_LOCKLevel_OFF) \|\| \
mbed_official	130:1dec54e4aec3	490	((LEVEL) == TIM_LOCKLevel_1) \|\| \
mbed_official	130:1dec54e4aec3	491	((LEVEL) == TIM_LOCKLevel_2) \|\| \
mbed_official	130:1dec54e4aec3	492	((LEVEL) == TIM_LOCKLevel_3))
mbed_official	130:1dec54e4aec3	493	/**
mbed_official	130:1dec54e4aec3	494	* @}
mbed_official	130:1dec54e4aec3	495	*/
mbed_official	130:1dec54e4aec3	496
mbed_official	130:1dec54e4aec3	497	/** @defgroup TIM_OSSI_Off_State_Selection_for_Idle_mode_state
mbed_official	130:1dec54e4aec3	498	* @{
mbed_official	130:1dec54e4aec3	499	*/
mbed_official	130:1dec54e4aec3	500
mbed_official	130:1dec54e4aec3	501	#define TIM_OSSIState_Enable ((uint16_t)0x0400)
mbed_official	130:1dec54e4aec3	502	#define TIM_OSSIState_Disable ((uint16_t)0x0000)
mbed_official	130:1dec54e4aec3	503	#define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSIState_Enable) \|\| \
mbed_official	130:1dec54e4aec3	504	((STATE) == TIM_OSSIState_Disable))
mbed_official	130:1dec54e4aec3	505	/**
mbed_official	130:1dec54e4aec3	506	* @}
mbed_official	130:1dec54e4aec3	507	*/
mbed_official	130:1dec54e4aec3	508
mbed_official	130:1dec54e4aec3	509	/** @defgroup TIM_OSSR_Off_State_Selection_for_Run_mode_state
mbed_official	130:1dec54e4aec3	510	* @{
mbed_official	130:1dec54e4aec3	511	*/
mbed_official	130:1dec54e4aec3	512
mbed_official	130:1dec54e4aec3	513	#define TIM_OSSRState_Enable ((uint16_t)0x0800)
mbed_official	130:1dec54e4aec3	514	#define TIM_OSSRState_Disable ((uint16_t)0x0000)
mbed_official	130:1dec54e4aec3	515	#define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSRState_Enable) \|\| \
mbed_official	130:1dec54e4aec3	516	((STATE) == TIM_OSSRState_Disable))
mbed_official	130:1dec54e4aec3	517	/**
mbed_official	130:1dec54e4aec3	518	* @}
mbed_official	130:1dec54e4aec3	519	*/
mbed_official	130:1dec54e4aec3	520
mbed_official	130:1dec54e4aec3	521	/** @defgroup TIM_Output_Compare_Idle_State
mbed_official	130:1dec54e4aec3	522	* @{
mbed_official	130:1dec54e4aec3	523	*/
mbed_official	130:1dec54e4aec3	524
mbed_official	130:1dec54e4aec3	525	#define TIM_OCIdleState_Set ((uint16_t)0x0100)
mbed_official	130:1dec54e4aec3	526	#define TIM_OCIdleState_Reset ((uint16_t)0x0000)
mbed_official	130:1dec54e4aec3	527	#define IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIdleState_Set) \|\| \
mbed_official	130:1dec54e4aec3	528	((STATE) == TIM_OCIdleState_Reset))
mbed_official	130:1dec54e4aec3	529	/**
mbed_official	130:1dec54e4aec3	530	* @}
mbed_official	130:1dec54e4aec3	531	*/
mbed_official	130:1dec54e4aec3	532
mbed_official	130:1dec54e4aec3	533	/** @defgroup TIM_Output_Compare_N_Idle_State
mbed_official	130:1dec54e4aec3	534	* @{
mbed_official	130:1dec54e4aec3	535	*/
mbed_official	130:1dec54e4aec3	536
mbed_official	130:1dec54e4aec3	537	#define TIM_OCNIdleState_Set ((uint16_t)0x0200)
mbed_official	130:1dec54e4aec3	538	#define TIM_OCNIdleState_Reset ((uint16_t)0x0000)
mbed_official	130:1dec54e4aec3	539	#define IS_TIM_OCNIDLE_STATE(STATE) (((STATE) == TIM_OCNIdleState_Set) \|\| \
mbed_official	130:1dec54e4aec3	540	((STATE) == TIM_OCNIdleState_Reset))
mbed_official	130:1dec54e4aec3	541	/**
mbed_official	130:1dec54e4aec3	542	* @}
mbed_official	130:1dec54e4aec3	543	*/
mbed_official	130:1dec54e4aec3	544
mbed_official	130:1dec54e4aec3	545	/** @defgroup TIM_Input_Capture_Polarity
mbed_official	130:1dec54e4aec3	546	* @{
mbed_official	130:1dec54e4aec3	547	*/
mbed_official	130:1dec54e4aec3	548
mbed_official	130:1dec54e4aec3	549	#define TIM_ICPolarity_Rising ((uint16_t)0x0000)
mbed_official	130:1dec54e4aec3	550	#define TIM_ICPolarity_Falling ((uint16_t)0x0002)
mbed_official	130:1dec54e4aec3	551	#define TIM_ICPolarity_BothEdge ((uint16_t)0x000A)
mbed_official	130:1dec54e4aec3	552	#define IS_TIM_IC_POLARITY(POLARITY) (((POLARITY) == TIM_ICPolarity_Rising) \|\| \
mbed_official	130:1dec54e4aec3	553	((POLARITY) == TIM_ICPolarity_Falling)\|\| \
mbed_official	130:1dec54e4aec3	554	((POLARITY) == TIM_ICPolarity_BothEdge))
mbed_official	130:1dec54e4aec3	555	/**
mbed_official	130:1dec54e4aec3	556	* @}
mbed_official	130:1dec54e4aec3	557	*/
mbed_official	130:1dec54e4aec3	558
mbed_official	130:1dec54e4aec3	559	/** @defgroup TIM_Input_Capture_Selection
mbed_official	130:1dec54e4aec3	560	* @{
mbed_official	130:1dec54e4aec3	561	*/
mbed_official	130:1dec54e4aec3	562
mbed_official	130:1dec54e4aec3	563	#define TIM_ICSelection_DirectTI ((uint16_t)0x0001) /*!< TIM Input 1, 2, 3 or 4 is selected to be
mbed_official	130:1dec54e4aec3	564	connected to IC1, IC2, IC3 or IC4, respectively */
mbed_official	130:1dec54e4aec3	565	#define TIM_ICSelection_IndirectTI ((uint16_t)0x0002) /*!< TIM Input 1, 2, 3 or 4 is selected to be
mbed_official	130:1dec54e4aec3	566	connected to IC2, IC1, IC4 or IC3, respectively. */
mbed_official	130:1dec54e4aec3	567	#define TIM_ICSelection_TRC ((uint16_t)0x0003) /!< TIM Input 1, 2, 3 or 4 is selected to be connected to TRC. /
mbed_official	130:1dec54e4aec3	568	#define IS_TIM_IC_SELECTION(SELECTION) (((SELECTION) == TIM_ICSelection_DirectTI) \|\| \
mbed_official	130:1dec54e4aec3	569	((SELECTION) == TIM_ICSelection_IndirectTI) \|\| \
mbed_official	130:1dec54e4aec3	570	((SELECTION) == TIM_ICSelection_TRC))
mbed_official	130:1dec54e4aec3	571	/**
mbed_official	130:1dec54e4aec3	572	* @}
mbed_official	130:1dec54e4aec3	573	*/
mbed_official	130:1dec54e4aec3	574
mbed_official	130:1dec54e4aec3	575	/** @defgroup TIM_Input_Capture_Prescaler
mbed_official	130:1dec54e4aec3	576	* @{
mbed_official	130:1dec54e4aec3	577	*/
mbed_official	130:1dec54e4aec3	578
mbed_official	130:1dec54e4aec3	579	#define TIM_ICPSC_DIV1 ((uint16_t)0x0000) /!< Capture performed each time an edge is detected on the capture input. /
mbed_official	130:1dec54e4aec3	580	#define TIM_ICPSC_DIV2 ((uint16_t)0x0004) /!< Capture performed once every 2 events. /
mbed_official	130:1dec54e4aec3	581	#define TIM_ICPSC_DIV4 ((uint16_t)0x0008) /!< Capture performed once every 4 events. /
mbed_official	130:1dec54e4aec3	582	#define TIM_ICPSC_DIV8 ((uint16_t)0x000C) /!< Capture performed once every 8 events. /
mbed_official	130:1dec54e4aec3	583	#define IS_TIM_IC_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ICPSC_DIV1) \|\| \
mbed_official	130:1dec54e4aec3	584	((PRESCALER) == TIM_ICPSC_DIV2) \|\| \
mbed_official	130:1dec54e4aec3	585	((PRESCALER) == TIM_ICPSC_DIV4) \|\| \
mbed_official	130:1dec54e4aec3	586	((PRESCALER) == TIM_ICPSC_DIV8))
mbed_official	130:1dec54e4aec3	587	/**
mbed_official	130:1dec54e4aec3	588	* @}
mbed_official	130:1dec54e4aec3	589	*/
mbed_official	130:1dec54e4aec3	590
mbed_official	130:1dec54e4aec3	591	/** @defgroup TIM_interrupt_sources
mbed_official	130:1dec54e4aec3	592	* @{
mbed_official	130:1dec54e4aec3	593	*/
mbed_official	130:1dec54e4aec3	594
mbed_official	130:1dec54e4aec3	595	#define TIM_IT_Update ((uint16_t)0x0001)
mbed_official	130:1dec54e4aec3	596	#define TIM_IT_CC1 ((uint16_t)0x0002)
mbed_official	130:1dec54e4aec3	597	#define TIM_IT_CC2 ((uint16_t)0x0004)
mbed_official	130:1dec54e4aec3	598	#define TIM_IT_CC3 ((uint16_t)0x0008)
mbed_official	130:1dec54e4aec3	599	#define TIM_IT_CC4 ((uint16_t)0x0010)
mbed_official	130:1dec54e4aec3	600	#define TIM_IT_COM ((uint16_t)0x0020)
mbed_official	130:1dec54e4aec3	601	#define TIM_IT_Trigger ((uint16_t)0x0040)
mbed_official	130:1dec54e4aec3	602	#define TIM_IT_Break ((uint16_t)0x0080)
mbed_official	130:1dec54e4aec3	603	#define IS_TIM_IT(IT) ((((IT) & (uint16_t)0xFF00) == 0x0000) && ((IT) != 0x0000))
mbed_official	130:1dec54e4aec3	604
mbed_official	130:1dec54e4aec3	605	#define IS_TIM_GET_IT(IT) (((IT) == TIM_IT_Update) \|\| \
mbed_official	130:1dec54e4aec3	606	((IT) == TIM_IT_CC1) \|\| \
mbed_official	130:1dec54e4aec3	607	((IT) == TIM_IT_CC2) \|\| \
mbed_official	130:1dec54e4aec3	608	((IT) == TIM_IT_CC3) \|\| \
mbed_official	130:1dec54e4aec3	609	((IT) == TIM_IT_CC4) \|\| \
mbed_official	130:1dec54e4aec3	610	((IT) == TIM_IT_COM) \|\| \
mbed_official	130:1dec54e4aec3	611	((IT) == TIM_IT_Trigger) \|\| \
mbed_official	130:1dec54e4aec3	612	((IT) == TIM_IT_Break))
mbed_official	130:1dec54e4aec3	613	/**
mbed_official	130:1dec54e4aec3	614	* @}
mbed_official	130:1dec54e4aec3	615	*/
mbed_official	130:1dec54e4aec3	616
mbed_official	130:1dec54e4aec3	617	/** @defgroup TIM_DMA_Base_address
mbed_official	130:1dec54e4aec3	618	* @{
mbed_official	130:1dec54e4aec3	619	*/
mbed_official	130:1dec54e4aec3	620
mbed_official	130:1dec54e4aec3	621	#define TIM_DMABase_CR1 ((uint16_t)0x0000)
mbed_official	130:1dec54e4aec3	622	#define TIM_DMABase_CR2 ((uint16_t)0x0001)
mbed_official	130:1dec54e4aec3	623	#define TIM_DMABase_SMCR ((uint16_t)0x0002)
mbed_official	130:1dec54e4aec3	624	#define TIM_DMABase_DIER ((uint16_t)0x0003)
mbed_official	130:1dec54e4aec3	625	#define TIM_DMABase_SR ((uint16_t)0x0004)
mbed_official	130:1dec54e4aec3	626	#define TIM_DMABase_EGR ((uint16_t)0x0005)
mbed_official	130:1dec54e4aec3	627	#define TIM_DMABase_CCMR1 ((uint16_t)0x0006)
mbed_official	130:1dec54e4aec3	628	#define TIM_DMABase_CCMR2 ((uint16_t)0x0007)
mbed_official	130:1dec54e4aec3	629	#define TIM_DMABase_CCER ((uint16_t)0x0008)
mbed_official	130:1dec54e4aec3	630	#define TIM_DMABase_CNT ((uint16_t)0x0009)
mbed_official	130:1dec54e4aec3	631	#define TIM_DMABase_PSC ((uint16_t)0x000A)
mbed_official	130:1dec54e4aec3	632	#define TIM_DMABase_ARR ((uint16_t)0x000B)
mbed_official	130:1dec54e4aec3	633	#define TIM_DMABase_RCR ((uint16_t)0x000C)
mbed_official	130:1dec54e4aec3	634	#define TIM_DMABase_CCR1 ((uint16_t)0x000D)
mbed_official	130:1dec54e4aec3	635	#define TIM_DMABase_CCR2 ((uint16_t)0x000E)
mbed_official	130:1dec54e4aec3	636	#define TIM_DMABase_CCR3 ((uint16_t)0x000F)
mbed_official	130:1dec54e4aec3	637	#define TIM_DMABase_CCR4 ((uint16_t)0x0010)
mbed_official	130:1dec54e4aec3	638	#define TIM_DMABase_BDTR ((uint16_t)0x0011)
mbed_official	130:1dec54e4aec3	639	#define TIM_DMABase_DCR ((uint16_t)0x0012)
mbed_official	130:1dec54e4aec3	640	#define TIM_DMABase_OR ((uint16_t)0x0013)
mbed_official	130:1dec54e4aec3	641	#define IS_TIM_DMA_BASE(BASE) (((BASE) == TIM_DMABase_CR1) \|\| \
mbed_official	130:1dec54e4aec3	642	((BASE) == TIM_DMABase_CR2) \|\| \
mbed_official	130:1dec54e4aec3	643	((BASE) == TIM_DMABase_SMCR) \|\| \
mbed_official	130:1dec54e4aec3	644	((BASE) == TIM_DMABase_DIER) \|\| \
mbed_official	130:1dec54e4aec3	645	((BASE) == TIM_DMABase_SR) \|\| \
mbed_official	130:1dec54e4aec3	646	((BASE) == TIM_DMABase_EGR) \|\| \
mbed_official	130:1dec54e4aec3	647	((BASE) == TIM_DMABase_CCMR1) \|\| \
mbed_official	130:1dec54e4aec3	648	((BASE) == TIM_DMABase_CCMR2) \|\| \
mbed_official	130:1dec54e4aec3	649	((BASE) == TIM_DMABase_CCER) \|\| \
mbed_official	130:1dec54e4aec3	650	((BASE) == TIM_DMABase_CNT) \|\| \
mbed_official	130:1dec54e4aec3	651	((BASE) == TIM_DMABase_PSC) \|\| \
mbed_official	130:1dec54e4aec3	652	((BASE) == TIM_DMABase_ARR) \|\| \
mbed_official	130:1dec54e4aec3	653	((BASE) == TIM_DMABase_RCR) \|\| \
mbed_official	130:1dec54e4aec3	654	((BASE) == TIM_DMABase_CCR1) \|\| \
mbed_official	130:1dec54e4aec3	655	((BASE) == TIM_DMABase_CCR2) \|\| \
mbed_official	130:1dec54e4aec3	656	((BASE) == TIM_DMABase_CCR3) \|\| \
mbed_official	130:1dec54e4aec3	657	((BASE) == TIM_DMABase_CCR4) \|\| \
mbed_official	130:1dec54e4aec3	658	((BASE) == TIM_DMABase_BDTR) \|\| \
mbed_official	130:1dec54e4aec3	659	((BASE) == TIM_DMABase_DCR) \|\| \
mbed_official	130:1dec54e4aec3	660	((BASE) == TIM_DMABase_OR))
mbed_official	130:1dec54e4aec3	661	/**
mbed_official	130:1dec54e4aec3	662	* @}
mbed_official	130:1dec54e4aec3	663	*/
mbed_official	130:1dec54e4aec3	664
mbed_official	130:1dec54e4aec3	665
mbed_official	130:1dec54e4aec3	666	/** @defgroup TIM_DMA_Burst_Length
mbed_official	130:1dec54e4aec3	667	* @{
mbed_official	130:1dec54e4aec3	668	*/
mbed_official	130:1dec54e4aec3	669
mbed_official	130:1dec54e4aec3	670	#define TIM_DMABurstLength_1Transfer ((uint16_t)0x0000)
mbed_official	130:1dec54e4aec3	671	#define TIM_DMABurstLength_2Transfers ((uint16_t)0x0100)
mbed_official	130:1dec54e4aec3	672	#define TIM_DMABurstLength_3Transfers ((uint16_t)0x0200)
mbed_official	130:1dec54e4aec3	673	#define TIM_DMABurstLength_4Transfers ((uint16_t)0x0300)
mbed_official	130:1dec54e4aec3	674	#define TIM_DMABurstLength_5Transfers ((uint16_t)0x0400)
mbed_official	130:1dec54e4aec3	675	#define TIM_DMABurstLength_6Transfers ((uint16_t)0x0500)
mbed_official	130:1dec54e4aec3	676	#define TIM_DMABurstLength_7Transfers ((uint16_t)0x0600)
mbed_official	130:1dec54e4aec3	677	#define TIM_DMABurstLength_8Transfers ((uint16_t)0x0700)
mbed_official	130:1dec54e4aec3	678	#define TIM_DMABurstLength_9Transfers ((uint16_t)0x0800)
mbed_official	130:1dec54e4aec3	679	#define TIM_DMABurstLength_10Transfers ((uint16_t)0x0900)
mbed_official	130:1dec54e4aec3	680	#define TIM_DMABurstLength_11Transfers ((uint16_t)0x0A00)
mbed_official	130:1dec54e4aec3	681	#define TIM_DMABurstLength_12Transfers ((uint16_t)0x0B00)
mbed_official	130:1dec54e4aec3	682	#define TIM_DMABurstLength_13Transfers ((uint16_t)0x0C00)
mbed_official	130:1dec54e4aec3	683	#define TIM_DMABurstLength_14Transfers ((uint16_t)0x0D00)
mbed_official	130:1dec54e4aec3	684	#define TIM_DMABurstLength_15Transfers ((uint16_t)0x0E00)
mbed_official	130:1dec54e4aec3	685	#define TIM_DMABurstLength_16Transfers ((uint16_t)0x0F00)
mbed_official	130:1dec54e4aec3	686	#define TIM_DMABurstLength_17Transfers ((uint16_t)0x1000)
mbed_official	130:1dec54e4aec3	687	#define TIM_DMABurstLength_18Transfers ((uint16_t)0x1100)
mbed_official	130:1dec54e4aec3	688	#define IS_TIM_DMA_LENGTH(LENGTH) (((LENGTH) == TIM_DMABurstLength_1Transfer) \|\| \
mbed_official	130:1dec54e4aec3	689	((LENGTH) == TIM_DMABurstLength_2Transfers) \|\| \
mbed_official	130:1dec54e4aec3	690	((LENGTH) == TIM_DMABurstLength_3Transfers) \|\| \
mbed_official	130:1dec54e4aec3	691	((LENGTH) == TIM_DMABurstLength_4Transfers) \|\| \
mbed_official	130:1dec54e4aec3	692	((LENGTH) == TIM_DMABurstLength_5Transfers) \|\| \
mbed_official	130:1dec54e4aec3	693	((LENGTH) == TIM_DMABurstLength_6Transfers) \|\| \
mbed_official	130:1dec54e4aec3	694	((LENGTH) == TIM_DMABurstLength_7Transfers) \|\| \
mbed_official	130:1dec54e4aec3	695	((LENGTH) == TIM_DMABurstLength_8Transfers) \|\| \
mbed_official	130:1dec54e4aec3	696	((LENGTH) == TIM_DMABurstLength_9Transfers) \|\| \
mbed_official	130:1dec54e4aec3	697	((LENGTH) == TIM_DMABurstLength_10Transfers) \|\| \
mbed_official	130:1dec54e4aec3	698	((LENGTH) == TIM_DMABurstLength_11Transfers) \|\| \
mbed_official	130:1dec54e4aec3	699	((LENGTH) == TIM_DMABurstLength_12Transfers) \|\| \
mbed_official	130:1dec54e4aec3	700	((LENGTH) == TIM_DMABurstLength_13Transfers) \|\| \
mbed_official	130:1dec54e4aec3	701	((LENGTH) == TIM_DMABurstLength_14Transfers) \|\| \
mbed_official	130:1dec54e4aec3	702	((LENGTH) == TIM_DMABurstLength_15Transfers) \|\| \
mbed_official	130:1dec54e4aec3	703	((LENGTH) == TIM_DMABurstLength_16Transfers) \|\| \
mbed_official	130:1dec54e4aec3	704	((LENGTH) == TIM_DMABurstLength_17Transfers) \|\| \
mbed_official	130:1dec54e4aec3	705	((LENGTH) == TIM_DMABurstLength_18Transfers))
mbed_official	130:1dec54e4aec3	706	/**
mbed_official	130:1dec54e4aec3	707	* @}
mbed_official	130:1dec54e4aec3	708	*/
mbed_official	130:1dec54e4aec3	709
mbed_official	130:1dec54e4aec3	710	/** @defgroup TIM_DMA_sources
mbed_official	130:1dec54e4aec3	711	* @{
mbed_official	130:1dec54e4aec3	712	*/
mbed_official	130:1dec54e4aec3	713
mbed_official	130:1dec54e4aec3	714	#define TIM_DMA_Update ((uint16_t)0x0100)
mbed_official	130:1dec54e4aec3	715	#define TIM_DMA_CC1 ((uint16_t)0x0200)
mbed_official	130:1dec54e4aec3	716	#define TIM_DMA_CC2 ((uint16_t)0x0400)
mbed_official	130:1dec54e4aec3	717	#define TIM_DMA_CC3 ((uint16_t)0x0800)
mbed_official	130:1dec54e4aec3	718	#define TIM_DMA_CC4 ((uint16_t)0x1000)
mbed_official	130:1dec54e4aec3	719	#define TIM_DMA_COM ((uint16_t)0x2000)
mbed_official	130:1dec54e4aec3	720	#define TIM_DMA_Trigger ((uint16_t)0x4000)
mbed_official	130:1dec54e4aec3	721	#define IS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0x80FF) == 0x0000) && ((SOURCE) != 0x0000))
mbed_official	130:1dec54e4aec3	722
mbed_official	130:1dec54e4aec3	723	/**
mbed_official	130:1dec54e4aec3	724	* @}
mbed_official	130:1dec54e4aec3	725	*/
mbed_official	130:1dec54e4aec3	726
mbed_official	130:1dec54e4aec3	727	/** @defgroup TIM_External_Trigger_Prescaler
mbed_official	130:1dec54e4aec3	728	* @{
mbed_official	130:1dec54e4aec3	729	*/
mbed_official	130:1dec54e4aec3	730
mbed_official	130:1dec54e4aec3	731	#define TIM_ExtTRGPSC_OFF ((uint16_t)0x0000)
mbed_official	130:1dec54e4aec3	732	#define TIM_ExtTRGPSC_DIV2 ((uint16_t)0x1000)
mbed_official	130:1dec54e4aec3	733	#define TIM_ExtTRGPSC_DIV4 ((uint16_t)0x2000)
mbed_official	130:1dec54e4aec3	734	#define TIM_ExtTRGPSC_DIV8 ((uint16_t)0x3000)
mbed_official	130:1dec54e4aec3	735	#define IS_TIM_EXT_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ExtTRGPSC_OFF) \|\| \
mbed_official	130:1dec54e4aec3	736	((PRESCALER) == TIM_ExtTRGPSC_DIV2) \|\| \
mbed_official	130:1dec54e4aec3	737	((PRESCALER) == TIM_ExtTRGPSC_DIV4) \|\| \
mbed_official	130:1dec54e4aec3	738	((PRESCALER) == TIM_ExtTRGPSC_DIV8))
mbed_official	130:1dec54e4aec3	739	/**
mbed_official	130:1dec54e4aec3	740	* @}
mbed_official	130:1dec54e4aec3	741	*/
mbed_official	130:1dec54e4aec3	742
mbed_official	130:1dec54e4aec3	743	/** @defgroup TIM_Internal_Trigger_Selection
mbed_official	130:1dec54e4aec3	744	* @{
mbed_official	130:1dec54e4aec3	745	*/
mbed_official	130:1dec54e4aec3	746
mbed_official	130:1dec54e4aec3	747	#define TIM_TS_ITR0 ((uint16_t)0x0000)
mbed_official	130:1dec54e4aec3	748	#define TIM_TS_ITR1 ((uint16_t)0x0010)
mbed_official	130:1dec54e4aec3	749	#define TIM_TS_ITR2 ((uint16_t)0x0020)
mbed_official	130:1dec54e4aec3	750	#define TIM_TS_ITR3 ((uint16_t)0x0030)
mbed_official	130:1dec54e4aec3	751	#define TIM_TS_TI1F_ED ((uint16_t)0x0040)
mbed_official	130:1dec54e4aec3	752	#define TIM_TS_TI1FP1 ((uint16_t)0x0050)
mbed_official	130:1dec54e4aec3	753	#define TIM_TS_TI2FP2 ((uint16_t)0x0060)
mbed_official	130:1dec54e4aec3	754	#define TIM_TS_ETRF ((uint16_t)0x0070)
mbed_official	130:1dec54e4aec3	755	#define IS_TIM_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) \|\| \
mbed_official	130:1dec54e4aec3	756	((SELECTION) == TIM_TS_ITR1) \|\| \
mbed_official	130:1dec54e4aec3	757	((SELECTION) == TIM_TS_ITR2) \|\| \
mbed_official	130:1dec54e4aec3	758	((SELECTION) == TIM_TS_ITR3) \|\| \
mbed_official	130:1dec54e4aec3	759	((SELECTION) == TIM_TS_TI1F_ED) \|\| \
mbed_official	130:1dec54e4aec3	760	((SELECTION) == TIM_TS_TI1FP1) \|\| \
mbed_official	130:1dec54e4aec3	761	((SELECTION) == TIM_TS_TI2FP2) \|\| \
mbed_official	130:1dec54e4aec3	762	((SELECTION) == TIM_TS_ETRF))
mbed_official	130:1dec54e4aec3	763	#define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) \|\| \
mbed_official	130:1dec54e4aec3	764	((SELECTION) == TIM_TS_ITR1) \|\| \
mbed_official	130:1dec54e4aec3	765	((SELECTION) == TIM_TS_ITR2) \|\| \
mbed_official	130:1dec54e4aec3	766	((SELECTION) == TIM_TS_ITR3))
mbed_official	130:1dec54e4aec3	767	/**
mbed_official	130:1dec54e4aec3	768	* @}
mbed_official	130:1dec54e4aec3	769	*/
mbed_official	130:1dec54e4aec3	770
mbed_official	130:1dec54e4aec3	771	/** @defgroup TIM_TIx_External_Clock_Source
mbed_official	130:1dec54e4aec3	772	* @{
mbed_official	130:1dec54e4aec3	773	*/
mbed_official	130:1dec54e4aec3	774
mbed_official	130:1dec54e4aec3	775	#define TIM_TIxExternalCLK1Source_TI1 ((uint16_t)0x0050)
mbed_official	130:1dec54e4aec3	776	#define TIM_TIxExternalCLK1Source_TI2 ((uint16_t)0x0060)
mbed_official	130:1dec54e4aec3	777	#define TIM_TIxExternalCLK1Source_TI1ED ((uint16_t)0x0040)
mbed_official	130:1dec54e4aec3	778
mbed_official	130:1dec54e4aec3	779	/**
mbed_official	130:1dec54e4aec3	780	* @}
mbed_official	130:1dec54e4aec3	781	*/
mbed_official	130:1dec54e4aec3	782
mbed_official	130:1dec54e4aec3	783	/** @defgroup TIM_External_Trigger_Polarity
mbed_official	130:1dec54e4aec3	784	* @{
mbed_official	130:1dec54e4aec3	785	*/
mbed_official	130:1dec54e4aec3	786	#define TIM_ExtTRGPolarity_Inverted ((uint16_t)0x8000)
mbed_official	130:1dec54e4aec3	787	#define TIM_ExtTRGPolarity_NonInverted ((uint16_t)0x0000)
mbed_official	130:1dec54e4aec3	788	#define IS_TIM_EXT_POLARITY(POLARITY) (((POLARITY) == TIM_ExtTRGPolarity_Inverted) \|\| \
mbed_official	130:1dec54e4aec3	789	((POLARITY) == TIM_ExtTRGPolarity_NonInverted))
mbed_official	130:1dec54e4aec3	790	/**
mbed_official	130:1dec54e4aec3	791	* @}
mbed_official	130:1dec54e4aec3	792	*/
mbed_official	130:1dec54e4aec3	793
mbed_official	130:1dec54e4aec3	794	/** @defgroup TIM_Prescaler_Reload_Mode
mbed_official	130:1dec54e4aec3	795	* @{
mbed_official	130:1dec54e4aec3	796	*/
mbed_official	130:1dec54e4aec3	797
mbed_official	130:1dec54e4aec3	798	#define TIM_PSCReloadMode_Update ((uint16_t)0x0000)
mbed_official	130:1dec54e4aec3	799	#define TIM_PSCReloadMode_Immediate ((uint16_t)0x0001)
mbed_official	130:1dec54e4aec3	800	#define IS_TIM_PRESCALER_RELOAD(RELOAD) (((RELOAD) == TIM_PSCReloadMode_Update) \|\| \
mbed_official	130:1dec54e4aec3	801	((RELOAD) == TIM_PSCReloadMode_Immediate))
mbed_official	130:1dec54e4aec3	802	/**
mbed_official	130:1dec54e4aec3	803	* @}
mbed_official	130:1dec54e4aec3	804	*/
mbed_official	130:1dec54e4aec3	805
mbed_official	130:1dec54e4aec3	806	/** @defgroup TIM_Forced_Action
mbed_official	130:1dec54e4aec3	807	* @{
mbed_official	130:1dec54e4aec3	808	*/
mbed_official	130:1dec54e4aec3	809
mbed_official	130:1dec54e4aec3	810	#define TIM_ForcedAction_Active ((uint16_t)0x0050)
mbed_official	130:1dec54e4aec3	811	#define TIM_ForcedAction_InActive ((uint16_t)0x0040)
mbed_official	130:1dec54e4aec3	812	#define IS_TIM_FORCED_ACTION(ACTION) (((ACTION) == TIM_ForcedAction_Active) \|\| \
mbed_official	130:1dec54e4aec3	813	((ACTION) == TIM_ForcedAction_InActive))
mbed_official	130:1dec54e4aec3	814	/**
mbed_official	130:1dec54e4aec3	815	* @}
mbed_official	130:1dec54e4aec3	816	*/
mbed_official	130:1dec54e4aec3	817
mbed_official	130:1dec54e4aec3	818	/** @defgroup TIM_Encoder_Mode
mbed_official	130:1dec54e4aec3	819	* @{
mbed_official	130:1dec54e4aec3	820	*/
mbed_official	130:1dec54e4aec3	821
mbed_official	130:1dec54e4aec3	822	#define TIM_EncoderMode_TI1 ((uint16_t)0x0001)
mbed_official	130:1dec54e4aec3	823	#define TIM_EncoderMode_TI2 ((uint16_t)0x0002)
mbed_official	130:1dec54e4aec3	824	#define TIM_EncoderMode_TI12 ((uint16_t)0x0003)
mbed_official	130:1dec54e4aec3	825	#define IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_EncoderMode_TI1) \|\| \
mbed_official	130:1dec54e4aec3	826	((MODE) == TIM_EncoderMode_TI2) \|\| \
mbed_official	130:1dec54e4aec3	827	((MODE) == TIM_EncoderMode_TI12))
mbed_official	130:1dec54e4aec3	828	/**
mbed_official	130:1dec54e4aec3	829	* @}
mbed_official	130:1dec54e4aec3	830	*/
mbed_official	130:1dec54e4aec3	831
mbed_official	130:1dec54e4aec3	832
mbed_official	130:1dec54e4aec3	833	/** @defgroup TIM_Event_Source
mbed_official	130:1dec54e4aec3	834	* @{
mbed_official	130:1dec54e4aec3	835	*/
mbed_official	130:1dec54e4aec3	836
mbed_official	130:1dec54e4aec3	837	#define TIM_EventSource_Update ((uint16_t)0x0001)
mbed_official	130:1dec54e4aec3	838	#define TIM_EventSource_CC1 ((uint16_t)0x0002)
mbed_official	130:1dec54e4aec3	839	#define TIM_EventSource_CC2 ((uint16_t)0x0004)
mbed_official	130:1dec54e4aec3	840	#define TIM_EventSource_CC3 ((uint16_t)0x0008)
mbed_official	130:1dec54e4aec3	841	#define TIM_EventSource_CC4 ((uint16_t)0x0010)
mbed_official	130:1dec54e4aec3	842	#define TIM_EventSource_COM ((uint16_t)0x0020)
mbed_official	130:1dec54e4aec3	843	#define TIM_EventSource_Trigger ((uint16_t)0x0040)
mbed_official	130:1dec54e4aec3	844	#define TIM_EventSource_Break ((uint16_t)0x0080)
mbed_official	130:1dec54e4aec3	845	#define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0xFF00) == 0x0000) && ((SOURCE) != 0x0000))
mbed_official	130:1dec54e4aec3	846
mbed_official	130:1dec54e4aec3	847	/**
mbed_official	130:1dec54e4aec3	848	* @}
mbed_official	130:1dec54e4aec3	849	*/
mbed_official	130:1dec54e4aec3	850
mbed_official	130:1dec54e4aec3	851	/** @defgroup TIM_Update_Source
mbed_official	130:1dec54e4aec3	852	* @{
mbed_official	130:1dec54e4aec3	853	*/
mbed_official	130:1dec54e4aec3	854
mbed_official	130:1dec54e4aec3	855	#define TIM_UpdateSource_Global ((uint16_t)0x0000) /*!< Source of update is the counter overflow/underflow
mbed_official	130:1dec54e4aec3	856	or the setting of UG bit, or an update generation
mbed_official	130:1dec54e4aec3	857	through the slave mode controller. */
mbed_official	130:1dec54e4aec3	858	#define TIM_UpdateSource_Regular ((uint16_t)0x0001) /!< Source of update is counter overflow/underflow. /
mbed_official	130:1dec54e4aec3	859	#define IS_TIM_UPDATE_SOURCE(SOURCE) (((SOURCE) == TIM_UpdateSource_Global) \|\| \
mbed_official	130:1dec54e4aec3	860	((SOURCE) == TIM_UpdateSource_Regular))
mbed_official	130:1dec54e4aec3	861	/**
mbed_official	130:1dec54e4aec3	862	* @}
mbed_official	130:1dec54e4aec3	863	*/
mbed_official	130:1dec54e4aec3	864
mbed_official	130:1dec54e4aec3	865	/** @defgroup TIM_Output_Compare_Preload_State
mbed_official	130:1dec54e4aec3	866	* @{
mbed_official	130:1dec54e4aec3	867	*/
mbed_official	130:1dec54e4aec3	868
mbed_official	130:1dec54e4aec3	869	#define TIM_OCPreload_Enable ((uint16_t)0x0008)
mbed_official	130:1dec54e4aec3	870	#define TIM_OCPreload_Disable ((uint16_t)0x0000)
mbed_official	130:1dec54e4aec3	871	#define IS_TIM_OCPRELOAD_STATE(STATE) (((STATE) == TIM_OCPreload_Enable) \|\| \
mbed_official	130:1dec54e4aec3	872	((STATE) == TIM_OCPreload_Disable))
mbed_official	130:1dec54e4aec3	873	/**
mbed_official	130:1dec54e4aec3	874	* @}
mbed_official	130:1dec54e4aec3	875	*/
mbed_official	130:1dec54e4aec3	876
mbed_official	130:1dec54e4aec3	877	/** @defgroup TIM_Output_Compare_Fast_State
mbed_official	130:1dec54e4aec3	878	* @{
mbed_official	130:1dec54e4aec3	879	*/
mbed_official	130:1dec54e4aec3	880
mbed_official	130:1dec54e4aec3	881	#define TIM_OCFast_Enable ((uint16_t)0x0004)
mbed_official	130:1dec54e4aec3	882	#define TIM_OCFast_Disable ((uint16_t)0x0000)
mbed_official	130:1dec54e4aec3	883	#define IS_TIM_OCFAST_STATE(STATE) (((STATE) == TIM_OCFast_Enable) \|\| \
mbed_official	130:1dec54e4aec3	884	((STATE) == TIM_OCFast_Disable))
mbed_official	130:1dec54e4aec3	885
mbed_official	130:1dec54e4aec3	886	/**
mbed_official	130:1dec54e4aec3	887	* @}
mbed_official	130:1dec54e4aec3	888	*/
mbed_official	130:1dec54e4aec3	889
mbed_official	130:1dec54e4aec3	890	/** @defgroup TIM_Output_Compare_Clear_State
mbed_official	130:1dec54e4aec3	891	* @{
mbed_official	130:1dec54e4aec3	892	*/
mbed_official	130:1dec54e4aec3	893
mbed_official	130:1dec54e4aec3	894	#define TIM_OCClear_Enable ((uint16_t)0x0080)
mbed_official	130:1dec54e4aec3	895	#define TIM_OCClear_Disable ((uint16_t)0x0000)
mbed_official	130:1dec54e4aec3	896	#define IS_TIM_OCCLEAR_STATE(STATE) (((STATE) == TIM_OCClear_Enable) \|\| \
mbed_official	130:1dec54e4aec3	897	((STATE) == TIM_OCClear_Disable))
mbed_official	130:1dec54e4aec3	898	/**
mbed_official	130:1dec54e4aec3	899	* @}
mbed_official	130:1dec54e4aec3	900	*/
mbed_official	130:1dec54e4aec3	901
mbed_official	130:1dec54e4aec3	902	/** @defgroup TIM_Trigger_Output_Source
mbed_official	130:1dec54e4aec3	903	* @{
mbed_official	130:1dec54e4aec3	904	*/
mbed_official	130:1dec54e4aec3	905
mbed_official	130:1dec54e4aec3	906	#define TIM_TRGOSource_Reset ((uint16_t)0x0000)
mbed_official	130:1dec54e4aec3	907	#define TIM_TRGOSource_Enable ((uint16_t)0x0010)
mbed_official	130:1dec54e4aec3	908	#define TIM_TRGOSource_Update ((uint16_t)0x0020)
mbed_official	130:1dec54e4aec3	909	#define TIM_TRGOSource_OC1 ((uint16_t)0x0030)
mbed_official	130:1dec54e4aec3	910	#define TIM_TRGOSource_OC1Ref ((uint16_t)0x0040)
mbed_official	130:1dec54e4aec3	911	#define TIM_TRGOSource_OC2Ref ((uint16_t)0x0050)
mbed_official	130:1dec54e4aec3	912	#define TIM_TRGOSource_OC3Ref ((uint16_t)0x0060)
mbed_official	130:1dec54e4aec3	913	#define TIM_TRGOSource_OC4Ref ((uint16_t)0x0070)
mbed_official	130:1dec54e4aec3	914	#define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGOSource_Reset) \|\| \
mbed_official	130:1dec54e4aec3	915	((SOURCE) == TIM_TRGOSource_Enable) \|\| \
mbed_official	130:1dec54e4aec3	916	((SOURCE) == TIM_TRGOSource_Update) \|\| \
mbed_official	130:1dec54e4aec3	917	((SOURCE) == TIM_TRGOSource_OC1) \|\| \
mbed_official	130:1dec54e4aec3	918	((SOURCE) == TIM_TRGOSource_OC1Ref) \|\| \
mbed_official	130:1dec54e4aec3	919	((SOURCE) == TIM_TRGOSource_OC2Ref) \|\| \
mbed_official	130:1dec54e4aec3	920	((SOURCE) == TIM_TRGOSource_OC3Ref) \|\| \
mbed_official	130:1dec54e4aec3	921	((SOURCE) == TIM_TRGOSource_OC4Ref))
mbed_official	130:1dec54e4aec3	922	/**
mbed_official	130:1dec54e4aec3	923	* @}
mbed_official	130:1dec54e4aec3	924	*/
mbed_official	130:1dec54e4aec3	925
mbed_official	130:1dec54e4aec3	926	/** @defgroup TIM_Slave_Mode
mbed_official	130:1dec54e4aec3	927	* @{
mbed_official	130:1dec54e4aec3	928	*/
mbed_official	130:1dec54e4aec3	929
mbed_official	130:1dec54e4aec3	930	#define TIM_SlaveMode_Reset ((uint16_t)0x0004)
mbed_official	130:1dec54e4aec3	931	#define TIM_SlaveMode_Gated ((uint16_t)0x0005)
mbed_official	130:1dec54e4aec3	932	#define TIM_SlaveMode_Trigger ((uint16_t)0x0006)
mbed_official	130:1dec54e4aec3	933	#define TIM_SlaveMode_External1 ((uint16_t)0x0007)
mbed_official	130:1dec54e4aec3	934	#define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SlaveMode_Reset) \|\| \
mbed_official	130:1dec54e4aec3	935	((MODE) == TIM_SlaveMode_Gated) \|\| \
mbed_official	130:1dec54e4aec3	936	((MODE) == TIM_SlaveMode_Trigger) \|\| \
mbed_official	130:1dec54e4aec3	937	((MODE) == TIM_SlaveMode_External1))
mbed_official	130:1dec54e4aec3	938	/**
mbed_official	130:1dec54e4aec3	939	* @}
mbed_official	130:1dec54e4aec3	940	*/
mbed_official	130:1dec54e4aec3	941
mbed_official	130:1dec54e4aec3	942	/** @defgroup TIM_Master_Slave_Mode
mbed_official	130:1dec54e4aec3	943	* @{
mbed_official	130:1dec54e4aec3	944	*/
mbed_official	130:1dec54e4aec3	945
mbed_official	130:1dec54e4aec3	946	#define TIM_MasterSlaveMode_Enable ((uint16_t)0x0080)
mbed_official	130:1dec54e4aec3	947	#define TIM_MasterSlaveMode_Disable ((uint16_t)0x0000)
mbed_official	130:1dec54e4aec3	948	#define IS_TIM_MSM_STATE(STATE) (((STATE) == TIM_MasterSlaveMode_Enable) \|\| \
mbed_official	130:1dec54e4aec3	949	((STATE) == TIM_MasterSlaveMode_Disable))
mbed_official	130:1dec54e4aec3	950	/**
mbed_official	130:1dec54e4aec3	951	* @}
mbed_official	130:1dec54e4aec3	952	*/
mbed_official	130:1dec54e4aec3	953
mbed_official	130:1dec54e4aec3	954	/** @defgroup TIM_Flags
mbed_official	130:1dec54e4aec3	955	* @{
mbed_official	130:1dec54e4aec3	956	*/
mbed_official	130:1dec54e4aec3	957
mbed_official	130:1dec54e4aec3	958	#define TIM_FLAG_Update ((uint16_t)0x0001)
mbed_official	130:1dec54e4aec3	959	#define TIM_FLAG_CC1 ((uint16_t)0x0002)
mbed_official	130:1dec54e4aec3	960	#define TIM_FLAG_CC2 ((uint16_t)0x0004)
mbed_official	130:1dec54e4aec3	961	#define TIM_FLAG_CC3 ((uint16_t)0x0008)
mbed_official	130:1dec54e4aec3	962	#define TIM_FLAG_CC4 ((uint16_t)0x0010)
mbed_official	130:1dec54e4aec3	963	#define TIM_FLAG_COM ((uint16_t)0x0020)
mbed_official	130:1dec54e4aec3	964	#define TIM_FLAG_Trigger ((uint16_t)0x0040)
mbed_official	130:1dec54e4aec3	965	#define TIM_FLAG_Break ((uint16_t)0x0080)
mbed_official	130:1dec54e4aec3	966	#define TIM_FLAG_CC1OF ((uint16_t)0x0200)
mbed_official	130:1dec54e4aec3	967	#define TIM_FLAG_CC2OF ((uint16_t)0x0400)
mbed_official	130:1dec54e4aec3	968	#define TIM_FLAG_CC3OF ((uint16_t)0x0800)
mbed_official	130:1dec54e4aec3	969	#define TIM_FLAG_CC4OF ((uint16_t)0x1000)
mbed_official	130:1dec54e4aec3	970	#define IS_TIM_GET_FLAG(FLAG) (((FLAG) == TIM_FLAG_Update) \|\| \
mbed_official	130:1dec54e4aec3	971	((FLAG) == TIM_FLAG_CC1) \|\| \
mbed_official	130:1dec54e4aec3	972	((FLAG) == TIM_FLAG_CC2) \|\| \
mbed_official	130:1dec54e4aec3	973	((FLAG) == TIM_FLAG_CC3) \|\| \
mbed_official	130:1dec54e4aec3	974	((FLAG) == TIM_FLAG_CC4) \|\| \
mbed_official	130:1dec54e4aec3	975	((FLAG) == TIM_FLAG_COM) \|\| \
mbed_official	130:1dec54e4aec3	976	((FLAG) == TIM_FLAG_Trigger) \|\| \
mbed_official	130:1dec54e4aec3	977	((FLAG) == TIM_FLAG_Break) \|\| \
mbed_official	130:1dec54e4aec3	978	((FLAG) == TIM_FLAG_CC1OF) \|\| \
mbed_official	130:1dec54e4aec3	979	((FLAG) == TIM_FLAG_CC2OF) \|\| \
mbed_official	130:1dec54e4aec3	980	((FLAG) == TIM_FLAG_CC3OF) \|\| \
mbed_official	130:1dec54e4aec3	981	((FLAG) == TIM_FLAG_CC4OF))
mbed_official	130:1dec54e4aec3	982
mbed_official	130:1dec54e4aec3	983
mbed_official	130:1dec54e4aec3	984	#define IS_TIM_CLEAR_FLAG(TIM_FLAG) ((((TIM_FLAG) & (uint16_t)0xE100) == 0x0000) && ((TIM_FLAG) != 0x0000))
mbed_official	130:1dec54e4aec3	985	/**
mbed_official	130:1dec54e4aec3	986	* @}
mbed_official	130:1dec54e4aec3	987	*/
mbed_official	130:1dec54e4aec3	988
mbed_official	130:1dec54e4aec3	989
mbed_official	130:1dec54e4aec3	990	/** @defgroup TIM_Input_Capture_Filer_Value
mbed_official	130:1dec54e4aec3	991	* @{
mbed_official	130:1dec54e4aec3	992	*/
mbed_official	130:1dec54e4aec3	993
mbed_official	130:1dec54e4aec3	994	#define IS_TIM_IC_FILTER(ICFILTER) ((ICFILTER) <= 0xF)
mbed_official	130:1dec54e4aec3	995	/**
mbed_official	130:1dec54e4aec3	996	* @}
mbed_official	130:1dec54e4aec3	997	*/
mbed_official	130:1dec54e4aec3	998
mbed_official	130:1dec54e4aec3	999	/** @defgroup TIM_External_Trigger_Filter
mbed_official	130:1dec54e4aec3	1000	* @{
mbed_official	130:1dec54e4aec3	1001	*/
mbed_official	130:1dec54e4aec3	1002
mbed_official	130:1dec54e4aec3	1003	#define IS_TIM_EXT_FILTER(EXTFILTER) ((EXTFILTER) <= 0xF)
mbed_official	130:1dec54e4aec3	1004	/**
mbed_official	130:1dec54e4aec3	1005	* @}
mbed_official	130:1dec54e4aec3	1006	*/
mbed_official	130:1dec54e4aec3	1007
mbed_official	130:1dec54e4aec3	1008	/** @defgroup TIM_OCReferenceClear
mbed_official	130:1dec54e4aec3	1009	* @{
mbed_official	130:1dec54e4aec3	1010	*/
mbed_official	130:1dec54e4aec3	1011	#define TIM_OCReferenceClear_ETRF ((uint16_t)0x0008)
mbed_official	130:1dec54e4aec3	1012	#define TIM_OCReferenceClear_OCREFCLR ((uint16_t)0x0000)
mbed_official	130:1dec54e4aec3	1013	#define TIM_OCREFERENCECECLEAR_SOURCE(SOURCE) (((SOURCE) == TIM_OCReferenceClear_ETRF) \|\| \
mbed_official	130:1dec54e4aec3	1014	((SOURCE) == TIM_OCReferenceClear_OCREFCLR))
mbed_official	130:1dec54e4aec3	1015
mbed_official	130:1dec54e4aec3	1016	/**
mbed_official	130:1dec54e4aec3	1017	* @}
mbed_official	130:1dec54e4aec3	1018	*/
mbed_official	130:1dec54e4aec3	1019	/** @defgroup TIM_Remap
mbed_official	130:1dec54e4aec3	1020	* @{
mbed_official	130:1dec54e4aec3	1021	*/
mbed_official	130:1dec54e4aec3	1022	#define TIM14_GPIO ((uint16_t)0x0000)
mbed_official	130:1dec54e4aec3	1023	#define TIM14_RTC_CLK ((uint16_t)0x0001)
mbed_official	130:1dec54e4aec3	1024	#define TIM14_HSEDiv32 ((uint16_t)0x0002)
mbed_official	130:1dec54e4aec3	1025	#define TIM14_MCO ((uint16_t)0x0003)
mbed_official	130:1dec54e4aec3	1026
mbed_official	130:1dec54e4aec3	1027	#define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM14_GPIO)\|\| \
mbed_official	130:1dec54e4aec3	1028	((TIM_REMAP) == TIM14_RTC_CLK) \|\| \
mbed_official	130:1dec54e4aec3	1029	((TIM_REMAP) == TIM14_HSEDiv32) \|\| \
mbed_official	130:1dec54e4aec3	1030	((TIM_REMAP) == TIM14_MCO))
mbed_official	130:1dec54e4aec3	1031	/**
mbed_official	130:1dec54e4aec3	1032	* @}
mbed_official	130:1dec54e4aec3	1033	*/
mbed_official	130:1dec54e4aec3	1034
mbed_official	130:1dec54e4aec3	1035	/** @defgroup TIM_Legacy
mbed_official	130:1dec54e4aec3	1036	* @{
mbed_official	130:1dec54e4aec3	1037	*/
mbed_official	130:1dec54e4aec3	1038
mbed_official	130:1dec54e4aec3	1039	#define TIM_DMABurstLength_1Byte TIM_DMABurstLength_1Transfer
mbed_official	130:1dec54e4aec3	1040	#define TIM_DMABurstLength_2Bytes TIM_DMABurstLength_2Transfers
mbed_official	130:1dec54e4aec3	1041	#define TIM_DMABurstLength_3Bytes TIM_DMABurstLength_3Transfers
mbed_official	130:1dec54e4aec3	1042	#define TIM_DMABurstLength_4Bytes TIM_DMABurstLength_4Transfers
mbed_official	130:1dec54e4aec3	1043	#define TIM_DMABurstLength_5Bytes TIM_DMABurstLength_5Transfers
mbed_official	130:1dec54e4aec3	1044	#define TIM_DMABurstLength_6Bytes TIM_DMABurstLength_6Transfers
mbed_official	130:1dec54e4aec3	1045	#define TIM_DMABurstLength_7Bytes TIM_DMABurstLength_7Transfers
mbed_official	130:1dec54e4aec3	1046	#define TIM_DMABurstLength_8Bytes TIM_DMABurstLength_8Transfers
mbed_official	130:1dec54e4aec3	1047	#define TIM_DMABurstLength_9Bytes TIM_DMABurstLength_9Transfers
mbed_official	130:1dec54e4aec3	1048	#define TIM_DMABurstLength_10Bytes TIM_DMABurstLength_10Transfers
mbed_official	130:1dec54e4aec3	1049	#define TIM_DMABurstLength_11Bytes TIM_DMABurstLength_11Transfers
mbed_official	130:1dec54e4aec3	1050	#define TIM_DMABurstLength_12Bytes TIM_DMABurstLength_12Transfers
mbed_official	130:1dec54e4aec3	1051	#define TIM_DMABurstLength_13Bytes TIM_DMABurstLength_13Transfers
mbed_official	130:1dec54e4aec3	1052	#define TIM_DMABurstLength_14Bytes TIM_DMABurstLength_14Transfers
mbed_official	130:1dec54e4aec3	1053	#define TIM_DMABurstLength_15Bytes TIM_DMABurstLength_15Transfers
mbed_official	130:1dec54e4aec3	1054	#define TIM_DMABurstLength_16Bytes TIM_DMABurstLength_16Transfers
mbed_official	130:1dec54e4aec3	1055	#define TIM_DMABurstLength_17Bytes TIM_DMABurstLength_17Transfers
mbed_official	130:1dec54e4aec3	1056	#define TIM_DMABurstLength_18Bytes TIM_DMABurstLength_18Transfers
mbed_official	130:1dec54e4aec3	1057	/**
mbed_official	130:1dec54e4aec3	1058	* @}
mbed_official	130:1dec54e4aec3	1059	*/
mbed_official	130:1dec54e4aec3	1060
mbed_official	130:1dec54e4aec3	1061	/**
mbed_official	130:1dec54e4aec3	1062	* @}
mbed_official	130:1dec54e4aec3	1063	*/
mbed_official	130:1dec54e4aec3	1064
mbed_official	130:1dec54e4aec3	1065	/* Exported macro ------------------------------------------------------------*/
mbed_official	130:1dec54e4aec3	1066	/* Exported functions ------------------------------------------------------- */
mbed_official	130:1dec54e4aec3	1067
mbed_official	130:1dec54e4aec3	1068	/* TimeBase management ********************************************************/
mbed_official	130:1dec54e4aec3	1069	void TIM_DeInit(TIM_TypeDef* TIMx);
mbed_official	130:1dec54e4aec3	1070	void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct);
mbed_official	130:1dec54e4aec3	1071	void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct);
mbed_official	130:1dec54e4aec3	1072	void TIM_PrescalerConfig(TIM_TypeDef* TIMx, uint16_t Prescaler, uint16_t TIM_PSCReloadMode);
mbed_official	130:1dec54e4aec3	1073	void TIM_CounterModeConfig(TIM_TypeDef* TIMx, uint16_t TIM_CounterMode);
mbed_official	130:1dec54e4aec3	1074	void TIM_SetCounter(TIM_TypeDef* TIMx, uint32_t Counter);
mbed_official	130:1dec54e4aec3	1075	void TIM_SetAutoreload(TIM_TypeDef* TIMx, uint32_t Autoreload);
mbed_official	130:1dec54e4aec3	1076	uint32_t TIM_GetCounter(TIM_TypeDef* TIMx);
mbed_official	130:1dec54e4aec3	1077	uint16_t TIM_GetPrescaler(TIM_TypeDef* TIMx);
mbed_official	130:1dec54e4aec3	1078	void TIM_UpdateDisableConfig(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official	130:1dec54e4aec3	1079	void TIM_UpdateRequestConfig(TIM_TypeDef* TIMx, uint16_t TIM_UpdateSource);
mbed_official	130:1dec54e4aec3	1080	void TIM_ARRPreloadConfig(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official	130:1dec54e4aec3	1081	void TIM_SelectOnePulseMode(TIM_TypeDef* TIMx, uint16_t TIM_OPMode);
mbed_official	130:1dec54e4aec3	1082	void TIM_SetClockDivision(TIM_TypeDef* TIMx, uint16_t TIM_CKD);
mbed_official	130:1dec54e4aec3	1083	void TIM_Cmd(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official	130:1dec54e4aec3	1084
mbed_official	130:1dec54e4aec3	1085	/* Advanced-control timers (TIM1) specific features*******************/
mbed_official	130:1dec54e4aec3	1086	void TIM_BDTRConfig(TIM_TypeDef* TIMx, TIM_BDTRInitTypeDef *TIM_BDTRInitStruct);
mbed_official	130:1dec54e4aec3	1087	void TIM_BDTRStructInit(TIM_BDTRInitTypeDef* TIM_BDTRInitStruct);
mbed_official	130:1dec54e4aec3	1088	void TIM_CtrlPWMOutputs(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official	130:1dec54e4aec3	1089
mbed_official	130:1dec54e4aec3	1090	/* Output Compare management **************************************************/
mbed_official	130:1dec54e4aec3	1091	void TIM_OC1Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
mbed_official	130:1dec54e4aec3	1092	void TIM_OC2Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
mbed_official	130:1dec54e4aec3	1093	void TIM_OC3Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
mbed_official	130:1dec54e4aec3	1094	void TIM_OC4Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
mbed_official	130:1dec54e4aec3	1095	void TIM_OCStructInit(TIM_OCInitTypeDef* TIM_OCInitStruct);
mbed_official	130:1dec54e4aec3	1096	void TIM_SelectOCxM(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_OCMode);
mbed_official	130:1dec54e4aec3	1097	void TIM_SetCompare1(TIM_TypeDef* TIMx, uint32_t Compare1);
mbed_official	130:1dec54e4aec3	1098	void TIM_SetCompare2(TIM_TypeDef* TIMx, uint32_t Compare2);
mbed_official	130:1dec54e4aec3	1099	void TIM_SetCompare3(TIM_TypeDef* TIMx, uint32_t Compare3);
mbed_official	130:1dec54e4aec3	1100	void TIM_SetCompare4(TIM_TypeDef* TIMx, uint32_t Compare4);
mbed_official	130:1dec54e4aec3	1101	void TIM_ForcedOC1Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
mbed_official	130:1dec54e4aec3	1102	void TIM_ForcedOC2Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
mbed_official	130:1dec54e4aec3	1103	void TIM_ForcedOC3Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
mbed_official	130:1dec54e4aec3	1104	void TIM_ForcedOC4Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
mbed_official	130:1dec54e4aec3	1105	void TIM_CCPreloadControl(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official	130:1dec54e4aec3	1106	void TIM_OC1PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
mbed_official	130:1dec54e4aec3	1107	void TIM_OC2PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
mbed_official	130:1dec54e4aec3	1108	void TIM_OC3PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
mbed_official	130:1dec54e4aec3	1109	void TIM_OC4PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
mbed_official	130:1dec54e4aec3	1110	void TIM_OC1FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);
mbed_official	130:1dec54e4aec3	1111	void TIM_OC2FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);
mbed_official	130:1dec54e4aec3	1112	void TIM_OC3FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);
mbed_official	130:1dec54e4aec3	1113	void TIM_OC4FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);
mbed_official	130:1dec54e4aec3	1114	void TIM_ClearOC1Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
mbed_official	130:1dec54e4aec3	1115	void TIM_ClearOC2Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
mbed_official	130:1dec54e4aec3	1116	void TIM_ClearOC3Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
mbed_official	130:1dec54e4aec3	1117	void TIM_ClearOC4Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
mbed_official	130:1dec54e4aec3	1118	void TIM_OC1PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
mbed_official	130:1dec54e4aec3	1119	void TIM_OC1NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity);
mbed_official	130:1dec54e4aec3	1120	void TIM_OC2PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
mbed_official	130:1dec54e4aec3	1121	void TIM_OC2NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity);
mbed_official	130:1dec54e4aec3	1122	void TIM_OC3PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
mbed_official	130:1dec54e4aec3	1123	void TIM_OC3NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity);
mbed_official	130:1dec54e4aec3	1124	void TIM_OC4PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
mbed_official	130:1dec54e4aec3	1125	void TIM_SelectOCREFClear(TIM_TypeDef* TIMx, uint16_t TIM_OCReferenceClear);
mbed_official	130:1dec54e4aec3	1126	void TIM_CCxCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCx);
mbed_official	130:1dec54e4aec3	1127	void TIM_CCxNCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCxN);
mbed_official	130:1dec54e4aec3	1128	void TIM_SelectCOM(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official	130:1dec54e4aec3	1129
mbed_official	130:1dec54e4aec3	1130	/* Input Capture management ***************************************************/
mbed_official	130:1dec54e4aec3	1131	void TIM_ICInit(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct);
mbed_official	130:1dec54e4aec3	1132	void TIM_ICStructInit(TIM_ICInitTypeDef* TIM_ICInitStruct);
mbed_official	130:1dec54e4aec3	1133	void TIM_PWMIConfig(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct);
mbed_official	130:1dec54e4aec3	1134	uint32_t TIM_GetCapture1(TIM_TypeDef* TIMx);
mbed_official	130:1dec54e4aec3	1135	uint32_t TIM_GetCapture2(TIM_TypeDef* TIMx);
mbed_official	130:1dec54e4aec3	1136	uint32_t TIM_GetCapture3(TIM_TypeDef* TIMx);
mbed_official	130:1dec54e4aec3	1137	uint32_t TIM_GetCapture4(TIM_TypeDef* TIMx);
mbed_official	130:1dec54e4aec3	1138	void TIM_SetIC1Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);
mbed_official	130:1dec54e4aec3	1139	void TIM_SetIC2Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);
mbed_official	130:1dec54e4aec3	1140	void TIM_SetIC3Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);
mbed_official	130:1dec54e4aec3	1141	void TIM_SetIC4Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);
mbed_official	130:1dec54e4aec3	1142
mbed_official	130:1dec54e4aec3	1143	/* Interrupts, DMA and flags management ***************************************/
mbed_official	130:1dec54e4aec3	1144	void TIM_ITConfig(TIM_TypeDef* TIMx, uint16_t TIM_IT, FunctionalState NewState);
mbed_official	130:1dec54e4aec3	1145	void TIM_GenerateEvent(TIM_TypeDef* TIMx, uint16_t TIM_EventSource);
mbed_official	130:1dec54e4aec3	1146	FlagStatus TIM_GetFlagStatus(TIM_TypeDef* TIMx, uint16_t TIM_FLAG);
mbed_official	130:1dec54e4aec3	1147	void TIM_ClearFlag(TIM_TypeDef* TIMx, uint16_t TIM_FLAG);
mbed_official	130:1dec54e4aec3	1148	ITStatus TIM_GetITStatus(TIM_TypeDef* TIMx, uint16_t TIM_IT);
mbed_official	130:1dec54e4aec3	1149	void TIM_ClearITPendingBit(TIM_TypeDef* TIMx, uint16_t TIM_IT);
mbed_official	130:1dec54e4aec3	1150	void TIM_DMAConfig(TIM_TypeDef* TIMx, uint16_t TIM_DMABase, uint16_t TIM_DMABurstLength);
mbed_official	130:1dec54e4aec3	1151	void TIM_DMACmd(TIM_TypeDef* TIMx, uint16_t TIM_DMASource, FunctionalState NewState);
mbed_official	130:1dec54e4aec3	1152	void TIM_SelectCCDMA(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official	130:1dec54e4aec3	1153
mbed_official	130:1dec54e4aec3	1154	/* Clocks management **********************************************************/
mbed_official	130:1dec54e4aec3	1155	void TIM_InternalClockConfig(TIM_TypeDef* TIMx);
mbed_official	130:1dec54e4aec3	1156	void TIM_ITRxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource);
mbed_official	130:1dec54e4aec3	1157	void TIM_TIxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_TIxExternalCLKSource,
mbed_official	130:1dec54e4aec3	1158	uint16_t TIM_ICPolarity, uint16_t ICFilter);
mbed_official	130:1dec54e4aec3	1159	void TIM_ETRClockMode1Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity,
mbed_official	130:1dec54e4aec3	1160	uint16_t ExtTRGFilter);
mbed_official	130:1dec54e4aec3	1161	void TIM_ETRClockMode2Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler,
mbed_official	130:1dec54e4aec3	1162	uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter);
mbed_official	130:1dec54e4aec3	1163
mbed_official	130:1dec54e4aec3	1164
mbed_official	130:1dec54e4aec3	1165	/* Synchronization management *************************************************/
mbed_official	130:1dec54e4aec3	1166	void TIM_SelectInputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource);
mbed_official	130:1dec54e4aec3	1167	void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_TRGOSource);
mbed_official	130:1dec54e4aec3	1168	void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode);
mbed_official	130:1dec54e4aec3	1169	void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_MasterSlaveMode);
mbed_official	130:1dec54e4aec3	1170	void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity,
mbed_official	130:1dec54e4aec3	1171	uint16_t ExtTRGFilter);
mbed_official	130:1dec54e4aec3	1172
mbed_official	130:1dec54e4aec3	1173	/* Specific interface management **********************************************/
mbed_official	130:1dec54e4aec3	1174	void TIM_EncoderInterfaceConfig(TIM_TypeDef* TIMx, uint16_t TIM_EncoderMode,
mbed_official	130:1dec54e4aec3	1175	uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity);
mbed_official	130:1dec54e4aec3	1176	void TIM_SelectHallSensor(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official	130:1dec54e4aec3	1177
mbed_official	130:1dec54e4aec3	1178	/* Specific remapping management **********************************************/
mbed_official	130:1dec54e4aec3	1179	void TIM_RemapConfig(TIM_TypeDef* TIMx, uint16_t TIM_Remap);
mbed_official	130:1dec54e4aec3	1180
mbed_official	130:1dec54e4aec3	1181
mbed_official	130:1dec54e4aec3	1182	#ifdef __cplusplus
mbed_official	130:1dec54e4aec3	1183	}
mbed_official	130:1dec54e4aec3	1184	#endif
mbed_official	130:1dec54e4aec3	1185
mbed_official	130:1dec54e4aec3	1186	#endif /__STM32F0XX_TIM_H /
mbed_official	130:1dec54e4aec3	1187
mbed_official	130:1dec54e4aec3	1188	/**
mbed_official	130:1dec54e4aec3	1189	* @}
mbed_official	130:1dec54e4aec3	1190	*/
mbed_official	130:1dec54e4aec3	1191
mbed_official	130:1dec54e4aec3	1192	/**
mbed_official	130:1dec54e4aec3	1193	* @}
mbed_official	130:1dec54e4aec3	1194	*/
mbed_official	130:1dec54e4aec3	1195
mbed_official	130:1dec54e4aec3	1196	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	13 Sep 2014
Imports:	4
Forks:	0
Commits:	324
Dependents:	1
Dependencies:	0
Followers:	2

targets/cmsis/TARGET_STM/TARGET_DISCO_F051R8/stm32f0xx_tim.h@323:9e901b0a5aa1, 2014-09-13 (annotated)

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