shao ziyang / mbed-src-kl05

mbed library sources

Dependents:   frdm_kl05z_gpio_test

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vendor/NXP/LPC2368/hal/rtc_api.c@10:3bc89ef62ce7, 2013-06-14 (annotated)

Committer:
emilmont
Date:
Fri Jun 14 17:49:17 2013 +0100
Revision:
10:3bc89ef62ce7
Unify mbed library sources

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 10:3bc89ef62ce7 1 /* mbed Microcontroller Library
emilmont 10:3bc89ef62ce7 2 * Copyright (c) 2006-2013 ARM Limited
emilmont 10:3bc89ef62ce7 3 *
emilmont 10:3bc89ef62ce7 4 * Licensed under the Apache License, Version 2.0 (the "License");
emilmont 10:3bc89ef62ce7 5 * you may not use this file except in compliance with the License.
emilmont 10:3bc89ef62ce7 6 * You may obtain a copy of the License at
emilmont 10:3bc89ef62ce7 7 *
emilmont 10:3bc89ef62ce7 8 * http://www.apache.org/licenses/LICENSE-2.0
emilmont 10:3bc89ef62ce7 9 *
emilmont 10:3bc89ef62ce7 10 * Unless required by applicable law or agreed to in writing, software
emilmont 10:3bc89ef62ce7 11 * distributed under the License is distributed on an "AS IS" BASIS,
emilmont 10:3bc89ef62ce7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
emilmont 10:3bc89ef62ce7 13 * See the License for the specific language governing permissions and
emilmont 10:3bc89ef62ce7 14 * limitations under the License.
emilmont 10:3bc89ef62ce7 15 */
emilmont 10:3bc89ef62ce7 16 #include "rtc_api.h"
emilmont 10:3bc89ef62ce7 17
emilmont 10:3bc89ef62ce7 18 // ensure rtc is running (unchanged if already running)
emilmont 10:3bc89ef62ce7 19
emilmont 10:3bc89ef62ce7 20 /* Setup the RTC based on a time structure, ensuring RTC is enabled
emilmont 10:3bc89ef62ce7 21 *
emilmont 10:3bc89ef62ce7 22 * Can be clocked by a 32.768KHz oscillator or prescale divider based on the APB clock
emilmont 10:3bc89ef62ce7 23 * - We want to use the 32khz clock, allowing for sleep mode
emilmont 10:3bc89ef62ce7 24 *
emilmont 10:3bc89ef62ce7 25 * Most registers are not changed by a Reset
emilmont 10:3bc89ef62ce7 26 * - We must initialize these registers between power-on and setting the RTC into operation
emilmont 10:3bc89ef62ce7 27
emilmont 10:3bc89ef62ce7 28 * Clock Control Register
emilmont 10:3bc89ef62ce7 29 * RTC_CCR[0] : Enable - 0 = Disabled, 1 = Enabled
emilmont 10:3bc89ef62ce7 30 * RTC_CCR[1] : Reset - 0 = Normal, 1 = Reset
emilmont 10:3bc89ef62ce7 31 * RTC_CCR[4] : Clock Source - 0 = Prescaler, 1 = 32k Xtal
emilmont 10:3bc89ef62ce7 32 *
emilmont 10:3bc89ef62ce7 33 * The RTC may already be running, so we should set it up
emilmont 10:3bc89ef62ce7 34 * without impacting if it is the case
emilmont 10:3bc89ef62ce7 35 */
emilmont 10:3bc89ef62ce7 36 void rtc_init(void) {
emilmont 10:3bc89ef62ce7 37 LPC_SC->PCONP |= 0x200; // Ensure power is on
emilmont 10:3bc89ef62ce7 38 LPC_RTC->CCR = 0x00;
emilmont 10:3bc89ef62ce7 39
emilmont 10:3bc89ef62ce7 40 // clock source on 2368 is special test mode on 1768!
emilmont 10:3bc89ef62ce7 41 LPC_RTC->CCR |= 1 << 4; // Ensure clock source is 32KHz Xtal
emilmont 10:3bc89ef62ce7 42
emilmont 10:3bc89ef62ce7 43 LPC_RTC->CCR |= 1 << 0; // Ensure the RTC is enabled
emilmont 10:3bc89ef62ce7 44 }
emilmont 10:3bc89ef62ce7 45
emilmont 10:3bc89ef62ce7 46 void rtc_free(void) {
emilmont 10:3bc89ef62ce7 47 // [TODO]
emilmont 10:3bc89ef62ce7 48 }
emilmont 10:3bc89ef62ce7 49
emilmont 10:3bc89ef62ce7 50 /*
emilmont 10:3bc89ef62ce7 51 * Little check routine to see if the RTC has been enabled
emilmont 10:3bc89ef62ce7 52 *
emilmont 10:3bc89ef62ce7 53 * Clock Control Register
emilmont 10:3bc89ef62ce7 54 * RTC_CCR[0] : 0 = Disabled, 1 = Enabled
emilmont 10:3bc89ef62ce7 55 *
emilmont 10:3bc89ef62ce7 56 */
emilmont 10:3bc89ef62ce7 57
emilmont 10:3bc89ef62ce7 58 int rtc_isenabled(void) {
emilmont 10:3bc89ef62ce7 59 return(((LPC_RTC->CCR) & 0x01) != 0);
emilmont 10:3bc89ef62ce7 60 }
emilmont 10:3bc89ef62ce7 61
emilmont 10:3bc89ef62ce7 62 /*
emilmont 10:3bc89ef62ce7 63 * RTC Registers
emilmont 10:3bc89ef62ce7 64 * RTC_SEC Seconds 0-59
emilmont 10:3bc89ef62ce7 65 * RTC_MIN Minutes 0-59
emilmont 10:3bc89ef62ce7 66 * RTC_HOUR Hour 0-23
emilmont 10:3bc89ef62ce7 67 * RTC_DOM Day of Month 1-28..31
emilmont 10:3bc89ef62ce7 68 * RTC_DOW Day of Week 0-6
emilmont 10:3bc89ef62ce7 69 * RTC_DOY Day of Year 1-365
emilmont 10:3bc89ef62ce7 70 * RTC_MONTH Month 1-12
emilmont 10:3bc89ef62ce7 71 * RTC_YEAR Year 0-4095
emilmont 10:3bc89ef62ce7 72 *
emilmont 10:3bc89ef62ce7 73 * struct tm
emilmont 10:3bc89ef62ce7 74 * tm_sec seconds after the minute 0-61
emilmont 10:3bc89ef62ce7 75 * tm_min minutes after the hour 0-59
emilmont 10:3bc89ef62ce7 76 * tm_hour hours since midnight 0-23
emilmont 10:3bc89ef62ce7 77 * tm_mday day of the month 1-31
emilmont 10:3bc89ef62ce7 78 * tm_mon months since January 0-11
emilmont 10:3bc89ef62ce7 79 * tm_year years since 1900
emilmont 10:3bc89ef62ce7 80 * tm_wday days since Sunday 0-6
emilmont 10:3bc89ef62ce7 81 * tm_yday days since January 1 0-365
emilmont 10:3bc89ef62ce7 82 * tm_isdst Daylight Saving Time flag
emilmont 10:3bc89ef62ce7 83 */
emilmont 10:3bc89ef62ce7 84 time_t rtc_read(void) {
emilmont 10:3bc89ef62ce7 85 // Setup a tm structure based on the RTC
emilmont 10:3bc89ef62ce7 86 struct tm timeinfo;
emilmont 10:3bc89ef62ce7 87 timeinfo.tm_sec = LPC_RTC->SEC;
emilmont 10:3bc89ef62ce7 88 timeinfo.tm_min = LPC_RTC->MIN;
emilmont 10:3bc89ef62ce7 89 timeinfo.tm_hour = LPC_RTC->HOUR;
emilmont 10:3bc89ef62ce7 90 timeinfo.tm_mday = LPC_RTC->DOM;
emilmont 10:3bc89ef62ce7 91 timeinfo.tm_mon = LPC_RTC->MONTH - 1;
emilmont 10:3bc89ef62ce7 92 timeinfo.tm_year = LPC_RTC->YEAR - 1900;
emilmont 10:3bc89ef62ce7 93
emilmont 10:3bc89ef62ce7 94 // Convert to timestamp
emilmont 10:3bc89ef62ce7 95 time_t t = mktime(&timeinfo);
emilmont 10:3bc89ef62ce7 96
emilmont 10:3bc89ef62ce7 97 return t;
emilmont 10:3bc89ef62ce7 98 }
emilmont 10:3bc89ef62ce7 99
emilmont 10:3bc89ef62ce7 100 void rtc_write(time_t t) {
emilmont 10:3bc89ef62ce7 101 // Convert the time in to a tm
emilmont 10:3bc89ef62ce7 102 struct tm *timeinfo = localtime(&t);
emilmont 10:3bc89ef62ce7 103
emilmont 10:3bc89ef62ce7 104 // Pause clock, and clear counter register (clears us count)
emilmont 10:3bc89ef62ce7 105 LPC_RTC->CCR |= 2;
emilmont 10:3bc89ef62ce7 106
emilmont 10:3bc89ef62ce7 107 // Set the RTC
emilmont 10:3bc89ef62ce7 108 LPC_RTC->SEC = timeinfo->tm_sec;
emilmont 10:3bc89ef62ce7 109 LPC_RTC->MIN = timeinfo->tm_min;
emilmont 10:3bc89ef62ce7 110 LPC_RTC->HOUR = timeinfo->tm_hour;
emilmont 10:3bc89ef62ce7 111 LPC_RTC->DOM = timeinfo->tm_mday;
emilmont 10:3bc89ef62ce7 112 LPC_RTC->MONTH = timeinfo->tm_mon + 1;
emilmont 10:3bc89ef62ce7 113 LPC_RTC->YEAR = timeinfo->tm_year + 1900;
emilmont 10:3bc89ef62ce7 114
emilmont 10:3bc89ef62ce7 115 // Restart clock
emilmont 10:3bc89ef62ce7 116 LPC_RTC->CCR &= ~((uint32_t)2);
emilmont 10:3bc89ef62ce7 117 }