shao ziyang / mbed-src-kl05

mbed library sources

Dependents:   frdm_kl05z_gpio_test

Fork of mbed-src by mbed official

vendor/NXP/LPC2368/hal/pwmout_api.c@10:3bc89ef62ce7, 2013-06-14 (annotated)

Committer:
emilmont
Date:
Fri Jun 14 17:49:17 2013 +0100
Revision:
10:3bc89ef62ce7
Unify mbed library sources

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 10:3bc89ef62ce7 1 /* mbed Microcontroller Library
emilmont 10:3bc89ef62ce7 2 * Copyright (c) 2006-2013 ARM Limited
emilmont 10:3bc89ef62ce7 3 *
emilmont 10:3bc89ef62ce7 4 * Licensed under the Apache License, Version 2.0 (the "License");
emilmont 10:3bc89ef62ce7 5 * you may not use this file except in compliance with the License.
emilmont 10:3bc89ef62ce7 6 * You may obtain a copy of the License at
emilmont 10:3bc89ef62ce7 7 *
emilmont 10:3bc89ef62ce7 8 * http://www.apache.org/licenses/LICENSE-2.0
emilmont 10:3bc89ef62ce7 9 *
emilmont 10:3bc89ef62ce7 10 * Unless required by applicable law or agreed to in writing, software
emilmont 10:3bc89ef62ce7 11 * distributed under the License is distributed on an "AS IS" BASIS,
emilmont 10:3bc89ef62ce7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
emilmont 10:3bc89ef62ce7 13 * See the License for the specific language governing permissions and
emilmont 10:3bc89ef62ce7 14 * limitations under the License.
emilmont 10:3bc89ef62ce7 15 */
emilmont 10:3bc89ef62ce7 16 #include "pwmout_api.h"
emilmont 10:3bc89ef62ce7 17 #include "cmsis.h"
emilmont 10:3bc89ef62ce7 18 #include "pinmap.h"
emilmont 10:3bc89ef62ce7 19 #include "error.h"
emilmont 10:3bc89ef62ce7 20
emilmont 10:3bc89ef62ce7 21 #define TCR_CNT_EN 0x00000001
emilmont 10:3bc89ef62ce7 22 #define TCR_RESET 0x00000002
emilmont 10:3bc89ef62ce7 23
emilmont 10:3bc89ef62ce7 24 // PORT ID, PWM ID, Pin function
emilmont 10:3bc89ef62ce7 25 static const PinMap PinMap_PWM[] = {
emilmont 10:3bc89ef62ce7 26 {P1_18, PWM_1, 2},
emilmont 10:3bc89ef62ce7 27 {P1_20, PWM_2, 2},
emilmont 10:3bc89ef62ce7 28 {P1_21, PWM_3, 2},
emilmont 10:3bc89ef62ce7 29 {P1_23, PWM_4, 2},
emilmont 10:3bc89ef62ce7 30 {P1_24, PWM_5, 2},
emilmont 10:3bc89ef62ce7 31 {P1_26, PWM_6, 2},
emilmont 10:3bc89ef62ce7 32 {P2_0 , PWM_1, 1},
emilmont 10:3bc89ef62ce7 33 {P2_1 , PWM_2, 1},
emilmont 10:3bc89ef62ce7 34 {P2_2 , PWM_3, 1},
emilmont 10:3bc89ef62ce7 35 {P2_3 , PWM_4, 1},
emilmont 10:3bc89ef62ce7 36 {P2_4 , PWM_5, 1},
emilmont 10:3bc89ef62ce7 37 {P2_5 , PWM_6, 1},
emilmont 10:3bc89ef62ce7 38 {P3_25, PWM_2, 3},
emilmont 10:3bc89ef62ce7 39 {P3_26, PWM_3, 3},
emilmont 10:3bc89ef62ce7 40 {NC, NC, 0}
emilmont 10:3bc89ef62ce7 41 };
emilmont 10:3bc89ef62ce7 42
emilmont 10:3bc89ef62ce7 43 __IO uint32_t *PWM_MATCH[] = {
emilmont 10:3bc89ef62ce7 44 &(LPC_PWM1->MR0),
emilmont 10:3bc89ef62ce7 45 &(LPC_PWM1->MR1),
emilmont 10:3bc89ef62ce7 46 &(LPC_PWM1->MR2),
emilmont 10:3bc89ef62ce7 47 &(LPC_PWM1->MR3),
emilmont 10:3bc89ef62ce7 48 &(LPC_PWM1->MR4),
emilmont 10:3bc89ef62ce7 49 &(LPC_PWM1->MR5),
emilmont 10:3bc89ef62ce7 50 &(LPC_PWM1->MR6)
emilmont 10:3bc89ef62ce7 51 };
emilmont 10:3bc89ef62ce7 52
emilmont 10:3bc89ef62ce7 53 #define TCR_PWM_EN 0x00000008
emilmont 10:3bc89ef62ce7 54
emilmont 10:3bc89ef62ce7 55 static unsigned int pwm_clock_mhz;
emilmont 10:3bc89ef62ce7 56
emilmont 10:3bc89ef62ce7 57 void pwmout_init(pwmout_t* obj, PinName pin) {
emilmont 10:3bc89ef62ce7 58 // determine the channel
emilmont 10:3bc89ef62ce7 59 PWMName pwm = (PWMName)pinmap_peripheral(pin, PinMap_PWM);
emilmont 10:3bc89ef62ce7 60 if (pwm == (uint32_t)NC)
emilmont 10:3bc89ef62ce7 61 error("PwmOut pin mapping failed");
emilmont 10:3bc89ef62ce7 62
emilmont 10:3bc89ef62ce7 63 obj->pwm = pwm;
emilmont 10:3bc89ef62ce7 64 obj->MR = PWM_MATCH[pwm];
emilmont 10:3bc89ef62ce7 65
emilmont 10:3bc89ef62ce7 66 // ensure the power is on
emilmont 10:3bc89ef62ce7 67 LPC_SC->PCONP |= 1 << 6;
emilmont 10:3bc89ef62ce7 68
emilmont 10:3bc89ef62ce7 69 // ensure clock to /4
emilmont 10:3bc89ef62ce7 70 LPC_SC->PCLKSEL0 &= ~(0x3 << 12); // pclk = /4
emilmont 10:3bc89ef62ce7 71 LPC_PWM1->PR = 0; // no pre-scale
emilmont 10:3bc89ef62ce7 72
emilmont 10:3bc89ef62ce7 73 // ensure single PWM mode
emilmont 10:3bc89ef62ce7 74 LPC_PWM1->MCR = 1 << 1; // reset TC on match 0
emilmont 10:3bc89ef62ce7 75
emilmont 10:3bc89ef62ce7 76 // enable the specific PWM output
emilmont 10:3bc89ef62ce7 77 LPC_PWM1->PCR |= 1 << (8 + pwm);
emilmont 10:3bc89ef62ce7 78
emilmont 10:3bc89ef62ce7 79 pwm_clock_mhz = SystemCoreClock / 4000000;
emilmont 10:3bc89ef62ce7 80
emilmont 10:3bc89ef62ce7 81 // default to 20ms: standard for servos, and fine for e.g. brightness control
emilmont 10:3bc89ef62ce7 82 pwmout_period_ms(obj, 20);
emilmont 10:3bc89ef62ce7 83 pwmout_write (obj, 0);
emilmont 10:3bc89ef62ce7 84
emilmont 10:3bc89ef62ce7 85 // Wire pinout
emilmont 10:3bc89ef62ce7 86 pinmap_pinout(pin, PinMap_PWM);
emilmont 10:3bc89ef62ce7 87 }
emilmont 10:3bc89ef62ce7 88
emilmont 10:3bc89ef62ce7 89 void pwmout_free(pwmout_t* obj) {
emilmont 10:3bc89ef62ce7 90 // [TODO]
emilmont 10:3bc89ef62ce7 91 }
emilmont 10:3bc89ef62ce7 92
emilmont 10:3bc89ef62ce7 93 void pwmout_write(pwmout_t* obj, float value) {
emilmont 10:3bc89ef62ce7 94 if (value < 0.0f) {
emilmont 10:3bc89ef62ce7 95 value = 0.0;
emilmont 10:3bc89ef62ce7 96 } else if (value > 1.0f) {
emilmont 10:3bc89ef62ce7 97 value = 1.0;
emilmont 10:3bc89ef62ce7 98 }
emilmont 10:3bc89ef62ce7 99
emilmont 10:3bc89ef62ce7 100 // set channel match to percentage
emilmont 10:3bc89ef62ce7 101 uint32_t v = (uint32_t)((float)(LPC_PWM1->MR0) * value);
emilmont 10:3bc89ef62ce7 102
emilmont 10:3bc89ef62ce7 103 // workaround for PWM1[1] - Never make it equal MR0, else we get 1 cycle dropout
emilmont 10:3bc89ef62ce7 104 if (v == LPC_PWM1->MR0) {
emilmont 10:3bc89ef62ce7 105 v++;
emilmont 10:3bc89ef62ce7 106 }
emilmont 10:3bc89ef62ce7 107
emilmont 10:3bc89ef62ce7 108 *obj->MR = v;
emilmont 10:3bc89ef62ce7 109
emilmont 10:3bc89ef62ce7 110 // accept on next period start
emilmont 10:3bc89ef62ce7 111 LPC_PWM1->LER |= 1 << obj->pwm;
emilmont 10:3bc89ef62ce7 112 }
emilmont 10:3bc89ef62ce7 113
emilmont 10:3bc89ef62ce7 114 float pwmout_read(pwmout_t* obj) {
emilmont 10:3bc89ef62ce7 115 float v = (float)(*obj->MR) / (float)(LPC_PWM1->MR0);
emilmont 10:3bc89ef62ce7 116 return (v > 1.0f) ? (1.0f) : (v);
emilmont 10:3bc89ef62ce7 117 }
emilmont 10:3bc89ef62ce7 118
emilmont 10:3bc89ef62ce7 119 void pwmout_period(pwmout_t* obj, float seconds) {
emilmont 10:3bc89ef62ce7 120 pwmout_period_us(obj, seconds * 1000000.0f);
emilmont 10:3bc89ef62ce7 121 }
emilmont 10:3bc89ef62ce7 122
emilmont 10:3bc89ef62ce7 123 void pwmout_period_ms(pwmout_t* obj, int ms) {
emilmont 10:3bc89ef62ce7 124 pwmout_period_us(obj, ms * 1000);
emilmont 10:3bc89ef62ce7 125 }
emilmont 10:3bc89ef62ce7 126
emilmont 10:3bc89ef62ce7 127 // Set the PWM period, keeping the duty cycle the same.
emilmont 10:3bc89ef62ce7 128 void pwmout_period_us(pwmout_t* obj, int us) {
emilmont 10:3bc89ef62ce7 129 // calculate number of ticks
emilmont 10:3bc89ef62ce7 130 uint32_t ticks = pwm_clock_mhz * us;
emilmont 10:3bc89ef62ce7 131
emilmont 10:3bc89ef62ce7 132 // set reset
emilmont 10:3bc89ef62ce7 133 LPC_PWM1->TCR = TCR_RESET;
emilmont 10:3bc89ef62ce7 134
emilmont 10:3bc89ef62ce7 135 // set the global match register
emilmont 10:3bc89ef62ce7 136 LPC_PWM1->MR0 = ticks;
emilmont 10:3bc89ef62ce7 137
emilmont 10:3bc89ef62ce7 138 // Scale the pulse width to preserve the duty ratio
emilmont 10:3bc89ef62ce7 139 if (LPC_PWM1->MR0 > 0) {
emilmont 10:3bc89ef62ce7 140 *obj->MR = (*obj->MR * ticks) / LPC_PWM1->MR0;
emilmont 10:3bc89ef62ce7 141 }
emilmont 10:3bc89ef62ce7 142
emilmont 10:3bc89ef62ce7 143 // set the channel latch to update value at next period start
emilmont 10:3bc89ef62ce7 144 LPC_PWM1->LER |= 1 << 0;
emilmont 10:3bc89ef62ce7 145
emilmont 10:3bc89ef62ce7 146 // enable counter and pwm, clear reset
emilmont 10:3bc89ef62ce7 147 LPC_PWM1->TCR = TCR_CNT_EN | TCR_PWM_EN;
emilmont 10:3bc89ef62ce7 148 }
emilmont 10:3bc89ef62ce7 149
emilmont 10:3bc89ef62ce7 150 void pwmout_pulsewidth(pwmout_t* obj, float seconds) {
emilmont 10:3bc89ef62ce7 151 pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
emilmont 10:3bc89ef62ce7 152 }
emilmont 10:3bc89ef62ce7 153
emilmont 10:3bc89ef62ce7 154 void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
emilmont 10:3bc89ef62ce7 155 pwmout_pulsewidth_us(obj, ms * 1000);
emilmont 10:3bc89ef62ce7 156 }
emilmont 10:3bc89ef62ce7 157
emilmont 10:3bc89ef62ce7 158 void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
emilmont 10:3bc89ef62ce7 159 // calculate number of ticks
emilmont 10:3bc89ef62ce7 160 uint32_t v = pwm_clock_mhz * us;
emilmont 10:3bc89ef62ce7 161
emilmont 10:3bc89ef62ce7 162 // workaround for PWM1[1] - Never make it equal MR0, else we get 1 cycle dropout
emilmont 10:3bc89ef62ce7 163 if (v == LPC_PWM1->MR0) {
emilmont 10:3bc89ef62ce7 164 v++;
emilmont 10:3bc89ef62ce7 165 }
emilmont 10:3bc89ef62ce7 166
emilmont 10:3bc89ef62ce7 167 // set the match register value
emilmont 10:3bc89ef62ce7 168 *obj->MR = v;
emilmont 10:3bc89ef62ce7 169
emilmont 10:3bc89ef62ce7 170 // set the channel latch to update value at next period start
emilmont 10:3bc89ef62ce7 171 LPC_PWM1->LER |= 1 << obj->pwm;
emilmont 10:3bc89ef62ce7 172 }