mbed library sources
Dependents: frdm_kl05z_gpio_test
Fork of mbed-src by
targets/hal/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/PeripheralNames.h@82:0b31dbcd4769, 2014-01-31 (annotated)
- Committer:
- mbed_official
- Date:
- Fri Jan 31 10:00:06 2014 +0000
- Revision:
- 82:0b31dbcd4769
Synchronized with git revision 74409cbd593d1daab530a57baaa563f30b04b018
Full URL: https://github.com/mbedmicro/mbed/commit/74409cbd593d1daab530a57baaa563f30b04b018/
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 82:0b31dbcd4769 | 1 | /* mbed Microcontroller Library |
mbed_official | 82:0b31dbcd4769 | 2 | * Copyright (c) 2006-2013 ARM Limited |
mbed_official | 82:0b31dbcd4769 | 3 | * |
mbed_official | 82:0b31dbcd4769 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
mbed_official | 82:0b31dbcd4769 | 5 | * you may not use this file except in compliance with the License. |
mbed_official | 82:0b31dbcd4769 | 6 | * You may obtain a copy of the License at |
mbed_official | 82:0b31dbcd4769 | 7 | * |
mbed_official | 82:0b31dbcd4769 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
mbed_official | 82:0b31dbcd4769 | 9 | * |
mbed_official | 82:0b31dbcd4769 | 10 | * Unless required by applicable law or agreed to in writing, software |
mbed_official | 82:0b31dbcd4769 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
mbed_official | 82:0b31dbcd4769 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
mbed_official | 82:0b31dbcd4769 | 13 | * See the License for the specific language governing permissions and |
mbed_official | 82:0b31dbcd4769 | 14 | * limitations under the License. |
mbed_official | 82:0b31dbcd4769 | 15 | */ |
mbed_official | 82:0b31dbcd4769 | 16 | #ifndef MBED_PERIPHERALNAMES_H |
mbed_official | 82:0b31dbcd4769 | 17 | #define MBED_PERIPHERALNAMES_H |
mbed_official | 82:0b31dbcd4769 | 18 | |
mbed_official | 82:0b31dbcd4769 | 19 | #include "cmsis.h" |
mbed_official | 82:0b31dbcd4769 | 20 | |
mbed_official | 82:0b31dbcd4769 | 21 | #ifdef __cplusplus |
mbed_official | 82:0b31dbcd4769 | 22 | extern "C" { |
mbed_official | 82:0b31dbcd4769 | 23 | #endif |
mbed_official | 82:0b31dbcd4769 | 24 | |
mbed_official | 82:0b31dbcd4769 | 25 | typedef enum { |
mbed_official | 82:0b31dbcd4769 | 26 | OSC32KCLK = 0, |
mbed_official | 82:0b31dbcd4769 | 27 | RTC_CLKIN = 2 |
mbed_official | 82:0b31dbcd4769 | 28 | } RTCName; |
mbed_official | 82:0b31dbcd4769 | 29 | |
mbed_official | 82:0b31dbcd4769 | 30 | typedef enum { |
mbed_official | 82:0b31dbcd4769 | 31 | UART_0 = (int)UART0_BASE, |
mbed_official | 82:0b31dbcd4769 | 32 | UART_1 = (int)UART1_BASE, |
mbed_official | 82:0b31dbcd4769 | 33 | UART_2 = (int)UART2_BASE |
mbed_official | 82:0b31dbcd4769 | 34 | } UARTName; |
mbed_official | 82:0b31dbcd4769 | 35 | #define STDIO_UART_TX USBTX |
mbed_official | 82:0b31dbcd4769 | 36 | #define STDIO_UART_RX USBRX |
mbed_official | 82:0b31dbcd4769 | 37 | #define STDIO_UART UART_0 |
mbed_official | 82:0b31dbcd4769 | 38 | |
mbed_official | 82:0b31dbcd4769 | 39 | typedef enum { |
mbed_official | 82:0b31dbcd4769 | 40 | I2C_0 = (int)I2C0_BASE, |
mbed_official | 82:0b31dbcd4769 | 41 | I2C_1 = (int)I2C1_BASE, |
mbed_official | 82:0b31dbcd4769 | 42 | } I2CName; |
mbed_official | 82:0b31dbcd4769 | 43 | |
mbed_official | 82:0b31dbcd4769 | 44 | #define TPM_SHIFT 8 |
mbed_official | 82:0b31dbcd4769 | 45 | typedef enum { |
mbed_official | 82:0b31dbcd4769 | 46 | PWM_1 = (0 << TPM_SHIFT) | (0), // TPM0 CH0 |
mbed_official | 82:0b31dbcd4769 | 47 | PWM_2 = (0 << TPM_SHIFT) | (1), // TPM0 CH1 |
mbed_official | 82:0b31dbcd4769 | 48 | PWM_3 = (0 << TPM_SHIFT) | (2), // TPM0 CH2 |
mbed_official | 82:0b31dbcd4769 | 49 | PWM_4 = (0 << TPM_SHIFT) | (3), // TPM0 CH3 |
mbed_official | 82:0b31dbcd4769 | 50 | PWM_5 = (0 << TPM_SHIFT) | (4), // TPM0 CH4 |
mbed_official | 82:0b31dbcd4769 | 51 | PWM_6 = (0 << TPM_SHIFT) | (5), // TPM0 CH5 |
mbed_official | 82:0b31dbcd4769 | 52 | |
mbed_official | 82:0b31dbcd4769 | 53 | PWM_7 = (1 << TPM_SHIFT) | (0), // TPM1 CH0 |
mbed_official | 82:0b31dbcd4769 | 54 | PWM_8 = (1 << TPM_SHIFT) | (1), // TPM1 CH1 |
mbed_official | 82:0b31dbcd4769 | 55 | |
mbed_official | 82:0b31dbcd4769 | 56 | PWM_9 = (2 << TPM_SHIFT) | (0), // TPM2 CH0 |
mbed_official | 82:0b31dbcd4769 | 57 | PWM_10 = (2 << TPM_SHIFT) | (1) // TPM2 CH1 |
mbed_official | 82:0b31dbcd4769 | 58 | } PWMName; |
mbed_official | 82:0b31dbcd4769 | 59 | |
mbed_official | 82:0b31dbcd4769 | 60 | #define CHANNELS_A_SHIFT 5 |
mbed_official | 82:0b31dbcd4769 | 61 | typedef enum { |
mbed_official | 82:0b31dbcd4769 | 62 | ADC0_SE0 = 0, |
mbed_official | 82:0b31dbcd4769 | 63 | ADC0_SE3 = 3, |
mbed_official | 82:0b31dbcd4769 | 64 | ADC0_SE4a = (1 << CHANNELS_A_SHIFT) | (4), |
mbed_official | 82:0b31dbcd4769 | 65 | ADC0_SE4b = 4, |
mbed_official | 82:0b31dbcd4769 | 66 | ADC0_SE5b = 5, |
mbed_official | 82:0b31dbcd4769 | 67 | ADC0_SE6b = 6, |
mbed_official | 82:0b31dbcd4769 | 68 | ADC0_SE7a = (1 << CHANNELS_A_SHIFT) | (7), |
mbed_official | 82:0b31dbcd4769 | 69 | ADC0_SE7b = 7, |
mbed_official | 82:0b31dbcd4769 | 70 | ADC0_SE8 = 8, |
mbed_official | 82:0b31dbcd4769 | 71 | ADC0_SE9 = 9, |
mbed_official | 82:0b31dbcd4769 | 72 | ADC0_SE11 = 11, |
mbed_official | 82:0b31dbcd4769 | 73 | ADC0_SE12 = 12, |
mbed_official | 82:0b31dbcd4769 | 74 | ADC0_SE13 = 13, |
mbed_official | 82:0b31dbcd4769 | 75 | ADC0_SE14 = 14, |
mbed_official | 82:0b31dbcd4769 | 76 | ADC0_SE15 = 15, |
mbed_official | 82:0b31dbcd4769 | 77 | ADC0_SE23 = 23 |
mbed_official | 82:0b31dbcd4769 | 78 | } ADCName; |
mbed_official | 82:0b31dbcd4769 | 79 | |
mbed_official | 82:0b31dbcd4769 | 80 | typedef enum { |
mbed_official | 82:0b31dbcd4769 | 81 | DAC_0 = 0 |
mbed_official | 82:0b31dbcd4769 | 82 | } DACName; |
mbed_official | 82:0b31dbcd4769 | 83 | |
mbed_official | 82:0b31dbcd4769 | 84 | |
mbed_official | 82:0b31dbcd4769 | 85 | typedef enum { |
mbed_official | 82:0b31dbcd4769 | 86 | SPI_0 = (int)SPI0_BASE, |
mbed_official | 82:0b31dbcd4769 | 87 | SPI_1 = (int)SPI1_BASE, |
mbed_official | 82:0b31dbcd4769 | 88 | } SPIName; |
mbed_official | 82:0b31dbcd4769 | 89 | |
mbed_official | 82:0b31dbcd4769 | 90 | // Default peripherals |
mbed_official | 82:0b31dbcd4769 | 91 | #define MBED_SPI0 PTD2, PTD3, PTD1, PTD0 |
mbed_official | 82:0b31dbcd4769 | 92 | |
mbed_official | 82:0b31dbcd4769 | 93 | #define MBED_UART0 PTC4, PTC3 |
mbed_official | 82:0b31dbcd4769 | 94 | #define MBED_UART1 PTD3, PTD2 |
mbed_official | 82:0b31dbcd4769 | 95 | #define MBED_UARTUSB PTA2, PTA1 |
mbed_official | 82:0b31dbcd4769 | 96 | |
mbed_official | 82:0b31dbcd4769 | 97 | #define MBED_I2C0 PTC9, PTC8 |
mbed_official | 82:0b31dbcd4769 | 98 | #define MBED_I2C1 PTE1, PTE0 |
mbed_official | 82:0b31dbcd4769 | 99 | |
mbed_official | 82:0b31dbcd4769 | 100 | #define MBED_ANALOGOUT0 PTE30 |
mbed_official | 82:0b31dbcd4769 | 101 | |
mbed_official | 82:0b31dbcd4769 | 102 | #define MBED_ANALOGIN0 PTC2 |
mbed_official | 82:0b31dbcd4769 | 103 | #define MBED_ANALOGIN1 PTB3 |
mbed_official | 82:0b31dbcd4769 | 104 | #define MBED_ANALOGIN2 PTB2 |
mbed_official | 82:0b31dbcd4769 | 105 | #define MBED_ANALOGIN3 PTB1 |
mbed_official | 82:0b31dbcd4769 | 106 | #define MBED_ANALOGIN4 PTB0 |
mbed_official | 82:0b31dbcd4769 | 107 | |
mbed_official | 82:0b31dbcd4769 | 108 | #define MBED_PWMOUT0 PTD4 |
mbed_official | 82:0b31dbcd4769 | 109 | #define MBED_PWMOUT1 PTA12 |
mbed_official | 82:0b31dbcd4769 | 110 | #define MBED_PWMOUT2 PTA4 |
mbed_official | 82:0b31dbcd4769 | 111 | #define MBED_PWMOUT3 PTA5 |
mbed_official | 82:0b31dbcd4769 | 112 | #define MBED_PWMOUT4 PTC8 |
mbed_official | 82:0b31dbcd4769 | 113 | #define MBED_PWMOUT5 PTC9 |
mbed_official | 82:0b31dbcd4769 | 114 | |
mbed_official | 82:0b31dbcd4769 | 115 | #ifdef __cplusplus |
mbed_official | 82:0b31dbcd4769 | 116 | } |
mbed_official | 82:0b31dbcd4769 | 117 | #endif |
mbed_official | 82:0b31dbcd4769 | 118 | |
mbed_official | 82:0b31dbcd4769 | 119 | #endif |