shao ziyang / mbed-src-kl05

mbed library sources

Dependents:   frdm_kl05z_gpio_test

Fork of mbed-src by mbed official

targets/cmsis/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/TOOLCHAIN_ARM_MICRO/startup_MKL25Z4.s@82:0b31dbcd4769, 2014-01-31 (annotated)

Committer:
mbed_official
Date:
Fri Jan 31 10:00:06 2014 +0000
Revision:
82:0b31dbcd4769
Synchronized with git revision 74409cbd593d1daab530a57baaa563f30b04b018



Full URL: https://github.com/mbedmicro/mbed/commit/74409cbd593d1daab530a57baaa563f30b04b018/

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 82:0b31dbcd4769 1 ;/*****************************************************************************
mbed_official 82:0b31dbcd4769 2 ; * @file: startup_MKL25Z4.s
mbed_official 82:0b31dbcd4769 3 ; * @purpose: CMSIS Cortex-M0plus Core Device Startup File for the
mbed_official 82:0b31dbcd4769 4 ; * MKL25Z4
mbed_official 82:0b31dbcd4769 5 ; * @version: 1.1
mbed_official 82:0b31dbcd4769 6 ; * @date: 2012-6-21
mbed_official 82:0b31dbcd4769 7 ; *
mbed_official 82:0b31dbcd4769 8 ; * Copyright: 1997 - 2012 Freescale Semiconductor, Inc. All Rights Reserved.
mbed_official 82:0b31dbcd4769 9 ;*
mbed_official 82:0b31dbcd4769 10 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
mbed_official 82:0b31dbcd4769 11 ; *
mbed_official 82:0b31dbcd4769 12 ; *****************************************************************************/
mbed_official 82:0b31dbcd4769 13
mbed_official 82:0b31dbcd4769 14
mbed_official 82:0b31dbcd4769 15 ; <h> Stack Configuration
mbed_official 82:0b31dbcd4769 16 ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
mbed_official 82:0b31dbcd4769 17 ; </h>
mbed_official 82:0b31dbcd4769 18
mbed_official 82:0b31dbcd4769 19 Stack_Size EQU 0x00000400
mbed_official 82:0b31dbcd4769 20
mbed_official 82:0b31dbcd4769 21 AREA STACK, NOINIT, READWRITE, ALIGN=3
mbed_official 82:0b31dbcd4769 22 EXPORT __initial_sp
mbed_official 82:0b31dbcd4769 23
mbed_official 82:0b31dbcd4769 24 Stack_Mem SPACE Stack_Size
mbed_official 82:0b31dbcd4769 25 __initial_sp EQU 0x20003000 ; Top of RAM
mbed_official 82:0b31dbcd4769 26
mbed_official 82:0b31dbcd4769 27
mbed_official 82:0b31dbcd4769 28 Heap_Size EQU 0x00000000
mbed_official 82:0b31dbcd4769 29
mbed_official 82:0b31dbcd4769 30 AREA HEAP, NOINIT, READWRITE, ALIGN=3
mbed_official 82:0b31dbcd4769 31 EXPORT __heap_base
mbed_official 82:0b31dbcd4769 32 EXPORT __heap_limit
mbed_official 82:0b31dbcd4769 33
mbed_official 82:0b31dbcd4769 34 __heap_base
mbed_official 82:0b31dbcd4769 35 Heap_Mem SPACE Heap_Size
mbed_official 82:0b31dbcd4769 36 __heap_limit
mbed_official 82:0b31dbcd4769 37
mbed_official 82:0b31dbcd4769 38 PRESERVE8
mbed_official 82:0b31dbcd4769 39 THUMB
mbed_official 82:0b31dbcd4769 40
mbed_official 82:0b31dbcd4769 41
mbed_official 82:0b31dbcd4769 42 ; Vector Table Mapped to Address 0 at Reset
mbed_official 82:0b31dbcd4769 43
mbed_official 82:0b31dbcd4769 44 AREA RESET, DATA, READONLY
mbed_official 82:0b31dbcd4769 45 EXPORT __Vectors
mbed_official 82:0b31dbcd4769 46 EXPORT __Vectors_End
mbed_official 82:0b31dbcd4769 47 EXPORT __Vectors_Size
mbed_official 82:0b31dbcd4769 48
mbed_official 82:0b31dbcd4769 49 __Vectors DCD __initial_sp ; Top of Stack
mbed_official 82:0b31dbcd4769 50 DCD Reset_Handler ; Reset Handler
mbed_official 82:0b31dbcd4769 51 DCD NMI_Handler ; NMI Handler
mbed_official 82:0b31dbcd4769 52 DCD HardFault_Handler ; Hard Fault Handler
mbed_official 82:0b31dbcd4769 53 DCD 0 ; Reserved
mbed_official 82:0b31dbcd4769 54 DCD 0 ; Reserved
mbed_official 82:0b31dbcd4769 55 DCD 0 ; Reserved
mbed_official 82:0b31dbcd4769 56 DCD 0 ; Reserved
mbed_official 82:0b31dbcd4769 57 DCD 0 ; Reserved
mbed_official 82:0b31dbcd4769 58 DCD 0 ; Reserved
mbed_official 82:0b31dbcd4769 59 DCD 0 ; Reserved
mbed_official 82:0b31dbcd4769 60 DCD SVC_Handler ; SVCall Handler
mbed_official 82:0b31dbcd4769 61 DCD 0 ; Reserved
mbed_official 82:0b31dbcd4769 62 DCD 0 ; Reserved
mbed_official 82:0b31dbcd4769 63 DCD PendSV_Handler ; PendSV Handler
mbed_official 82:0b31dbcd4769 64 DCD SysTick_Handler ; SysTick Handler
mbed_official 82:0b31dbcd4769 65
mbed_official 82:0b31dbcd4769 66 ; External Interrupts
mbed_official 82:0b31dbcd4769 67 DCD DMA0_IRQHandler ; DMA channel 0 transfer complete interrupt
mbed_official 82:0b31dbcd4769 68 DCD DMA1_IRQHandler ; DMA channel 1 transfer complete interrupt
mbed_official 82:0b31dbcd4769 69 DCD DMA2_IRQHandler ; DMA channel 2 transfer complete interrupt
mbed_official 82:0b31dbcd4769 70 DCD DMA3_IRQHandler ; DMA channel 3 transfer complete interrupt
mbed_official 82:0b31dbcd4769 71 DCD Reserved20_IRQHandler ; Reserved interrupt 20
mbed_official 82:0b31dbcd4769 72 DCD FTFA_IRQHandler ; FTFA interrupt
mbed_official 82:0b31dbcd4769 73 DCD LVD_LVW_IRQHandler ; Low Voltage Detect, Low Voltage Warning
mbed_official 82:0b31dbcd4769 74 DCD LLW_IRQHandler ; Low Leakage Wakeup
mbed_official 82:0b31dbcd4769 75 DCD I2C0_IRQHandler ; I2C0 interrupt
mbed_official 82:0b31dbcd4769 76 DCD I2C1_IRQHandler ; I2C0 interrupt 25
mbed_official 82:0b31dbcd4769 77 DCD SPI0_IRQHandler ; SPI0 interrupt
mbed_official 82:0b31dbcd4769 78 DCD SPI1_IRQHandler ; SPI1 interrupt
mbed_official 82:0b31dbcd4769 79 DCD UART0_IRQHandler ; UART0 status/error interrupt
mbed_official 82:0b31dbcd4769 80 DCD UART1_IRQHandler ; UART1 status/error interrupt
mbed_official 82:0b31dbcd4769 81 DCD UART2_IRQHandler ; UART2 status/error interrupt
mbed_official 82:0b31dbcd4769 82 DCD ADC0_IRQHandler ; ADC0 interrupt
mbed_official 82:0b31dbcd4769 83 DCD CMP0_IRQHandler ; CMP0 interrupt
mbed_official 82:0b31dbcd4769 84 DCD TPM0_IRQHandler ; TPM0 fault, overflow and channels interrupt
mbed_official 82:0b31dbcd4769 85 DCD TPM1_IRQHandler ; TPM1 fault, overflow and channels interrupt
mbed_official 82:0b31dbcd4769 86 DCD TPM2_IRQHandler ; TPM2 fault, overflow and channels interrupt
mbed_official 82:0b31dbcd4769 87 DCD RTC_IRQHandler ; RTC interrupt
mbed_official 82:0b31dbcd4769 88 DCD RTC_Seconds_IRQHandler ; RTC seconds interrupt
mbed_official 82:0b31dbcd4769 89 DCD PIT_IRQHandler ; PIT timer interrupt
mbed_official 82:0b31dbcd4769 90 DCD Reserved39_IRQHandler ; Reserved interrupt 39
mbed_official 82:0b31dbcd4769 91 DCD USB0_IRQHandler ; USB0 interrupt
mbed_official 82:0b31dbcd4769 92 DCD DAC0_IRQHandler ; DAC interrupt
mbed_official 82:0b31dbcd4769 93 DCD TSI0_IRQHandler ; TSI0 interrupt
mbed_official 82:0b31dbcd4769 94 DCD MCG_IRQHandler ; MCG interrupt
mbed_official 82:0b31dbcd4769 95 DCD LPTimer_IRQHandler ; LPTimer interrupt
mbed_official 82:0b31dbcd4769 96 DCD Reserved45_IRQHandler ; Reserved interrupt 45
mbed_official 82:0b31dbcd4769 97 DCD PORTA_IRQHandler ; Port A interrupt
mbed_official 82:0b31dbcd4769 98 DCD PORTD_IRQHandler ; Port D interrupt
mbed_official 82:0b31dbcd4769 99 __Vectors_End
mbed_official 82:0b31dbcd4769 100
mbed_official 82:0b31dbcd4769 101 __Vectors_Size EQU __Vectors_End - __Vectors
mbed_official 82:0b31dbcd4769 102
mbed_official 82:0b31dbcd4769 103 ; <h> Flash Configuration
mbed_official 82:0b31dbcd4769 104 ; <i> 16-byte flash configuration field that stores default protection settings (loaded on reset)
mbed_official 82:0b31dbcd4769 105 ; <i> and security information that allows the MCU to restrict acces to the FTFL module.
mbed_official 82:0b31dbcd4769 106 ; <h> Backdoor Comparison Key
mbed_official 82:0b31dbcd4769 107 ; <o0> Backdoor Key 0 <0x0-0xFF:2>
mbed_official 82:0b31dbcd4769 108 ; <o1> Backdoor Key 1 <0x0-0xFF:2>
mbed_official 82:0b31dbcd4769 109 ; <o2> Backdoor Key 2 <0x0-0xFF:2>
mbed_official 82:0b31dbcd4769 110 ; <o3> Backdoor Key 3 <0x0-0xFF:2>
mbed_official 82:0b31dbcd4769 111 ; <o4> Backdoor Key 4 <0x0-0xFF:2>
mbed_official 82:0b31dbcd4769 112 ; <o5> Backdoor Key 5 <0x0-0xFF:2>
mbed_official 82:0b31dbcd4769 113 ; <o6> Backdoor Key 6 <0x0-0xFF:2>
mbed_official 82:0b31dbcd4769 114 ; <o7> Backdoor Key 7 <0x0-0xFF:2>
mbed_official 82:0b31dbcd4769 115 BackDoorK0 EQU 0xFF
mbed_official 82:0b31dbcd4769 116 BackDoorK1 EQU 0xFF
mbed_official 82:0b31dbcd4769 117 BackDoorK2 EQU 0xFF
mbed_official 82:0b31dbcd4769 118 BackDoorK3 EQU 0xFF
mbed_official 82:0b31dbcd4769 119 BackDoorK4 EQU 0xFF
mbed_official 82:0b31dbcd4769 120 BackDoorK5 EQU 0xFF
mbed_official 82:0b31dbcd4769 121 BackDoorK6 EQU 0xFF
mbed_official 82:0b31dbcd4769 122 BackDoorK7 EQU 0xFF
mbed_official 82:0b31dbcd4769 123 ; </h>
mbed_official 82:0b31dbcd4769 124 ; <h> Program flash protection bytes (FPROT)
mbed_official 82:0b31dbcd4769 125 ; <i> Each program flash region can be protected from program and erase operation by setting the associated PROT bit.
mbed_official 82:0b31dbcd4769 126 ; <i> Each bit protects a 1/32 region of the program flash memory.
mbed_official 82:0b31dbcd4769 127 ; <h> FPROT0
mbed_official 82:0b31dbcd4769 128 ; <i> Program flash protection bytes
mbed_official 82:0b31dbcd4769 129 ; <i> 1/32 - 8/32 region
mbed_official 82:0b31dbcd4769 130 ; <o.0> FPROT0.0
mbed_official 82:0b31dbcd4769 131 ; <o.1> FPROT0.1
mbed_official 82:0b31dbcd4769 132 ; <o.2> FPROT0.2
mbed_official 82:0b31dbcd4769 133 ; <o.3> FPROT0.3
mbed_official 82:0b31dbcd4769 134 ; <o.4> FPROT0.4
mbed_official 82:0b31dbcd4769 135 ; <o.5> FPROT0.5
mbed_official 82:0b31dbcd4769 136 ; <o.6> FPROT0.6
mbed_official 82:0b31dbcd4769 137 ; <o.7> FPROT0.7
mbed_official 82:0b31dbcd4769 138 nFPROT0 EQU 0x00
mbed_official 82:0b31dbcd4769 139 FPROT0 EQU nFPROT0:EOR:0xFF
mbed_official 82:0b31dbcd4769 140 ; </h>
mbed_official 82:0b31dbcd4769 141 ; <h> FPROT1
mbed_official 82:0b31dbcd4769 142 ; <i> Program Flash Region Protect Register 1
mbed_official 82:0b31dbcd4769 143 ; <i> 9/32 - 16/32 region
mbed_official 82:0b31dbcd4769 144 ; <o.0> FPROT1.0
mbed_official 82:0b31dbcd4769 145 ; <o.1> FPROT1.1
mbed_official 82:0b31dbcd4769 146 ; <o.2> FPROT1.2
mbed_official 82:0b31dbcd4769 147 ; <o.3> FPROT1.3
mbed_official 82:0b31dbcd4769 148 ; <o.4> FPROT1.4
mbed_official 82:0b31dbcd4769 149 ; <o.5> FPROT1.5
mbed_official 82:0b31dbcd4769 150 ; <o.6> FPROT1.6
mbed_official 82:0b31dbcd4769 151 ; <o.7> FPROT1.7
mbed_official 82:0b31dbcd4769 152 nFPROT1 EQU 0x00
mbed_official 82:0b31dbcd4769 153 FPROT1 EQU nFPROT1:EOR:0xFF
mbed_official 82:0b31dbcd4769 154 ; </h>
mbed_official 82:0b31dbcd4769 155 ; <h> FPROT2
mbed_official 82:0b31dbcd4769 156 ; <i> Program Flash Region Protect Register 2
mbed_official 82:0b31dbcd4769 157 ; <i> 17/32 - 24/32 region
mbed_official 82:0b31dbcd4769 158 ; <o.0> FPROT2.0
mbed_official 82:0b31dbcd4769 159 ; <o.1> FPROT2.1
mbed_official 82:0b31dbcd4769 160 ; <o.2> FPROT2.2
mbed_official 82:0b31dbcd4769 161 ; <o.3> FPROT2.3
mbed_official 82:0b31dbcd4769 162 ; <o.4> FPROT2.4
mbed_official 82:0b31dbcd4769 163 ; <o.5> FPROT2.5
mbed_official 82:0b31dbcd4769 164 ; <o.6> FPROT2.6
mbed_official 82:0b31dbcd4769 165 ; <o.7> FPROT2.7
mbed_official 82:0b31dbcd4769 166 nFPROT2 EQU 0x00
mbed_official 82:0b31dbcd4769 167 FPROT2 EQU nFPROT2:EOR:0xFF
mbed_official 82:0b31dbcd4769 168 ; </h>
mbed_official 82:0b31dbcd4769 169 ; <h> FPROT3
mbed_official 82:0b31dbcd4769 170 ; <i> Program Flash Region Protect Register 3
mbed_official 82:0b31dbcd4769 171 ; <i> 25/32 - 32/32 region
mbed_official 82:0b31dbcd4769 172 ; <o.0> FPROT3.0
mbed_official 82:0b31dbcd4769 173 ; <o.1> FPROT3.1
mbed_official 82:0b31dbcd4769 174 ; <o.2> FPROT3.2
mbed_official 82:0b31dbcd4769 175 ; <o.3> FPROT3.3
mbed_official 82:0b31dbcd4769 176 ; <o.4> FPROT3.4
mbed_official 82:0b31dbcd4769 177 ; <o.5> FPROT3.5
mbed_official 82:0b31dbcd4769 178 ; <o.6> FPROT3.6
mbed_official 82:0b31dbcd4769 179 ; <o.7> FPROT3.7
mbed_official 82:0b31dbcd4769 180 nFPROT3 EQU 0x00
mbed_official 82:0b31dbcd4769 181 FPROT3 EQU nFPROT3:EOR:0xFF
mbed_official 82:0b31dbcd4769 182 ; </h>
mbed_official 82:0b31dbcd4769 183 ; </h>
mbed_official 82:0b31dbcd4769 184 ; </h>
mbed_official 82:0b31dbcd4769 185 ; <h> Flash nonvolatile option byte (FOPT)
mbed_official 82:0b31dbcd4769 186 ; <i> Allows the user to customize the operation of the MCU at boot time.
mbed_official 82:0b31dbcd4769 187 ; <o.0> LPBOOT0
mbed_official 82:0b31dbcd4769 188 ; <0=> Core and system clock divider (OUTDIV1) is 0x7 (divide by 8) or 0x3 (divide by 4)
mbed_official 82:0b31dbcd4769 189 ; <1=> Core and system clock divider (OUTDIV1) is 0x1 (divide by 2) or 0x0 (divide by 1)
mbed_official 82:0b31dbcd4769 190 ; <o.4> LPBOOT1
mbed_official 82:0b31dbcd4769 191 ; <0=> Core and system clock divider (OUTDIV1) is 0x7 (divide by 8) or 0x1 (divide by 2)
mbed_official 82:0b31dbcd4769 192 ; <1=> Core and system clock divider (OUTDIV1) is 0x3 (divide by 4) or 0x0 (divide by 1)
mbed_official 82:0b31dbcd4769 193 ; <o.2> NMI_DIS
mbed_official 82:0b31dbcd4769 194 ; <0=> NMI interrupts are always blocked
mbed_official 82:0b31dbcd4769 195 ; <1=> NMI pin/interrupts reset default to enabled
mbed_official 82:0b31dbcd4769 196 ; <o.3> RESET_PIN_CFG
mbed_official 82:0b31dbcd4769 197 ; <0=> RESET pin is disabled following a POR and cannot be enabled as RESET function
mbed_official 82:0b31dbcd4769 198 ; <1=> RESET pin is dedicated
mbed_official 82:0b31dbcd4769 199 ; <o.3> FAST_INIT
mbed_official 82:0b31dbcd4769 200 ; <0=> Slower initialization
mbed_official 82:0b31dbcd4769 201 ; <1=> Fast Initialization
mbed_official 82:0b31dbcd4769 202 FOPT EQU 0xFF
mbed_official 82:0b31dbcd4769 203 ; </h>
mbed_official 82:0b31dbcd4769 204 ; <h> Flash security byte (FSEC)
mbed_official 82:0b31dbcd4769 205 ; <i> WARNING: If SEC field is configured as "MCU security status is secure" and MEEN field is configured as "Mass erase is disabled",
mbed_official 82:0b31dbcd4769 206 ; <i> MCU's security status cannot be set back to unsecure state since Mass erase via the debugger is blocked !!!
mbed_official 82:0b31dbcd4769 207 ; <o.0..1> SEC
mbed_official 82:0b31dbcd4769 208 ; <2=> MCU security status is unsecure
mbed_official 82:0b31dbcd4769 209 ; <3=> MCU security status is secure
mbed_official 82:0b31dbcd4769 210 ; <i> Flash Security
mbed_official 82:0b31dbcd4769 211 ; <i> This bits define the security state of the MCU.
mbed_official 82:0b31dbcd4769 212 ; <o.2..3> FSLACC
mbed_official 82:0b31dbcd4769 213 ; <2=> Freescale factory access denied
mbed_official 82:0b31dbcd4769 214 ; <3=> Freescale factory access granted
mbed_official 82:0b31dbcd4769 215 ; <i> Freescale Failure Analysis Access Code
mbed_official 82:0b31dbcd4769 216 ; <i> This bits define the security state of the MCU.
mbed_official 82:0b31dbcd4769 217 ; <o.4..5> MEEN
mbed_official 82:0b31dbcd4769 218 ; <2=> Mass erase is disabled
mbed_official 82:0b31dbcd4769 219 ; <3=> Mass erase is enabled
mbed_official 82:0b31dbcd4769 220 ; <i> Mass Erase Enable Bits
mbed_official 82:0b31dbcd4769 221 ; <i> Enables and disables mass erase capability of the FTFL module
mbed_official 82:0b31dbcd4769 222 ; <o.6..7> KEYEN
mbed_official 82:0b31dbcd4769 223 ; <2=> Backdoor key access enabled
mbed_official 82:0b31dbcd4769 224 ; <3=> Backdoor key access disabled
mbed_official 82:0b31dbcd4769 225 ; <i> Backdoor key Security Enable
mbed_official 82:0b31dbcd4769 226 ; <i> These bits enable and disable backdoor key access to the FTFL module.
mbed_official 82:0b31dbcd4769 227 FSEC EQU 0xFE
mbed_official 82:0b31dbcd4769 228 ; </h>
mbed_official 82:0b31dbcd4769 229
mbed_official 82:0b31dbcd4769 230 IF :LNOT::DEF:RAM_TARGET
mbed_official 82:0b31dbcd4769 231 AREA |.ARM.__at_0x400|, CODE, READONLY
mbed_official 82:0b31dbcd4769 232 DCB BackDoorK0, BackDoorK1, BackDoorK2, BackDoorK3
mbed_official 82:0b31dbcd4769 233 DCB BackDoorK4, BackDoorK5, BackDoorK6, BackDoorK7
mbed_official 82:0b31dbcd4769 234 DCB FPROT0, FPROT1, FPROT2, FPROT3
mbed_official 82:0b31dbcd4769 235 DCB FSEC, FOPT, 0xFF, 0xFF
mbed_official 82:0b31dbcd4769 236 ENDIF
mbed_official 82:0b31dbcd4769 237
mbed_official 82:0b31dbcd4769 238 AREA |.text|, CODE, READONLY
mbed_official 82:0b31dbcd4769 239
mbed_official 82:0b31dbcd4769 240
mbed_official 82:0b31dbcd4769 241 ; Reset Handler
mbed_official 82:0b31dbcd4769 242
mbed_official 82:0b31dbcd4769 243 Reset_Handler PROC
mbed_official 82:0b31dbcd4769 244 EXPORT Reset_Handler [WEAK]
mbed_official 82:0b31dbcd4769 245 IMPORT SystemInit
mbed_official 82:0b31dbcd4769 246 IMPORT __main
mbed_official 82:0b31dbcd4769 247 LDR R0, =SystemInit
mbed_official 82:0b31dbcd4769 248 BLX R0
mbed_official 82:0b31dbcd4769 249 LDR R0, =__main
mbed_official 82:0b31dbcd4769 250 BX R0
mbed_official 82:0b31dbcd4769 251 ENDP
mbed_official 82:0b31dbcd4769 252
mbed_official 82:0b31dbcd4769 253
mbed_official 82:0b31dbcd4769 254 ; Dummy Exception Handlers (infinite loops which can be modified)
mbed_official 82:0b31dbcd4769 255
mbed_official 82:0b31dbcd4769 256 NMI_Handler PROC
mbed_official 82:0b31dbcd4769 257 EXPORT NMI_Handler [WEAK]
mbed_official 82:0b31dbcd4769 258 B .
mbed_official 82:0b31dbcd4769 259 ENDP
mbed_official 82:0b31dbcd4769 260 HardFault_Handler\
mbed_official 82:0b31dbcd4769 261 PROC
mbed_official 82:0b31dbcd4769 262 EXPORT HardFault_Handler [WEAK]
mbed_official 82:0b31dbcd4769 263 B .
mbed_official 82:0b31dbcd4769 264 ENDP
mbed_official 82:0b31dbcd4769 265 SVC_Handler PROC
mbed_official 82:0b31dbcd4769 266 EXPORT SVC_Handler [WEAK]
mbed_official 82:0b31dbcd4769 267 B .
mbed_official 82:0b31dbcd4769 268 ENDP
mbed_official 82:0b31dbcd4769 269 PendSV_Handler PROC
mbed_official 82:0b31dbcd4769 270 EXPORT PendSV_Handler [WEAK]
mbed_official 82:0b31dbcd4769 271 B .
mbed_official 82:0b31dbcd4769 272 ENDP
mbed_official 82:0b31dbcd4769 273 SysTick_Handler PROC
mbed_official 82:0b31dbcd4769 274 EXPORT SysTick_Handler [WEAK]
mbed_official 82:0b31dbcd4769 275 B .
mbed_official 82:0b31dbcd4769 276 ENDP
mbed_official 82:0b31dbcd4769 277
mbed_official 82:0b31dbcd4769 278 Default_Handler PROC
mbed_official 82:0b31dbcd4769 279 EXPORT DMA0_IRQHandler [WEAK]
mbed_official 82:0b31dbcd4769 280 EXPORT DMA1_IRQHandler [WEAK]
mbed_official 82:0b31dbcd4769 281 EXPORT DMA2_IRQHandler [WEAK]
mbed_official 82:0b31dbcd4769 282 EXPORT DMA3_IRQHandler [WEAK]
mbed_official 82:0b31dbcd4769 283 EXPORT Reserved20_IRQHandler [WEAK]
mbed_official 82:0b31dbcd4769 284 EXPORT FTFA_IRQHandler [WEAK]
mbed_official 82:0b31dbcd4769 285 EXPORT LVD_LVW_IRQHandler [WEAK]
mbed_official 82:0b31dbcd4769 286 EXPORT LLW_IRQHandler [WEAK]
mbed_official 82:0b31dbcd4769 287 EXPORT I2C0_IRQHandler [WEAK]
mbed_official 82:0b31dbcd4769 288 EXPORT I2C1_IRQHandler [WEAK]
mbed_official 82:0b31dbcd4769 289 EXPORT SPI0_IRQHandler [WEAK]
mbed_official 82:0b31dbcd4769 290 EXPORT SPI1_IRQHandler [WEAK]
mbed_official 82:0b31dbcd4769 291 EXPORT UART0_IRQHandler [WEAK]
mbed_official 82:0b31dbcd4769 292 EXPORT UART1_IRQHandler [WEAK]
mbed_official 82:0b31dbcd4769 293 EXPORT UART2_IRQHandler [WEAK]
mbed_official 82:0b31dbcd4769 294 EXPORT ADC0_IRQHandler [WEAK]
mbed_official 82:0b31dbcd4769 295 EXPORT CMP0_IRQHandler [WEAK]
mbed_official 82:0b31dbcd4769 296 EXPORT TPM0_IRQHandler [WEAK]
mbed_official 82:0b31dbcd4769 297 EXPORT TPM1_IRQHandler [WEAK]
mbed_official 82:0b31dbcd4769 298 EXPORT TPM2_IRQHandler [WEAK]
mbed_official 82:0b31dbcd4769 299 EXPORT RTC_IRQHandler [WEAK]
mbed_official 82:0b31dbcd4769 300 EXPORT RTC_Seconds_IRQHandler [WEAK]
mbed_official 82:0b31dbcd4769 301 EXPORT PIT_IRQHandler [WEAK]
mbed_official 82:0b31dbcd4769 302 EXPORT Reserved39_IRQHandler [WEAK]
mbed_official 82:0b31dbcd4769 303 EXPORT USB0_IRQHandler [WEAK]
mbed_official 82:0b31dbcd4769 304 EXPORT DAC0_IRQHandler [WEAK]
mbed_official 82:0b31dbcd4769 305 EXPORT TSI0_IRQHandler [WEAK]
mbed_official 82:0b31dbcd4769 306 EXPORT MCG_IRQHandler [WEAK]
mbed_official 82:0b31dbcd4769 307 EXPORT LPTimer_IRQHandler [WEAK]
mbed_official 82:0b31dbcd4769 308 EXPORT Reserved45_IRQHandler [WEAK]
mbed_official 82:0b31dbcd4769 309 EXPORT PORTA_IRQHandler [WEAK]
mbed_official 82:0b31dbcd4769 310 EXPORT PORTD_IRQHandler [WEAK]
mbed_official 82:0b31dbcd4769 311 EXPORT DefaultISR [WEAK]
mbed_official 82:0b31dbcd4769 312
mbed_official 82:0b31dbcd4769 313 DMA0_IRQHandler
mbed_official 82:0b31dbcd4769 314 DMA1_IRQHandler
mbed_official 82:0b31dbcd4769 315 DMA2_IRQHandler
mbed_official 82:0b31dbcd4769 316 DMA3_IRQHandler
mbed_official 82:0b31dbcd4769 317 Reserved20_IRQHandler
mbed_official 82:0b31dbcd4769 318 FTFA_IRQHandler
mbed_official 82:0b31dbcd4769 319 LVD_LVW_IRQHandler
mbed_official 82:0b31dbcd4769 320 LLW_IRQHandler
mbed_official 82:0b31dbcd4769 321 I2C0_IRQHandler
mbed_official 82:0b31dbcd4769 322 I2C1_IRQHandler
mbed_official 82:0b31dbcd4769 323 SPI0_IRQHandler
mbed_official 82:0b31dbcd4769 324 SPI1_IRQHandler
mbed_official 82:0b31dbcd4769 325 UART0_IRQHandler
mbed_official 82:0b31dbcd4769 326 UART1_IRQHandler
mbed_official 82:0b31dbcd4769 327 UART2_IRQHandler
mbed_official 82:0b31dbcd4769 328 ADC0_IRQHandler
mbed_official 82:0b31dbcd4769 329 CMP0_IRQHandler
mbed_official 82:0b31dbcd4769 330 TPM0_IRQHandler
mbed_official 82:0b31dbcd4769 331 TPM1_IRQHandler
mbed_official 82:0b31dbcd4769 332 TPM2_IRQHandler
mbed_official 82:0b31dbcd4769 333 RTC_IRQHandler
mbed_official 82:0b31dbcd4769 334 RTC_Seconds_IRQHandler
mbed_official 82:0b31dbcd4769 335 PIT_IRQHandler
mbed_official 82:0b31dbcd4769 336 Reserved39_IRQHandler
mbed_official 82:0b31dbcd4769 337 USB0_IRQHandler
mbed_official 82:0b31dbcd4769 338 DAC0_IRQHandler
mbed_official 82:0b31dbcd4769 339 TSI0_IRQHandler
mbed_official 82:0b31dbcd4769 340 MCG_IRQHandler
mbed_official 82:0b31dbcd4769 341 LPTimer_IRQHandler
mbed_official 82:0b31dbcd4769 342 Reserved45_IRQHandler
mbed_official 82:0b31dbcd4769 343 PORTA_IRQHandler
mbed_official 82:0b31dbcd4769 344 PORTD_IRQHandler
mbed_official 82:0b31dbcd4769 345 DefaultISR
mbed_official 82:0b31dbcd4769 346
mbed_official 82:0b31dbcd4769 347 B .
mbed_official 82:0b31dbcd4769 348
mbed_official 82:0b31dbcd4769 349 ENDP
mbed_official 82:0b31dbcd4769 350
mbed_official 82:0b31dbcd4769 351
mbed_official 82:0b31dbcd4769 352 ALIGN
mbed_official 82:0b31dbcd4769 353 END