Diff: targets/cmsis/TARGET_STM/TARGET_NUCLEO_F302R8/system_stm32f30x.c

Revision:

162:937d965048d3

Parent:

138:ec7ee4660c49

Child:

167:d5744491c362

--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F302R8/system_stm32f30x.c	Tue Apr 22 10:00:06 2014 +0100
+++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F302R8/system_stm32f30x.c	Tue Apr 22 13:30:06 2014 +0100
@@ -153,8 +153,6 @@
   * @{
   */
 
-void SetSysClock(void);
-
 #if (USE_PLL_HSE_XTAL != 0) || (USE_PLL_HSE_EXTC != 0)
 uint8_t SetSysClock_PLL_HSE(uint8_t bypass);
 #endif
@@ -208,10 +206,6 @@
   /* Disable all interrupts */
   RCC->CIR = 0x00000000;
 
-  /* Configure the System clock source, PLL Multiplier and Divider factors, 
-     AHB/APBx prescalers and Flash settings */
-  SetSysClock();
-
   /* Configure the Vector Table location add offset address ------------------*/
 #ifdef VECT_TAB_SRAM
   SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */