mbed library sources
Dependents: frdm_kl05z_gpio_test
Fork of mbed-src by
Diff: targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/can_api.c
- Revision:
- 203:0f54f988aa69
- Parent:
- 41:e8b66477f5bf
- Child:
- 225:2af4c5d0160c
--- a/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/can_api.c Wed May 21 15:00:07 2014 +0100 +++ b/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/can_api.c Wed May 21 15:15:06 2014 +0100 @@ -87,7 +87,7 @@ LPC_CAN->IF1_CMDREQ = BFN_PREP(handle, CANIFn_CMDREQ_MN); // Wait until transfer to message ram complete - TODO: maybe not block?? - while( LPC_CAN->IF1_CMDREQ & CANIFn_CMDREQ_BUSY ); + while( LPC_CAN->IF1_CMDREQ & CANIFn_CMDREQ_BUSY ); } return handle; @@ -100,7 +100,7 @@ // Register CAN object's irq handler void can_irq_init(can_t *obj, can_irq_handler handler, uint32_t id) { irq_handler = handler; - can_irq_id = id; + can_irq_id = id; } // Unregister CAN object's irq handler @@ -264,18 +264,20 @@ btr = btr & 0xFFFF; if (btr > 0) { + uint32_t cntl_init = LPC_CAN->CNTL | CANCNTL_INIT; // Set the bit clock - LPC_CAN->CNTL |= CANCNTL_CCE; + LPC_CAN->CNTL |= CANCNTL_CCE | CANCNTL_INIT; LPC_CAN->CLKDIV = clkdiv; LPC_CAN->BT = btr; LPC_CAN->BRPE = 0x0000; - LPC_CAN->CNTL &= ~CANCNTL_CCE; + LPC_CAN->CNTL &= ~(CANCNTL_CCE | CANCNTL_INIT); + LPC_CAN->CNTL |= cntl_init; return 1; } return 0; } -int can_write(can_t *obj, CAN_Message msg, int cc) { +int can_write(can_t *obj, CAN_Message msg, int cc) { uint16_t msgnum = 0; // Make sure controller is enabled @@ -352,13 +354,13 @@ // Wait until transfer to message ram complete while( LPC_CAN->IF2_CMDREQ & CANIFn_CMDREQ_BUSY ); - if (LPC_CAN->IF2_ARB2 & CANIFn_ARB2_XTD) { - msg->format = CANExtended; + if (LPC_CAN->IF2_ARB2 & CANIFn_ARB2_XTD) { + msg->format = CANExtended; msg->id = (LPC_CAN->IF2_ARB1 & CANIFn_ARB2_ID_MASK) << 16; msg->id |= (LPC_CAN->IF2_ARB2 & CANIFn_ARB2_ID_MASK); } else { - msg->format = CANStandard; + msg->format = CANStandard; msg->id = (LPC_CAN->IF2_ARB2 & CANIFn_ARB2_ID_MASK) >> 2; }