mbed library sources
Dependents: frdm_kl05z_gpio_test
Fork of mbed-src by
targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/sleep.c@84:f54042cbc282, 2014-02-03 (annotated)
- Committer:
- mbed_official
- Date:
- Mon Feb 03 09:30:05 2014 +0000
- Revision:
- 84:f54042cbc282
- Parent:
- 80:66393a7b209d
- Child:
- 100:0412b5443284
Synchronized with git revision bbbd8699601c42149ccf0c37bc42bb6856ccc4c6
Full URL: https://github.com/mbedmicro/mbed/commit/bbbd8699601c42149ccf0c37bc42bb6856ccc4c6/
[NUCLEO_L152RE/F030_R8] SPI, I2C, Ticker, PWM updates
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 76:aeb1df146756 | 1 | /* mbed Microcontroller Library |
mbed_official | 76:aeb1df146756 | 2 | ******************************************************************************* |
mbed_official | 76:aeb1df146756 | 3 | * Copyright (c) 2014, STMicroelectronics |
mbed_official | 76:aeb1df146756 | 4 | * All rights reserved. |
mbed_official | 76:aeb1df146756 | 5 | * |
mbed_official | 76:aeb1df146756 | 6 | * Redistribution and use in source and binary forms, with or without |
mbed_official | 76:aeb1df146756 | 7 | * modification, are permitted provided that the following conditions are met: |
mbed_official | 76:aeb1df146756 | 8 | * |
mbed_official | 76:aeb1df146756 | 9 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 76:aeb1df146756 | 10 | * this list of conditions and the following disclaimer. |
mbed_official | 76:aeb1df146756 | 11 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 76:aeb1df146756 | 12 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 76:aeb1df146756 | 13 | * and/or other materials provided with the distribution. |
mbed_official | 76:aeb1df146756 | 14 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 76:aeb1df146756 | 15 | * may be used to endorse or promote products derived from this software |
mbed_official | 76:aeb1df146756 | 16 | * without specific prior written permission. |
mbed_official | 76:aeb1df146756 | 17 | * |
mbed_official | 76:aeb1df146756 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 76:aeb1df146756 | 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 76:aeb1df146756 | 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 76:aeb1df146756 | 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 76:aeb1df146756 | 22 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 76:aeb1df146756 | 23 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 76:aeb1df146756 | 24 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 76:aeb1df146756 | 25 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 76:aeb1df146756 | 26 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 76:aeb1df146756 | 27 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 76:aeb1df146756 | 28 | ******************************************************************************* |
mbed_official | 76:aeb1df146756 | 29 | */ |
mbed_official | 76:aeb1df146756 | 30 | #include "sleep_api.h" |
mbed_official | 76:aeb1df146756 | 31 | #include "cmsis.h" |
mbed_official | 76:aeb1df146756 | 32 | |
mbed_official | 80:66393a7b209d | 33 | static void SetSysClock_HSI(void) |
mbed_official | 80:66393a7b209d | 34 | { |
mbed_official | 80:66393a7b209d | 35 | __IO uint32_t StartUpCounter = 0, HSIStatus = 0; |
mbed_official | 80:66393a7b209d | 36 | |
mbed_official | 80:66393a7b209d | 37 | /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ |
mbed_official | 80:66393a7b209d | 38 | /* Enable HSI */ |
mbed_official | 80:66393a7b209d | 39 | RCC->CR |= ((uint32_t)RCC_CR_HSION); |
mbed_official | 80:66393a7b209d | 40 | |
mbed_official | 80:66393a7b209d | 41 | /* Wait till HSI is ready and if Time out is reached exit */ |
mbed_official | 80:66393a7b209d | 42 | do |
mbed_official | 80:66393a7b209d | 43 | { |
mbed_official | 80:66393a7b209d | 44 | HSIStatus = RCC->CR & RCC_CR_HSIRDY; |
mbed_official | 80:66393a7b209d | 45 | } while((HSIStatus == 0) && (StartUpCounter != HSI_STARTUP_TIMEOUT)); |
mbed_official | 80:66393a7b209d | 46 | |
mbed_official | 80:66393a7b209d | 47 | if ((RCC->CR & RCC_CR_HSIRDY) != RESET) |
mbed_official | 80:66393a7b209d | 48 | { |
mbed_official | 80:66393a7b209d | 49 | HSIStatus = (uint32_t)0x01; |
mbed_official | 80:66393a7b209d | 50 | } |
mbed_official | 80:66393a7b209d | 51 | else |
mbed_official | 80:66393a7b209d | 52 | { |
mbed_official | 80:66393a7b209d | 53 | HSIStatus = (uint32_t)0x00; |
mbed_official | 80:66393a7b209d | 54 | } |
mbed_official | 80:66393a7b209d | 55 | |
mbed_official | 80:66393a7b209d | 56 | if (HSIStatus == (uint32_t)0x01) |
mbed_official | 80:66393a7b209d | 57 | { |
mbed_official | 80:66393a7b209d | 58 | /* Flash 0 wait state */ |
mbed_official | 80:66393a7b209d | 59 | FLASH->ACR &= ~FLASH_ACR_LATENCY; |
mbed_official | 80:66393a7b209d | 60 | |
mbed_official | 80:66393a7b209d | 61 | /* Disable Prefetch Buffer */ |
mbed_official | 80:66393a7b209d | 62 | FLASH->ACR &= ~FLASH_ACR_PRFTEN; |
mbed_official | 80:66393a7b209d | 63 | |
mbed_official | 80:66393a7b209d | 64 | /* Disable 64-bit access */ |
mbed_official | 80:66393a7b209d | 65 | FLASH->ACR &= ~FLASH_ACR_ACC64; |
mbed_official | 80:66393a7b209d | 66 | |
mbed_official | 80:66393a7b209d | 67 | /* Power enable */ |
mbed_official | 80:66393a7b209d | 68 | RCC->APB1ENR |= RCC_APB1ENR_PWREN; |
mbed_official | 80:66393a7b209d | 69 | |
mbed_official | 80:66393a7b209d | 70 | /* Select the Voltage Range 1 (1.8 V) */ |
mbed_official | 80:66393a7b209d | 71 | PWR->CR = PWR_CR_VOS_0; |
mbed_official | 80:66393a7b209d | 72 | |
mbed_official | 80:66393a7b209d | 73 | /* Wait Until the Voltage Regulator is ready */ |
mbed_official | 80:66393a7b209d | 74 | while((PWR->CSR & PWR_CSR_VOSF) != RESET) |
mbed_official | 80:66393a7b209d | 75 | { |
mbed_official | 80:66393a7b209d | 76 | } |
mbed_official | 80:66393a7b209d | 77 | |
mbed_official | 80:66393a7b209d | 78 | /* HCLK = SYSCLK /1*/ |
mbed_official | 80:66393a7b209d | 79 | RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; |
mbed_official | 80:66393a7b209d | 80 | /* PCLK2 = HCLK /1*/ |
mbed_official | 80:66393a7b209d | 81 | RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; |
mbed_official | 80:66393a7b209d | 82 | |
mbed_official | 80:66393a7b209d | 83 | /* PCLK1 = HCLK /1*/ |
mbed_official | 80:66393a7b209d | 84 | RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; |
mbed_official | 80:66393a7b209d | 85 | |
mbed_official | 80:66393a7b209d | 86 | /* Select HSI as system clock source */ |
mbed_official | 80:66393a7b209d | 87 | RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); |
mbed_official | 80:66393a7b209d | 88 | RCC->CFGR |= (uint32_t)RCC_CFGR_SW_HSI; |
mbed_official | 80:66393a7b209d | 89 | |
mbed_official | 80:66393a7b209d | 90 | /* Wait till HSI is used as system clock source */ |
mbed_official | 80:66393a7b209d | 91 | while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_HSI) |
mbed_official | 80:66393a7b209d | 92 | { |
mbed_official | 80:66393a7b209d | 93 | } |
mbed_official | 80:66393a7b209d | 94 | } |
mbed_official | 80:66393a7b209d | 95 | else |
mbed_official | 80:66393a7b209d | 96 | { |
mbed_official | 80:66393a7b209d | 97 | /* If HSI fails to start-up, the application will have wrong clock |
mbed_official | 80:66393a7b209d | 98 | configuration. User can add here some code to deal with this error */ |
mbed_official | 80:66393a7b209d | 99 | } |
mbed_official | 80:66393a7b209d | 100 | } |
mbed_official | 80:66393a7b209d | 101 | |
mbed_official | 80:66393a7b209d | 102 | // MCU SLEEP mode |
mbed_official | 76:aeb1df146756 | 103 | void sleep(void) |
mbed_official | 76:aeb1df146756 | 104 | { |
mbed_official | 84:f54042cbc282 | 105 | // Disable us_ticker update interrupt |
mbed_official | 84:f54042cbc282 | 106 | TIM_ITConfig(TIM9, TIM_IT_Update, DISABLE); |
mbed_official | 84:f54042cbc282 | 107 | |
mbed_official | 80:66393a7b209d | 108 | // Enable PWR clock |
mbed_official | 80:66393a7b209d | 109 | RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE); |
mbed_official | 84:f54042cbc282 | 110 | |
mbed_official | 80:66393a7b209d | 111 | // Request to enter SLEEP mode with regulator ON |
mbed_official | 84:f54042cbc282 | 112 | PWR_EnterSleepMode(PWR_Regulator_ON, PWR_SLEEPEntry_WFI); |
mbed_official | 84:f54042cbc282 | 113 | |
mbed_official | 84:f54042cbc282 | 114 | // Re-enable us_ticker update interrupt |
mbed_official | 84:f54042cbc282 | 115 | TIM_ITConfig(TIM9, TIM_IT_Update, ENABLE); |
mbed_official | 76:aeb1df146756 | 116 | } |
mbed_official | 76:aeb1df146756 | 117 | |
mbed_official | 80:66393a7b209d | 118 | // MCU STOP mode (Regulator in LP mode, LSI, HSI and HSE OFF) |
mbed_official | 76:aeb1df146756 | 119 | void deepsleep(void) |
mbed_official | 76:aeb1df146756 | 120 | { |
mbed_official | 76:aeb1df146756 | 121 | // Enable PWR clock |
mbed_official | 76:aeb1df146756 | 122 | RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE); |
mbed_official | 76:aeb1df146756 | 123 | |
mbed_official | 80:66393a7b209d | 124 | // Enable Ultra low power mode |
mbed_official | 80:66393a7b209d | 125 | PWR_UltraLowPowerCmd(ENABLE); |
mbed_official | 80:66393a7b209d | 126 | |
mbed_official | 80:66393a7b209d | 127 | // Enter Stop Mode |
mbed_official | 76:aeb1df146756 | 128 | PWR_EnterSTOPMode(PWR_Regulator_LowPower, PWR_STOPEntry_WFI); |
mbed_official | 80:66393a7b209d | 129 | |
mbed_official | 80:66393a7b209d | 130 | // After wake-up from STOP reconfigure the system clock (HSI) |
mbed_official | 80:66393a7b209d | 131 | SetSysClock_HSI(); |
mbed_official | 80:66393a7b209d | 132 | |
mbed_official | 76:aeb1df146756 | 133 | } |