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targets/cmsis/TARGET_STM/TARGET_DISCO_F407VG/stm32f4xx_hal_sai.h@133:d4dda5c437f0, 2014-03-24 (annotated)
- Committer:
- mbed_official
- Date:
- Mon Mar 24 17:45:07 2014 +0000
- Revision:
- 133:d4dda5c437f0
- Child:
- 242:7074e42da0b2
Synchronized with git revision 47b961246bed973fe4cb8932781ffc8025b78a61
Full URL: https://github.com/mbedmicro/mbed/commit/47b961246bed973fe4cb8932781ffc8025b78a61/
[STM32F4-Discovery (STM32F407VG)] initial port
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mbed_official | 133:d4dda5c437f0 | 1 | /** |
| mbed_official | 133:d4dda5c437f0 | 2 | ****************************************************************************** |
| mbed_official | 133:d4dda5c437f0 | 3 | * @file stm32f4xx_hal_sai.h |
| mbed_official | 133:d4dda5c437f0 | 4 | * @author MCD Application Team |
| mbed_official | 133:d4dda5c437f0 | 5 | * @version V1.0.0 |
| mbed_official | 133:d4dda5c437f0 | 6 | * @date 18-February-2014 |
| mbed_official | 133:d4dda5c437f0 | 7 | * @brief Header file of SAI HAL module. |
| mbed_official | 133:d4dda5c437f0 | 8 | ****************************************************************************** |
| mbed_official | 133:d4dda5c437f0 | 9 | * @attention |
| mbed_official | 133:d4dda5c437f0 | 10 | * |
| mbed_official | 133:d4dda5c437f0 | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| mbed_official | 133:d4dda5c437f0 | 12 | * |
| mbed_official | 133:d4dda5c437f0 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| mbed_official | 133:d4dda5c437f0 | 14 | * are permitted provided that the following conditions are met: |
| mbed_official | 133:d4dda5c437f0 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| mbed_official | 133:d4dda5c437f0 | 16 | * this list of conditions and the following disclaimer. |
| mbed_official | 133:d4dda5c437f0 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| mbed_official | 133:d4dda5c437f0 | 18 | * this list of conditions and the following disclaimer in the documentation |
| mbed_official | 133:d4dda5c437f0 | 19 | * and/or other materials provided with the distribution. |
| mbed_official | 133:d4dda5c437f0 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| mbed_official | 133:d4dda5c437f0 | 21 | * may be used to endorse or promote products derived from this software |
| mbed_official | 133:d4dda5c437f0 | 22 | * without specific prior written permission. |
| mbed_official | 133:d4dda5c437f0 | 23 | * |
| mbed_official | 133:d4dda5c437f0 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| mbed_official | 133:d4dda5c437f0 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| mbed_official | 133:d4dda5c437f0 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| mbed_official | 133:d4dda5c437f0 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| mbed_official | 133:d4dda5c437f0 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| mbed_official | 133:d4dda5c437f0 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| mbed_official | 133:d4dda5c437f0 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| mbed_official | 133:d4dda5c437f0 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| mbed_official | 133:d4dda5c437f0 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| mbed_official | 133:d4dda5c437f0 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| mbed_official | 133:d4dda5c437f0 | 34 | * |
| mbed_official | 133:d4dda5c437f0 | 35 | ****************************************************************************** |
| mbed_official | 133:d4dda5c437f0 | 36 | */ |
| mbed_official | 133:d4dda5c437f0 | 37 | |
| mbed_official | 133:d4dda5c437f0 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| mbed_official | 133:d4dda5c437f0 | 39 | #ifndef __STM32F4xx_HAL_SAI_H |
| mbed_official | 133:d4dda5c437f0 | 40 | #define __STM32F4xx_HAL_SAI_H |
| mbed_official | 133:d4dda5c437f0 | 41 | |
| mbed_official | 133:d4dda5c437f0 | 42 | #ifdef __cplusplus |
| mbed_official | 133:d4dda5c437f0 | 43 | extern "C" { |
| mbed_official | 133:d4dda5c437f0 | 44 | #endif |
| mbed_official | 133:d4dda5c437f0 | 45 | |
| mbed_official | 133:d4dda5c437f0 | 46 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) |
| mbed_official | 133:d4dda5c437f0 | 47 | |
| mbed_official | 133:d4dda5c437f0 | 48 | /* Includes ------------------------------------------------------------------*/ |
| mbed_official | 133:d4dda5c437f0 | 49 | #include "stm32f4xx_hal_def.h" |
| mbed_official | 133:d4dda5c437f0 | 50 | |
| mbed_official | 133:d4dda5c437f0 | 51 | /** @addtogroup STM32F4xx_HAL_Driver |
| mbed_official | 133:d4dda5c437f0 | 52 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 53 | */ |
| mbed_official | 133:d4dda5c437f0 | 54 | |
| mbed_official | 133:d4dda5c437f0 | 55 | /** @addtogroup SAI |
| mbed_official | 133:d4dda5c437f0 | 56 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 57 | */ |
| mbed_official | 133:d4dda5c437f0 | 58 | |
| mbed_official | 133:d4dda5c437f0 | 59 | /* Exported types ------------------------------------------------------------*/ |
| mbed_official | 133:d4dda5c437f0 | 60 | |
| mbed_official | 133:d4dda5c437f0 | 61 | /** |
| mbed_official | 133:d4dda5c437f0 | 62 | * @brief SAI Init Structure definition |
| mbed_official | 133:d4dda5c437f0 | 63 | */ |
| mbed_official | 133:d4dda5c437f0 | 64 | typedef struct |
| mbed_official | 133:d4dda5c437f0 | 65 | { |
| mbed_official | 133:d4dda5c437f0 | 66 | uint32_t Protocol; /*!< Specifies the SAI Block protocol. |
| mbed_official | 133:d4dda5c437f0 | 67 | This parameter can be a value of @ref SAI_Block_Protocol */ |
| mbed_official | 133:d4dda5c437f0 | 68 | |
| mbed_official | 133:d4dda5c437f0 | 69 | uint32_t AudioMode; /*!< Specifies the SAI Block audio Mode. |
| mbed_official | 133:d4dda5c437f0 | 70 | This parameter can be a value of @ref SAI_Block_Mode */ |
| mbed_official | 133:d4dda5c437f0 | 71 | |
| mbed_official | 133:d4dda5c437f0 | 72 | uint32_t DataSize; /*!< Specifies the SAI Block data size. |
| mbed_official | 133:d4dda5c437f0 | 73 | This parameter can be a value of @ref SAI_Block_Data_Size */ |
| mbed_official | 133:d4dda5c437f0 | 74 | |
| mbed_official | 133:d4dda5c437f0 | 75 | uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. |
| mbed_official | 133:d4dda5c437f0 | 76 | This parameter can be a value of @ref SAI_Block_MSB_LSB_transmission */ |
| mbed_official | 133:d4dda5c437f0 | 77 | |
| mbed_official | 133:d4dda5c437f0 | 78 | uint32_t ClockStrobing; /*!< Specifies the SAI Block clock strobing edge sensitivity. |
| mbed_official | 133:d4dda5c437f0 | 79 | This parameter can be a value of @ref SAI_Block_Clock_Strobing */ |
| mbed_official | 133:d4dda5c437f0 | 80 | |
| mbed_official | 133:d4dda5c437f0 | 81 | uint32_t Synchro; /*!< Specifies SAI Block synchronization |
| mbed_official | 133:d4dda5c437f0 | 82 | This parameter can be a value of @ref SAI_Block_Synchronization */ |
| mbed_official | 133:d4dda5c437f0 | 83 | |
| mbed_official | 133:d4dda5c437f0 | 84 | uint32_t OutputDrive; /*!< Specifies when SAI Block outputs are driven. |
| mbed_official | 133:d4dda5c437f0 | 85 | This parameter can be a value of @ref SAI_Block_Output_Drive |
| mbed_official | 133:d4dda5c437f0 | 86 | @note this value has to be set before enabling the audio block |
| mbed_official | 133:d4dda5c437f0 | 87 | but after the audio block configuration. */ |
| mbed_official | 133:d4dda5c437f0 | 88 | |
| mbed_official | 133:d4dda5c437f0 | 89 | uint32_t NoDivider; /*!< Specifies whether master clock will be divided or not. |
| mbed_official | 133:d4dda5c437f0 | 90 | This parameter can be a value of @ref SAI_Block_NoDivider |
| mbed_official | 133:d4dda5c437f0 | 91 | @note: If bit NODIV in the SAI_xCR1 register is cleared, the frame length |
| mbed_official | 133:d4dda5c437f0 | 92 | should be aligned to a number equal to a power of 2, from 8 to 256. |
| mbed_official | 133:d4dda5c437f0 | 93 | If bit NODIV in the SAI_xCR1 register is set, the frame length can |
| mbed_official | 133:d4dda5c437f0 | 94 | take any of the values without constraint since the input clock of |
| mbed_official | 133:d4dda5c437f0 | 95 | the audio block should be equal to the bit clock. |
| mbed_official | 133:d4dda5c437f0 | 96 | There is no MCLK_x clock which can be output. */ |
| mbed_official | 133:d4dda5c437f0 | 97 | |
| mbed_official | 133:d4dda5c437f0 | 98 | uint32_t FIFOThreshold; /*!< Specifies SAI Block FIFO threshold. |
| mbed_official | 133:d4dda5c437f0 | 99 | This parameter can be a value of @ref SAI_Block_Fifo_Threshold */ |
| mbed_official | 133:d4dda5c437f0 | 100 | |
| mbed_official | 133:d4dda5c437f0 | 101 | uint32_t ClockSource; /*!< Specifies the SAI Block x Clock source. |
| mbed_official | 133:d4dda5c437f0 | 102 | This parameter can be a value of @ref SAI_Clock_Source |
| mbed_official | 133:d4dda5c437f0 | 103 | @note: If ClockSource is equal to SAI_CLKSource_Ext, the PLLI2S |
| mbed_official | 133:d4dda5c437f0 | 104 | and PLLSAI divisions factors will be ignored. */ |
| mbed_official | 133:d4dda5c437f0 | 105 | |
| mbed_official | 133:d4dda5c437f0 | 106 | uint32_t AudioFrequency; /*!< Specifies the audio frequency sampling. |
| mbed_official | 133:d4dda5c437f0 | 107 | This parameter can be a value of @ref SAI_Audio_Frequency */ |
| mbed_official | 133:d4dda5c437f0 | 108 | |
| mbed_official | 133:d4dda5c437f0 | 109 | }SAI_InitTypeDef; |
| mbed_official | 133:d4dda5c437f0 | 110 | |
| mbed_official | 133:d4dda5c437f0 | 111 | /** |
| mbed_official | 133:d4dda5c437f0 | 112 | * @brief SAI Block Frame Init structure definition |
| mbed_official | 133:d4dda5c437f0 | 113 | */ |
| mbed_official | 133:d4dda5c437f0 | 114 | |
| mbed_official | 133:d4dda5c437f0 | 115 | typedef struct |
| mbed_official | 133:d4dda5c437f0 | 116 | { |
| mbed_official | 133:d4dda5c437f0 | 117 | |
| mbed_official | 133:d4dda5c437f0 | 118 | uint32_t FrameLength; /*!< Specifies the Frame length, the number of SCK clocks for each audio frame. |
| mbed_official | 133:d4dda5c437f0 | 119 | This parameter must be a number between Min_Data = 8 and Max_Data = 256. |
| mbed_official | 133:d4dda5c437f0 | 120 | @note: If master clock MCLK_x pin is declared as an output, the frame length |
| mbed_official | 133:d4dda5c437f0 | 121 | should be aligned to a number equal to power of 2 in order to keep |
| mbed_official | 133:d4dda5c437f0 | 122 | in an audio frame, an integer number of MCLK pulses by bit Clock. */ |
| mbed_official | 133:d4dda5c437f0 | 123 | |
| mbed_official | 133:d4dda5c437f0 | 124 | uint32_t ActiveFrameLength; /*!< Specifies the Frame synchronization active level length. |
| mbed_official | 133:d4dda5c437f0 | 125 | This Parameter specifies the length in number of bit clock (SCK + 1) |
| mbed_official | 133:d4dda5c437f0 | 126 | of the active level of FS signal in audio frame. |
| mbed_official | 133:d4dda5c437f0 | 127 | This parameter must be a number between Min_Data = 1 and Max_Data = 128 */ |
| mbed_official | 133:d4dda5c437f0 | 128 | |
| mbed_official | 133:d4dda5c437f0 | 129 | uint32_t FSDefinition; /*!< Specifies the Frame synchronization definition. |
| mbed_official | 133:d4dda5c437f0 | 130 | This parameter can be a value of @ref SAI_Block_FS_Definition */ |
| mbed_official | 133:d4dda5c437f0 | 131 | |
| mbed_official | 133:d4dda5c437f0 | 132 | uint32_t FSPolarity; /*!< Specifies the Frame synchronization Polarity. |
| mbed_official | 133:d4dda5c437f0 | 133 | This parameter can be a value of @ref SAI_Block_FS_Polarity */ |
| mbed_official | 133:d4dda5c437f0 | 134 | |
| mbed_official | 133:d4dda5c437f0 | 135 | uint32_t FSOffset; /*!< Specifies the Frame synchronization Offset. |
| mbed_official | 133:d4dda5c437f0 | 136 | This parameter can be a value of @ref SAI_Block_FS_Offset */ |
| mbed_official | 133:d4dda5c437f0 | 137 | |
| mbed_official | 133:d4dda5c437f0 | 138 | }SAI_FrameInitTypeDef; |
| mbed_official | 133:d4dda5c437f0 | 139 | |
| mbed_official | 133:d4dda5c437f0 | 140 | /** |
| mbed_official | 133:d4dda5c437f0 | 141 | * @brief SAI Block Slot Init Structure definition |
| mbed_official | 133:d4dda5c437f0 | 142 | */ |
| mbed_official | 133:d4dda5c437f0 | 143 | |
| mbed_official | 133:d4dda5c437f0 | 144 | typedef struct |
| mbed_official | 133:d4dda5c437f0 | 145 | { |
| mbed_official | 133:d4dda5c437f0 | 146 | uint32_t FirstBitOffset; /*!< Specifies the position of first data transfer bit in the slot. |
| mbed_official | 133:d4dda5c437f0 | 147 | This parameter must be a number between Min_Data = 0 and Max_Data = 24 */ |
| mbed_official | 133:d4dda5c437f0 | 148 | |
| mbed_official | 133:d4dda5c437f0 | 149 | uint32_t SlotSize; /*!< Specifies the Slot Size. |
| mbed_official | 133:d4dda5c437f0 | 150 | This parameter can be a value of @ref SAI_Block_Slot_Size */ |
| mbed_official | 133:d4dda5c437f0 | 151 | |
| mbed_official | 133:d4dda5c437f0 | 152 | uint32_t SlotNumber; /*!< Specifies the number of slot in the audio frame. |
| mbed_official | 133:d4dda5c437f0 | 153 | This parameter must be a number between Min_Data = 1 and Max_Data = 16 */ |
| mbed_official | 133:d4dda5c437f0 | 154 | |
| mbed_official | 133:d4dda5c437f0 | 155 | uint32_t SlotActive; /*!< Specifies the slots in audio frame that will be activated. |
| mbed_official | 133:d4dda5c437f0 | 156 | This parameter can be a value of @ref SAI_Block_Slot_Active */ |
| mbed_official | 133:d4dda5c437f0 | 157 | }SAI_SlotInitTypeDef; |
| mbed_official | 133:d4dda5c437f0 | 158 | |
| mbed_official | 133:d4dda5c437f0 | 159 | /** |
| mbed_official | 133:d4dda5c437f0 | 160 | * @brief HAL State structures definition |
| mbed_official | 133:d4dda5c437f0 | 161 | */ |
| mbed_official | 133:d4dda5c437f0 | 162 | typedef enum |
| mbed_official | 133:d4dda5c437f0 | 163 | { |
| mbed_official | 133:d4dda5c437f0 | 164 | HAL_SAI_STATE_RESET = 0x00, /*!< SAI not yet initialized or disabled */ |
| mbed_official | 133:d4dda5c437f0 | 165 | HAL_SAI_STATE_READY = 0x01, /*!< SAI initialized and ready for use */ |
| mbed_official | 133:d4dda5c437f0 | 166 | HAL_SAI_STATE_BUSY = 0x02, /*!< SAI internal process is ongoing */ |
| mbed_official | 133:d4dda5c437f0 | 167 | HAL_SAI_STATE_BUSY_TX = 0x12, /*!< Data transmission process is ongoing */ |
| mbed_official | 133:d4dda5c437f0 | 168 | HAL_SAI_STATE_BUSY_RX = 0x22, /*!< Data reception process is ongoing */ |
| mbed_official | 133:d4dda5c437f0 | 169 | HAL_SAI_STATE_TIMEOUT = 0x03, /*!< SAI timeout state */ |
| mbed_official | 133:d4dda5c437f0 | 170 | HAL_SAI_STATE_ERROR = 0x04 /*!< SAI error state */ |
| mbed_official | 133:d4dda5c437f0 | 171 | |
| mbed_official | 133:d4dda5c437f0 | 172 | }HAL_SAI_StateTypeDef; |
| mbed_official | 133:d4dda5c437f0 | 173 | |
| mbed_official | 133:d4dda5c437f0 | 174 | /** |
| mbed_official | 133:d4dda5c437f0 | 175 | * @brief SAI handle Structure definition |
| mbed_official | 133:d4dda5c437f0 | 176 | */ |
| mbed_official | 133:d4dda5c437f0 | 177 | typedef struct |
| mbed_official | 133:d4dda5c437f0 | 178 | { |
| mbed_official | 133:d4dda5c437f0 | 179 | SAI_Block_TypeDef *Instance; /*!< SAI Blockx registers base address */ |
| mbed_official | 133:d4dda5c437f0 | 180 | |
| mbed_official | 133:d4dda5c437f0 | 181 | SAI_InitTypeDef Init; /*!< SAI communication parameters */ |
| mbed_official | 133:d4dda5c437f0 | 182 | |
| mbed_official | 133:d4dda5c437f0 | 183 | SAI_FrameInitTypeDef FrameInit; /*!< SAI Frame configuration parameters */ |
| mbed_official | 133:d4dda5c437f0 | 184 | |
| mbed_official | 133:d4dda5c437f0 | 185 | SAI_SlotInitTypeDef SlotInit; /*!< SAI Slot configuration parameters */ |
| mbed_official | 133:d4dda5c437f0 | 186 | |
| mbed_official | 133:d4dda5c437f0 | 187 | uint16_t *pTxBuffPtr; /*!< Pointer to SAI Tx transfer Buffer */ |
| mbed_official | 133:d4dda5c437f0 | 188 | |
| mbed_official | 133:d4dda5c437f0 | 189 | uint16_t TxXferSize; /*!< SAI Tx transfer size */ |
| mbed_official | 133:d4dda5c437f0 | 190 | |
| mbed_official | 133:d4dda5c437f0 | 191 | uint16_t TxXferCount; /*!< SAI Tx transfer counter */ |
| mbed_official | 133:d4dda5c437f0 | 192 | |
| mbed_official | 133:d4dda5c437f0 | 193 | uint16_t *pRxBuffPtr; /*!< Pointer to SAI Rx transfer buffer */ |
| mbed_official | 133:d4dda5c437f0 | 194 | |
| mbed_official | 133:d4dda5c437f0 | 195 | uint16_t RxXferSize; /*!< SAI Rx transfer size */ |
| mbed_official | 133:d4dda5c437f0 | 196 | |
| mbed_official | 133:d4dda5c437f0 | 197 | uint16_t RxXferCount; /*!< SAI Rx transfer counter */ |
| mbed_official | 133:d4dda5c437f0 | 198 | |
| mbed_official | 133:d4dda5c437f0 | 199 | DMA_HandleTypeDef *hdmatx; /*!< SAI Tx DMA handle parameters */ |
| mbed_official | 133:d4dda5c437f0 | 200 | |
| mbed_official | 133:d4dda5c437f0 | 201 | DMA_HandleTypeDef *hdmarx; /*!< SAI Rx DMA handle parameters */ |
| mbed_official | 133:d4dda5c437f0 | 202 | |
| mbed_official | 133:d4dda5c437f0 | 203 | HAL_LockTypeDef Lock; /*!< SAI locking object */ |
| mbed_official | 133:d4dda5c437f0 | 204 | |
| mbed_official | 133:d4dda5c437f0 | 205 | __IO HAL_SAI_StateTypeDef State; /*!< SAI communication state */ |
| mbed_official | 133:d4dda5c437f0 | 206 | |
| mbed_official | 133:d4dda5c437f0 | 207 | __IO uint32_t ErrorCode; /*!< SAI Error code */ |
| mbed_official | 133:d4dda5c437f0 | 208 | |
| mbed_official | 133:d4dda5c437f0 | 209 | }SAI_HandleTypeDef; |
| mbed_official | 133:d4dda5c437f0 | 210 | |
| mbed_official | 133:d4dda5c437f0 | 211 | /* Exported constants --------------------------------------------------------*/ |
| mbed_official | 133:d4dda5c437f0 | 212 | |
| mbed_official | 133:d4dda5c437f0 | 213 | /** @defgroup SAI_Exported_Constants |
| mbed_official | 133:d4dda5c437f0 | 214 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 215 | */ |
| mbed_official | 133:d4dda5c437f0 | 216 | /** @defgroup SAI Error Code |
| mbed_official | 133:d4dda5c437f0 | 217 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 218 | */ |
| mbed_official | 133:d4dda5c437f0 | 219 | #define HAL_SAI_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */ |
| mbed_official | 133:d4dda5c437f0 | 220 | #define HAL_SAI_ERROR_OVR ((uint32_t)0x00000001) /*!< Overrun Error */ |
| mbed_official | 133:d4dda5c437f0 | 221 | #define HAL_SAI_ERROR_UDR ((uint32_t)0x00000002) /*!< Underrun error */ |
| mbed_official | 133:d4dda5c437f0 | 222 | #define HAL_SAI_ERROR_TIMEOUT ((uint32_t)0x00000020) /*!< Timeout error */ |
| mbed_official | 133:d4dda5c437f0 | 223 | /** |
| mbed_official | 133:d4dda5c437f0 | 224 | * @} |
| mbed_official | 133:d4dda5c437f0 | 225 | */ |
| mbed_official | 133:d4dda5c437f0 | 226 | |
| mbed_official | 133:d4dda5c437f0 | 227 | /** @defgroup SAI_Clock_Source |
| mbed_official | 133:d4dda5c437f0 | 228 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 229 | */ |
| mbed_official | 133:d4dda5c437f0 | 230 | #define SAI_CLKSOURCE_PLLSAI ((uint32_t)RCC_SAIACLKSOURCE_PLLSAI) |
| mbed_official | 133:d4dda5c437f0 | 231 | #define SAI_CLKSOURCE_PLLI2S ((uint32_t)RCC_SAIACLKSOURCE_PLLI2S) |
| mbed_official | 133:d4dda5c437f0 | 232 | #define SAI_CLKSOURCE_EXT ((uint32_t)RCC_SAIACLKSOURCE_EXT) |
| mbed_official | 133:d4dda5c437f0 | 233 | |
| mbed_official | 133:d4dda5c437f0 | 234 | #define IS_SAI_CLK_SOURCE(SOURCE) (((SOURCE) == SAI_CLKSOURCE_PLLSAI) ||\ |
| mbed_official | 133:d4dda5c437f0 | 235 | ((SOURCE) == SAI_CLKSOURCE_PLLI2S) ||\ |
| mbed_official | 133:d4dda5c437f0 | 236 | ((SOURCE) == SAI_CLKSOURCE_EXT)) |
| mbed_official | 133:d4dda5c437f0 | 237 | /** |
| mbed_official | 133:d4dda5c437f0 | 238 | * @} |
| mbed_official | 133:d4dda5c437f0 | 239 | */ |
| mbed_official | 133:d4dda5c437f0 | 240 | |
| mbed_official | 133:d4dda5c437f0 | 241 | /** @defgroup SAI_Audio_Frequency |
| mbed_official | 133:d4dda5c437f0 | 242 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 243 | */ |
| mbed_official | 133:d4dda5c437f0 | 244 | #define SAI_AUDIO_FREQUENCY_192K ((uint32_t)192000) |
| mbed_official | 133:d4dda5c437f0 | 245 | #define SAI_AUDIO_FREQUENCY_96K ((uint32_t)96000) |
| mbed_official | 133:d4dda5c437f0 | 246 | #define SAI_AUDIO_FREQUENCY_48K ((uint32_t)48000) |
| mbed_official | 133:d4dda5c437f0 | 247 | #define SAI_AUDIO_FREQUENCY_44K ((uint32_t)44100) |
| mbed_official | 133:d4dda5c437f0 | 248 | #define SAI_AUDIO_FREQUENCY_32K ((uint32_t)32000) |
| mbed_official | 133:d4dda5c437f0 | 249 | #define SAI_AUDIO_FREQUENCY_22K ((uint32_t)22050) |
| mbed_official | 133:d4dda5c437f0 | 250 | #define SAI_AUDIO_FREQUENCY_16K ((uint32_t)16000) |
| mbed_official | 133:d4dda5c437f0 | 251 | #define SAI_AUDIO_FREQUENCY_11K ((uint32_t)11025) |
| mbed_official | 133:d4dda5c437f0 | 252 | #define SAI_AUDIO_FREQUENCY_8K ((uint32_t)8000) |
| mbed_official | 133:d4dda5c437f0 | 253 | |
| mbed_official | 133:d4dda5c437f0 | 254 | #define IS_SAI_AUDIO_FREQUENCY(AUDIO) (((AUDIO) == SAI_AUDIO_FREQUENCY_192K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_96K) || \ |
| mbed_official | 133:d4dda5c437f0 | 255 | ((AUDIO) == SAI_AUDIO_FREQUENCY_48K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_44K) || \ |
| mbed_official | 133:d4dda5c437f0 | 256 | ((AUDIO) == SAI_AUDIO_FREQUENCY_32K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_22K) || \ |
| mbed_official | 133:d4dda5c437f0 | 257 | ((AUDIO) == SAI_AUDIO_FREQUENCY_16K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_11K) || \ |
| mbed_official | 133:d4dda5c437f0 | 258 | ((AUDIO) == SAI_AUDIO_FREQUENCY_8K)) |
| mbed_official | 133:d4dda5c437f0 | 259 | /** |
| mbed_official | 133:d4dda5c437f0 | 260 | * @} |
| mbed_official | 133:d4dda5c437f0 | 261 | */ |
| mbed_official | 133:d4dda5c437f0 | 262 | |
| mbed_official | 133:d4dda5c437f0 | 263 | /** @defgroup SAI_Block_Mode |
| mbed_official | 133:d4dda5c437f0 | 264 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 265 | */ |
| mbed_official | 133:d4dda5c437f0 | 266 | #define SAI_MODEMASTER_TX ((uint32_t)0x00000000) |
| mbed_official | 133:d4dda5c437f0 | 267 | #define SAI_MODEMASTER_RX ((uint32_t)0x00000001) |
| mbed_official | 133:d4dda5c437f0 | 268 | #define SAI_MODESLAVE_TX ((uint32_t)0x00000002) |
| mbed_official | 133:d4dda5c437f0 | 269 | #define SAI_MODESLAVE_RX ((uint32_t)0x00000003) |
| mbed_official | 133:d4dda5c437f0 | 270 | #define IS_SAI_BLOCK_MODE(MODE) (((MODE) == SAI_MODEMASTER_TX) || \ |
| mbed_official | 133:d4dda5c437f0 | 271 | ((MODE) == SAI_MODEMASTER_RX) || \ |
| mbed_official | 133:d4dda5c437f0 | 272 | ((MODE) == SAI_MODESLAVE_TX) || \ |
| mbed_official | 133:d4dda5c437f0 | 273 | ((MODE) == SAI_MODESLAVE_RX)) |
| mbed_official | 133:d4dda5c437f0 | 274 | /** |
| mbed_official | 133:d4dda5c437f0 | 275 | * @} |
| mbed_official | 133:d4dda5c437f0 | 276 | */ |
| mbed_official | 133:d4dda5c437f0 | 277 | |
| mbed_official | 133:d4dda5c437f0 | 278 | /** @defgroup SAI_Block_Protocol |
| mbed_official | 133:d4dda5c437f0 | 279 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 280 | */ |
| mbed_official | 133:d4dda5c437f0 | 281 | |
| mbed_official | 133:d4dda5c437f0 | 282 | #define SAI_FREE_PROTOCOL ((uint32_t)0x00000000) |
| mbed_official | 133:d4dda5c437f0 | 283 | #define SAI_AC97_PROTOCOL ((uint32_t)SAI_xCR1_PRTCFG_1) |
| mbed_official | 133:d4dda5c437f0 | 284 | |
| mbed_official | 133:d4dda5c437f0 | 285 | #define IS_SAI_BLOCK_PROTOCOL(PROTOCOL) (((PROTOCOL) == SAI_FREE_PROTOCOL) || \ |
| mbed_official | 133:d4dda5c437f0 | 286 | ((PROTOCOL) == SAI_AC97_PROTOCOL)) |
| mbed_official | 133:d4dda5c437f0 | 287 | /** |
| mbed_official | 133:d4dda5c437f0 | 288 | * @} |
| mbed_official | 133:d4dda5c437f0 | 289 | */ |
| mbed_official | 133:d4dda5c437f0 | 290 | |
| mbed_official | 133:d4dda5c437f0 | 291 | /** @defgroup SAI_Block_Data_Size |
| mbed_official | 133:d4dda5c437f0 | 292 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 293 | */ |
| mbed_official | 133:d4dda5c437f0 | 294 | #define SAI_DATASIZE_8 ((uint32_t)0x00000040) |
| mbed_official | 133:d4dda5c437f0 | 295 | #define SAI_DATASIZE_10 ((uint32_t)0x00000060) |
| mbed_official | 133:d4dda5c437f0 | 296 | #define SAI_DATASIZE_16 ((uint32_t)0x00000080) |
| mbed_official | 133:d4dda5c437f0 | 297 | #define SAI_DATASIZE_20 ((uint32_t)0x000000A0) |
| mbed_official | 133:d4dda5c437f0 | 298 | #define SAI_DATASIZE_24 ((uint32_t)0x000000C0) |
| mbed_official | 133:d4dda5c437f0 | 299 | #define SAI_DATASIZE_32 ((uint32_t)0x000000E0) |
| mbed_official | 133:d4dda5c437f0 | 300 | |
| mbed_official | 133:d4dda5c437f0 | 301 | #define IS_SAI_BLOCK_DATASIZE(DATASIZE) (((DATASIZE) == SAI_DATASIZE_8) || \ |
| mbed_official | 133:d4dda5c437f0 | 302 | ((DATASIZE) == SAI_DATASIZE_10) || \ |
| mbed_official | 133:d4dda5c437f0 | 303 | ((DATASIZE) == SAI_DATASIZE_16) || \ |
| mbed_official | 133:d4dda5c437f0 | 304 | ((DATASIZE) == SAI_DATASIZE_20) || \ |
| mbed_official | 133:d4dda5c437f0 | 305 | ((DATASIZE) == SAI_DATASIZE_24) || \ |
| mbed_official | 133:d4dda5c437f0 | 306 | ((DATASIZE) == SAI_DATASIZE_32)) |
| mbed_official | 133:d4dda5c437f0 | 307 | /** |
| mbed_official | 133:d4dda5c437f0 | 308 | * @} |
| mbed_official | 133:d4dda5c437f0 | 309 | */ |
| mbed_official | 133:d4dda5c437f0 | 310 | |
| mbed_official | 133:d4dda5c437f0 | 311 | /** @defgroup SAI_Block_MSB_LSB_transmission |
| mbed_official | 133:d4dda5c437f0 | 312 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 313 | */ |
| mbed_official | 133:d4dda5c437f0 | 314 | |
| mbed_official | 133:d4dda5c437f0 | 315 | #define SAI_FIRSTBIT_MSB ((uint32_t)0x00000000) |
| mbed_official | 133:d4dda5c437f0 | 316 | #define SAI_FIRSTBIT_LSB ((uint32_t)SAI_xCR1_LSBFIRST) |
| mbed_official | 133:d4dda5c437f0 | 317 | |
| mbed_official | 133:d4dda5c437f0 | 318 | #define IS_SAI_BLOCK_FIRST_BIT(BIT) (((BIT) == SAI_FIRSTBIT_MSB) || \ |
| mbed_official | 133:d4dda5c437f0 | 319 | ((BIT) == SAI_FIRSTBIT_LSB)) |
| mbed_official | 133:d4dda5c437f0 | 320 | /** |
| mbed_official | 133:d4dda5c437f0 | 321 | * @} |
| mbed_official | 133:d4dda5c437f0 | 322 | */ |
| mbed_official | 133:d4dda5c437f0 | 323 | |
| mbed_official | 133:d4dda5c437f0 | 324 | /** @defgroup SAI_Block_Clock_Strobing |
| mbed_official | 133:d4dda5c437f0 | 325 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 326 | */ |
| mbed_official | 133:d4dda5c437f0 | 327 | #define SAI_CLOCKSTROBING_FALLINGEDGE ((uint32_t)0x00000000) |
| mbed_official | 133:d4dda5c437f0 | 328 | #define SAI_CLOCKSTROBING_RISINGEDGE ((uint32_t)SAI_xCR1_CKSTR) |
| mbed_official | 133:d4dda5c437f0 | 329 | |
| mbed_official | 133:d4dda5c437f0 | 330 | #define IS_SAI_BLOCK_CLOCK_STROBING(CLOCK) (((CLOCK) == SAI_CLOCKSTROBING_FALLINGEDGE) || \ |
| mbed_official | 133:d4dda5c437f0 | 331 | ((CLOCK) == SAI_CLOCKSTROBING_RISINGEDGE)) |
| mbed_official | 133:d4dda5c437f0 | 332 | /** |
| mbed_official | 133:d4dda5c437f0 | 333 | * @} |
| mbed_official | 133:d4dda5c437f0 | 334 | */ |
| mbed_official | 133:d4dda5c437f0 | 335 | |
| mbed_official | 133:d4dda5c437f0 | 336 | /** @defgroup SAI_Block_Synchronization |
| mbed_official | 133:d4dda5c437f0 | 337 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 338 | */ |
| mbed_official | 133:d4dda5c437f0 | 339 | #define SAI_ASYNCHRONOUS ((uint32_t)0x00000000) |
| mbed_official | 133:d4dda5c437f0 | 340 | #define SAI_SYNCHRONOUS ((uint32_t)SAI_xCR1_SYNCEN_0) |
| mbed_official | 133:d4dda5c437f0 | 341 | |
| mbed_official | 133:d4dda5c437f0 | 342 | #define IS_SAI_BLOCK_SYNCHRO(SYNCHRO) (((SYNCHRO) == SAI_ASYNCHRONOUS) || \ |
| mbed_official | 133:d4dda5c437f0 | 343 | ((SYNCHRO) == SAI_SYNCHRONOUS)) |
| mbed_official | 133:d4dda5c437f0 | 344 | /** |
| mbed_official | 133:d4dda5c437f0 | 345 | * @} |
| mbed_official | 133:d4dda5c437f0 | 346 | */ |
| mbed_official | 133:d4dda5c437f0 | 347 | |
| mbed_official | 133:d4dda5c437f0 | 348 | /** @defgroup SAI_Block_Output_Drive |
| mbed_official | 133:d4dda5c437f0 | 349 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 350 | */ |
| mbed_official | 133:d4dda5c437f0 | 351 | #define SAI_OUTPUTDRIVE_DISABLED ((uint32_t)0x00000000) |
| mbed_official | 133:d4dda5c437f0 | 352 | #define SAI_OUTPUTDRIVE_ENABLED ((uint32_t)SAI_xCR1_OUTDRIV) |
| mbed_official | 133:d4dda5c437f0 | 353 | |
| mbed_official | 133:d4dda5c437f0 | 354 | #define IS_SAI_BLOCK_OUTPUT_DRIVE(DRIVE) (((DRIVE) == SAI_OUTPUTDRIVE_DISABLED) || \ |
| mbed_official | 133:d4dda5c437f0 | 355 | ((DRIVE) == SAI_OUTPUTDRIVE_ENABLED)) |
| mbed_official | 133:d4dda5c437f0 | 356 | /** |
| mbed_official | 133:d4dda5c437f0 | 357 | * @} |
| mbed_official | 133:d4dda5c437f0 | 358 | */ |
| mbed_official | 133:d4dda5c437f0 | 359 | |
| mbed_official | 133:d4dda5c437f0 | 360 | /** @defgroup SAI_Block_NoDivider |
| mbed_official | 133:d4dda5c437f0 | 361 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 362 | */ |
| mbed_official | 133:d4dda5c437f0 | 363 | #define SAI_MASTERDIVIDER_ENABLED ((uint32_t)0x00000000) |
| mbed_official | 133:d4dda5c437f0 | 364 | #define SAI_MASTERDIVIDER_DISABLED ((uint32_t)SAI_xCR1_NODIV) |
| mbed_official | 133:d4dda5c437f0 | 365 | |
| mbed_official | 133:d4dda5c437f0 | 366 | #define IS_SAI_BLOCK_NODIVIDER(NODIVIDER) (((NODIVIDER) == SAI_MASTERDIVIDER_ENABLED) || \ |
| mbed_official | 133:d4dda5c437f0 | 367 | ((NODIVIDER) == SAI_MASTERDIVIDER_DISABLED)) |
| mbed_official | 133:d4dda5c437f0 | 368 | /** |
| mbed_official | 133:d4dda5c437f0 | 369 | * @} |
| mbed_official | 133:d4dda5c437f0 | 370 | */ |
| mbed_official | 133:d4dda5c437f0 | 371 | |
| mbed_official | 133:d4dda5c437f0 | 372 | /** @defgroup SAI_Block_Master_Divider |
| mbed_official | 133:d4dda5c437f0 | 373 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 374 | */ |
| mbed_official | 133:d4dda5c437f0 | 375 | #define IS_SAI_BLOCK_MASTER_DIVIDER(DIVIDER) ((DIVIDER) <= 15) |
| mbed_official | 133:d4dda5c437f0 | 376 | /** |
| mbed_official | 133:d4dda5c437f0 | 377 | * @} |
| mbed_official | 133:d4dda5c437f0 | 378 | */ |
| mbed_official | 133:d4dda5c437f0 | 379 | |
| mbed_official | 133:d4dda5c437f0 | 380 | /** @defgroup SAI_Block_Frame_Length |
| mbed_official | 133:d4dda5c437f0 | 381 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 382 | */ |
| mbed_official | 133:d4dda5c437f0 | 383 | #define IS_SAI_BLOCK_FRAME_LENGTH(LENGTH) ((8 <= (LENGTH)) && ((LENGTH) <= 256)) |
| mbed_official | 133:d4dda5c437f0 | 384 | /** |
| mbed_official | 133:d4dda5c437f0 | 385 | * @} |
| mbed_official | 133:d4dda5c437f0 | 386 | */ |
| mbed_official | 133:d4dda5c437f0 | 387 | |
| mbed_official | 133:d4dda5c437f0 | 388 | /** @defgroup SAI_Block_Active_FrameLength |
| mbed_official | 133:d4dda5c437f0 | 389 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 390 | */ |
| mbed_official | 133:d4dda5c437f0 | 391 | #define IS_SAI_BLOCK_ACTIVE_FRAME(LENGTH) ((1 <= (LENGTH)) && ((LENGTH) <= 128)) |
| mbed_official | 133:d4dda5c437f0 | 392 | /** |
| mbed_official | 133:d4dda5c437f0 | 393 | * @} |
| mbed_official | 133:d4dda5c437f0 | 394 | */ |
| mbed_official | 133:d4dda5c437f0 | 395 | |
| mbed_official | 133:d4dda5c437f0 | 396 | /** @defgroup SAI_Block_FS_Definition |
| mbed_official | 133:d4dda5c437f0 | 397 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 398 | */ |
| mbed_official | 133:d4dda5c437f0 | 399 | #define SAI_FS_STARTFRAME ((uint32_t)0x00000000) |
| mbed_official | 133:d4dda5c437f0 | 400 | #define SAI_FS_CHANNEL_IDENTIFICATION ((uint32_t)SAI_xFRCR_FSDEF) |
| mbed_official | 133:d4dda5c437f0 | 401 | |
| mbed_official | 133:d4dda5c437f0 | 402 | #define IS_SAI_BLOCK_FS_DEFINITION(DEFINITION) (((DEFINITION) == SAI_FS_STARTFRAME) || \ |
| mbed_official | 133:d4dda5c437f0 | 403 | ((DEFINITION) == SAI_FS_CHANNEL_IDENTIFICATION)) |
| mbed_official | 133:d4dda5c437f0 | 404 | /** |
| mbed_official | 133:d4dda5c437f0 | 405 | * @} |
| mbed_official | 133:d4dda5c437f0 | 406 | */ |
| mbed_official | 133:d4dda5c437f0 | 407 | |
| mbed_official | 133:d4dda5c437f0 | 408 | /** @defgroup SAI_Block_FS_Polarity |
| mbed_official | 133:d4dda5c437f0 | 409 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 410 | */ |
| mbed_official | 133:d4dda5c437f0 | 411 | #define SAI_FS_ACTIVE_LOW ((uint32_t)0x00000000) |
| mbed_official | 133:d4dda5c437f0 | 412 | #define SAI_FS_ACTIVE_HIGH ((uint32_t)SAI_xFRCR_FSPO) |
| mbed_official | 133:d4dda5c437f0 | 413 | |
| mbed_official | 133:d4dda5c437f0 | 414 | #define IS_SAI_BLOCK_FS_POLARITY(POLARITY) (((POLARITY) == SAI_FS_ACTIVE_LOW) || \ |
| mbed_official | 133:d4dda5c437f0 | 415 | ((POLARITY) == SAI_FS_ACTIVE_HIGH)) |
| mbed_official | 133:d4dda5c437f0 | 416 | /** |
| mbed_official | 133:d4dda5c437f0 | 417 | * @} |
| mbed_official | 133:d4dda5c437f0 | 418 | */ |
| mbed_official | 133:d4dda5c437f0 | 419 | |
| mbed_official | 133:d4dda5c437f0 | 420 | /** @defgroup SAI_Block_FS_Offset |
| mbed_official | 133:d4dda5c437f0 | 421 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 422 | */ |
| mbed_official | 133:d4dda5c437f0 | 423 | #define SAI_FS_FIRSTBIT ((uint32_t)0x00000000) |
| mbed_official | 133:d4dda5c437f0 | 424 | #define SAI_FS_BEFOREFIRSTBIT ((uint32_t)SAI_xFRCR_FSOFF) |
| mbed_official | 133:d4dda5c437f0 | 425 | |
| mbed_official | 133:d4dda5c437f0 | 426 | #define IS_SAI_BLOCK_FS_OFFSET(OFFSET) (((OFFSET) == SAI_FS_FIRSTBIT) || \ |
| mbed_official | 133:d4dda5c437f0 | 427 | ((OFFSET) == SAI_FS_BEFOREFIRSTBIT)) |
| mbed_official | 133:d4dda5c437f0 | 428 | /** |
| mbed_official | 133:d4dda5c437f0 | 429 | * @} |
| mbed_official | 133:d4dda5c437f0 | 430 | */ |
| mbed_official | 133:d4dda5c437f0 | 431 | |
| mbed_official | 133:d4dda5c437f0 | 432 | /** @defgroup SAI_Block_Slot_FirstBit_Offset |
| mbed_official | 133:d4dda5c437f0 | 433 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 434 | */ |
| mbed_official | 133:d4dda5c437f0 | 435 | #define IS_SAI_BLOCK_FIRSTBIT_OFFSET(OFFSET) ((OFFSET) <= 24) |
| mbed_official | 133:d4dda5c437f0 | 436 | /** |
| mbed_official | 133:d4dda5c437f0 | 437 | * @} |
| mbed_official | 133:d4dda5c437f0 | 438 | */ |
| mbed_official | 133:d4dda5c437f0 | 439 | |
| mbed_official | 133:d4dda5c437f0 | 440 | /** @defgroup SAI_Block_Slot_Size |
| mbed_official | 133:d4dda5c437f0 | 441 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 442 | */ |
| mbed_official | 133:d4dda5c437f0 | 443 | #define SAI_SLOTSIZE_DATASIZE ((uint32_t)0x00000000) |
| mbed_official | 133:d4dda5c437f0 | 444 | #define SAI_SLOTSIZE_16B ((uint32_t)SAI_xSLOTR_SLOTSZ_0) |
| mbed_official | 133:d4dda5c437f0 | 445 | #define SAI_SLOTSIZE_32B ((uint32_t)SAI_xSLOTR_SLOTSZ_1) |
| mbed_official | 133:d4dda5c437f0 | 446 | |
| mbed_official | 133:d4dda5c437f0 | 447 | #define IS_SAI_BLOCK_SLOT_SIZE(SIZE) (((SIZE) == SAI_SLOTSIZE_DATASIZE) || \ |
| mbed_official | 133:d4dda5c437f0 | 448 | ((SIZE) == SAI_SLOTSIZE_16B) || \ |
| mbed_official | 133:d4dda5c437f0 | 449 | ((SIZE) == SAI_SLOTSIZE_32B)) |
| mbed_official | 133:d4dda5c437f0 | 450 | /** |
| mbed_official | 133:d4dda5c437f0 | 451 | * @} |
| mbed_official | 133:d4dda5c437f0 | 452 | */ |
| mbed_official | 133:d4dda5c437f0 | 453 | |
| mbed_official | 133:d4dda5c437f0 | 454 | /** @defgroup SAI_Block_Slot_Number |
| mbed_official | 133:d4dda5c437f0 | 455 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 456 | */ |
| mbed_official | 133:d4dda5c437f0 | 457 | #define IS_SAI_BLOCK_SLOT_NUMBER(NUMBER) ((1 <= (NUMBER)) && ((NUMBER) <= 16)) |
| mbed_official | 133:d4dda5c437f0 | 458 | /** |
| mbed_official | 133:d4dda5c437f0 | 459 | * @} |
| mbed_official | 133:d4dda5c437f0 | 460 | */ |
| mbed_official | 133:d4dda5c437f0 | 461 | |
| mbed_official | 133:d4dda5c437f0 | 462 | /** @defgroup SAI_Block_Slot_Active |
| mbed_official | 133:d4dda5c437f0 | 463 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 464 | */ |
| mbed_official | 133:d4dda5c437f0 | 465 | #define SAI_SLOT_NOTACTIVE ((uint32_t)0x00000000) |
| mbed_official | 133:d4dda5c437f0 | 466 | #define SAI_SLOTACTIVE_0 ((uint32_t)0x00010000) |
| mbed_official | 133:d4dda5c437f0 | 467 | #define SAI_SLOTACTIVE_1 ((uint32_t)0x00020000) |
| mbed_official | 133:d4dda5c437f0 | 468 | #define SAI_SLOTACTIVE_2 ((uint32_t)0x00040000) |
| mbed_official | 133:d4dda5c437f0 | 469 | #define SAI_SLOTACTIVE_3 ((uint32_t)0x00080000) |
| mbed_official | 133:d4dda5c437f0 | 470 | #define SAI_SLOTACTIVE_4 ((uint32_t)0x00100000) |
| mbed_official | 133:d4dda5c437f0 | 471 | #define SAI_SLOTACTIVE_5 ((uint32_t)0x00200000) |
| mbed_official | 133:d4dda5c437f0 | 472 | #define SAI_SLOTACTIVE_6 ((uint32_t)0x00400000) |
| mbed_official | 133:d4dda5c437f0 | 473 | #define SAI_SLOTACTIVE_7 ((uint32_t)0x00800000) |
| mbed_official | 133:d4dda5c437f0 | 474 | #define SAI_SLOTACTIVE_8 ((uint32_t)0x01000000) |
| mbed_official | 133:d4dda5c437f0 | 475 | #define SAI_SLOTACTIVE_9 ((uint32_t)0x02000000) |
| mbed_official | 133:d4dda5c437f0 | 476 | #define SAI_SLOTACTIVE_10 ((uint32_t)0x04000000) |
| mbed_official | 133:d4dda5c437f0 | 477 | #define SAI_SLOTACTIVE_11 ((uint32_t)0x08000000) |
| mbed_official | 133:d4dda5c437f0 | 478 | #define SAI_SLOTACTIVE_12 ((uint32_t)0x10000000) |
| mbed_official | 133:d4dda5c437f0 | 479 | #define SAI_SLOTACTIVE_13 ((uint32_t)0x20000000) |
| mbed_official | 133:d4dda5c437f0 | 480 | #define SAI_SLOTACTIVE_14 ((uint32_t)0x40000000) |
| mbed_official | 133:d4dda5c437f0 | 481 | #define SAI_SLOTACTIVE_15 ((uint32_t)0x80000000) |
| mbed_official | 133:d4dda5c437f0 | 482 | #define SAI_SLOTACTIVE_ALL ((uint32_t)0xFFFF0000) |
| mbed_official | 133:d4dda5c437f0 | 483 | |
| mbed_official | 133:d4dda5c437f0 | 484 | #define IS_SAI_SLOT_ACTIVE(ACTIVE) ((ACTIVE) != 0) |
| mbed_official | 133:d4dda5c437f0 | 485 | |
| mbed_official | 133:d4dda5c437f0 | 486 | /** |
| mbed_official | 133:d4dda5c437f0 | 487 | * @} |
| mbed_official | 133:d4dda5c437f0 | 488 | */ |
| mbed_official | 133:d4dda5c437f0 | 489 | |
| mbed_official | 133:d4dda5c437f0 | 490 | /** @defgroup SAI_Mono_Stereo_Mode |
| mbed_official | 133:d4dda5c437f0 | 491 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 492 | */ |
| mbed_official | 133:d4dda5c437f0 | 493 | #define SAI_MONOMODE ((uint32_t)SAI_xCR1_MONO) |
| mbed_official | 133:d4dda5c437f0 | 494 | #define SAI_STREOMODE ((uint32_t)0x00000000) |
| mbed_official | 133:d4dda5c437f0 | 495 | |
| mbed_official | 133:d4dda5c437f0 | 496 | #define IS_SAI_BLOCK_MONO_STREO_MODE(MODE) (((MODE) == SAI_MONOMODE) ||\ |
| mbed_official | 133:d4dda5c437f0 | 497 | ((MODE) == SAI_STREOMODE)) |
| mbed_official | 133:d4dda5c437f0 | 498 | /** |
| mbed_official | 133:d4dda5c437f0 | 499 | * @} |
| mbed_official | 133:d4dda5c437f0 | 500 | */ |
| mbed_official | 133:d4dda5c437f0 | 501 | |
| mbed_official | 133:d4dda5c437f0 | 502 | /** @defgroup SAI_TRIState_Management |
| mbed_official | 133:d4dda5c437f0 | 503 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 504 | */ |
| mbed_official | 133:d4dda5c437f0 | 505 | #define SAI_OUTPUT_NOTRELEASED ((uint32_t)0x00000000) |
| mbed_official | 133:d4dda5c437f0 | 506 | #define SAI_OUTPUT_RELEASED ((uint32_t)SAI_xCR2_TRIS) |
| mbed_official | 133:d4dda5c437f0 | 507 | |
| mbed_official | 133:d4dda5c437f0 | 508 | #define IS_SAI_BLOCK_TRISTATE_MANAGEMENT(STATE) (((STATE) == SAI_OUTPUT_NOTRELEASED) ||\ |
| mbed_official | 133:d4dda5c437f0 | 509 | ((STATE) == SAI_OUTPUT_RELEASED)) |
| mbed_official | 133:d4dda5c437f0 | 510 | /** |
| mbed_official | 133:d4dda5c437f0 | 511 | * @} |
| mbed_official | 133:d4dda5c437f0 | 512 | */ |
| mbed_official | 133:d4dda5c437f0 | 513 | |
| mbed_official | 133:d4dda5c437f0 | 514 | /** @defgroup SAI_Block_Fifo_Threshold |
| mbed_official | 133:d4dda5c437f0 | 515 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 516 | */ |
| mbed_official | 133:d4dda5c437f0 | 517 | #define SAI_FIFOTHRESHOLD_EMPTY ((uint32_t)0x00000000) |
| mbed_official | 133:d4dda5c437f0 | 518 | #define SAI_FIFOTHRESHOLD_1QF ((uint32_t)0x00000001) |
| mbed_official | 133:d4dda5c437f0 | 519 | #define SAI_FIFOTHRESHOLD_HF ((uint32_t)0x00000002) |
| mbed_official | 133:d4dda5c437f0 | 520 | #define SAI_FIFOTHRESHOLD_3QF ((uint32_t)0x00000003) |
| mbed_official | 133:d4dda5c437f0 | 521 | #define SAI_FIFOTHRESHOLD_FULL ((uint32_t)0x00000004) |
| mbed_official | 133:d4dda5c437f0 | 522 | |
| mbed_official | 133:d4dda5c437f0 | 523 | #define IS_SAI_BLOCK_FIFO_THRESHOLD(THRESHOLD) (((THRESHOLD) == SAI_FIFOTHRESHOLD_EMPTY) || \ |
| mbed_official | 133:d4dda5c437f0 | 524 | ((THRESHOLD) == SAI_FIFOTHRESHOLD_1QF) || \ |
| mbed_official | 133:d4dda5c437f0 | 525 | ((THRESHOLD) == SAI_FIFOTHRESHOLD_HF) || \ |
| mbed_official | 133:d4dda5c437f0 | 526 | ((THRESHOLD) == SAI_FIFOTHRESHOLD_3QF) || \ |
| mbed_official | 133:d4dda5c437f0 | 527 | ((THRESHOLD) == SAI_FIFOTHRESHOLD_FULL)) |
| mbed_official | 133:d4dda5c437f0 | 528 | /** |
| mbed_official | 133:d4dda5c437f0 | 529 | * @} |
| mbed_official | 133:d4dda5c437f0 | 530 | */ |
| mbed_official | 133:d4dda5c437f0 | 531 | |
| mbed_official | 133:d4dda5c437f0 | 532 | /** @defgroup SAI_Block_Companding_Mode |
| mbed_official | 133:d4dda5c437f0 | 533 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 534 | */ |
| mbed_official | 133:d4dda5c437f0 | 535 | #define SAI_NOCOMPANDING ((uint32_t)0x00000000) |
| mbed_official | 133:d4dda5c437f0 | 536 | #define SAI_ULAW_1CPL_COMPANDING ((uint32_t)0x00008000) |
| mbed_official | 133:d4dda5c437f0 | 537 | #define SAI_ALAW_1CPL_COMPANDING ((uint32_t)0x0000C000) |
| mbed_official | 133:d4dda5c437f0 | 538 | #define SAI_ULAW_2CPL_COMPANDING ((uint32_t)0x0000A000) |
| mbed_official | 133:d4dda5c437f0 | 539 | #define SAI_ALAW_2CPL_COMPANDING ((uint32_t)0x0000E000) |
| mbed_official | 133:d4dda5c437f0 | 540 | |
| mbed_official | 133:d4dda5c437f0 | 541 | #define IS_SAI_BLOCK_COMPANDING_MODE(MODE) (((MODE) == SAI_NOCOMPANDING) || \ |
| mbed_official | 133:d4dda5c437f0 | 542 | ((MODE) == SAI_ULAW_1CPL_COMPANDING) || \ |
| mbed_official | 133:d4dda5c437f0 | 543 | ((MODE) == SAI_ALAW_1CPL_COMPANDING) || \ |
| mbed_official | 133:d4dda5c437f0 | 544 | ((MODE) == SAI_ULAW_2CPL_COMPANDING) || \ |
| mbed_official | 133:d4dda5c437f0 | 545 | ((MODE) == SAI_ALAW_2CPL_COMPANDING)) |
| mbed_official | 133:d4dda5c437f0 | 546 | /** |
| mbed_official | 133:d4dda5c437f0 | 547 | * @} |
| mbed_official | 133:d4dda5c437f0 | 548 | */ |
| mbed_official | 133:d4dda5c437f0 | 549 | |
| mbed_official | 133:d4dda5c437f0 | 550 | /** @defgroup SAI_Block_Mute_Value |
| mbed_official | 133:d4dda5c437f0 | 551 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 552 | */ |
| mbed_official | 133:d4dda5c437f0 | 553 | #define SAI_ZERO_VALUE ((uint32_t)0x00000000) |
| mbed_official | 133:d4dda5c437f0 | 554 | #define SAI_LAST_SENT_VALUE ((uint32_t)SAI_xCR2_MUTEVAL) |
| mbed_official | 133:d4dda5c437f0 | 555 | |
| mbed_official | 133:d4dda5c437f0 | 556 | #define IS_SAI_BLOCK_MUTE_VALUE(VALUE) (((VALUE) == SAI_ZERO_VALUE) || \ |
| mbed_official | 133:d4dda5c437f0 | 557 | ((VALUE) == SAI_LAST_SENT_VALUE)) |
| mbed_official | 133:d4dda5c437f0 | 558 | /** |
| mbed_official | 133:d4dda5c437f0 | 559 | * @} |
| mbed_official | 133:d4dda5c437f0 | 560 | */ |
| mbed_official | 133:d4dda5c437f0 | 561 | |
| mbed_official | 133:d4dda5c437f0 | 562 | /** @defgroup SAI_Block_Mute_Frame_Counter |
| mbed_official | 133:d4dda5c437f0 | 563 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 564 | */ |
| mbed_official | 133:d4dda5c437f0 | 565 | #define IS_SAI_BLOCK_MUTE_COUNTER(COUNTER) ((COUNTER) <= 63) |
| mbed_official | 133:d4dda5c437f0 | 566 | /** |
| mbed_official | 133:d4dda5c437f0 | 567 | * @} |
| mbed_official | 133:d4dda5c437f0 | 568 | */ |
| mbed_official | 133:d4dda5c437f0 | 569 | |
| mbed_official | 133:d4dda5c437f0 | 570 | /** @defgroup SAI_Block_Interrupts_Definition |
| mbed_official | 133:d4dda5c437f0 | 571 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 572 | */ |
| mbed_official | 133:d4dda5c437f0 | 573 | #define SAI_IT_OVRUDR ((uint32_t)SAI_xIMR_OVRUDRIE) |
| mbed_official | 133:d4dda5c437f0 | 574 | #define SAI_IT_MUTEDET ((uint32_t)SAI_xIMR_MUTEDETIE) |
| mbed_official | 133:d4dda5c437f0 | 575 | #define SAI_IT_WCKCFG ((uint32_t)SAI_xIMR_WCKCFGIE) |
| mbed_official | 133:d4dda5c437f0 | 576 | #define SAI_IT_FREQ ((uint32_t)SAI_xIMR_FREQIE) |
| mbed_official | 133:d4dda5c437f0 | 577 | #define SAI_IT_CNRDY ((uint32_t)SAI_xIMR_CNRDYIE) |
| mbed_official | 133:d4dda5c437f0 | 578 | #define SAI_IT_AFSDET ((uint32_t)SAI_xIMR_AFSDETIE) |
| mbed_official | 133:d4dda5c437f0 | 579 | #define SAI_IT_LFSDET ((uint32_t)SAI_xIMR_LFSDETIE) |
| mbed_official | 133:d4dda5c437f0 | 580 | |
| mbed_official | 133:d4dda5c437f0 | 581 | #define IS_SAI_BLOCK_CONFIG_IT(IT) (((IT) == SAI_IT_OVRUDR) || \ |
| mbed_official | 133:d4dda5c437f0 | 582 | ((IT) == SAI_IT_MUTEDET) || \ |
| mbed_official | 133:d4dda5c437f0 | 583 | ((IT) == SAI_IT_WCKCFG) || \ |
| mbed_official | 133:d4dda5c437f0 | 584 | ((IT) == SAI_IT_FREQ) || \ |
| mbed_official | 133:d4dda5c437f0 | 585 | ((IT) == SAI_IT_CNRDY) || \ |
| mbed_official | 133:d4dda5c437f0 | 586 | ((IT) == SAI_IT_AFSDET) || \ |
| mbed_official | 133:d4dda5c437f0 | 587 | ((IT) == SAI_IT_LFSDET)) |
| mbed_official | 133:d4dda5c437f0 | 588 | /** |
| mbed_official | 133:d4dda5c437f0 | 589 | * @} |
| mbed_official | 133:d4dda5c437f0 | 590 | */ |
| mbed_official | 133:d4dda5c437f0 | 591 | |
| mbed_official | 133:d4dda5c437f0 | 592 | /** @defgroup SAI_Block_Flags_Definition |
| mbed_official | 133:d4dda5c437f0 | 593 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 594 | */ |
| mbed_official | 133:d4dda5c437f0 | 595 | #define SAI_FLAG_OVRUDR ((uint32_t)SAI_xSR_OVRUDR) |
| mbed_official | 133:d4dda5c437f0 | 596 | #define SAI_FLAG_MUTEDET ((uint32_t)SAI_xSR_MUTEDET) |
| mbed_official | 133:d4dda5c437f0 | 597 | #define SAI_FLAG_WCKCFG ((uint32_t)SAI_xSR_WCKCFG) |
| mbed_official | 133:d4dda5c437f0 | 598 | #define SAI_FLAG_FREQ ((uint32_t)SAI_xSR_FREQ) |
| mbed_official | 133:d4dda5c437f0 | 599 | #define SAI_FLAG_CNRDY ((uint32_t)SAI_xSR_CNRDY) |
| mbed_official | 133:d4dda5c437f0 | 600 | #define SAI_FLAG_AFSDET ((uint32_t)SAI_xSR_AFSDET) |
| mbed_official | 133:d4dda5c437f0 | 601 | #define SAI_FLAG_LFSDET ((uint32_t)SAI_xSR_LFSDET) |
| mbed_official | 133:d4dda5c437f0 | 602 | |
| mbed_official | 133:d4dda5c437f0 | 603 | #define IS_SAI_BLOCK_GET_FLAG(FLAG) (((FLAG) == SAI_FLAG_OVRUDR) || \ |
| mbed_official | 133:d4dda5c437f0 | 604 | ((FLAG) == SAI_FLAG_MUTEDET) || \ |
| mbed_official | 133:d4dda5c437f0 | 605 | ((FLAG) == SAI_FLAG_WCKCFG) || \ |
| mbed_official | 133:d4dda5c437f0 | 606 | ((FLAG) == SAI_FLAG_FREQ) || \ |
| mbed_official | 133:d4dda5c437f0 | 607 | ((FLAG) == SAI_FLAG_CNRDY) || \ |
| mbed_official | 133:d4dda5c437f0 | 608 | ((FLAG) == SAI_FLAG_AFSDET) || \ |
| mbed_official | 133:d4dda5c437f0 | 609 | ((FLAG) == SAI_FLAG_LFSDET)) |
| mbed_official | 133:d4dda5c437f0 | 610 | |
| mbed_official | 133:d4dda5c437f0 | 611 | #define IS_SAI_BLOCK_CLEAR_FLAG(FLAG) (((FLAG) == SAI_FLAG_OVRUDR) || \ |
| mbed_official | 133:d4dda5c437f0 | 612 | ((FLAG) == SAI_FLAG_MUTEDET) || \ |
| mbed_official | 133:d4dda5c437f0 | 613 | ((FLAG) == SAI_FLAG_WCKCFG) || \ |
| mbed_official | 133:d4dda5c437f0 | 614 | ((FLAG) == SAI_FLAG_FREQ) || \ |
| mbed_official | 133:d4dda5c437f0 | 615 | ((FLAG) == SAI_FLAG_CNRDY) || \ |
| mbed_official | 133:d4dda5c437f0 | 616 | ((FLAG) == SAI_FLAG_AFSDET) || \ |
| mbed_official | 133:d4dda5c437f0 | 617 | ((FLAG) == SAI_FLAG_LFSDET)) |
| mbed_official | 133:d4dda5c437f0 | 618 | /** |
| mbed_official | 133:d4dda5c437f0 | 619 | * @} |
| mbed_official | 133:d4dda5c437f0 | 620 | */ |
| mbed_official | 133:d4dda5c437f0 | 621 | |
| mbed_official | 133:d4dda5c437f0 | 622 | /** @defgroup SAI_Block_Fifo_Status_Level |
| mbed_official | 133:d4dda5c437f0 | 623 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 624 | */ |
| mbed_official | 133:d4dda5c437f0 | 625 | #define SAI_FIFOStatus_Empty ((uint32_t)0x00000000) |
| mbed_official | 133:d4dda5c437f0 | 626 | #define SAI_FIFOStatus_Less1QuarterFull ((uint32_t)0x00010000) |
| mbed_official | 133:d4dda5c437f0 | 627 | #define SAI_FIFOStatus_1QuarterFull ((uint32_t)0x00020000) |
| mbed_official | 133:d4dda5c437f0 | 628 | #define SAI_FIFOStatus_HalfFull ((uint32_t)0x00030000) |
| mbed_official | 133:d4dda5c437f0 | 629 | #define SAI_FIFOStatus_3QuartersFull ((uint32_t)0x00040000) |
| mbed_official | 133:d4dda5c437f0 | 630 | #define SAI_FIFOStatus_Full ((uint32_t)0x00050000) |
| mbed_official | 133:d4dda5c437f0 | 631 | |
| mbed_official | 133:d4dda5c437f0 | 632 | #define IS_SAI_BLOCK_FIFO_STATUS(STATUS) (((STATUS) == SAI_FIFOStatus_Less1QuarterFull ) || \ |
| mbed_official | 133:d4dda5c437f0 | 633 | ((STATUS) == SAI_FIFOStatus_HalfFull) || \ |
| mbed_official | 133:d4dda5c437f0 | 634 | ((STATUS) == SAI_FIFOStatus_1QuarterFull) || \ |
| mbed_official | 133:d4dda5c437f0 | 635 | ((STATUS) == SAI_FIFOStatus_3QuartersFull) || \ |
| mbed_official | 133:d4dda5c437f0 | 636 | ((STATUS) == SAI_FIFOStatus_Full) || \ |
| mbed_official | 133:d4dda5c437f0 | 637 | ((STATUS) == SAI_FIFOStatus_Empty)) |
| mbed_official | 133:d4dda5c437f0 | 638 | /** |
| mbed_official | 133:d4dda5c437f0 | 639 | * @} |
| mbed_official | 133:d4dda5c437f0 | 640 | */ |
| mbed_official | 133:d4dda5c437f0 | 641 | |
| mbed_official | 133:d4dda5c437f0 | 642 | |
| mbed_official | 133:d4dda5c437f0 | 643 | /** |
| mbed_official | 133:d4dda5c437f0 | 644 | * @} |
| mbed_official | 133:d4dda5c437f0 | 645 | */ |
| mbed_official | 133:d4dda5c437f0 | 646 | |
| mbed_official | 133:d4dda5c437f0 | 647 | /* Exported macro ------------------------------------------------------------*/ |
| mbed_official | 133:d4dda5c437f0 | 648 | |
| mbed_official | 133:d4dda5c437f0 | 649 | /** @brief Enable or disable the specified SAI interrupts. |
| mbed_official | 133:d4dda5c437f0 | 650 | * @param __HANDLE__: specifies the SAI Handle. |
| mbed_official | 133:d4dda5c437f0 | 651 | * @param __INTERRUPT__: specifies the interrupt source to enable or disable. |
| mbed_official | 133:d4dda5c437f0 | 652 | * This parameter can be one of the following values: |
| mbed_official | 133:d4dda5c437f0 | 653 | * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable |
| mbed_official | 133:d4dda5c437f0 | 654 | * @arg SAI_IT_MUTEDET: Mute detection interrupt enable |
| mbed_official | 133:d4dda5c437f0 | 655 | * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable |
| mbed_official | 133:d4dda5c437f0 | 656 | * @arg SAI_IT_FREQ: FIFO request interrupt enable |
| mbed_official | 133:d4dda5c437f0 | 657 | * @arg SAI_IT_CNRDY: Codec not ready interrupt enable |
| mbed_official | 133:d4dda5c437f0 | 658 | * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable |
| mbed_official | 133:d4dda5c437f0 | 659 | * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enabl |
| mbed_official | 133:d4dda5c437f0 | 660 | * @retval None |
| mbed_official | 133:d4dda5c437f0 | 661 | */ |
| mbed_official | 133:d4dda5c437f0 | 662 | |
| mbed_official | 133:d4dda5c437f0 | 663 | #define __HAL_SAI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR |= (__INTERRUPT__)) |
| mbed_official | 133:d4dda5c437f0 | 664 | #define __HAL_SAI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR &= (~(__INTERRUPT__))) |
| mbed_official | 133:d4dda5c437f0 | 665 | |
| mbed_official | 133:d4dda5c437f0 | 666 | /** @brief Check if the specified SAI interrupt source is enabled or disabled. |
| mbed_official | 133:d4dda5c437f0 | 667 | * @param __HANDLE__: specifies the SAI Handle. |
| mbed_official | 133:d4dda5c437f0 | 668 | * This parameter can be SAI where x: 1, 2, or 3 to select the SAI peripheral. |
| mbed_official | 133:d4dda5c437f0 | 669 | * @param __INTERRUPT__: specifies the SAI interrupt source to check. |
| mbed_official | 133:d4dda5c437f0 | 670 | * This parameter can be one of the following values: |
| mbed_official | 133:d4dda5c437f0 | 671 | * @arg SAI_IT_TXE: Tx buffer empty interrupt enable. |
| mbed_official | 133:d4dda5c437f0 | 672 | * @arg SAI_IT_RXNE: Rx buffer not empty interrupt enable. |
| mbed_official | 133:d4dda5c437f0 | 673 | * @arg SAI_IT_ERR: Error interrupt enable. |
| mbed_official | 133:d4dda5c437f0 | 674 | * @retval The new state of __INTERRUPT__ (TRUE or FALSE). |
| mbed_official | 133:d4dda5c437f0 | 675 | */ |
| mbed_official | 133:d4dda5c437f0 | 676 | #define __HAL_SAI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IMR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
| mbed_official | 133:d4dda5c437f0 | 677 | |
| mbed_official | 133:d4dda5c437f0 | 678 | /** @brief Check whether the specified SAI flag is set or not. |
| mbed_official | 133:d4dda5c437f0 | 679 | * @param __HANDLE__: specifies the SAI Handle. |
| mbed_official | 133:d4dda5c437f0 | 680 | * @param __FLAG__: specifies the flag to check. |
| mbed_official | 133:d4dda5c437f0 | 681 | * This parameter can be one of the following values: |
| mbed_official | 133:d4dda5c437f0 | 682 | * @arg SAI_FLAG_OVRUDR: Overrun underrun flag. |
| mbed_official | 133:d4dda5c437f0 | 683 | * @arg SAI_FLAG_MUTEDET: Mute detection flag. |
| mbed_official | 133:d4dda5c437f0 | 684 | * @arg SAI_FLAG_WCKCFG: Wrong Clock Configuration flag. |
| mbed_official | 133:d4dda5c437f0 | 685 | * @arg SAI_FLAG_FREQ: FIFO request flag. |
| mbed_official | 133:d4dda5c437f0 | 686 | * @arg SAI_FLAG_CNRDY: Codec not ready flag. |
| mbed_official | 133:d4dda5c437f0 | 687 | * @arg SAI_FLAG_AFSDET: Anticipated frame synchronization detection flag. |
| mbed_official | 133:d4dda5c437f0 | 688 | * @arg SAI_FLAG_LFSDET: Late frame synchronization detection flag. |
| mbed_official | 133:d4dda5c437f0 | 689 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| mbed_official | 133:d4dda5c437f0 | 690 | */ |
| mbed_official | 133:d4dda5c437f0 | 691 | #define __HAL_SAI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) |
| mbed_official | 133:d4dda5c437f0 | 692 | |
| mbed_official | 133:d4dda5c437f0 | 693 | /** @brief Clears the specified SAI pending flag. |
| mbed_official | 133:d4dda5c437f0 | 694 | * @param __HANDLE__: specifies the SAI Handle. |
| mbed_official | 133:d4dda5c437f0 | 695 | * @param __FLAG__: specifies the flag to check. |
| mbed_official | 133:d4dda5c437f0 | 696 | * This parameter can be any combination of the following values: |
| mbed_official | 133:d4dda5c437f0 | 697 | * @arg SAI_FLAG_OVRUDR: Clear Overrun underrun |
| mbed_official | 133:d4dda5c437f0 | 698 | * @arg SAI_FLAG_MUTEDET: Clear Mute detection |
| mbed_official | 133:d4dda5c437f0 | 699 | * @arg SAI_FLAG_WCKCFG: Clear Wrong Clock Configuration |
| mbed_official | 133:d4dda5c437f0 | 700 | * @arg SAI_FLAG_FREQ: Clear FIFO request |
| mbed_official | 133:d4dda5c437f0 | 701 | * @arg SAI_FLAG_CNRDY: Clear Codec not ready |
| mbed_official | 133:d4dda5c437f0 | 702 | * @arg SAI_FLAG_AFSDET: Clear Anticipated frame synchronization detection |
| mbed_official | 133:d4dda5c437f0 | 703 | * @arg SAI_FLAG_LFSDET: Clear Late frame synchronization detection |
| mbed_official | 133:d4dda5c437f0 | 704 | * |
| mbed_official | 133:d4dda5c437f0 | 705 | * @retval None |
| mbed_official | 133:d4dda5c437f0 | 706 | */ |
| mbed_official | 133:d4dda5c437f0 | 707 | #define __HAL_SAI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CLRFR |= (__FLAG__)) |
| mbed_official | 133:d4dda5c437f0 | 708 | |
| mbed_official | 133:d4dda5c437f0 | 709 | #define __HAL_SAI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SAI_xCR1_SAIEN) |
| mbed_official | 133:d4dda5c437f0 | 710 | #define __HAL_SAI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SAI_xCR1_SAIEN) |
| mbed_official | 133:d4dda5c437f0 | 711 | |
| mbed_official | 133:d4dda5c437f0 | 712 | /* Exported functions --------------------------------------------------------*/ |
| mbed_official | 133:d4dda5c437f0 | 713 | |
| mbed_official | 133:d4dda5c437f0 | 714 | /* Initialization/de-initialization functions **********************************/ |
| mbed_official | 133:d4dda5c437f0 | 715 | HAL_StatusTypeDef HAL_SAI_Init(SAI_HandleTypeDef *hsai); |
| mbed_official | 133:d4dda5c437f0 | 716 | HAL_StatusTypeDef HAL_SAI_DeInit (SAI_HandleTypeDef *hsai); |
| mbed_official | 133:d4dda5c437f0 | 717 | void HAL_SAI_MspInit(SAI_HandleTypeDef *hsai); |
| mbed_official | 133:d4dda5c437f0 | 718 | void HAL_SAI_MspDeInit(SAI_HandleTypeDef *hsai); |
| mbed_official | 133:d4dda5c437f0 | 719 | |
| mbed_official | 133:d4dda5c437f0 | 720 | /* I/O operation functions *****************************************************/ |
| mbed_official | 133:d4dda5c437f0 | 721 | /* Blocking mode: Polling */ |
| mbed_official | 133:d4dda5c437f0 | 722 | HAL_StatusTypeDef HAL_SAI_Transmit(SAI_HandleTypeDef *hsai, uint16_t *pData, uint16_t Size, uint32_t Timeout); |
| mbed_official | 133:d4dda5c437f0 | 723 | HAL_StatusTypeDef HAL_SAI_Receive(SAI_HandleTypeDef *hsai, uint16_t *pData, uint16_t Size, uint32_t Timeout); |
| mbed_official | 133:d4dda5c437f0 | 724 | |
| mbed_official | 133:d4dda5c437f0 | 725 | /* Non-Blocking mode: Interrupt */ |
| mbed_official | 133:d4dda5c437f0 | 726 | HAL_StatusTypeDef HAL_SAI_Transmit_IT(SAI_HandleTypeDef *hsai, uint16_t *pData, uint16_t Size); |
| mbed_official | 133:d4dda5c437f0 | 727 | HAL_StatusTypeDef HAL_SAI_Receive_IT(SAI_HandleTypeDef *hsai, uint16_t *pData, uint16_t Size); |
| mbed_official | 133:d4dda5c437f0 | 728 | |
| mbed_official | 133:d4dda5c437f0 | 729 | /* Non-Blocking mode: DMA */ |
| mbed_official | 133:d4dda5c437f0 | 730 | HAL_StatusTypeDef HAL_SAI_Transmit_DMA(SAI_HandleTypeDef *hsai, uint16_t *pData, uint16_t Size); |
| mbed_official | 133:d4dda5c437f0 | 731 | HAL_StatusTypeDef HAL_SAI_Receive_DMA(SAI_HandleTypeDef *hsai, uint16_t *pData, uint16_t Size); |
| mbed_official | 133:d4dda5c437f0 | 732 | HAL_StatusTypeDef HAL_SAI_DMAPause(SAI_HandleTypeDef *hsai); |
| mbed_official | 133:d4dda5c437f0 | 733 | HAL_StatusTypeDef HAL_SAI_DMAResume(SAI_HandleTypeDef *hsai); |
| mbed_official | 133:d4dda5c437f0 | 734 | HAL_StatusTypeDef HAL_SAI_DMAStop(SAI_HandleTypeDef *hsai); |
| mbed_official | 133:d4dda5c437f0 | 735 | |
| mbed_official | 133:d4dda5c437f0 | 736 | /* SAI IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ |
| mbed_official | 133:d4dda5c437f0 | 737 | void HAL_SAI_IRQHandler(SAI_HandleTypeDef *hsai); |
| mbed_official | 133:d4dda5c437f0 | 738 | void HAL_SAI_TxHalfCpltCallback(SAI_HandleTypeDef *hsai); |
| mbed_official | 133:d4dda5c437f0 | 739 | void HAL_SAI_TxCpltCallback(SAI_HandleTypeDef *hsai); |
| mbed_official | 133:d4dda5c437f0 | 740 | void HAL_SAI_RxHalfCpltCallback(SAI_HandleTypeDef *hsai); |
| mbed_official | 133:d4dda5c437f0 | 741 | void HAL_SAI_RxCpltCallback(SAI_HandleTypeDef *hsai); |
| mbed_official | 133:d4dda5c437f0 | 742 | void HAL_SAI_ErrorCallback(SAI_HandleTypeDef *hsai); |
| mbed_official | 133:d4dda5c437f0 | 743 | |
| mbed_official | 133:d4dda5c437f0 | 744 | /* Peripheral State functions **************************************************/ |
| mbed_official | 133:d4dda5c437f0 | 745 | HAL_SAI_StateTypeDef HAL_SAI_GetState(SAI_HandleTypeDef *hsai); |
| mbed_official | 133:d4dda5c437f0 | 746 | uint32_t HAL_SAI_GetError(SAI_HandleTypeDef *hsai); |
| mbed_official | 133:d4dda5c437f0 | 747 | |
| mbed_official | 133:d4dda5c437f0 | 748 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ |
| mbed_official | 133:d4dda5c437f0 | 749 | /** |
| mbed_official | 133:d4dda5c437f0 | 750 | * @} |
| mbed_official | 133:d4dda5c437f0 | 751 | */ |
| mbed_official | 133:d4dda5c437f0 | 752 | |
| mbed_official | 133:d4dda5c437f0 | 753 | /** |
| mbed_official | 133:d4dda5c437f0 | 754 | * @} |
| mbed_official | 133:d4dda5c437f0 | 755 | */ |
| mbed_official | 133:d4dda5c437f0 | 756 | |
| mbed_official | 133:d4dda5c437f0 | 757 | #ifdef __cplusplus |
| mbed_official | 133:d4dda5c437f0 | 758 | } |
| mbed_official | 133:d4dda5c437f0 | 759 | #endif |
| mbed_official | 133:d4dda5c437f0 | 760 | |
| mbed_official | 133:d4dda5c437f0 | 761 | #endif /* __STM32F4xx_HAL_SAI_H */ |
| mbed_official | 133:d4dda5c437f0 | 762 | |
| mbed_official | 133:d4dda5c437f0 | 763 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |