mbed library sources
Dependents: frdm_kl05z_gpio_test
Fork of mbed-src by
targets/cmsis/TARGET_STM/TARGET_DISCO_F407VG/stm32f4xx_hal_pwr_ex.c@133:d4dda5c437f0, 2014-03-24 (annotated)
- Committer:
- mbed_official
- Date:
- Mon Mar 24 17:45:07 2014 +0000
- Revision:
- 133:d4dda5c437f0
- Child:
- 242:7074e42da0b2
Synchronized with git revision 47b961246bed973fe4cb8932781ffc8025b78a61
Full URL: https://github.com/mbedmicro/mbed/commit/47b961246bed973fe4cb8932781ffc8025b78a61/
[STM32F4-Discovery (STM32F407VG)] initial port
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 133:d4dda5c437f0 | 1 | /** |
mbed_official | 133:d4dda5c437f0 | 2 | ****************************************************************************** |
mbed_official | 133:d4dda5c437f0 | 3 | * @file stm32f4xx_hal_pwr_ex.c |
mbed_official | 133:d4dda5c437f0 | 4 | * @author MCD Application Team |
mbed_official | 133:d4dda5c437f0 | 5 | * @version V1.0.0 |
mbed_official | 133:d4dda5c437f0 | 6 | * @date 18-February-2014 |
mbed_official | 133:d4dda5c437f0 | 7 | * @brief Extended PWR HAL module driver. |
mbed_official | 133:d4dda5c437f0 | 8 | * This file provides firmware functions to manage the following |
mbed_official | 133:d4dda5c437f0 | 9 | * functionalities of PWR extension peripheral: |
mbed_official | 133:d4dda5c437f0 | 10 | * + Peripheral Extended features functions |
mbed_official | 133:d4dda5c437f0 | 11 | * |
mbed_official | 133:d4dda5c437f0 | 12 | ****************************************************************************** |
mbed_official | 133:d4dda5c437f0 | 13 | * @attention |
mbed_official | 133:d4dda5c437f0 | 14 | * |
mbed_official | 133:d4dda5c437f0 | 15 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
mbed_official | 133:d4dda5c437f0 | 16 | * |
mbed_official | 133:d4dda5c437f0 | 17 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 133:d4dda5c437f0 | 18 | * are permitted provided that the following conditions are met: |
mbed_official | 133:d4dda5c437f0 | 19 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 133:d4dda5c437f0 | 20 | * this list of conditions and the following disclaimer. |
mbed_official | 133:d4dda5c437f0 | 21 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 133:d4dda5c437f0 | 22 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 133:d4dda5c437f0 | 23 | * and/or other materials provided with the distribution. |
mbed_official | 133:d4dda5c437f0 | 24 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 133:d4dda5c437f0 | 25 | * may be used to endorse or promote products derived from this software |
mbed_official | 133:d4dda5c437f0 | 26 | * without specific prior written permission. |
mbed_official | 133:d4dda5c437f0 | 27 | * |
mbed_official | 133:d4dda5c437f0 | 28 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 133:d4dda5c437f0 | 29 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 133:d4dda5c437f0 | 30 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 133:d4dda5c437f0 | 31 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 133:d4dda5c437f0 | 32 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 133:d4dda5c437f0 | 33 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 133:d4dda5c437f0 | 34 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 133:d4dda5c437f0 | 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 133:d4dda5c437f0 | 36 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 133:d4dda5c437f0 | 37 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 133:d4dda5c437f0 | 38 | * |
mbed_official | 133:d4dda5c437f0 | 39 | ****************************************************************************** |
mbed_official | 133:d4dda5c437f0 | 40 | */ |
mbed_official | 133:d4dda5c437f0 | 41 | |
mbed_official | 133:d4dda5c437f0 | 42 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 43 | #include "stm32f4xx_hal.h" |
mbed_official | 133:d4dda5c437f0 | 44 | |
mbed_official | 133:d4dda5c437f0 | 45 | /** @addtogroup STM32F4xx_HAL_Driver |
mbed_official | 133:d4dda5c437f0 | 46 | * @{ |
mbed_official | 133:d4dda5c437f0 | 47 | */ |
mbed_official | 133:d4dda5c437f0 | 48 | |
mbed_official | 133:d4dda5c437f0 | 49 | /** @defgroup PWREx |
mbed_official | 133:d4dda5c437f0 | 50 | * @brief PWR HAL module driver |
mbed_official | 133:d4dda5c437f0 | 51 | * @{ |
mbed_official | 133:d4dda5c437f0 | 52 | */ |
mbed_official | 133:d4dda5c437f0 | 53 | |
mbed_official | 133:d4dda5c437f0 | 54 | #ifdef HAL_PWR_MODULE_ENABLED |
mbed_official | 133:d4dda5c437f0 | 55 | |
mbed_official | 133:d4dda5c437f0 | 56 | /* Private typedef -----------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 57 | /* Private define ------------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 58 | #define PWR_OVERDRIVE_TIMEOUT_VALUE 1000 |
mbed_official | 133:d4dda5c437f0 | 59 | #define PWR_BKPREG_TIMEOUT_VALUE 1000 |
mbed_official | 133:d4dda5c437f0 | 60 | /* Private macro -------------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 61 | /* Private variables ---------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 62 | /* Private function prototypes -----------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 63 | /* Private functions ---------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 64 | |
mbed_official | 133:d4dda5c437f0 | 65 | /** @defgroup PWREx_Private_Functions |
mbed_official | 133:d4dda5c437f0 | 66 | * @{ |
mbed_official | 133:d4dda5c437f0 | 67 | */ |
mbed_official | 133:d4dda5c437f0 | 68 | |
mbed_official | 133:d4dda5c437f0 | 69 | /** @defgroup PWREx_Group1 Peripheral Extended features functions |
mbed_official | 133:d4dda5c437f0 | 70 | * @brief Peripheral Extended features functions |
mbed_official | 133:d4dda5c437f0 | 71 | * |
mbed_official | 133:d4dda5c437f0 | 72 | @verbatim |
mbed_official | 133:d4dda5c437f0 | 73 | |
mbed_official | 133:d4dda5c437f0 | 74 | =============================================================================== |
mbed_official | 133:d4dda5c437f0 | 75 | ##### Peripheral extended features functions ##### |
mbed_official | 133:d4dda5c437f0 | 76 | =============================================================================== |
mbed_official | 133:d4dda5c437f0 | 77 | |
mbed_official | 133:d4dda5c437f0 | 78 | *** Main and Backup Regulators configuration *** |
mbed_official | 133:d4dda5c437f0 | 79 | ================================================ |
mbed_official | 133:d4dda5c437f0 | 80 | [..] |
mbed_official | 133:d4dda5c437f0 | 81 | (+) The backup domain includes 4 Kbytes of backup SRAM accessible only from |
mbed_official | 133:d4dda5c437f0 | 82 | the CPU, and address in 32-bit, 16-bit or 8-bit mode. Its content is |
mbed_official | 133:d4dda5c437f0 | 83 | retained even in Standby or VBAT mode when the low power backup regulator |
mbed_official | 133:d4dda5c437f0 | 84 | is enabled. It can be considered as an internal EEPROM when VBAT is |
mbed_official | 133:d4dda5c437f0 | 85 | always present. You can use the HAL_PWR_EnableBkUpReg() function to |
mbed_official | 133:d4dda5c437f0 | 86 | enable the low power backup regulator. |
mbed_official | 133:d4dda5c437f0 | 87 | |
mbed_official | 133:d4dda5c437f0 | 88 | (+) When the backup domain is supplied by VDD (analog switch connected to VDD) |
mbed_official | 133:d4dda5c437f0 | 89 | the backup SRAM is powered from VDD which replaces the VBAT power supply to |
mbed_official | 133:d4dda5c437f0 | 90 | save battery life. |
mbed_official | 133:d4dda5c437f0 | 91 | |
mbed_official | 133:d4dda5c437f0 | 92 | (+) The backup SRAM is not mass erased by a tamper event. It is read |
mbed_official | 133:d4dda5c437f0 | 93 | protected to prevent confidential data, such as cryptographic private |
mbed_official | 133:d4dda5c437f0 | 94 | key, from being accessed. The backup SRAM can be erased only through |
mbed_official | 133:d4dda5c437f0 | 95 | the Flash interface when a protection level change from level 1 to |
mbed_official | 133:d4dda5c437f0 | 96 | level 0 is requested. |
mbed_official | 133:d4dda5c437f0 | 97 | -@- Refer to the description of Read protection (RDP) in the Flash |
mbed_official | 133:d4dda5c437f0 | 98 | programming manual. |
mbed_official | 133:d4dda5c437f0 | 99 | |
mbed_official | 133:d4dda5c437f0 | 100 | (+) The main internal regulator can be configured to have a tradeoff between |
mbed_official | 133:d4dda5c437f0 | 101 | performance and power consumption when the device does not operate at |
mbed_official | 133:d4dda5c437f0 | 102 | the maximum frequency. This is done through __HAL_PWR_MAINREGULATORMODE_CONFIG() |
mbed_official | 133:d4dda5c437f0 | 103 | macro which configure VOS bit in PWR_CR register |
mbed_official | 133:d4dda5c437f0 | 104 | |
mbed_official | 133:d4dda5c437f0 | 105 | Refer to the product datasheets for more details. |
mbed_official | 133:d4dda5c437f0 | 106 | |
mbed_official | 133:d4dda5c437f0 | 107 | *** FLASH Power Down configuration **** |
mbed_official | 133:d4dda5c437f0 | 108 | ======================================= |
mbed_official | 133:d4dda5c437f0 | 109 | [..] |
mbed_official | 133:d4dda5c437f0 | 110 | (+) By setting the FPDS bit in the PWR_CR register by using the |
mbed_official | 133:d4dda5c437f0 | 111 | HAL_PWR_EnableFlashPowerDown() function, the Flash memory also enters power |
mbed_official | 133:d4dda5c437f0 | 112 | down mode when the device enters Stop mode. When the Flash memory |
mbed_official | 133:d4dda5c437f0 | 113 | is in power down mode, an additional startup delay is incurred when |
mbed_official | 133:d4dda5c437f0 | 114 | waking up from Stop mode. |
mbed_official | 133:d4dda5c437f0 | 115 | |
mbed_official | 133:d4dda5c437f0 | 116 | (+) For STM32F42xxx/43xxx Devices, the scale can be modified only when the PLL |
mbed_official | 133:d4dda5c437f0 | 117 | is OFF and the HSI or HSE clock source is selected as system clock. |
mbed_official | 133:d4dda5c437f0 | 118 | The new value programmed is active only when the PLL is ON. |
mbed_official | 133:d4dda5c437f0 | 119 | When the PLL is OFF, the voltage scale 3 is automatically selected. |
mbed_official | 133:d4dda5c437f0 | 120 | Refer to the datasheets for more details. |
mbed_official | 133:d4dda5c437f0 | 121 | |
mbed_official | 133:d4dda5c437f0 | 122 | *** Over-Drive and Under-Drive configuration **** |
mbed_official | 133:d4dda5c437f0 | 123 | ================================================= |
mbed_official | 133:d4dda5c437f0 | 124 | [..] |
mbed_official | 133:d4dda5c437f0 | 125 | (+) For STM32F42xxx/43xxx Devices, in Run mode: the main regulator has |
mbed_official | 133:d4dda5c437f0 | 126 | 2 operating modes available: |
mbed_official | 133:d4dda5c437f0 | 127 | (++) Normal mode: The CPU and core logic operate at maximum frequency at a given |
mbed_official | 133:d4dda5c437f0 | 128 | voltage scaling (scale 1, scale 2 or scale 3) |
mbed_official | 133:d4dda5c437f0 | 129 | (++) Over-drive mode: This mode allows the CPU and the core logic to operate at a |
mbed_official | 133:d4dda5c437f0 | 130 | higher frequency than the normal mode for a given voltage scaling (scale 1, |
mbed_official | 133:d4dda5c437f0 | 131 | scale 2 or scale 3). This mode is enabled through HAL_PWREx_EnableOverDrive() function and |
mbed_official | 133:d4dda5c437f0 | 132 | disabled by HAL_PWREx_DisableOverDrive() function, to enter or exit from Over-drive mode please follow |
mbed_official | 133:d4dda5c437f0 | 133 | the sequence described in Reference manual. |
mbed_official | 133:d4dda5c437f0 | 134 | |
mbed_official | 133:d4dda5c437f0 | 135 | (+) For STM32F42xxx/43xxx Devices, in Stop mode: the main regulator or low power regulator |
mbed_official | 133:d4dda5c437f0 | 136 | supplies a low power voltage to the 1.2V domain, thus preserving the content of registers |
mbed_official | 133:d4dda5c437f0 | 137 | and internal SRAM. 2 operating modes are available: |
mbed_official | 133:d4dda5c437f0 | 138 | (++) Normal mode: the 1.2V domain is preserved in nominal leakage mode. This mode is only |
mbed_official | 133:d4dda5c437f0 | 139 | available when the main regulator or the low power regulator is used in Scale 3 or |
mbed_official | 133:d4dda5c437f0 | 140 | low voltage mode. |
mbed_official | 133:d4dda5c437f0 | 141 | (++) Under-drive mode: the 1.2V domain is preserved in reduced leakage mode. This mode is only |
mbed_official | 133:d4dda5c437f0 | 142 | available when the main regulator or the low power regulator is in low voltage mode. |
mbed_official | 133:d4dda5c437f0 | 143 | |
mbed_official | 133:d4dda5c437f0 | 144 | @endverbatim |
mbed_official | 133:d4dda5c437f0 | 145 | * @{ |
mbed_official | 133:d4dda5c437f0 | 146 | */ |
mbed_official | 133:d4dda5c437f0 | 147 | |
mbed_official | 133:d4dda5c437f0 | 148 | /** |
mbed_official | 133:d4dda5c437f0 | 149 | * @brief Enables the Backup Regulator. |
mbed_official | 133:d4dda5c437f0 | 150 | * @param None |
mbed_official | 133:d4dda5c437f0 | 151 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 152 | */ |
mbed_official | 133:d4dda5c437f0 | 153 | HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg(void) |
mbed_official | 133:d4dda5c437f0 | 154 | { |
mbed_official | 133:d4dda5c437f0 | 155 | uint32_t timeout = 0; |
mbed_official | 133:d4dda5c437f0 | 156 | |
mbed_official | 133:d4dda5c437f0 | 157 | *(__IO uint32_t *) CSR_BRE_BB = (uint32_t)ENABLE; |
mbed_official | 133:d4dda5c437f0 | 158 | |
mbed_official | 133:d4dda5c437f0 | 159 | /* Get timeout */ |
mbed_official | 133:d4dda5c437f0 | 160 | timeout = HAL_GetTick() + PWR_BKPREG_TIMEOUT_VALUE; |
mbed_official | 133:d4dda5c437f0 | 161 | /* Wait till Backup regulator ready flag is set */ |
mbed_official | 133:d4dda5c437f0 | 162 | while(__HAL_PWR_GET_FLAG(PWR_FLAG_BRR) == RESET) |
mbed_official | 133:d4dda5c437f0 | 163 | { |
mbed_official | 133:d4dda5c437f0 | 164 | if(HAL_GetTick() >= timeout) |
mbed_official | 133:d4dda5c437f0 | 165 | { |
mbed_official | 133:d4dda5c437f0 | 166 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 167 | } |
mbed_official | 133:d4dda5c437f0 | 168 | } |
mbed_official | 133:d4dda5c437f0 | 169 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 170 | } |
mbed_official | 133:d4dda5c437f0 | 171 | |
mbed_official | 133:d4dda5c437f0 | 172 | /** |
mbed_official | 133:d4dda5c437f0 | 173 | * @brief Disables the Backup Regulator. |
mbed_official | 133:d4dda5c437f0 | 174 | * @param None |
mbed_official | 133:d4dda5c437f0 | 175 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 176 | */ |
mbed_official | 133:d4dda5c437f0 | 177 | HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void) |
mbed_official | 133:d4dda5c437f0 | 178 | { |
mbed_official | 133:d4dda5c437f0 | 179 | uint32_t timeout = 0; |
mbed_official | 133:d4dda5c437f0 | 180 | |
mbed_official | 133:d4dda5c437f0 | 181 | *(__IO uint32_t *) CSR_BRE_BB = (uint32_t)DISABLE; |
mbed_official | 133:d4dda5c437f0 | 182 | |
mbed_official | 133:d4dda5c437f0 | 183 | /* Get timeout */ |
mbed_official | 133:d4dda5c437f0 | 184 | timeout = HAL_GetTick() + PWR_BKPREG_TIMEOUT_VALUE; |
mbed_official | 133:d4dda5c437f0 | 185 | /* Wait till Backup regulator ready flag is set */ |
mbed_official | 133:d4dda5c437f0 | 186 | while(__HAL_PWR_GET_FLAG(PWR_FLAG_BRR) != RESET) |
mbed_official | 133:d4dda5c437f0 | 187 | { |
mbed_official | 133:d4dda5c437f0 | 188 | if(HAL_GetTick() >= timeout) |
mbed_official | 133:d4dda5c437f0 | 189 | { |
mbed_official | 133:d4dda5c437f0 | 190 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 191 | } |
mbed_official | 133:d4dda5c437f0 | 192 | } |
mbed_official | 133:d4dda5c437f0 | 193 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 194 | } |
mbed_official | 133:d4dda5c437f0 | 195 | |
mbed_official | 133:d4dda5c437f0 | 196 | /** |
mbed_official | 133:d4dda5c437f0 | 197 | * @brief Enables the Flash Power Down in Stop mode. |
mbed_official | 133:d4dda5c437f0 | 198 | * @param None |
mbed_official | 133:d4dda5c437f0 | 199 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 200 | */ |
mbed_official | 133:d4dda5c437f0 | 201 | void HAL_PWREx_EnableFlashPowerDown(void) |
mbed_official | 133:d4dda5c437f0 | 202 | { |
mbed_official | 133:d4dda5c437f0 | 203 | *(__IO uint32_t *) CR_FPDS_BB = (uint32_t)ENABLE; |
mbed_official | 133:d4dda5c437f0 | 204 | } |
mbed_official | 133:d4dda5c437f0 | 205 | |
mbed_official | 133:d4dda5c437f0 | 206 | /** |
mbed_official | 133:d4dda5c437f0 | 207 | * @brief Disables the Flash Power Down in Stop mode. |
mbed_official | 133:d4dda5c437f0 | 208 | * @param None |
mbed_official | 133:d4dda5c437f0 | 209 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 210 | */ |
mbed_official | 133:d4dda5c437f0 | 211 | void HAL_PWREx_DisableFlashPowerDown(void) |
mbed_official | 133:d4dda5c437f0 | 212 | { |
mbed_official | 133:d4dda5c437f0 | 213 | *(__IO uint32_t *) CR_FPDS_BB = (uint32_t)DISABLE; |
mbed_official | 133:d4dda5c437f0 | 214 | } |
mbed_official | 133:d4dda5c437f0 | 215 | |
mbed_official | 133:d4dda5c437f0 | 216 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) |
mbed_official | 133:d4dda5c437f0 | 217 | /** |
mbed_official | 133:d4dda5c437f0 | 218 | * @brief Activates the Over-Drive mode. |
mbed_official | 133:d4dda5c437f0 | 219 | * @note These macros can be used only for STM32F42xx/STM32F43xx devices. |
mbed_official | 133:d4dda5c437f0 | 220 | * This mode allows the CPU and the core logic to operate at a higher frequency |
mbed_official | 133:d4dda5c437f0 | 221 | * than the normal mode for a given voltage scaling (scale 1, scale 2 or scale 3). |
mbed_official | 133:d4dda5c437f0 | 222 | * @note It is recommended to enter or exit Over-drive mode when the application is not running |
mbed_official | 133:d4dda5c437f0 | 223 | * critical tasks and when the system clock source is either HSI or HSE. |
mbed_official | 133:d4dda5c437f0 | 224 | * During the Over-drive switch activation, no peripheral clocks should be enabled. |
mbed_official | 133:d4dda5c437f0 | 225 | * The peripheral clocks must be enabled once the Over-drive mode is activated. |
mbed_official | 133:d4dda5c437f0 | 226 | * @param None |
mbed_official | 133:d4dda5c437f0 | 227 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 228 | */ |
mbed_official | 133:d4dda5c437f0 | 229 | HAL_StatusTypeDef HAL_PWREx_ActivateOverDrive(void) |
mbed_official | 133:d4dda5c437f0 | 230 | { |
mbed_official | 133:d4dda5c437f0 | 231 | uint32_t timeout = 0; |
mbed_official | 133:d4dda5c437f0 | 232 | |
mbed_official | 133:d4dda5c437f0 | 233 | __PWR_CLK_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 234 | |
mbed_official | 133:d4dda5c437f0 | 235 | /* Enable the Over-drive to extend the clock frequency to 180 Mhz */ |
mbed_official | 133:d4dda5c437f0 | 236 | __HAL_PWR_OVERDRIVE_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 237 | |
mbed_official | 133:d4dda5c437f0 | 238 | /* Get timeout */ |
mbed_official | 133:d4dda5c437f0 | 239 | timeout = HAL_GetTick() + PWR_OVERDRIVE_TIMEOUT_VALUE; |
mbed_official | 133:d4dda5c437f0 | 240 | while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODRDY)) |
mbed_official | 133:d4dda5c437f0 | 241 | { |
mbed_official | 133:d4dda5c437f0 | 242 | if(HAL_GetTick() >= timeout) |
mbed_official | 133:d4dda5c437f0 | 243 | { |
mbed_official | 133:d4dda5c437f0 | 244 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 245 | } |
mbed_official | 133:d4dda5c437f0 | 246 | } |
mbed_official | 133:d4dda5c437f0 | 247 | |
mbed_official | 133:d4dda5c437f0 | 248 | /* Enable the Over-drive switch */ |
mbed_official | 133:d4dda5c437f0 | 249 | __HAL_PWR_OVERDRIVESWITCHING_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 250 | |
mbed_official | 133:d4dda5c437f0 | 251 | /* Get timeout */ |
mbed_official | 133:d4dda5c437f0 | 252 | timeout = HAL_GetTick() + PWR_OVERDRIVE_TIMEOUT_VALUE; |
mbed_official | 133:d4dda5c437f0 | 253 | while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODSWRDY)) |
mbed_official | 133:d4dda5c437f0 | 254 | { |
mbed_official | 133:d4dda5c437f0 | 255 | if(HAL_GetTick() >= timeout) |
mbed_official | 133:d4dda5c437f0 | 256 | { |
mbed_official | 133:d4dda5c437f0 | 257 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 258 | } |
mbed_official | 133:d4dda5c437f0 | 259 | } |
mbed_official | 133:d4dda5c437f0 | 260 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 261 | } |
mbed_official | 133:d4dda5c437f0 | 262 | |
mbed_official | 133:d4dda5c437f0 | 263 | /** |
mbed_official | 133:d4dda5c437f0 | 264 | * @brief Deactivates the Over-Drive mode. |
mbed_official | 133:d4dda5c437f0 | 265 | * @note These macros can be used only for STM32F42xx/STM32F43xx devices. |
mbed_official | 133:d4dda5c437f0 | 266 | * This mode allows the CPU and the core logic to operate at a higher frequency |
mbed_official | 133:d4dda5c437f0 | 267 | * than the normal mode for a given voltage scaling (scale 1, scale 2 or scale 3). |
mbed_official | 133:d4dda5c437f0 | 268 | * @note It is recommended to enter or exit Over-drive mode when the application is not running |
mbed_official | 133:d4dda5c437f0 | 269 | * critical tasks and when the system clock source is either HSI or HSE. |
mbed_official | 133:d4dda5c437f0 | 270 | * During the Over-drive switch activation, no peripheral clocks should be enabled. |
mbed_official | 133:d4dda5c437f0 | 271 | * The peripheral clocks must be enabled once the Over-drive mode is activated. |
mbed_official | 133:d4dda5c437f0 | 272 | * @param None |
mbed_official | 133:d4dda5c437f0 | 273 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 274 | */ |
mbed_official | 133:d4dda5c437f0 | 275 | HAL_StatusTypeDef HAL_PWREx_DeactivateOverDrive(void) |
mbed_official | 133:d4dda5c437f0 | 276 | { |
mbed_official | 133:d4dda5c437f0 | 277 | uint32_t timeout = 0; |
mbed_official | 133:d4dda5c437f0 | 278 | |
mbed_official | 133:d4dda5c437f0 | 279 | __PWR_CLK_ENABLE(); |
mbed_official | 133:d4dda5c437f0 | 280 | |
mbed_official | 133:d4dda5c437f0 | 281 | /* Disable the Over-drive switch */ |
mbed_official | 133:d4dda5c437f0 | 282 | __HAL_PWR_OVERDRIVESWITCHING_DISABLE(); |
mbed_official | 133:d4dda5c437f0 | 283 | |
mbed_official | 133:d4dda5c437f0 | 284 | /* Get timeout */ |
mbed_official | 133:d4dda5c437f0 | 285 | timeout = HAL_GetTick() + PWR_OVERDRIVE_TIMEOUT_VALUE; |
mbed_official | 133:d4dda5c437f0 | 286 | |
mbed_official | 133:d4dda5c437f0 | 287 | while(__HAL_PWR_GET_FLAG(PWR_FLAG_ODSWRDY)) |
mbed_official | 133:d4dda5c437f0 | 288 | { |
mbed_official | 133:d4dda5c437f0 | 289 | if(HAL_GetTick() >= timeout) |
mbed_official | 133:d4dda5c437f0 | 290 | { |
mbed_official | 133:d4dda5c437f0 | 291 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 292 | } |
mbed_official | 133:d4dda5c437f0 | 293 | } |
mbed_official | 133:d4dda5c437f0 | 294 | |
mbed_official | 133:d4dda5c437f0 | 295 | /* Disable the Over-drive */ |
mbed_official | 133:d4dda5c437f0 | 296 | __HAL_PWR_OVERDRIVE_DISABLE(); |
mbed_official | 133:d4dda5c437f0 | 297 | |
mbed_official | 133:d4dda5c437f0 | 298 | /* Get timeout */ |
mbed_official | 133:d4dda5c437f0 | 299 | timeout = HAL_GetTick() + PWR_OVERDRIVE_TIMEOUT_VALUE; |
mbed_official | 133:d4dda5c437f0 | 300 | |
mbed_official | 133:d4dda5c437f0 | 301 | while(__HAL_PWR_GET_FLAG(PWR_FLAG_ODRDY)) |
mbed_official | 133:d4dda5c437f0 | 302 | { |
mbed_official | 133:d4dda5c437f0 | 303 | if(HAL_GetTick() >= timeout) |
mbed_official | 133:d4dda5c437f0 | 304 | { |
mbed_official | 133:d4dda5c437f0 | 305 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 306 | } |
mbed_official | 133:d4dda5c437f0 | 307 | } |
mbed_official | 133:d4dda5c437f0 | 308 | |
mbed_official | 133:d4dda5c437f0 | 309 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 310 | } |
mbed_official | 133:d4dda5c437f0 | 311 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ |
mbed_official | 133:d4dda5c437f0 | 312 | /** |
mbed_official | 133:d4dda5c437f0 | 313 | * @} |
mbed_official | 133:d4dda5c437f0 | 314 | */ |
mbed_official | 133:d4dda5c437f0 | 315 | |
mbed_official | 133:d4dda5c437f0 | 316 | /** |
mbed_official | 133:d4dda5c437f0 | 317 | * @} |
mbed_official | 133:d4dda5c437f0 | 318 | */ |
mbed_official | 133:d4dda5c437f0 | 319 | |
mbed_official | 133:d4dda5c437f0 | 320 | #endif /* HAL_PWR_MODULE_ENABLED */ |
mbed_official | 133:d4dda5c437f0 | 321 | /** |
mbed_official | 133:d4dda5c437f0 | 322 | * @} |
mbed_official | 133:d4dda5c437f0 | 323 | */ |
mbed_official | 133:d4dda5c437f0 | 324 | |
mbed_official | 133:d4dda5c437f0 | 325 | /** |
mbed_official | 133:d4dda5c437f0 | 326 | * @} |
mbed_official | 133:d4dda5c437f0 | 327 | */ |
mbed_official | 133:d4dda5c437f0 | 328 | |
mbed_official | 133:d4dda5c437f0 | 329 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |