shao ziyang / mbed-src-kl05

mbed library sources

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targets/cmsis/TARGET_STM/TARGET_DISCO_F407VG/stm32f4xx_hal_hash.c@133:d4dda5c437f0, 2014-03-24 (annotated)

Committer:
mbed_official
Date:
Mon Mar 24 17:45:07 2014 +0000
Revision:
133:d4dda5c437f0
Child:
242:7074e42da0b2
Synchronized with git revision 47b961246bed973fe4cb8932781ffc8025b78a61



Full URL: https://github.com/mbedmicro/mbed/commit/47b961246bed973fe4cb8932781ffc8025b78a61/



[STM32F4-Discovery (STM32F407VG)] initial port

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 133:d4dda5c437f0 1 /**
mbed_official 133:d4dda5c437f0 2 ******************************************************************************
mbed_official 133:d4dda5c437f0 3 * @file stm32f4xx_hal_hash.c
mbed_official 133:d4dda5c437f0 4 * @author MCD Application Team
mbed_official 133:d4dda5c437f0 5 * @version V1.0.0
mbed_official 133:d4dda5c437f0 6 * @date 18-February-2014
mbed_official 133:d4dda5c437f0 7 * @brief HASH HAL module driver.
mbed_official 133:d4dda5c437f0 8 * This file provides firmware functions to manage the following
mbed_official 133:d4dda5c437f0 9 * functionalities of the HASH peripheral:
mbed_official 133:d4dda5c437f0 10 * + Initialization and de-initialization functions
mbed_official 133:d4dda5c437f0 11 * + HASH/HMAC Processing functions by algorithm using polling mode
mbed_official 133:d4dda5c437f0 12 * + HASH/HMAC functions by algorithm using interrupt mode
mbed_official 133:d4dda5c437f0 13 * + HASH/HMAC functions by algorithm using DMA mode
mbed_official 133:d4dda5c437f0 14 * + Peripheral State functions
mbed_official 133:d4dda5c437f0 15 *
mbed_official 133:d4dda5c437f0 16 @verbatim
mbed_official 133:d4dda5c437f0 17 ==============================================================================
mbed_official 133:d4dda5c437f0 18 ##### How to use this driver #####
mbed_official 133:d4dda5c437f0 19 ==============================================================================
mbed_official 133:d4dda5c437f0 20 [..]
mbed_official 133:d4dda5c437f0 21 The HASH HAL driver can be used as follows:
mbed_official 133:d4dda5c437f0 22 (#)Initialize the HASH low level resources by implementing the HAL_HASH_MspInit():
mbed_official 133:d4dda5c437f0 23 (##) Enable the HASH interface clock using __HASH_CLK_ENABLE()
mbed_official 133:d4dda5c437f0 24 (##) In case of using processing APIs based on interrupts (e.g. HAL_HMAC_SHA1_Start_IT())
mbed_official 133:d4dda5c437f0 25 (+++) Configure the HASH interrupt priority using HAL_NVIC_SetPriority()
mbed_official 133:d4dda5c437f0 26 (+++) Enable the HASH IRQ handler using HAL_NVIC_EnableIRQ()
mbed_official 133:d4dda5c437f0 27 (+++) In HASH IRQ handler, call HAL_HASH_IRQHandler()
mbed_official 133:d4dda5c437f0 28 (##) In case of using DMA to control data transfer (e.g. HAL_HMAC_SHA1_Start_DMA())
mbed_official 133:d4dda5c437f0 29 (+++) Enable the DMAx interface clock using __DMAx_CLK_ENABLE()
mbed_official 133:d4dda5c437f0 30 (+++) Configure and enable one DMA stream one for managing data transfer from
mbed_official 133:d4dda5c437f0 31 memory to peripheral (input stream). Managing data transfer from
mbed_official 133:d4dda5c437f0 32 peripheral to memory can be performed only using CPU
mbed_official 133:d4dda5c437f0 33 (+++) Associate the initialized DMA handle to the HASH DMA handle
mbed_official 133:d4dda5c437f0 34 using __HAL_LINKDMA()
mbed_official 133:d4dda5c437f0 35 (+++) Configure the priority and enable the NVIC for the transfer complete
mbed_official 133:d4dda5c437f0 36 interrupt on the DMA Stream using HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ()
mbed_official 133:d4dda5c437f0 37 (#)Initialize the HASH HAL using HAL_HASH_Init(). This function configures mainly:
mbed_official 133:d4dda5c437f0 38 (##) The data type: 1-bit, 8-bit, 16-bit and 32-bit.
mbed_official 133:d4dda5c437f0 39 (##) For HMAC, the encryption key.
mbed_official 133:d4dda5c437f0 40 (##) For HMAC, the key size used for encryption.
mbed_official 133:d4dda5c437f0 41 (#)Three processing functions are available:
mbed_official 133:d4dda5c437f0 42 (##) Polling mode: processing APIs are blocking functions
mbed_official 133:d4dda5c437f0 43 i.e. they process the data and wait till the digest computation is finished
mbed_official 133:d4dda5c437f0 44 e.g. HAL_HASH_SHA1_Start()
mbed_official 133:d4dda5c437f0 45 (##) Interrupt mode: encryption and decryption APIs are not blocking functions
mbed_official 133:d4dda5c437f0 46 i.e. they process the data under interrupt
mbed_official 133:d4dda5c437f0 47 e.g. HAL_HASH_SHA1_Start_IT()
mbed_official 133:d4dda5c437f0 48 (##) DMA mode: processing APIs are not blocking functions and the CPU is
mbed_official 133:d4dda5c437f0 49 not used for data transfer i.e. the data transfer is ensured by DMA
mbed_official 133:d4dda5c437f0 50 e.g. HAL_HASH_SHA1_Start_DMA()
mbed_official 133:d4dda5c437f0 51 (#)When the processing function is called at first time after HAL_HASH_Init()
mbed_official 133:d4dda5c437f0 52 the HASH peripheral is initialized and processes the buffer in input.
mbed_official 133:d4dda5c437f0 53 After that, the digest computation is started.
mbed_official 133:d4dda5c437f0 54 When processing multi-buffer use the accumulate function to write the
mbed_official 133:d4dda5c437f0 55 data in the peripheral without starting the digest computation. In last
mbed_official 133:d4dda5c437f0 56 buffer use the start function to input the last buffer ans start the digest
mbed_official 133:d4dda5c437f0 57 computation.
mbed_official 133:d4dda5c437f0 58 (##) e.g. HAL_HASH_SHA1_Accumulate() : write 1st data buffer in the peripheral without starting the digest computation
mbed_official 133:d4dda5c437f0 59 (##) write (n-1)th data buffer in the peripheral without starting the digest computation
mbed_official 133:d4dda5c437f0 60 (##) HAL_HASH_SHA1_Start() : write (n)th data buffer in the peripheral and start the digest computation
mbed_official 133:d4dda5c437f0 61 (#)In HMAC mode, there is no Accumulate API. Only Start API is available.
mbed_official 133:d4dda5c437f0 62 (#)In case of using DMA, call the DMA start processing e.g. HAL_HASH_SHA1_Start_DMA().
mbed_official 133:d4dda5c437f0 63 After that, call the finish function in order to get the digest value
mbed_official 133:d4dda5c437f0 64 e.g. HAL_HASH_SHA1_Finish()
mbed_official 133:d4dda5c437f0 65 (#)Call HAL_HASH_DeInit() to deinitialize the HASH peripheral.
mbed_official 133:d4dda5c437f0 66
mbed_official 133:d4dda5c437f0 67 @endverbatim
mbed_official 133:d4dda5c437f0 68 ******************************************************************************
mbed_official 133:d4dda5c437f0 69 * @attention
mbed_official 133:d4dda5c437f0 70 *
mbed_official 133:d4dda5c437f0 71 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 133:d4dda5c437f0 72 *
mbed_official 133:d4dda5c437f0 73 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 133:d4dda5c437f0 74 * are permitted provided that the following conditions are met:
mbed_official 133:d4dda5c437f0 75 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 133:d4dda5c437f0 76 * this list of conditions and the following disclaimer.
mbed_official 133:d4dda5c437f0 77 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 133:d4dda5c437f0 78 * this list of conditions and the following disclaimer in the documentation
mbed_official 133:d4dda5c437f0 79 * and/or other materials provided with the distribution.
mbed_official 133:d4dda5c437f0 80 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 133:d4dda5c437f0 81 * may be used to endorse or promote products derived from this software
mbed_official 133:d4dda5c437f0 82 * without specific prior written permission.
mbed_official 133:d4dda5c437f0 83 *
mbed_official 133:d4dda5c437f0 84 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 133:d4dda5c437f0 85 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 133:d4dda5c437f0 86 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 133:d4dda5c437f0 87 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 133:d4dda5c437f0 88 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 133:d4dda5c437f0 89 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 133:d4dda5c437f0 90 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 133:d4dda5c437f0 91 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 133:d4dda5c437f0 92 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 133:d4dda5c437f0 93 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 133:d4dda5c437f0 94 *
mbed_official 133:d4dda5c437f0 95 ******************************************************************************
mbed_official 133:d4dda5c437f0 96 */
mbed_official 133:d4dda5c437f0 97
mbed_official 133:d4dda5c437f0 98 /* Includes ------------------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 99 #include "stm32f4xx_hal.h"
mbed_official 133:d4dda5c437f0 100
mbed_official 133:d4dda5c437f0 101 /** @addtogroup STM32F4xx_HAL_Driver
mbed_official 133:d4dda5c437f0 102 * @{
mbed_official 133:d4dda5c437f0 103 */
mbed_official 133:d4dda5c437f0 104
mbed_official 133:d4dda5c437f0 105 /** @defgroup HASH
mbed_official 133:d4dda5c437f0 106 * @brief HASH HAL module driver.
mbed_official 133:d4dda5c437f0 107 * @{
mbed_official 133:d4dda5c437f0 108 */
mbed_official 133:d4dda5c437f0 109
mbed_official 133:d4dda5c437f0 110 #ifdef HAL_HASH_MODULE_ENABLED
mbed_official 133:d4dda5c437f0 111
mbed_official 133:d4dda5c437f0 112 #if defined(STM32F415xx) || defined(STM32F417xx) || defined(STM32F437xx) || defined(STM32F439xx)
mbed_official 133:d4dda5c437f0 113
mbed_official 133:d4dda5c437f0 114 /* Private typedef -----------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 115 /* Private define ------------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 116 /* Private macro -------------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 117 /* Private variables ---------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 118 /* Private function prototypes -----------------------------------------------*/
mbed_official 133:d4dda5c437f0 119 static void HASH_DMAXferCplt(DMA_HandleTypeDef *hdma);
mbed_official 133:d4dda5c437f0 120 static void HASH_DMAError(DMA_HandleTypeDef *hdma);
mbed_official 133:d4dda5c437f0 121 static void HASH_GetDigest(uint8_t *pMsgDigest, uint8_t Size);
mbed_official 133:d4dda5c437f0 122 static void HASH_WriteData(uint8_t *pInBuffer, uint32_t Size);
mbed_official 133:d4dda5c437f0 123
mbed_official 133:d4dda5c437f0 124 /* Private functions ---------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 125
mbed_official 133:d4dda5c437f0 126 /** @defgroup HASH_Private_Functions
mbed_official 133:d4dda5c437f0 127 * @{
mbed_official 133:d4dda5c437f0 128 */
mbed_official 133:d4dda5c437f0 129
mbed_official 133:d4dda5c437f0 130 /** @defgroup HASH_Group1 Initialization and de-initialization functions
mbed_official 133:d4dda5c437f0 131 * @brief Initialization and Configuration functions.
mbed_official 133:d4dda5c437f0 132 *
mbed_official 133:d4dda5c437f0 133 @verbatim
mbed_official 133:d4dda5c437f0 134 ===============================================================================
mbed_official 133:d4dda5c437f0 135 ##### Initialization and de-initialization functions #####
mbed_official 133:d4dda5c437f0 136 ===============================================================================
mbed_official 133:d4dda5c437f0 137 [..] This section provides functions allowing to:
mbed_official 133:d4dda5c437f0 138 (+) Initialize the HASH according to the specified parameters
mbed_official 133:d4dda5c437f0 139 in the HASH_InitTypeDef and creates the associated handle.
mbed_official 133:d4dda5c437f0 140 (+) DeInitialize the HASH peripheral.
mbed_official 133:d4dda5c437f0 141 (+) Initialize the HASH MSP.
mbed_official 133:d4dda5c437f0 142 (+) DeInitialize HASH MSP.
mbed_official 133:d4dda5c437f0 143
mbed_official 133:d4dda5c437f0 144 @endverbatim
mbed_official 133:d4dda5c437f0 145 * @{
mbed_official 133:d4dda5c437f0 146 */
mbed_official 133:d4dda5c437f0 147
mbed_official 133:d4dda5c437f0 148 /**
mbed_official 133:d4dda5c437f0 149 * @brief Initializes the HASH according to the specified parameters in the
mbed_official 133:d4dda5c437f0 150 HASH_HandleTypeDef and creates the associated handle.
mbed_official 133:d4dda5c437f0 151 * @param hhash: HASH handle
mbed_official 133:d4dda5c437f0 152 * @retval HAL status
mbed_official 133:d4dda5c437f0 153 */
mbed_official 133:d4dda5c437f0 154 HAL_StatusTypeDef HAL_HASH_Init(HASH_HandleTypeDef *hhash)
mbed_official 133:d4dda5c437f0 155 {
mbed_official 133:d4dda5c437f0 156 /* Check the hash handle allocation */
mbed_official 133:d4dda5c437f0 157 if(hhash == NULL)
mbed_official 133:d4dda5c437f0 158 {
mbed_official 133:d4dda5c437f0 159 return HAL_ERROR;
mbed_official 133:d4dda5c437f0 160 }
mbed_official 133:d4dda5c437f0 161
mbed_official 133:d4dda5c437f0 162 /* Check the parameters */
mbed_official 133:d4dda5c437f0 163 assert_param(IS_HASH_DATATYPE(hhash->Init.DataType));
mbed_official 133:d4dda5c437f0 164
mbed_official 133:d4dda5c437f0 165 if(hhash->State == HAL_HASH_STATE_RESET)
mbed_official 133:d4dda5c437f0 166 {
mbed_official 133:d4dda5c437f0 167 /* Init the low level hardware */
mbed_official 133:d4dda5c437f0 168 HAL_HASH_MspInit(hhash);
mbed_official 133:d4dda5c437f0 169 }
mbed_official 133:d4dda5c437f0 170
mbed_official 133:d4dda5c437f0 171 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 172 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 173
mbed_official 133:d4dda5c437f0 174 /* Reset HashInCount, HashBuffSize and HashITCounter */
mbed_official 133:d4dda5c437f0 175 hhash->HashInCount = 0;
mbed_official 133:d4dda5c437f0 176 hhash->HashBuffSize = 0;
mbed_official 133:d4dda5c437f0 177 hhash->HashITCounter = 0;
mbed_official 133:d4dda5c437f0 178
mbed_official 133:d4dda5c437f0 179 /* Set the data type */
mbed_official 133:d4dda5c437f0 180 HASH->CR |= (uint32_t) (hhash->Init.DataType);
mbed_official 133:d4dda5c437f0 181
mbed_official 133:d4dda5c437f0 182 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 183 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 184
mbed_official 133:d4dda5c437f0 185 /* Set the default HASH phase */
mbed_official 133:d4dda5c437f0 186 hhash->Phase = HAL_HASH_PHASE_READY;
mbed_official 133:d4dda5c437f0 187
mbed_official 133:d4dda5c437f0 188 /* Return function status */
mbed_official 133:d4dda5c437f0 189 return HAL_OK;
mbed_official 133:d4dda5c437f0 190 }
mbed_official 133:d4dda5c437f0 191
mbed_official 133:d4dda5c437f0 192 /**
mbed_official 133:d4dda5c437f0 193 * @brief DeInitializes the HASH peripheral.
mbed_official 133:d4dda5c437f0 194 * @note This API must be called before starting a new processing.
mbed_official 133:d4dda5c437f0 195 * @param hhash: HASH handle
mbed_official 133:d4dda5c437f0 196 * @retval HAL status
mbed_official 133:d4dda5c437f0 197 */
mbed_official 133:d4dda5c437f0 198 HAL_StatusTypeDef HAL_HASH_DeInit(HASH_HandleTypeDef *hhash)
mbed_official 133:d4dda5c437f0 199 {
mbed_official 133:d4dda5c437f0 200 /* Check the HASH handle allocation */
mbed_official 133:d4dda5c437f0 201 if(hhash == NULL)
mbed_official 133:d4dda5c437f0 202 {
mbed_official 133:d4dda5c437f0 203 return HAL_ERROR;
mbed_official 133:d4dda5c437f0 204 }
mbed_official 133:d4dda5c437f0 205
mbed_official 133:d4dda5c437f0 206 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 207 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 208
mbed_official 133:d4dda5c437f0 209 /* Set the default HASH phase */
mbed_official 133:d4dda5c437f0 210 hhash->Phase = HAL_HASH_PHASE_READY;
mbed_official 133:d4dda5c437f0 211
mbed_official 133:d4dda5c437f0 212 /* Reset HashInCount, HashBuffSize and HashITCounter */
mbed_official 133:d4dda5c437f0 213 hhash->HashInCount = 0;
mbed_official 133:d4dda5c437f0 214 hhash->HashBuffSize = 0;
mbed_official 133:d4dda5c437f0 215 hhash->HashITCounter = 0;
mbed_official 133:d4dda5c437f0 216
mbed_official 133:d4dda5c437f0 217 /* DeInit the low level hardware */
mbed_official 133:d4dda5c437f0 218 HAL_HASH_MspDeInit(hhash);
mbed_official 133:d4dda5c437f0 219
mbed_official 133:d4dda5c437f0 220 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 221 hhash->State = HAL_HASH_STATE_RESET;
mbed_official 133:d4dda5c437f0 222
mbed_official 133:d4dda5c437f0 223 /* Release Lock */
mbed_official 133:d4dda5c437f0 224 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 225
mbed_official 133:d4dda5c437f0 226 /* Return function status */
mbed_official 133:d4dda5c437f0 227 return HAL_OK;
mbed_official 133:d4dda5c437f0 228 }
mbed_official 133:d4dda5c437f0 229
mbed_official 133:d4dda5c437f0 230 /**
mbed_official 133:d4dda5c437f0 231 * @brief Initializes the HASH MSP.
mbed_official 133:d4dda5c437f0 232 * @param hhash: HASH handle
mbed_official 133:d4dda5c437f0 233 * @retval None
mbed_official 133:d4dda5c437f0 234 */
mbed_official 133:d4dda5c437f0 235 __weak void HAL_HASH_MspInit(HASH_HandleTypeDef *hhash)
mbed_official 133:d4dda5c437f0 236 {
mbed_official 133:d4dda5c437f0 237 /* NOTE: This function Should not be modified, when the callback is needed,
mbed_official 133:d4dda5c437f0 238 the HAL_HASH_MspInit could be implemented in the user file
mbed_official 133:d4dda5c437f0 239 */
mbed_official 133:d4dda5c437f0 240 }
mbed_official 133:d4dda5c437f0 241
mbed_official 133:d4dda5c437f0 242 /**
mbed_official 133:d4dda5c437f0 243 * @brief DeInitializes HASH MSP.
mbed_official 133:d4dda5c437f0 244 * @param hhash: HASH handle
mbed_official 133:d4dda5c437f0 245 * @retval None
mbed_official 133:d4dda5c437f0 246 */
mbed_official 133:d4dda5c437f0 247 __weak void HAL_HASH_MspDeInit(HASH_HandleTypeDef *hhash)
mbed_official 133:d4dda5c437f0 248 {
mbed_official 133:d4dda5c437f0 249 /* NOTE: This function Should not be modified, when the callback is needed,
mbed_official 133:d4dda5c437f0 250 the HAL_HASH_MspDeInit could be implemented in the user file
mbed_official 133:d4dda5c437f0 251 */
mbed_official 133:d4dda5c437f0 252 }
mbed_official 133:d4dda5c437f0 253
mbed_official 133:d4dda5c437f0 254 /**
mbed_official 133:d4dda5c437f0 255 * @brief Input data transfer complete callback.
mbed_official 133:d4dda5c437f0 256 * @param hhash: HASH handle
mbed_official 133:d4dda5c437f0 257 * @retval None
mbed_official 133:d4dda5c437f0 258 */
mbed_official 133:d4dda5c437f0 259 __weak void HAL_HASH_InCpltCallback(HASH_HandleTypeDef *hhash)
mbed_official 133:d4dda5c437f0 260 {
mbed_official 133:d4dda5c437f0 261 /* NOTE: This function Should not be modified, when the callback is needed,
mbed_official 133:d4dda5c437f0 262 the HAL_HASH_InCpltCallback could be implemented in the user file
mbed_official 133:d4dda5c437f0 263 */
mbed_official 133:d4dda5c437f0 264 }
mbed_official 133:d4dda5c437f0 265
mbed_official 133:d4dda5c437f0 266 /**
mbed_official 133:d4dda5c437f0 267 * @brief Data transfer Error callback.
mbed_official 133:d4dda5c437f0 268 * @param hhash: HASH handle
mbed_official 133:d4dda5c437f0 269 * @retval None
mbed_official 133:d4dda5c437f0 270 */
mbed_official 133:d4dda5c437f0 271 __weak void HAL_HASH_ErrorCallback(HASH_HandleTypeDef *hhash)
mbed_official 133:d4dda5c437f0 272 {
mbed_official 133:d4dda5c437f0 273 /* NOTE: This function Should not be modified, when the callback is needed,
mbed_official 133:d4dda5c437f0 274 the HAL_HASH_ErrorCallback could be implemented in the user file
mbed_official 133:d4dda5c437f0 275 */
mbed_official 133:d4dda5c437f0 276 }
mbed_official 133:d4dda5c437f0 277
mbed_official 133:d4dda5c437f0 278 /**
mbed_official 133:d4dda5c437f0 279 * @brief Digest computation complete callback. It is used only with interrupt.
mbed_official 133:d4dda5c437f0 280 * @note This callback is not relevant with DMA.
mbed_official 133:d4dda5c437f0 281 * @param hhash: HASH handle
mbed_official 133:d4dda5c437f0 282 * @retval None
mbed_official 133:d4dda5c437f0 283 */
mbed_official 133:d4dda5c437f0 284 __weak void HAL_HASH_DgstCpltCallback(HASH_HandleTypeDef *hhash)
mbed_official 133:d4dda5c437f0 285 {
mbed_official 133:d4dda5c437f0 286 /* NOTE: This function Should not be modified, when the callback is needed,
mbed_official 133:d4dda5c437f0 287 the HAL_HASH_DgstCpltCallback could be implemented in the user file
mbed_official 133:d4dda5c437f0 288 */
mbed_official 133:d4dda5c437f0 289 }
mbed_official 133:d4dda5c437f0 290
mbed_official 133:d4dda5c437f0 291 /**
mbed_official 133:d4dda5c437f0 292 * @}
mbed_official 133:d4dda5c437f0 293 */
mbed_official 133:d4dda5c437f0 294
mbed_official 133:d4dda5c437f0 295 /** @defgroup HASH_Group2 HASH processing functions using polling mode
mbed_official 133:d4dda5c437f0 296 * @brief processing functions using polling mode
mbed_official 133:d4dda5c437f0 297 *
mbed_official 133:d4dda5c437f0 298 @verbatim
mbed_official 133:d4dda5c437f0 299 ===============================================================================
mbed_official 133:d4dda5c437f0 300 ##### HASH processing using polling mode functions#####
mbed_official 133:d4dda5c437f0 301 ===============================================================================
mbed_official 133:d4dda5c437f0 302 [..] This section provides functions allowing to calculate in polling mode
mbed_official 133:d4dda5c437f0 303 the hash value using one of the following algorithms:
mbed_official 133:d4dda5c437f0 304 (+) MD5
mbed_official 133:d4dda5c437f0 305 (+) SHA1
mbed_official 133:d4dda5c437f0 306
mbed_official 133:d4dda5c437f0 307 @endverbatim
mbed_official 133:d4dda5c437f0 308 * @{
mbed_official 133:d4dda5c437f0 309 */
mbed_official 133:d4dda5c437f0 310
mbed_official 133:d4dda5c437f0 311 /**
mbed_official 133:d4dda5c437f0 312 * @brief Initializes the HASH peripheral in MD5 mode then processes pInBuffer.
mbed_official 133:d4dda5c437f0 313 The digest is available in pOutBuffer.
mbed_official 133:d4dda5c437f0 314 * @param hhash: HASH handle
mbed_official 133:d4dda5c437f0 315 * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
mbed_official 133:d4dda5c437f0 316 * @param pOutBuffer: Pointer to the Output buffer (hashed buffer).
mbed_official 133:d4dda5c437f0 317 * @param Size: Length of the input buffer in bytes.
mbed_official 133:d4dda5c437f0 318 * If the Size is multiple of 64 bytes, appending the input buffer is possible.
mbed_official 133:d4dda5c437f0 319 * If the Size is not multiple of 64 bytes, the padding is managed by hardware
mbed_official 133:d4dda5c437f0 320 * and appending the input buffer is no more possible.
mbed_official 133:d4dda5c437f0 321 * @param pOutBuffer: Pointer to the computed digest. Its size must be 16 bytes.
mbed_official 133:d4dda5c437f0 322 * @param Timeout: Timeout value
mbed_official 133:d4dda5c437f0 323 * @retval HAL status
mbed_official 133:d4dda5c437f0 324 */
mbed_official 133:d4dda5c437f0 325 HAL_StatusTypeDef HAL_HASH_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout)
mbed_official 133:d4dda5c437f0 326 {
mbed_official 133:d4dda5c437f0 327 uint32_t timeout = 0;
mbed_official 133:d4dda5c437f0 328
mbed_official 133:d4dda5c437f0 329 /* Process Locked */
mbed_official 133:d4dda5c437f0 330 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 331
mbed_official 133:d4dda5c437f0 332 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 333 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 334
mbed_official 133:d4dda5c437f0 335 /* Check if initialization phase has already been performed */
mbed_official 133:d4dda5c437f0 336 if(hhash->Phase == HAL_HASH_PHASE_READY)
mbed_official 133:d4dda5c437f0 337 {
mbed_official 133:d4dda5c437f0 338 /* Select the MD5 mode and reset the HASH processor core, so that the HASH will be ready to compute
mbed_official 133:d4dda5c437f0 339 the message digest of a new message */
mbed_official 133:d4dda5c437f0 340 HASH->CR |= HASH_AlgoSelection_MD5 | HASH_CR_INIT;
mbed_official 133:d4dda5c437f0 341 }
mbed_official 133:d4dda5c437f0 342
mbed_official 133:d4dda5c437f0 343 /* Set the phase */
mbed_official 133:d4dda5c437f0 344 hhash->Phase = HAL_HASH_PHASE_PROCESS;
mbed_official 133:d4dda5c437f0 345
mbed_official 133:d4dda5c437f0 346 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 347 __HAL_HASH_SET_NBVALIDBITS(Size);
mbed_official 133:d4dda5c437f0 348
mbed_official 133:d4dda5c437f0 349 /* Write input buffer in data register */
mbed_official 133:d4dda5c437f0 350 HASH_WriteData(pInBuffer, Size);
mbed_official 133:d4dda5c437f0 351
mbed_official 133:d4dda5c437f0 352 /* Start the digest calculation */
mbed_official 133:d4dda5c437f0 353 __HAL_HASH_START_DIGEST();
mbed_official 133:d4dda5c437f0 354
mbed_official 133:d4dda5c437f0 355 /* Get timeout */
mbed_official 133:d4dda5c437f0 356 timeout = HAL_GetTick() + Timeout;
mbed_official 133:d4dda5c437f0 357
mbed_official 133:d4dda5c437f0 358 while(HAL_IS_BIT_SET(HASH->SR, HASH_FLAG_BUSY))
mbed_official 133:d4dda5c437f0 359 {
mbed_official 133:d4dda5c437f0 360 /* Check for the Timeout */
mbed_official 133:d4dda5c437f0 361 if(Timeout != HAL_MAX_DELAY)
mbed_official 133:d4dda5c437f0 362 {
mbed_official 133:d4dda5c437f0 363 if(HAL_GetTick() >= timeout)
mbed_official 133:d4dda5c437f0 364 {
mbed_official 133:d4dda5c437f0 365 /* Change state */
mbed_official 133:d4dda5c437f0 366 hhash->State = HAL_HASH_STATE_TIMEOUT;
mbed_official 133:d4dda5c437f0 367
mbed_official 133:d4dda5c437f0 368 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 369 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 370
mbed_official 133:d4dda5c437f0 371 return HAL_TIMEOUT;
mbed_official 133:d4dda5c437f0 372 }
mbed_official 133:d4dda5c437f0 373 }
mbed_official 133:d4dda5c437f0 374 }
mbed_official 133:d4dda5c437f0 375
mbed_official 133:d4dda5c437f0 376 /* Read the message digest */
mbed_official 133:d4dda5c437f0 377 HASH_GetDigest(pOutBuffer, 16);
mbed_official 133:d4dda5c437f0 378
mbed_official 133:d4dda5c437f0 379 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 380 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 381
mbed_official 133:d4dda5c437f0 382 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 383 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 384
mbed_official 133:d4dda5c437f0 385 /* Return function status */
mbed_official 133:d4dda5c437f0 386 return HAL_OK;
mbed_official 133:d4dda5c437f0 387 }
mbed_official 133:d4dda5c437f0 388
mbed_official 133:d4dda5c437f0 389 /**
mbed_official 133:d4dda5c437f0 390 * @brief Initializes the HASH peripheral in MD5 mode then writes the pInBuffer.
mbed_official 133:d4dda5c437f0 391 * @param hhash: HASH handle
mbed_official 133:d4dda5c437f0 392 * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
mbed_official 133:d4dda5c437f0 393 * @param Size: Length of the input buffer in bytes.
mbed_official 133:d4dda5c437f0 394 * If the Size is multiple of 64 bytes, appending the input buffer is possible.
mbed_official 133:d4dda5c437f0 395 * If the Size is not multiple of 64 bytes, the padding is managed by hardware
mbed_official 133:d4dda5c437f0 396 * and appending the input buffer is no more possible.
mbed_official 133:d4dda5c437f0 397 * @retval HAL status
mbed_official 133:d4dda5c437f0 398 */
mbed_official 133:d4dda5c437f0 399 HAL_StatusTypeDef HAL_HASH_MD5_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
mbed_official 133:d4dda5c437f0 400 {
mbed_official 133:d4dda5c437f0 401 /* Process Locked */
mbed_official 133:d4dda5c437f0 402 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 403
mbed_official 133:d4dda5c437f0 404 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 405 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 406
mbed_official 133:d4dda5c437f0 407 /* Check if initialization phase has already been performed */
mbed_official 133:d4dda5c437f0 408 if(hhash->Phase == HAL_HASH_PHASE_READY)
mbed_official 133:d4dda5c437f0 409 {
mbed_official 133:d4dda5c437f0 410 /* Select the MD5 mode and reset the HASH processor core, so that the HASH will be ready to compute
mbed_official 133:d4dda5c437f0 411 the message digest of a new message */
mbed_official 133:d4dda5c437f0 412 HASH->CR |= HASH_AlgoSelection_MD5 | HASH_CR_INIT;
mbed_official 133:d4dda5c437f0 413 }
mbed_official 133:d4dda5c437f0 414
mbed_official 133:d4dda5c437f0 415 /* Set the phase */
mbed_official 133:d4dda5c437f0 416 hhash->Phase = HAL_HASH_PHASE_PROCESS;
mbed_official 133:d4dda5c437f0 417
mbed_official 133:d4dda5c437f0 418 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 419 __HAL_HASH_SET_NBVALIDBITS(Size);
mbed_official 133:d4dda5c437f0 420
mbed_official 133:d4dda5c437f0 421 /* Write input buffer in data register */
mbed_official 133:d4dda5c437f0 422 HASH_WriteData(pInBuffer, Size);
mbed_official 133:d4dda5c437f0 423
mbed_official 133:d4dda5c437f0 424 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 425 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 426
mbed_official 133:d4dda5c437f0 427 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 428 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 429
mbed_official 133:d4dda5c437f0 430 /* Return function status */
mbed_official 133:d4dda5c437f0 431 return HAL_OK;
mbed_official 133:d4dda5c437f0 432 }
mbed_official 133:d4dda5c437f0 433
mbed_official 133:d4dda5c437f0 434 /**
mbed_official 133:d4dda5c437f0 435 * @brief Initializes the HASH peripheral in SHA1 mode then processes pInBuffer.
mbed_official 133:d4dda5c437f0 436 The digest is available in pOutBuffer.
mbed_official 133:d4dda5c437f0 437 * @param hhash: HASH handle
mbed_official 133:d4dda5c437f0 438 * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
mbed_official 133:d4dda5c437f0 439 * @param pOutBuffer: Pointer to the Output buffer (hashed buffer).
mbed_official 133:d4dda5c437f0 440 * @param Size: Length of the input buffer in bytes.
mbed_official 133:d4dda5c437f0 441 * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
mbed_official 133:d4dda5c437f0 442 * @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
mbed_official 133:d4dda5c437f0 443 * @param Timeout: Timeout value
mbed_official 133:d4dda5c437f0 444 * @retval HAL status
mbed_official 133:d4dda5c437f0 445 */
mbed_official 133:d4dda5c437f0 446 HAL_StatusTypeDef HAL_HASH_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout)
mbed_official 133:d4dda5c437f0 447 {
mbed_official 133:d4dda5c437f0 448 uint32_t timeout = 0;
mbed_official 133:d4dda5c437f0 449
mbed_official 133:d4dda5c437f0 450 /* Process Locked */
mbed_official 133:d4dda5c437f0 451 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 452
mbed_official 133:d4dda5c437f0 453 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 454 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 455
mbed_official 133:d4dda5c437f0 456 /* Check if initialization phase has already been performed */
mbed_official 133:d4dda5c437f0 457 if(hhash->Phase == HAL_HASH_PHASE_READY)
mbed_official 133:d4dda5c437f0 458 {
mbed_official 133:d4dda5c437f0 459 /* Select the SHA1 mode and reset the HASH processor core, so that the HASH will be ready to compute
mbed_official 133:d4dda5c437f0 460 the message digest of a new message */
mbed_official 133:d4dda5c437f0 461 HASH->CR |= HASH_AlgoSelection_SHA1 | HASH_CR_INIT;
mbed_official 133:d4dda5c437f0 462 }
mbed_official 133:d4dda5c437f0 463
mbed_official 133:d4dda5c437f0 464 /* Set the phase */
mbed_official 133:d4dda5c437f0 465 hhash->Phase = HAL_HASH_PHASE_PROCESS;
mbed_official 133:d4dda5c437f0 466
mbed_official 133:d4dda5c437f0 467 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 468 __HAL_HASH_SET_NBVALIDBITS(Size);
mbed_official 133:d4dda5c437f0 469
mbed_official 133:d4dda5c437f0 470 /* Write input buffer in data register */
mbed_official 133:d4dda5c437f0 471 HASH_WriteData(pInBuffer, Size);
mbed_official 133:d4dda5c437f0 472
mbed_official 133:d4dda5c437f0 473 /* Start the digest calculation */
mbed_official 133:d4dda5c437f0 474 __HAL_HASH_START_DIGEST();
mbed_official 133:d4dda5c437f0 475
mbed_official 133:d4dda5c437f0 476 /* Get timeout */
mbed_official 133:d4dda5c437f0 477 timeout = HAL_GetTick() + Timeout;
mbed_official 133:d4dda5c437f0 478
mbed_official 133:d4dda5c437f0 479 while(HAL_IS_BIT_SET(HASH->SR, HASH_FLAG_BUSY))
mbed_official 133:d4dda5c437f0 480 {
mbed_official 133:d4dda5c437f0 481 /* Check for the Timeout */
mbed_official 133:d4dda5c437f0 482 if(Timeout != HAL_MAX_DELAY)
mbed_official 133:d4dda5c437f0 483 {
mbed_official 133:d4dda5c437f0 484 if(HAL_GetTick() >= timeout)
mbed_official 133:d4dda5c437f0 485 {
mbed_official 133:d4dda5c437f0 486 /* Change state */
mbed_official 133:d4dda5c437f0 487 hhash->State = HAL_HASH_STATE_TIMEOUT;
mbed_official 133:d4dda5c437f0 488
mbed_official 133:d4dda5c437f0 489 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 490 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 491
mbed_official 133:d4dda5c437f0 492 return HAL_TIMEOUT;
mbed_official 133:d4dda5c437f0 493 }
mbed_official 133:d4dda5c437f0 494 }
mbed_official 133:d4dda5c437f0 495 }
mbed_official 133:d4dda5c437f0 496
mbed_official 133:d4dda5c437f0 497 /* Read the message digest */
mbed_official 133:d4dda5c437f0 498 HASH_GetDigest(pOutBuffer, 20);
mbed_official 133:d4dda5c437f0 499
mbed_official 133:d4dda5c437f0 500 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 501 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 502
mbed_official 133:d4dda5c437f0 503 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 504 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 505
mbed_official 133:d4dda5c437f0 506 /* Return function status */
mbed_official 133:d4dda5c437f0 507 return HAL_OK;
mbed_official 133:d4dda5c437f0 508 }
mbed_official 133:d4dda5c437f0 509
mbed_official 133:d4dda5c437f0 510 /**
mbed_official 133:d4dda5c437f0 511 * @brief Initializes the HASH peripheral in SHA1 mode then processes pInBuffer.
mbed_official 133:d4dda5c437f0 512 The digest is available in pOutBuffer.
mbed_official 133:d4dda5c437f0 513 * @param hhash: HASH handle
mbed_official 133:d4dda5c437f0 514 * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
mbed_official 133:d4dda5c437f0 515 * @param Size: Length of the input buffer in bytes.
mbed_official 133:d4dda5c437f0 516 * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
mbed_official 133:d4dda5c437f0 517 * @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
mbed_official 133:d4dda5c437f0 518 * @retval HAL status
mbed_official 133:d4dda5c437f0 519 */
mbed_official 133:d4dda5c437f0 520 HAL_StatusTypeDef HAL_HASH_SHA1_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
mbed_official 133:d4dda5c437f0 521 {
mbed_official 133:d4dda5c437f0 522 /* Process Locked */
mbed_official 133:d4dda5c437f0 523 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 524
mbed_official 133:d4dda5c437f0 525 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 526 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 527
mbed_official 133:d4dda5c437f0 528 /* Check if initialization phase has already been performed */
mbed_official 133:d4dda5c437f0 529 if(hhash->Phase == HAL_HASH_PHASE_READY)
mbed_official 133:d4dda5c437f0 530 {
mbed_official 133:d4dda5c437f0 531 /* Select the SHA1 mode and reset the HASH processor core, so that the HASH will be ready to compute
mbed_official 133:d4dda5c437f0 532 the message digest of a new message */
mbed_official 133:d4dda5c437f0 533 HASH->CR |= HASH_AlgoSelection_SHA1 | HASH_CR_INIT;
mbed_official 133:d4dda5c437f0 534 }
mbed_official 133:d4dda5c437f0 535
mbed_official 133:d4dda5c437f0 536 /* Set the phase */
mbed_official 133:d4dda5c437f0 537 hhash->Phase = HAL_HASH_PHASE_PROCESS;
mbed_official 133:d4dda5c437f0 538
mbed_official 133:d4dda5c437f0 539 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 540 __HAL_HASH_SET_NBVALIDBITS(Size);
mbed_official 133:d4dda5c437f0 541
mbed_official 133:d4dda5c437f0 542 /* Write input buffer in data register */
mbed_official 133:d4dda5c437f0 543 HASH_WriteData(pInBuffer, Size);
mbed_official 133:d4dda5c437f0 544
mbed_official 133:d4dda5c437f0 545 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 546 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 547
mbed_official 133:d4dda5c437f0 548 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 549 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 550
mbed_official 133:d4dda5c437f0 551 /* Return function status */
mbed_official 133:d4dda5c437f0 552 return HAL_OK;
mbed_official 133:d4dda5c437f0 553 }
mbed_official 133:d4dda5c437f0 554
mbed_official 133:d4dda5c437f0 555 /**
mbed_official 133:d4dda5c437f0 556 * @}
mbed_official 133:d4dda5c437f0 557 */
mbed_official 133:d4dda5c437f0 558
mbed_official 133:d4dda5c437f0 559 /** @defgroup HASH_Group3 HASH processing functions using interrupt mode
mbed_official 133:d4dda5c437f0 560 * @brief processing functions using interrupt mode.
mbed_official 133:d4dda5c437f0 561 *
mbed_official 133:d4dda5c437f0 562 @verbatim
mbed_official 133:d4dda5c437f0 563 ===============================================================================
mbed_official 133:d4dda5c437f0 564 ##### HASH processing using interrupt mode functions #####
mbed_official 133:d4dda5c437f0 565 ===============================================================================
mbed_official 133:d4dda5c437f0 566 [..] This section provides functions allowing to calculate in interrupt mode
mbed_official 133:d4dda5c437f0 567 the hash value using one of the following algorithms:
mbed_official 133:d4dda5c437f0 568 (+) MD5
mbed_official 133:d4dda5c437f0 569 (+) SHA1
mbed_official 133:d4dda5c437f0 570
mbed_official 133:d4dda5c437f0 571 @endverbatim
mbed_official 133:d4dda5c437f0 572 * @{
mbed_official 133:d4dda5c437f0 573 */
mbed_official 133:d4dda5c437f0 574
mbed_official 133:d4dda5c437f0 575 /**
mbed_official 133:d4dda5c437f0 576 * @brief Initializes the HASH peripheral in MD5 mode then processes pInBuffer.
mbed_official 133:d4dda5c437f0 577 * The digest is available in pOutBuffer.
mbed_official 133:d4dda5c437f0 578 * @param hhash: HASH handle
mbed_official 133:d4dda5c437f0 579 * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
mbed_official 133:d4dda5c437f0 580 * @param pOutBuffer: Pointer to the Output buffer (hashed buffer).
mbed_official 133:d4dda5c437f0 581 * @param Size: Length of the input buffer in bytes.
mbed_official 133:d4dda5c437f0 582 * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
mbed_official 133:d4dda5c437f0 583 * @param pOutBuffer: Pointer to the computed digest. Its size must be 16 bytes.
mbed_official 133:d4dda5c437f0 584 * @retval HAL status
mbed_official 133:d4dda5c437f0 585 */
mbed_official 133:d4dda5c437f0 586 HAL_StatusTypeDef HAL_HASH_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer)
mbed_official 133:d4dda5c437f0 587 {
mbed_official 133:d4dda5c437f0 588 uint32_t inputaddr;
mbed_official 133:d4dda5c437f0 589 uint32_t outputaddr;
mbed_official 133:d4dda5c437f0 590 uint32_t buffercounter;
mbed_official 133:d4dda5c437f0 591 uint32_t inputcounter;
mbed_official 133:d4dda5c437f0 592
mbed_official 133:d4dda5c437f0 593 /* Process Locked */
mbed_official 133:d4dda5c437f0 594 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 595
mbed_official 133:d4dda5c437f0 596 if(hhash->HashITCounter == 0)
mbed_official 133:d4dda5c437f0 597 {
mbed_official 133:d4dda5c437f0 598 hhash->HashITCounter = 1;
mbed_official 133:d4dda5c437f0 599 }
mbed_official 133:d4dda5c437f0 600 else
mbed_official 133:d4dda5c437f0 601 {
mbed_official 133:d4dda5c437f0 602 hhash->HashITCounter = 0;
mbed_official 133:d4dda5c437f0 603 }
mbed_official 133:d4dda5c437f0 604 if(hhash->State == HAL_HASH_STATE_READY)
mbed_official 133:d4dda5c437f0 605 {
mbed_official 133:d4dda5c437f0 606 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 607 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 608
mbed_official 133:d4dda5c437f0 609 hhash->HashInCount = Size;
mbed_official 133:d4dda5c437f0 610 hhash->pHashInBuffPtr = pInBuffer;
mbed_official 133:d4dda5c437f0 611 hhash->pHashOutBuffPtr = pOutBuffer;
mbed_official 133:d4dda5c437f0 612
mbed_official 133:d4dda5c437f0 613 /* Check if initialization phase has already been performed */
mbed_official 133:d4dda5c437f0 614 if(hhash->Phase == HAL_HASH_PHASE_READY)
mbed_official 133:d4dda5c437f0 615 {
mbed_official 133:d4dda5c437f0 616 /* Select the SHA1 mode */
mbed_official 133:d4dda5c437f0 617 HASH->CR |= HASH_AlgoSelection_MD5;
mbed_official 133:d4dda5c437f0 618 /* Reset the HASH processor core, so that the HASH will be ready to compute
mbed_official 133:d4dda5c437f0 619 the message digest of a new message */
mbed_official 133:d4dda5c437f0 620 HASH->CR |= HASH_CR_INIT;
mbed_official 133:d4dda5c437f0 621 }
mbed_official 133:d4dda5c437f0 622
mbed_official 133:d4dda5c437f0 623 /* Set the phase */
mbed_official 133:d4dda5c437f0 624 hhash->Phase = HAL_HASH_PHASE_PROCESS;
mbed_official 133:d4dda5c437f0 625
mbed_official 133:d4dda5c437f0 626 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 627 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 628
mbed_official 133:d4dda5c437f0 629 /* Enable Interrupts */
mbed_official 133:d4dda5c437f0 630 HASH->IMR = (HASH_IT_DINI | HASH_IT_DCI);
mbed_official 133:d4dda5c437f0 631
mbed_official 133:d4dda5c437f0 632 /* Return function status */
mbed_official 133:d4dda5c437f0 633 return HAL_OK;
mbed_official 133:d4dda5c437f0 634 }
mbed_official 133:d4dda5c437f0 635 if(__HAL_HASH_GET_FLAG(HASH_FLAG_DCIS))
mbed_official 133:d4dda5c437f0 636 {
mbed_official 133:d4dda5c437f0 637 outputaddr = (uint32_t)hhash->pHashOutBuffPtr;
mbed_official 133:d4dda5c437f0 638 /* Read the Output block from the Output FIFO */
mbed_official 133:d4dda5c437f0 639 *(uint32_t*)(outputaddr) = __REV(HASH->HR[0]);
mbed_official 133:d4dda5c437f0 640 outputaddr+=4;
mbed_official 133:d4dda5c437f0 641 *(uint32_t*)(outputaddr) = __REV(HASH->HR[1]);
mbed_official 133:d4dda5c437f0 642 outputaddr+=4;
mbed_official 133:d4dda5c437f0 643 *(uint32_t*)(outputaddr) = __REV(HASH->HR[2]);
mbed_official 133:d4dda5c437f0 644 outputaddr+=4;
mbed_official 133:d4dda5c437f0 645 *(uint32_t*)(outputaddr) = __REV(HASH->HR[3]);
mbed_official 133:d4dda5c437f0 646
mbed_official 133:d4dda5c437f0 647 if(hhash->HashInCount == 0)
mbed_official 133:d4dda5c437f0 648 {
mbed_official 133:d4dda5c437f0 649 /* Disable Interrupts */
mbed_official 133:d4dda5c437f0 650 HASH->IMR = 0;
mbed_official 133:d4dda5c437f0 651 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 652 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 653 /* Call digest computation complete callback */
mbed_official 133:d4dda5c437f0 654 HAL_HASH_DgstCpltCallback(hhash);
mbed_official 133:d4dda5c437f0 655 }
mbed_official 133:d4dda5c437f0 656 }
mbed_official 133:d4dda5c437f0 657 if(__HAL_HASH_GET_FLAG(HASH_FLAG_DINIS))
mbed_official 133:d4dda5c437f0 658 {
mbed_official 133:d4dda5c437f0 659 if(hhash->HashInCount > 64)
mbed_official 133:d4dda5c437f0 660 {
mbed_official 133:d4dda5c437f0 661 inputaddr = (uint32_t)hhash->pHashInBuffPtr;
mbed_official 133:d4dda5c437f0 662 /* Write the Input block in the Data IN register */
mbed_official 133:d4dda5c437f0 663 for(buffercounter = 0; buffercounter < 64; buffercounter+=4)
mbed_official 133:d4dda5c437f0 664 {
mbed_official 133:d4dda5c437f0 665 HASH->DIN = *(uint32_t*)inputaddr;
mbed_official 133:d4dda5c437f0 666 }
mbed_official 133:d4dda5c437f0 667 if(hhash->HashITCounter == 0)
mbed_official 133:d4dda5c437f0 668 {
mbed_official 133:d4dda5c437f0 669 HASH->DIN = *(uint32_t*)inputaddr;
mbed_official 133:d4dda5c437f0 670
mbed_official 133:d4dda5c437f0 671 if(hhash->HashInCount >= 68)
mbed_official 133:d4dda5c437f0 672 {
mbed_official 133:d4dda5c437f0 673 /* Decrement buffer counter */
mbed_official 133:d4dda5c437f0 674 hhash->HashInCount -= 68;
mbed_official 133:d4dda5c437f0 675 hhash->pHashInBuffPtr+= 68;
mbed_official 133:d4dda5c437f0 676 }
mbed_official 133:d4dda5c437f0 677 else
mbed_official 133:d4dda5c437f0 678 {
mbed_official 133:d4dda5c437f0 679 hhash->HashInCount -= 64;
mbed_official 133:d4dda5c437f0 680 }
mbed_official 133:d4dda5c437f0 681 }
mbed_official 133:d4dda5c437f0 682 else
mbed_official 133:d4dda5c437f0 683 {
mbed_official 133:d4dda5c437f0 684 /* Decrement buffer counter */
mbed_official 133:d4dda5c437f0 685 hhash->HashInCount -= 64;
mbed_official 133:d4dda5c437f0 686 hhash->pHashInBuffPtr+= 64;
mbed_official 133:d4dda5c437f0 687 }
mbed_official 133:d4dda5c437f0 688 }
mbed_official 133:d4dda5c437f0 689 else
mbed_official 133:d4dda5c437f0 690 {
mbed_official 133:d4dda5c437f0 691 /* Get the buffer address */
mbed_official 133:d4dda5c437f0 692 inputaddr = (uint32_t)hhash->pHashInBuffPtr;
mbed_official 133:d4dda5c437f0 693 /* Get the buffer counter */
mbed_official 133:d4dda5c437f0 694 inputcounter = hhash->HashInCount;
mbed_official 133:d4dda5c437f0 695 /* Disable Interrupts */
mbed_official 133:d4dda5c437f0 696 HASH->IMR &= ~(HASH_IT_DINI);
mbed_official 133:d4dda5c437f0 697 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 698 __HAL_HASH_SET_NBVALIDBITS(inputcounter);
mbed_official 133:d4dda5c437f0 699
mbed_official 133:d4dda5c437f0 700 if((inputcounter > 4) && (inputcounter%4))
mbed_official 133:d4dda5c437f0 701 {
mbed_official 133:d4dda5c437f0 702 inputcounter = (inputcounter+4-inputcounter%4);
mbed_official 133:d4dda5c437f0 703 }
mbed_official 133:d4dda5c437f0 704
mbed_official 133:d4dda5c437f0 705 /* Write the Input block in the Data IN register */
mbed_official 133:d4dda5c437f0 706 for(buffercounter = 0; buffercounter < inputcounter/4; buffercounter++)
mbed_official 133:d4dda5c437f0 707 {
mbed_official 133:d4dda5c437f0 708 HASH->DIN = *(uint32_t*)inputaddr;
mbed_official 133:d4dda5c437f0 709 inputaddr+=4;
mbed_official 133:d4dda5c437f0 710 }
mbed_official 133:d4dda5c437f0 711 /* Start the digest calculation */
mbed_official 133:d4dda5c437f0 712 __HAL_HASH_START_DIGEST();
mbed_official 133:d4dda5c437f0 713 /* Reset buffer counter */
mbed_official 133:d4dda5c437f0 714 hhash->HashInCount = 0;
mbed_official 133:d4dda5c437f0 715 }
mbed_official 133:d4dda5c437f0 716 /* Call Input data transfer complete callback */
mbed_official 133:d4dda5c437f0 717 HAL_HASH_InCpltCallback(hhash);
mbed_official 133:d4dda5c437f0 718 }
mbed_official 133:d4dda5c437f0 719
mbed_official 133:d4dda5c437f0 720 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 721 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 722
mbed_official 133:d4dda5c437f0 723 /* Return function status */
mbed_official 133:d4dda5c437f0 724 return HAL_OK;
mbed_official 133:d4dda5c437f0 725 }
mbed_official 133:d4dda5c437f0 726
mbed_official 133:d4dda5c437f0 727 /**
mbed_official 133:d4dda5c437f0 728 * @brief Initializes the HASH peripheral in SHA1 mode then processes pInBuffer.
mbed_official 133:d4dda5c437f0 729 * The digest is available in pOutBuffer.
mbed_official 133:d4dda5c437f0 730 * @param hhash: HASH handle
mbed_official 133:d4dda5c437f0 731 * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
mbed_official 133:d4dda5c437f0 732 * @param pOutBuffer: Pointer to the Output buffer (hashed buffer).
mbed_official 133:d4dda5c437f0 733 * @param Size: Length of the input buffer in bytes.
mbed_official 133:d4dda5c437f0 734 * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
mbed_official 133:d4dda5c437f0 735 * @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
mbed_official 133:d4dda5c437f0 736 * @retval HAL status
mbed_official 133:d4dda5c437f0 737 */
mbed_official 133:d4dda5c437f0 738 HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer)
mbed_official 133:d4dda5c437f0 739 {
mbed_official 133:d4dda5c437f0 740 uint32_t inputaddr;
mbed_official 133:d4dda5c437f0 741 uint32_t outputaddr;
mbed_official 133:d4dda5c437f0 742 uint32_t buffercounter;
mbed_official 133:d4dda5c437f0 743 uint32_t inputcounter;
mbed_official 133:d4dda5c437f0 744
mbed_official 133:d4dda5c437f0 745 /* Process Locked */
mbed_official 133:d4dda5c437f0 746 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 747
mbed_official 133:d4dda5c437f0 748 if(hhash->HashITCounter == 0)
mbed_official 133:d4dda5c437f0 749 {
mbed_official 133:d4dda5c437f0 750 hhash->HashITCounter = 1;
mbed_official 133:d4dda5c437f0 751 }
mbed_official 133:d4dda5c437f0 752 else
mbed_official 133:d4dda5c437f0 753 {
mbed_official 133:d4dda5c437f0 754 hhash->HashITCounter = 0;
mbed_official 133:d4dda5c437f0 755 }
mbed_official 133:d4dda5c437f0 756 if(hhash->State == HAL_HASH_STATE_READY)
mbed_official 133:d4dda5c437f0 757 {
mbed_official 133:d4dda5c437f0 758 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 759 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 760
mbed_official 133:d4dda5c437f0 761 hhash->HashInCount = Size;
mbed_official 133:d4dda5c437f0 762 hhash->pHashInBuffPtr = pInBuffer;
mbed_official 133:d4dda5c437f0 763 hhash->pHashOutBuffPtr = pOutBuffer;
mbed_official 133:d4dda5c437f0 764
mbed_official 133:d4dda5c437f0 765 /* Check if initialization phase has already been performed */
mbed_official 133:d4dda5c437f0 766 if(hhash->Phase == HAL_HASH_PHASE_READY)
mbed_official 133:d4dda5c437f0 767 {
mbed_official 133:d4dda5c437f0 768 /* Select the SHA1 mode */
mbed_official 133:d4dda5c437f0 769 HASH->CR |= HASH_AlgoSelection_SHA1;
mbed_official 133:d4dda5c437f0 770 /* Reset the HASH processor core, so that the HASH will be ready to compute
mbed_official 133:d4dda5c437f0 771 the message digest of a new message */
mbed_official 133:d4dda5c437f0 772 HASH->CR |= HASH_CR_INIT;
mbed_official 133:d4dda5c437f0 773 }
mbed_official 133:d4dda5c437f0 774
mbed_official 133:d4dda5c437f0 775 /* Set the phase */
mbed_official 133:d4dda5c437f0 776 hhash->Phase = HAL_HASH_PHASE_PROCESS;
mbed_official 133:d4dda5c437f0 777
mbed_official 133:d4dda5c437f0 778 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 779 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 780
mbed_official 133:d4dda5c437f0 781 /* Enable Interrupts */
mbed_official 133:d4dda5c437f0 782 HASH->IMR = (HASH_IT_DINI | HASH_IT_DCI);
mbed_official 133:d4dda5c437f0 783
mbed_official 133:d4dda5c437f0 784 /* Return function status */
mbed_official 133:d4dda5c437f0 785 return HAL_OK;
mbed_official 133:d4dda5c437f0 786 }
mbed_official 133:d4dda5c437f0 787 if(__HAL_HASH_GET_FLAG(HASH_FLAG_DCIS))
mbed_official 133:d4dda5c437f0 788 {
mbed_official 133:d4dda5c437f0 789 outputaddr = (uint32_t)hhash->pHashOutBuffPtr;
mbed_official 133:d4dda5c437f0 790 /* Read the Output block from the Output FIFO */
mbed_official 133:d4dda5c437f0 791 *(uint32_t*)(outputaddr) = __REV(HASH->HR[0]);
mbed_official 133:d4dda5c437f0 792 outputaddr+=4;
mbed_official 133:d4dda5c437f0 793 *(uint32_t*)(outputaddr) = __REV(HASH->HR[1]);
mbed_official 133:d4dda5c437f0 794 outputaddr+=4;
mbed_official 133:d4dda5c437f0 795 *(uint32_t*)(outputaddr) = __REV(HASH->HR[2]);
mbed_official 133:d4dda5c437f0 796 outputaddr+=4;
mbed_official 133:d4dda5c437f0 797 *(uint32_t*)(outputaddr) = __REV(HASH->HR[3]);
mbed_official 133:d4dda5c437f0 798 outputaddr+=4;
mbed_official 133:d4dda5c437f0 799 *(uint32_t*)(outputaddr) = __REV(HASH->HR[4]);
mbed_official 133:d4dda5c437f0 800 if(hhash->HashInCount == 0)
mbed_official 133:d4dda5c437f0 801 {
mbed_official 133:d4dda5c437f0 802 /* Disable Interrupts */
mbed_official 133:d4dda5c437f0 803 HASH->IMR = 0;
mbed_official 133:d4dda5c437f0 804 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 805 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 806 /* Call digest computation complete callback */
mbed_official 133:d4dda5c437f0 807 HAL_HASH_DgstCpltCallback(hhash);
mbed_official 133:d4dda5c437f0 808 }
mbed_official 133:d4dda5c437f0 809 }
mbed_official 133:d4dda5c437f0 810 if(__HAL_HASH_GET_FLAG(HASH_FLAG_DINIS))
mbed_official 133:d4dda5c437f0 811 {
mbed_official 133:d4dda5c437f0 812 if(hhash->HashInCount > 64)
mbed_official 133:d4dda5c437f0 813 {
mbed_official 133:d4dda5c437f0 814 inputaddr = (uint32_t)hhash->pHashInBuffPtr;
mbed_official 133:d4dda5c437f0 815 /* Write the Input block in the Data IN register */
mbed_official 133:d4dda5c437f0 816 for(buffercounter = 0; buffercounter < 64; buffercounter+=4)
mbed_official 133:d4dda5c437f0 817 {
mbed_official 133:d4dda5c437f0 818 HASH->DIN = *(uint32_t*)inputaddr;
mbed_official 133:d4dda5c437f0 819 inputaddr+=4;
mbed_official 133:d4dda5c437f0 820 }
mbed_official 133:d4dda5c437f0 821 if(hhash->HashITCounter == 0)
mbed_official 133:d4dda5c437f0 822 {
mbed_official 133:d4dda5c437f0 823 HASH->DIN = *(uint32_t*)inputaddr;
mbed_official 133:d4dda5c437f0 824
mbed_official 133:d4dda5c437f0 825 if(hhash->HashInCount >= 68)
mbed_official 133:d4dda5c437f0 826 {
mbed_official 133:d4dda5c437f0 827 /* Decrement buffer counter */
mbed_official 133:d4dda5c437f0 828 hhash->HashInCount -= 68;
mbed_official 133:d4dda5c437f0 829 hhash->pHashInBuffPtr+= 68;
mbed_official 133:d4dda5c437f0 830 }
mbed_official 133:d4dda5c437f0 831 else
mbed_official 133:d4dda5c437f0 832 {
mbed_official 133:d4dda5c437f0 833 hhash->HashInCount -= 64;
mbed_official 133:d4dda5c437f0 834 }
mbed_official 133:d4dda5c437f0 835 }
mbed_official 133:d4dda5c437f0 836 else
mbed_official 133:d4dda5c437f0 837 {
mbed_official 133:d4dda5c437f0 838 /* Decrement buffer counter */
mbed_official 133:d4dda5c437f0 839 hhash->HashInCount -= 64;
mbed_official 133:d4dda5c437f0 840 hhash->pHashInBuffPtr+= 64;
mbed_official 133:d4dda5c437f0 841 }
mbed_official 133:d4dda5c437f0 842 }
mbed_official 133:d4dda5c437f0 843 else
mbed_official 133:d4dda5c437f0 844 {
mbed_official 133:d4dda5c437f0 845 /* Get the buffer address */
mbed_official 133:d4dda5c437f0 846 inputaddr = (uint32_t)hhash->pHashInBuffPtr;
mbed_official 133:d4dda5c437f0 847 /* Get the buffer counter */
mbed_official 133:d4dda5c437f0 848 inputcounter = hhash->HashInCount;
mbed_official 133:d4dda5c437f0 849 /* Disable Interrupts */
mbed_official 133:d4dda5c437f0 850 HASH->IMR &= ~(HASH_IT_DINI);
mbed_official 133:d4dda5c437f0 851 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 852 __HAL_HASH_SET_NBVALIDBITS(inputcounter);
mbed_official 133:d4dda5c437f0 853
mbed_official 133:d4dda5c437f0 854 if((inputcounter > 4) && (inputcounter%4))
mbed_official 133:d4dda5c437f0 855 {
mbed_official 133:d4dda5c437f0 856 inputcounter = (inputcounter+4-inputcounter%4);
mbed_official 133:d4dda5c437f0 857 }
mbed_official 133:d4dda5c437f0 858
mbed_official 133:d4dda5c437f0 859 /* Write the Input block in the Data IN register */
mbed_official 133:d4dda5c437f0 860 for(buffercounter = 0; buffercounter < inputcounter/4; buffercounter++)
mbed_official 133:d4dda5c437f0 861 {
mbed_official 133:d4dda5c437f0 862 HASH->DIN = *(uint32_t*)inputaddr;
mbed_official 133:d4dda5c437f0 863 inputaddr+=4;
mbed_official 133:d4dda5c437f0 864 }
mbed_official 133:d4dda5c437f0 865 /* Start the digest calculation */
mbed_official 133:d4dda5c437f0 866 __HAL_HASH_START_DIGEST();
mbed_official 133:d4dda5c437f0 867 /* Reset buffer counter */
mbed_official 133:d4dda5c437f0 868 hhash->HashInCount = 0;
mbed_official 133:d4dda5c437f0 869 }
mbed_official 133:d4dda5c437f0 870 /* Call Input data transfer complete callback */
mbed_official 133:d4dda5c437f0 871 HAL_HASH_InCpltCallback(hhash);
mbed_official 133:d4dda5c437f0 872 }
mbed_official 133:d4dda5c437f0 873
mbed_official 133:d4dda5c437f0 874 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 875 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 876
mbed_official 133:d4dda5c437f0 877 /* Return function status */
mbed_official 133:d4dda5c437f0 878 return HAL_OK;
mbed_official 133:d4dda5c437f0 879 }
mbed_official 133:d4dda5c437f0 880
mbed_official 133:d4dda5c437f0 881 /**
mbed_official 133:d4dda5c437f0 882 * @brief This function handles HASH interrupt request.
mbed_official 133:d4dda5c437f0 883 * @param hhash: hash handle
mbed_official 133:d4dda5c437f0 884 * @retval None
mbed_official 133:d4dda5c437f0 885 */
mbed_official 133:d4dda5c437f0 886 void HAL_HASH_IRQHandler(HASH_HandleTypeDef *hhash)
mbed_official 133:d4dda5c437f0 887 {
mbed_official 133:d4dda5c437f0 888 switch(HASH->CR & HASH_CR_ALGO)
mbed_official 133:d4dda5c437f0 889 {
mbed_official 133:d4dda5c437f0 890 case HASH_AlgoSelection_MD5:
mbed_official 133:d4dda5c437f0 891 HAL_HASH_MD5_Start_IT(hhash, NULL, 0, NULL);
mbed_official 133:d4dda5c437f0 892 break;
mbed_official 133:d4dda5c437f0 893
mbed_official 133:d4dda5c437f0 894 case HASH_AlgoSelection_SHA1:
mbed_official 133:d4dda5c437f0 895 HAL_HASH_SHA1_Start_IT(hhash, NULL, 0, NULL);
mbed_official 133:d4dda5c437f0 896 break;
mbed_official 133:d4dda5c437f0 897
mbed_official 133:d4dda5c437f0 898 default:
mbed_official 133:d4dda5c437f0 899 break;
mbed_official 133:d4dda5c437f0 900 }
mbed_official 133:d4dda5c437f0 901 }
mbed_official 133:d4dda5c437f0 902
mbed_official 133:d4dda5c437f0 903 /**
mbed_official 133:d4dda5c437f0 904 * @}
mbed_official 133:d4dda5c437f0 905 */
mbed_official 133:d4dda5c437f0 906
mbed_official 133:d4dda5c437f0 907 /** @defgroup HASH_Group4 HASH processing functions using DMA mode
mbed_official 133:d4dda5c437f0 908 * @brief processing functions using DMA mode.
mbed_official 133:d4dda5c437f0 909 *
mbed_official 133:d4dda5c437f0 910 @verbatim
mbed_official 133:d4dda5c437f0 911 ===============================================================================
mbed_official 133:d4dda5c437f0 912 ##### HASH processing using DMA mode functions #####
mbed_official 133:d4dda5c437f0 913 ===============================================================================
mbed_official 133:d4dda5c437f0 914 [..] This section provides functions allowing to calculate in DMA mode
mbed_official 133:d4dda5c437f0 915 the hash value using one of the following algorithms:
mbed_official 133:d4dda5c437f0 916 (+) MD5
mbed_official 133:d4dda5c437f0 917 (+) SHA1
mbed_official 133:d4dda5c437f0 918
mbed_official 133:d4dda5c437f0 919 @endverbatim
mbed_official 133:d4dda5c437f0 920 * @{
mbed_official 133:d4dda5c437f0 921 */
mbed_official 133:d4dda5c437f0 922
mbed_official 133:d4dda5c437f0 923 /**
mbed_official 133:d4dda5c437f0 924 * @brief Initializes the HASH peripheral in MD5 mode then enables DMA to
mbed_official 133:d4dda5c437f0 925 control data transfer. Use HAL_HASH_MD5_Finish() to get the digest.
mbed_official 133:d4dda5c437f0 926 * @param hhash: HASH handle
mbed_official 133:d4dda5c437f0 927 * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
mbed_official 133:d4dda5c437f0 928 * @param Size: Length of the input buffer in bytes.
mbed_official 133:d4dda5c437f0 929 * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
mbed_official 133:d4dda5c437f0 930 * @param pOutBuffer: Pointer to the computed digest. Its size must be 16 bytes.
mbed_official 133:d4dda5c437f0 931 * @retval HAL status
mbed_official 133:d4dda5c437f0 932 */
mbed_official 133:d4dda5c437f0 933 HAL_StatusTypeDef HAL_HASH_MD5_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
mbed_official 133:d4dda5c437f0 934 {
mbed_official 133:d4dda5c437f0 935 uint32_t inputaddr = (uint32_t)pInBuffer;
mbed_official 133:d4dda5c437f0 936
mbed_official 133:d4dda5c437f0 937 /* Process Locked */
mbed_official 133:d4dda5c437f0 938 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 939
mbed_official 133:d4dda5c437f0 940 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 941 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 942
mbed_official 133:d4dda5c437f0 943 /* Check if initialization phase has already been performed */
mbed_official 133:d4dda5c437f0 944 if(hhash->Phase == HAL_HASH_PHASE_READY)
mbed_official 133:d4dda5c437f0 945 {
mbed_official 133:d4dda5c437f0 946 /* Select the MD5 mode and reset the HASH processor core, so that the HASH will be ready to compute
mbed_official 133:d4dda5c437f0 947 the message digest of a new message */
mbed_official 133:d4dda5c437f0 948 HASH->CR |= HASH_AlgoSelection_MD5 | HASH_CR_INIT;
mbed_official 133:d4dda5c437f0 949 }
mbed_official 133:d4dda5c437f0 950
mbed_official 133:d4dda5c437f0 951 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 952 __HAL_HASH_SET_NBVALIDBITS(Size);
mbed_official 133:d4dda5c437f0 953
mbed_official 133:d4dda5c437f0 954 /* Set the phase */
mbed_official 133:d4dda5c437f0 955 hhash->Phase = HAL_HASH_PHASE_PROCESS;
mbed_official 133:d4dda5c437f0 956
mbed_official 133:d4dda5c437f0 957 /* Set the HASH DMA transfer complete callback */
mbed_official 133:d4dda5c437f0 958 hhash->hdmain->XferCpltCallback = HASH_DMAXferCplt;
mbed_official 133:d4dda5c437f0 959 /* Set the DMA error callback */
mbed_official 133:d4dda5c437f0 960 hhash->hdmain->XferErrorCallback = HASH_DMAError;
mbed_official 133:d4dda5c437f0 961
mbed_official 133:d4dda5c437f0 962 /* Enable the DMA In DMA Stream */
mbed_official 133:d4dda5c437f0 963 HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (Size%4 ? (Size+3)/4:Size/4));
mbed_official 133:d4dda5c437f0 964
mbed_official 133:d4dda5c437f0 965 /* Enable DMA requests */
mbed_official 133:d4dda5c437f0 966 HASH->CR |= (HASH_CR_DMAE);
mbed_official 133:d4dda5c437f0 967
mbed_official 133:d4dda5c437f0 968 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 969 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 970
mbed_official 133:d4dda5c437f0 971 /* Return function status */
mbed_official 133:d4dda5c437f0 972 return HAL_OK;
mbed_official 133:d4dda5c437f0 973 }
mbed_official 133:d4dda5c437f0 974
mbed_official 133:d4dda5c437f0 975 /**
mbed_official 133:d4dda5c437f0 976 * @brief Returns the computed digest in MD5 mode
mbed_official 133:d4dda5c437f0 977 * @param hhash: HASH handle
mbed_official 133:d4dda5c437f0 978 * @param pOutBuffer: Pointer to the computed digest. Its size must be 16 bytes.
mbed_official 133:d4dda5c437f0 979 * @param Timeout: Timeout value
mbed_official 133:d4dda5c437f0 980 * @retval HAL status
mbed_official 133:d4dda5c437f0 981 */
mbed_official 133:d4dda5c437f0 982 HAL_StatusTypeDef HAL_HASH_MD5_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutBuffer, uint32_t Timeout)
mbed_official 133:d4dda5c437f0 983 {
mbed_official 133:d4dda5c437f0 984 uint32_t timeout = 0;
mbed_official 133:d4dda5c437f0 985
mbed_official 133:d4dda5c437f0 986 /* Process Locked */
mbed_official 133:d4dda5c437f0 987 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 988
mbed_official 133:d4dda5c437f0 989 /* Change HASH peripheral state */
mbed_official 133:d4dda5c437f0 990 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 991
mbed_official 133:d4dda5c437f0 992 /* Get timeout */
mbed_official 133:d4dda5c437f0 993 timeout = HAL_GetTick() + Timeout;
mbed_official 133:d4dda5c437f0 994
mbed_official 133:d4dda5c437f0 995 while(HAL_IS_BIT_CLR(HASH->SR, HASH_FLAG_DCIS))
mbed_official 133:d4dda5c437f0 996 {
mbed_official 133:d4dda5c437f0 997 /* Check for the Timeout */
mbed_official 133:d4dda5c437f0 998 if(Timeout != HAL_MAX_DELAY)
mbed_official 133:d4dda5c437f0 999 {
mbed_official 133:d4dda5c437f0 1000 if(HAL_GetTick() >= timeout)
mbed_official 133:d4dda5c437f0 1001 {
mbed_official 133:d4dda5c437f0 1002 /* Change state */
mbed_official 133:d4dda5c437f0 1003 hhash->State = HAL_HASH_STATE_TIMEOUT;
mbed_official 133:d4dda5c437f0 1004
mbed_official 133:d4dda5c437f0 1005 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 1006 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 1007
mbed_official 133:d4dda5c437f0 1008 return HAL_TIMEOUT;
mbed_official 133:d4dda5c437f0 1009 }
mbed_official 133:d4dda5c437f0 1010 }
mbed_official 133:d4dda5c437f0 1011 }
mbed_official 133:d4dda5c437f0 1012
mbed_official 133:d4dda5c437f0 1013 /* Read the message digest */
mbed_official 133:d4dda5c437f0 1014 HASH_GetDigest(pOutBuffer, 16);
mbed_official 133:d4dda5c437f0 1015
mbed_official 133:d4dda5c437f0 1016 /* Change HASH peripheral state */
mbed_official 133:d4dda5c437f0 1017 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 1018
mbed_official 133:d4dda5c437f0 1019 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 1020 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 1021
mbed_official 133:d4dda5c437f0 1022 /* Return function status */
mbed_official 133:d4dda5c437f0 1023 return HAL_OK;
mbed_official 133:d4dda5c437f0 1024 }
mbed_official 133:d4dda5c437f0 1025
mbed_official 133:d4dda5c437f0 1026 /**
mbed_official 133:d4dda5c437f0 1027 * @brief Initializes the HASH peripheral in SHA1 mode then enables DMA to
mbed_official 133:d4dda5c437f0 1028 control data transfer. Use HAL_HASH_SHA1_Finish() to get the digest.
mbed_official 133:d4dda5c437f0 1029 * @param hhash: HASH handle
mbed_official 133:d4dda5c437f0 1030 * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
mbed_official 133:d4dda5c437f0 1031 * @param Size: Length of the input buffer in bytes.
mbed_official 133:d4dda5c437f0 1032 * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
mbed_official 133:d4dda5c437f0 1033 * @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
mbed_official 133:d4dda5c437f0 1034 * @retval HAL status
mbed_official 133:d4dda5c437f0 1035 */
mbed_official 133:d4dda5c437f0 1036 HAL_StatusTypeDef HAL_HASH_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
mbed_official 133:d4dda5c437f0 1037 {
mbed_official 133:d4dda5c437f0 1038 uint32_t inputaddr = (uint32_t)pInBuffer;
mbed_official 133:d4dda5c437f0 1039
mbed_official 133:d4dda5c437f0 1040 /* Process Locked */
mbed_official 133:d4dda5c437f0 1041 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 1042
mbed_official 133:d4dda5c437f0 1043 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 1044 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 1045
mbed_official 133:d4dda5c437f0 1046 /* Check if initialization phase has already been performed */
mbed_official 133:d4dda5c437f0 1047 if(hhash->Phase == HAL_HASH_PHASE_READY)
mbed_official 133:d4dda5c437f0 1048 {
mbed_official 133:d4dda5c437f0 1049 /* Select the SHA1 mode and reset the HASH processor core, so that the HASH will be ready to compute
mbed_official 133:d4dda5c437f0 1050 the message digest of a new message */
mbed_official 133:d4dda5c437f0 1051 HASH->CR |= HASH_AlgoSelection_SHA1;
mbed_official 133:d4dda5c437f0 1052 HASH->CR |= HASH_CR_INIT;
mbed_official 133:d4dda5c437f0 1053 }
mbed_official 133:d4dda5c437f0 1054
mbed_official 133:d4dda5c437f0 1055 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 1056 __HAL_HASH_SET_NBVALIDBITS(Size);
mbed_official 133:d4dda5c437f0 1057
mbed_official 133:d4dda5c437f0 1058 /* Set the phase */
mbed_official 133:d4dda5c437f0 1059 hhash->Phase = HAL_HASH_PHASE_PROCESS;
mbed_official 133:d4dda5c437f0 1060
mbed_official 133:d4dda5c437f0 1061 /* Set the HASH DMA transfer complete callback */
mbed_official 133:d4dda5c437f0 1062 hhash->hdmain->XferCpltCallback = HASH_DMAXferCplt;
mbed_official 133:d4dda5c437f0 1063 /* Set the DMA error callback */
mbed_official 133:d4dda5c437f0 1064 hhash->hdmain->XferErrorCallback = HASH_DMAError;
mbed_official 133:d4dda5c437f0 1065
mbed_official 133:d4dda5c437f0 1066 /* Enable the DMA In DMA Stream */
mbed_official 133:d4dda5c437f0 1067 HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (Size%4 ? (Size+3)/4:Size/4));
mbed_official 133:d4dda5c437f0 1068
mbed_official 133:d4dda5c437f0 1069 /* Enable DMA requests */
mbed_official 133:d4dda5c437f0 1070 HASH->CR |= (HASH_CR_DMAE);
mbed_official 133:d4dda5c437f0 1071
mbed_official 133:d4dda5c437f0 1072 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 1073 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 1074
mbed_official 133:d4dda5c437f0 1075 /* Return function status */
mbed_official 133:d4dda5c437f0 1076 return HAL_OK;
mbed_official 133:d4dda5c437f0 1077 }
mbed_official 133:d4dda5c437f0 1078
mbed_official 133:d4dda5c437f0 1079 /**
mbed_official 133:d4dda5c437f0 1080 * @brief Returns the computed digest in SHA1 mode.
mbed_official 133:d4dda5c437f0 1081 * @param hhash: HASH handle
mbed_official 133:d4dda5c437f0 1082 * @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
mbed_official 133:d4dda5c437f0 1083 * @param Timeout: Timeout value
mbed_official 133:d4dda5c437f0 1084 * @retval HAL status
mbed_official 133:d4dda5c437f0 1085 */
mbed_official 133:d4dda5c437f0 1086 HAL_StatusTypeDef HAL_HASH_SHA1_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutBuffer, uint32_t Timeout)
mbed_official 133:d4dda5c437f0 1087 {
mbed_official 133:d4dda5c437f0 1088 uint32_t timeout = 0;
mbed_official 133:d4dda5c437f0 1089
mbed_official 133:d4dda5c437f0 1090 /* Process Locked */
mbed_official 133:d4dda5c437f0 1091 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 1092
mbed_official 133:d4dda5c437f0 1093 /* Change HASH peripheral state */
mbed_official 133:d4dda5c437f0 1094 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 1095
mbed_official 133:d4dda5c437f0 1096 /* Get timeout */
mbed_official 133:d4dda5c437f0 1097 timeout = HAL_GetTick() + Timeout;
mbed_official 133:d4dda5c437f0 1098 while(HAL_IS_BIT_CLR(HASH->SR, HASH_FLAG_DCIS))
mbed_official 133:d4dda5c437f0 1099 {
mbed_official 133:d4dda5c437f0 1100 /* Check for the Timeout */
mbed_official 133:d4dda5c437f0 1101 if(Timeout != HAL_MAX_DELAY)
mbed_official 133:d4dda5c437f0 1102 {
mbed_official 133:d4dda5c437f0 1103 if(HAL_GetTick() >= timeout)
mbed_official 133:d4dda5c437f0 1104 {
mbed_official 133:d4dda5c437f0 1105 /* Change state */
mbed_official 133:d4dda5c437f0 1106 hhash->State = HAL_HASH_STATE_TIMEOUT;
mbed_official 133:d4dda5c437f0 1107
mbed_official 133:d4dda5c437f0 1108 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 1109 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 1110
mbed_official 133:d4dda5c437f0 1111 return HAL_TIMEOUT;
mbed_official 133:d4dda5c437f0 1112 }
mbed_official 133:d4dda5c437f0 1113 }
mbed_official 133:d4dda5c437f0 1114 }
mbed_official 133:d4dda5c437f0 1115
mbed_official 133:d4dda5c437f0 1116 /* Read the message digest */
mbed_official 133:d4dda5c437f0 1117 HASH_GetDigest(pOutBuffer, 20);
mbed_official 133:d4dda5c437f0 1118
mbed_official 133:d4dda5c437f0 1119 /* Change HASH peripheral state */
mbed_official 133:d4dda5c437f0 1120 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 1121
mbed_official 133:d4dda5c437f0 1122 /* Process UnLock */
mbed_official 133:d4dda5c437f0 1123 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 1124
mbed_official 133:d4dda5c437f0 1125 /* Return function status */
mbed_official 133:d4dda5c437f0 1126 return HAL_OK;
mbed_official 133:d4dda5c437f0 1127 }
mbed_official 133:d4dda5c437f0 1128
mbed_official 133:d4dda5c437f0 1129
mbed_official 133:d4dda5c437f0 1130 /**
mbed_official 133:d4dda5c437f0 1131 * @}
mbed_official 133:d4dda5c437f0 1132 */
mbed_official 133:d4dda5c437f0 1133
mbed_official 133:d4dda5c437f0 1134 /** @defgroup HASH_Group5 HASH-MAC (HMAC) processing functions using polling mode
mbed_official 133:d4dda5c437f0 1135 * @brief HMAC processing functions using polling mode .
mbed_official 133:d4dda5c437f0 1136 *
mbed_official 133:d4dda5c437f0 1137 @verbatim
mbed_official 133:d4dda5c437f0 1138 ===============================================================================
mbed_official 133:d4dda5c437f0 1139 ##### HMAC processing using polling mode functions #####
mbed_official 133:d4dda5c437f0 1140 ===============================================================================
mbed_official 133:d4dda5c437f0 1141 [..] This section provides functions allowing to calculate in polling mode
mbed_official 133:d4dda5c437f0 1142 the HMAC value using one of the following algorithms:
mbed_official 133:d4dda5c437f0 1143 (+) MD5
mbed_official 133:d4dda5c437f0 1144 (+) SHA1
mbed_official 133:d4dda5c437f0 1145
mbed_official 133:d4dda5c437f0 1146 @endverbatim
mbed_official 133:d4dda5c437f0 1147 * @{
mbed_official 133:d4dda5c437f0 1148 */
mbed_official 133:d4dda5c437f0 1149
mbed_official 133:d4dda5c437f0 1150 /**
mbed_official 133:d4dda5c437f0 1151 * @brief Initializes the HASH peripheral in HMAC MD5 mode
mbed_official 133:d4dda5c437f0 1152 * then processes pInBuffer. The digest is available in pOutBuffer
mbed_official 133:d4dda5c437f0 1153 * @param hhash: HASH handle
mbed_official 133:d4dda5c437f0 1154 * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
mbed_official 133:d4dda5c437f0 1155 * @param Size: Length of the input buffer in bytes.
mbed_official 133:d4dda5c437f0 1156 * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
mbed_official 133:d4dda5c437f0 1157 * @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
mbed_official 133:d4dda5c437f0 1158 * @param Timeout: Timeout value
mbed_official 133:d4dda5c437f0 1159 * @retval HAL status
mbed_official 133:d4dda5c437f0 1160 */
mbed_official 133:d4dda5c437f0 1161 HAL_StatusTypeDef HAL_HMAC_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout)
mbed_official 133:d4dda5c437f0 1162 {
mbed_official 133:d4dda5c437f0 1163 uint32_t timeout = 0;
mbed_official 133:d4dda5c437f0 1164
mbed_official 133:d4dda5c437f0 1165 /* Process Locked */
mbed_official 133:d4dda5c437f0 1166 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 1167
mbed_official 133:d4dda5c437f0 1168 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 1169 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 1170
mbed_official 133:d4dda5c437f0 1171 /* Check if initialization phase has already been performed */
mbed_official 133:d4dda5c437f0 1172 if(hhash->Phase == HAL_HASH_PHASE_READY)
mbed_official 133:d4dda5c437f0 1173 {
mbed_official 133:d4dda5c437f0 1174 /* Check if key size is greater than 64 bytes */
mbed_official 133:d4dda5c437f0 1175 if(hhash->Init.KeySize > 64)
mbed_official 133:d4dda5c437f0 1176 {
mbed_official 133:d4dda5c437f0 1177 /* Select the HMAC MD5 mode */
mbed_official 133:d4dda5c437f0 1178 HASH->CR |= (HASH_AlgoSelection_MD5 | HASH_AlgoMode_HMAC | HASH_HMACKeyType_LongKey | HASH_CR_INIT);
mbed_official 133:d4dda5c437f0 1179 }
mbed_official 133:d4dda5c437f0 1180 else
mbed_official 133:d4dda5c437f0 1181 {
mbed_official 133:d4dda5c437f0 1182 /* Select the HMAC MD5 mode */
mbed_official 133:d4dda5c437f0 1183 HASH->CR |= (HASH_AlgoSelection_MD5 | HASH_AlgoMode_HMAC | HASH_CR_INIT);
mbed_official 133:d4dda5c437f0 1184 }
mbed_official 133:d4dda5c437f0 1185 }
mbed_official 133:d4dda5c437f0 1186
mbed_official 133:d4dda5c437f0 1187 /* Set the phase */
mbed_official 133:d4dda5c437f0 1188 hhash->Phase = HAL_HASH_PHASE_PROCESS;
mbed_official 133:d4dda5c437f0 1189
mbed_official 133:d4dda5c437f0 1190 /************************** STEP 1 ******************************************/
mbed_official 133:d4dda5c437f0 1191 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 1192 __HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
mbed_official 133:d4dda5c437f0 1193
mbed_official 133:d4dda5c437f0 1194 /* Write input buffer in data register */
mbed_official 133:d4dda5c437f0 1195 HASH_WriteData(hhash->Init.pKey, hhash->Init.KeySize);
mbed_official 133:d4dda5c437f0 1196
mbed_official 133:d4dda5c437f0 1197 /* Start the digest calculation */
mbed_official 133:d4dda5c437f0 1198 __HAL_HASH_START_DIGEST();
mbed_official 133:d4dda5c437f0 1199
mbed_official 133:d4dda5c437f0 1200 /* Get timeout */
mbed_official 133:d4dda5c437f0 1201 timeout = HAL_GetTick() + Timeout;
mbed_official 133:d4dda5c437f0 1202
mbed_official 133:d4dda5c437f0 1203 while(HAL_IS_BIT_SET(HASH->SR, HASH_FLAG_BUSY))
mbed_official 133:d4dda5c437f0 1204 {
mbed_official 133:d4dda5c437f0 1205 /* Check for the Timeout */
mbed_official 133:d4dda5c437f0 1206 if(Timeout != HAL_MAX_DELAY)
mbed_official 133:d4dda5c437f0 1207 {
mbed_official 133:d4dda5c437f0 1208 if(HAL_GetTick() >= timeout)
mbed_official 133:d4dda5c437f0 1209 {
mbed_official 133:d4dda5c437f0 1210 /* Change state */
mbed_official 133:d4dda5c437f0 1211 hhash->State = HAL_HASH_STATE_TIMEOUT;
mbed_official 133:d4dda5c437f0 1212
mbed_official 133:d4dda5c437f0 1213 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 1214 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 1215
mbed_official 133:d4dda5c437f0 1216 return HAL_TIMEOUT;
mbed_official 133:d4dda5c437f0 1217 }
mbed_official 133:d4dda5c437f0 1218 }
mbed_official 133:d4dda5c437f0 1219 }
mbed_official 133:d4dda5c437f0 1220 /************************** STEP 2 ******************************************/
mbed_official 133:d4dda5c437f0 1221 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 1222 __HAL_HASH_SET_NBVALIDBITS(Size);
mbed_official 133:d4dda5c437f0 1223
mbed_official 133:d4dda5c437f0 1224 /* Write input buffer in data register */
mbed_official 133:d4dda5c437f0 1225 HASH_WriteData(pInBuffer, Size);
mbed_official 133:d4dda5c437f0 1226
mbed_official 133:d4dda5c437f0 1227 /* Start the digest calculation */
mbed_official 133:d4dda5c437f0 1228 __HAL_HASH_START_DIGEST();
mbed_official 133:d4dda5c437f0 1229
mbed_official 133:d4dda5c437f0 1230 /* Get timeout */
mbed_official 133:d4dda5c437f0 1231 timeout = HAL_GetTick() + Timeout;
mbed_official 133:d4dda5c437f0 1232
mbed_official 133:d4dda5c437f0 1233 while(HAL_IS_BIT_SET(HASH->SR, HASH_FLAG_BUSY))
mbed_official 133:d4dda5c437f0 1234 {
mbed_official 133:d4dda5c437f0 1235 /* Check for the Timeout */
mbed_official 133:d4dda5c437f0 1236 if(Timeout != HAL_MAX_DELAY)
mbed_official 133:d4dda5c437f0 1237 {
mbed_official 133:d4dda5c437f0 1238 if(HAL_GetTick() >= timeout)
mbed_official 133:d4dda5c437f0 1239 {
mbed_official 133:d4dda5c437f0 1240 /* Change state */
mbed_official 133:d4dda5c437f0 1241 hhash->State = HAL_HASH_STATE_TIMEOUT;
mbed_official 133:d4dda5c437f0 1242
mbed_official 133:d4dda5c437f0 1243 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 1244 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 1245
mbed_official 133:d4dda5c437f0 1246 return HAL_TIMEOUT;
mbed_official 133:d4dda5c437f0 1247 }
mbed_official 133:d4dda5c437f0 1248 }
mbed_official 133:d4dda5c437f0 1249 }
mbed_official 133:d4dda5c437f0 1250 /************************** STEP 3 ******************************************/
mbed_official 133:d4dda5c437f0 1251 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 1252 __HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
mbed_official 133:d4dda5c437f0 1253
mbed_official 133:d4dda5c437f0 1254 /* Write input buffer in data register */
mbed_official 133:d4dda5c437f0 1255 HASH_WriteData(hhash->Init.pKey, hhash->Init.KeySize);
mbed_official 133:d4dda5c437f0 1256
mbed_official 133:d4dda5c437f0 1257 /* Start the digest calculation */
mbed_official 133:d4dda5c437f0 1258 __HAL_HASH_START_DIGEST();
mbed_official 133:d4dda5c437f0 1259
mbed_official 133:d4dda5c437f0 1260 /* Get timeout */
mbed_official 133:d4dda5c437f0 1261 timeout = HAL_GetTick() + Timeout;
mbed_official 133:d4dda5c437f0 1262
mbed_official 133:d4dda5c437f0 1263 while(HAL_IS_BIT_SET(HASH->SR, HASH_FLAG_BUSY))
mbed_official 133:d4dda5c437f0 1264 {
mbed_official 133:d4dda5c437f0 1265 /* Check for the Timeout */
mbed_official 133:d4dda5c437f0 1266 if(Timeout != HAL_MAX_DELAY)
mbed_official 133:d4dda5c437f0 1267 {
mbed_official 133:d4dda5c437f0 1268 if(HAL_GetTick() >= timeout)
mbed_official 133:d4dda5c437f0 1269 {
mbed_official 133:d4dda5c437f0 1270 /* Change state */
mbed_official 133:d4dda5c437f0 1271 hhash->State = HAL_HASH_STATE_TIMEOUT;
mbed_official 133:d4dda5c437f0 1272
mbed_official 133:d4dda5c437f0 1273 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 1274 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 1275
mbed_official 133:d4dda5c437f0 1276 return HAL_TIMEOUT;
mbed_official 133:d4dda5c437f0 1277 }
mbed_official 133:d4dda5c437f0 1278 }
mbed_official 133:d4dda5c437f0 1279 }
mbed_official 133:d4dda5c437f0 1280
mbed_official 133:d4dda5c437f0 1281 /* Read the message digest */
mbed_official 133:d4dda5c437f0 1282 HASH_GetDigest(pOutBuffer, 16);
mbed_official 133:d4dda5c437f0 1283
mbed_official 133:d4dda5c437f0 1284 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 1285 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 1286
mbed_official 133:d4dda5c437f0 1287 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 1288 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 1289
mbed_official 133:d4dda5c437f0 1290 /* Return function status */
mbed_official 133:d4dda5c437f0 1291 return HAL_OK;
mbed_official 133:d4dda5c437f0 1292 }
mbed_official 133:d4dda5c437f0 1293
mbed_official 133:d4dda5c437f0 1294 /**
mbed_official 133:d4dda5c437f0 1295 * @brief Initializes the HASH peripheral in HMAC SHA1 mode
mbed_official 133:d4dda5c437f0 1296 * then processes pInBuffer. The digest is available in pOutBuffer.
mbed_official 133:d4dda5c437f0 1297 * @param hhash: HASH handle
mbed_official 133:d4dda5c437f0 1298 * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
mbed_official 133:d4dda5c437f0 1299 * @param Size: Length of the input buffer in bytes.
mbed_official 133:d4dda5c437f0 1300 * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
mbed_official 133:d4dda5c437f0 1301 * @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
mbed_official 133:d4dda5c437f0 1302 * @param Timeout: Timeout value
mbed_official 133:d4dda5c437f0 1303 * @retval HAL status
mbed_official 133:d4dda5c437f0 1304 */
mbed_official 133:d4dda5c437f0 1305 HAL_StatusTypeDef HAL_HMAC_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout)
mbed_official 133:d4dda5c437f0 1306 {
mbed_official 133:d4dda5c437f0 1307 uint32_t timeout = 0;
mbed_official 133:d4dda5c437f0 1308
mbed_official 133:d4dda5c437f0 1309 /* Process Locked */
mbed_official 133:d4dda5c437f0 1310 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 1311
mbed_official 133:d4dda5c437f0 1312 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 1313 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 1314
mbed_official 133:d4dda5c437f0 1315 /* Check if initialization phase has already been performed */
mbed_official 133:d4dda5c437f0 1316 if(hhash->Phase == HAL_HASH_PHASE_READY)
mbed_official 133:d4dda5c437f0 1317 {
mbed_official 133:d4dda5c437f0 1318 /* Check if key size is greater than 64 bytes */
mbed_official 133:d4dda5c437f0 1319 if(hhash->Init.KeySize > 64)
mbed_official 133:d4dda5c437f0 1320 {
mbed_official 133:d4dda5c437f0 1321 /* Select the HMAC SHA1 mode */
mbed_official 133:d4dda5c437f0 1322 HASH->CR |= (HASH_AlgoSelection_SHA1 | HASH_AlgoMode_HMAC | HASH_HMACKeyType_LongKey | HASH_CR_INIT);
mbed_official 133:d4dda5c437f0 1323 }
mbed_official 133:d4dda5c437f0 1324 else
mbed_official 133:d4dda5c437f0 1325 {
mbed_official 133:d4dda5c437f0 1326 /* Select the HMAC SHA1 mode */
mbed_official 133:d4dda5c437f0 1327 HASH->CR |= (HASH_AlgoSelection_SHA1 | HASH_AlgoMode_HMAC | HASH_CR_INIT);
mbed_official 133:d4dda5c437f0 1328 }
mbed_official 133:d4dda5c437f0 1329 }
mbed_official 133:d4dda5c437f0 1330
mbed_official 133:d4dda5c437f0 1331 /* Set the phase */
mbed_official 133:d4dda5c437f0 1332 hhash->Phase = HAL_HASH_PHASE_PROCESS;
mbed_official 133:d4dda5c437f0 1333
mbed_official 133:d4dda5c437f0 1334 /************************** STEP 1 ******************************************/
mbed_official 133:d4dda5c437f0 1335 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 1336 __HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
mbed_official 133:d4dda5c437f0 1337
mbed_official 133:d4dda5c437f0 1338 /* Write input buffer in data register */
mbed_official 133:d4dda5c437f0 1339 HASH_WriteData(hhash->Init.pKey, hhash->Init.KeySize);
mbed_official 133:d4dda5c437f0 1340
mbed_official 133:d4dda5c437f0 1341 /* Start the digest calculation */
mbed_official 133:d4dda5c437f0 1342 __HAL_HASH_START_DIGEST();
mbed_official 133:d4dda5c437f0 1343
mbed_official 133:d4dda5c437f0 1344 /* Get timeout */
mbed_official 133:d4dda5c437f0 1345 timeout = HAL_GetTick() + Timeout;
mbed_official 133:d4dda5c437f0 1346
mbed_official 133:d4dda5c437f0 1347 while(HAL_IS_BIT_SET(HASH->SR, HASH_FLAG_BUSY))
mbed_official 133:d4dda5c437f0 1348 {
mbed_official 133:d4dda5c437f0 1349 /* Check for the Timeout */
mbed_official 133:d4dda5c437f0 1350 if(Timeout != HAL_MAX_DELAY)
mbed_official 133:d4dda5c437f0 1351 {
mbed_official 133:d4dda5c437f0 1352 if(HAL_GetTick() >= timeout)
mbed_official 133:d4dda5c437f0 1353 {
mbed_official 133:d4dda5c437f0 1354 /* Change state */
mbed_official 133:d4dda5c437f0 1355 hhash->State = HAL_HASH_STATE_TIMEOUT;
mbed_official 133:d4dda5c437f0 1356
mbed_official 133:d4dda5c437f0 1357 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 1358 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 1359
mbed_official 133:d4dda5c437f0 1360 return HAL_TIMEOUT;
mbed_official 133:d4dda5c437f0 1361 }
mbed_official 133:d4dda5c437f0 1362 }
mbed_official 133:d4dda5c437f0 1363 }
mbed_official 133:d4dda5c437f0 1364 /************************** STEP 2 ******************************************/
mbed_official 133:d4dda5c437f0 1365 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 1366 __HAL_HASH_SET_NBVALIDBITS(Size);
mbed_official 133:d4dda5c437f0 1367
mbed_official 133:d4dda5c437f0 1368 /* Write input buffer in data register */
mbed_official 133:d4dda5c437f0 1369 HASH_WriteData(pInBuffer, Size);
mbed_official 133:d4dda5c437f0 1370
mbed_official 133:d4dda5c437f0 1371 /* Start the digest calculation */
mbed_official 133:d4dda5c437f0 1372 __HAL_HASH_START_DIGEST();
mbed_official 133:d4dda5c437f0 1373
mbed_official 133:d4dda5c437f0 1374 /* Get timeout */
mbed_official 133:d4dda5c437f0 1375 timeout = HAL_GetTick() + Timeout;
mbed_official 133:d4dda5c437f0 1376
mbed_official 133:d4dda5c437f0 1377 while(HAL_IS_BIT_SET(HASH->SR, HASH_FLAG_BUSY))
mbed_official 133:d4dda5c437f0 1378 {
mbed_official 133:d4dda5c437f0 1379 /* Check for the Timeout */
mbed_official 133:d4dda5c437f0 1380 if(Timeout != HAL_MAX_DELAY)
mbed_official 133:d4dda5c437f0 1381 {
mbed_official 133:d4dda5c437f0 1382 if(HAL_GetTick() >= timeout)
mbed_official 133:d4dda5c437f0 1383 {
mbed_official 133:d4dda5c437f0 1384 /* Change state */
mbed_official 133:d4dda5c437f0 1385 hhash->State = HAL_HASH_STATE_TIMEOUT;
mbed_official 133:d4dda5c437f0 1386
mbed_official 133:d4dda5c437f0 1387 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 1388 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 1389
mbed_official 133:d4dda5c437f0 1390 return HAL_TIMEOUT;
mbed_official 133:d4dda5c437f0 1391 }
mbed_official 133:d4dda5c437f0 1392 }
mbed_official 133:d4dda5c437f0 1393 }
mbed_official 133:d4dda5c437f0 1394 /************************** STEP 3 ******************************************/
mbed_official 133:d4dda5c437f0 1395 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 1396 __HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
mbed_official 133:d4dda5c437f0 1397
mbed_official 133:d4dda5c437f0 1398 /* Write input buffer in data register */
mbed_official 133:d4dda5c437f0 1399 HASH_WriteData(hhash->Init.pKey, hhash->Init.KeySize);
mbed_official 133:d4dda5c437f0 1400
mbed_official 133:d4dda5c437f0 1401 /* Start the digest calculation */
mbed_official 133:d4dda5c437f0 1402 __HAL_HASH_START_DIGEST();
mbed_official 133:d4dda5c437f0 1403
mbed_official 133:d4dda5c437f0 1404 /* Get timeout */
mbed_official 133:d4dda5c437f0 1405 timeout = HAL_GetTick() + Timeout;
mbed_official 133:d4dda5c437f0 1406
mbed_official 133:d4dda5c437f0 1407 while(HAL_IS_BIT_SET(HASH->SR, HASH_FLAG_BUSY))
mbed_official 133:d4dda5c437f0 1408 {
mbed_official 133:d4dda5c437f0 1409 /* Check for the Timeout */
mbed_official 133:d4dda5c437f0 1410 if(Timeout != HAL_MAX_DELAY)
mbed_official 133:d4dda5c437f0 1411 {
mbed_official 133:d4dda5c437f0 1412 if(HAL_GetTick() >= timeout)
mbed_official 133:d4dda5c437f0 1413 {
mbed_official 133:d4dda5c437f0 1414 /* Change state */
mbed_official 133:d4dda5c437f0 1415 hhash->State = HAL_HASH_STATE_TIMEOUT;
mbed_official 133:d4dda5c437f0 1416
mbed_official 133:d4dda5c437f0 1417 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 1418 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 1419
mbed_official 133:d4dda5c437f0 1420 return HAL_TIMEOUT;
mbed_official 133:d4dda5c437f0 1421 }
mbed_official 133:d4dda5c437f0 1422 }
mbed_official 133:d4dda5c437f0 1423 }
mbed_official 133:d4dda5c437f0 1424 /* Read the message digest */
mbed_official 133:d4dda5c437f0 1425 HASH_GetDigest(pOutBuffer, 20);
mbed_official 133:d4dda5c437f0 1426
mbed_official 133:d4dda5c437f0 1427 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 1428 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 1429
mbed_official 133:d4dda5c437f0 1430 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 1431 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 1432
mbed_official 133:d4dda5c437f0 1433 /* Return function status */
mbed_official 133:d4dda5c437f0 1434 return HAL_OK;
mbed_official 133:d4dda5c437f0 1435 }
mbed_official 133:d4dda5c437f0 1436
mbed_official 133:d4dda5c437f0 1437
mbed_official 133:d4dda5c437f0 1438
mbed_official 133:d4dda5c437f0 1439
mbed_official 133:d4dda5c437f0 1440 /**
mbed_official 133:d4dda5c437f0 1441 * @}
mbed_official 133:d4dda5c437f0 1442 */
mbed_official 133:d4dda5c437f0 1443
mbed_official 133:d4dda5c437f0 1444 /** @defgroup HASH_Group6 HASH-MAC (HMAC) processing functions using DMA mode
mbed_official 133:d4dda5c437f0 1445 * @brief HMAC processing functions using DMA mode .
mbed_official 133:d4dda5c437f0 1446 *
mbed_official 133:d4dda5c437f0 1447 @verbatim
mbed_official 133:d4dda5c437f0 1448 ===============================================================================
mbed_official 133:d4dda5c437f0 1449 ##### HMAC processing using DMA mode functions #####
mbed_official 133:d4dda5c437f0 1450 ===============================================================================
mbed_official 133:d4dda5c437f0 1451 [..] This section provides functions allowing to calculate in DMA mode
mbed_official 133:d4dda5c437f0 1452 the HMAC value using one of the following algorithms:
mbed_official 133:d4dda5c437f0 1453 (+) MD5
mbed_official 133:d4dda5c437f0 1454 (+) SHA1
mbed_official 133:d4dda5c437f0 1455
mbed_official 133:d4dda5c437f0 1456 @endverbatim
mbed_official 133:d4dda5c437f0 1457 * @{
mbed_official 133:d4dda5c437f0 1458 */
mbed_official 133:d4dda5c437f0 1459
mbed_official 133:d4dda5c437f0 1460 /**
mbed_official 133:d4dda5c437f0 1461 * @brief Initializes the HASH peripheral in HMAC MD5 mode
mbed_official 133:d4dda5c437f0 1462 * then enables DMA to control data transfer.
mbed_official 133:d4dda5c437f0 1463 * @param hhash: HASH handle
mbed_official 133:d4dda5c437f0 1464 * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
mbed_official 133:d4dda5c437f0 1465 * @param Size: Length of the input buffer in bytes.
mbed_official 133:d4dda5c437f0 1466 * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
mbed_official 133:d4dda5c437f0 1467 * @retval HAL status
mbed_official 133:d4dda5c437f0 1468 */
mbed_official 133:d4dda5c437f0 1469 HAL_StatusTypeDef HAL_HMAC_MD5_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
mbed_official 133:d4dda5c437f0 1470 {
mbed_official 133:d4dda5c437f0 1471 uint32_t inputaddr = 0;
mbed_official 133:d4dda5c437f0 1472
mbed_official 133:d4dda5c437f0 1473 /* Process Locked */
mbed_official 133:d4dda5c437f0 1474 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 1475
mbed_official 133:d4dda5c437f0 1476 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 1477 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 1478
mbed_official 133:d4dda5c437f0 1479 /* Save buffer pointer and size in handle */
mbed_official 133:d4dda5c437f0 1480 hhash->pHashInBuffPtr = pInBuffer;
mbed_official 133:d4dda5c437f0 1481 hhash->HashBuffSize = Size;
mbed_official 133:d4dda5c437f0 1482 hhash->HashInCount = 0;
mbed_official 133:d4dda5c437f0 1483
mbed_official 133:d4dda5c437f0 1484 /* Check if initialization phase has already been performed */
mbed_official 133:d4dda5c437f0 1485 if(hhash->Phase == HAL_HASH_PHASE_READY)
mbed_official 133:d4dda5c437f0 1486 {
mbed_official 133:d4dda5c437f0 1487 /* Check if key size is greater than 64 bytes */
mbed_official 133:d4dda5c437f0 1488 if(hhash->Init.KeySize > 64)
mbed_official 133:d4dda5c437f0 1489 {
mbed_official 133:d4dda5c437f0 1490 /* Select the HMAC MD5 mode */
mbed_official 133:d4dda5c437f0 1491 HASH->CR |= (HASH_AlgoSelection_MD5 | HASH_AlgoMode_HMAC | HASH_HMACKeyType_LongKey | HASH_CR_INIT);
mbed_official 133:d4dda5c437f0 1492 }
mbed_official 133:d4dda5c437f0 1493 else
mbed_official 133:d4dda5c437f0 1494 {
mbed_official 133:d4dda5c437f0 1495 /* Select the HMAC MD5 mode */
mbed_official 133:d4dda5c437f0 1496 HASH->CR |= (HASH_AlgoSelection_MD5 | HASH_AlgoMode_HMAC | HASH_CR_INIT);
mbed_official 133:d4dda5c437f0 1497 }
mbed_official 133:d4dda5c437f0 1498 }
mbed_official 133:d4dda5c437f0 1499
mbed_official 133:d4dda5c437f0 1500 /* Set the phase */
mbed_official 133:d4dda5c437f0 1501 hhash->Phase = HAL_HASH_PHASE_PROCESS;
mbed_official 133:d4dda5c437f0 1502
mbed_official 133:d4dda5c437f0 1503 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 1504 __HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
mbed_official 133:d4dda5c437f0 1505
mbed_official 133:d4dda5c437f0 1506 /* Get the key address */
mbed_official 133:d4dda5c437f0 1507 inputaddr = (uint32_t)(hhash->Init.pKey);
mbed_official 133:d4dda5c437f0 1508
mbed_official 133:d4dda5c437f0 1509 /* Set the HASH DMA transfer complete callback */
mbed_official 133:d4dda5c437f0 1510 hhash->hdmain->XferCpltCallback = HASH_DMAXferCplt;
mbed_official 133:d4dda5c437f0 1511 /* Set the DMA error callback */
mbed_official 133:d4dda5c437f0 1512 hhash->hdmain->XferErrorCallback = HASH_DMAError;
mbed_official 133:d4dda5c437f0 1513
mbed_official 133:d4dda5c437f0 1514 /* Enable the DMA In DMA Stream */
mbed_official 133:d4dda5c437f0 1515 HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (hhash->Init.KeySize%4 ? (hhash->Init.KeySize+3)/4:hhash->Init.KeySize/4));
mbed_official 133:d4dda5c437f0 1516 /* Enable DMA requests */
mbed_official 133:d4dda5c437f0 1517 HASH->CR |= (HASH_CR_DMAE);
mbed_official 133:d4dda5c437f0 1518
mbed_official 133:d4dda5c437f0 1519 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 1520 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 1521
mbed_official 133:d4dda5c437f0 1522 /* Return function status */
mbed_official 133:d4dda5c437f0 1523 return HAL_OK;
mbed_official 133:d4dda5c437f0 1524 }
mbed_official 133:d4dda5c437f0 1525
mbed_official 133:d4dda5c437f0 1526 /**
mbed_official 133:d4dda5c437f0 1527 * @brief Initializes the HASH peripheral in HMAC SHA1 mode
mbed_official 133:d4dda5c437f0 1528 * then enables DMA to control data transfer.
mbed_official 133:d4dda5c437f0 1529 * @param hhash: HASH handle
mbed_official 133:d4dda5c437f0 1530 * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
mbed_official 133:d4dda5c437f0 1531 * @param Size: Length of the input buffer in bytes.
mbed_official 133:d4dda5c437f0 1532 * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
mbed_official 133:d4dda5c437f0 1533 * @retval HAL status
mbed_official 133:d4dda5c437f0 1534 */
mbed_official 133:d4dda5c437f0 1535 HAL_StatusTypeDef HAL_HMAC_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
mbed_official 133:d4dda5c437f0 1536 {
mbed_official 133:d4dda5c437f0 1537 uint32_t inputaddr = 0;
mbed_official 133:d4dda5c437f0 1538
mbed_official 133:d4dda5c437f0 1539 /* Process Locked */
mbed_official 133:d4dda5c437f0 1540 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 1541
mbed_official 133:d4dda5c437f0 1542 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 1543 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 1544
mbed_official 133:d4dda5c437f0 1545 /* Save buffer pointer and size in handle */
mbed_official 133:d4dda5c437f0 1546 hhash->pHashInBuffPtr = pInBuffer;
mbed_official 133:d4dda5c437f0 1547 hhash->HashBuffSize = Size;
mbed_official 133:d4dda5c437f0 1548 hhash->HashInCount = 0;
mbed_official 133:d4dda5c437f0 1549
mbed_official 133:d4dda5c437f0 1550 /* Check if initialization phase has already been performed */
mbed_official 133:d4dda5c437f0 1551 if(hhash->Phase == HAL_HASH_PHASE_READY)
mbed_official 133:d4dda5c437f0 1552 {
mbed_official 133:d4dda5c437f0 1553 /* Check if key size is greater than 64 bytes */
mbed_official 133:d4dda5c437f0 1554 if(hhash->Init.KeySize > 64)
mbed_official 133:d4dda5c437f0 1555 {
mbed_official 133:d4dda5c437f0 1556 /* Select the HMAC SHA1 mode */
mbed_official 133:d4dda5c437f0 1557 HASH->CR |= (HASH_AlgoSelection_SHA1 | HASH_AlgoMode_HMAC | HASH_HMACKeyType_LongKey | HASH_CR_INIT);
mbed_official 133:d4dda5c437f0 1558 }
mbed_official 133:d4dda5c437f0 1559 else
mbed_official 133:d4dda5c437f0 1560 {
mbed_official 133:d4dda5c437f0 1561 /* Select the HMAC SHA1 mode */
mbed_official 133:d4dda5c437f0 1562 HASH->CR |= (HASH_AlgoSelection_SHA1 | HASH_AlgoMode_HMAC | HASH_CR_INIT);
mbed_official 133:d4dda5c437f0 1563 }
mbed_official 133:d4dda5c437f0 1564 }
mbed_official 133:d4dda5c437f0 1565
mbed_official 133:d4dda5c437f0 1566 /* Set the phase */
mbed_official 133:d4dda5c437f0 1567 hhash->Phase = HAL_HASH_PHASE_PROCESS;
mbed_official 133:d4dda5c437f0 1568
mbed_official 133:d4dda5c437f0 1569 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 1570 __HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
mbed_official 133:d4dda5c437f0 1571
mbed_official 133:d4dda5c437f0 1572 /* Get the key address */
mbed_official 133:d4dda5c437f0 1573 inputaddr = (uint32_t)(hhash->Init.pKey);
mbed_official 133:d4dda5c437f0 1574
mbed_official 133:d4dda5c437f0 1575 /* Set the HASH DMA transfer complete callback */
mbed_official 133:d4dda5c437f0 1576 hhash->hdmain->XferCpltCallback = HASH_DMAXferCplt;
mbed_official 133:d4dda5c437f0 1577 /* Set the DMA error callback */
mbed_official 133:d4dda5c437f0 1578 hhash->hdmain->XferErrorCallback = HASH_DMAError;
mbed_official 133:d4dda5c437f0 1579
mbed_official 133:d4dda5c437f0 1580 /* Enable the DMA In DMA Stream */
mbed_official 133:d4dda5c437f0 1581 HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (hhash->Init.KeySize%4 ? (hhash->Init.KeySize+3)/4:hhash->Init.KeySize/4));
mbed_official 133:d4dda5c437f0 1582 /* Enable DMA requests */
mbed_official 133:d4dda5c437f0 1583 HASH->CR |= (HASH_CR_DMAE);
mbed_official 133:d4dda5c437f0 1584
mbed_official 133:d4dda5c437f0 1585 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 1586 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 1587
mbed_official 133:d4dda5c437f0 1588 /* Return function status */
mbed_official 133:d4dda5c437f0 1589 return HAL_OK;
mbed_official 133:d4dda5c437f0 1590 }
mbed_official 133:d4dda5c437f0 1591
mbed_official 133:d4dda5c437f0 1592 /**
mbed_official 133:d4dda5c437f0 1593 * @}
mbed_official 133:d4dda5c437f0 1594 */
mbed_official 133:d4dda5c437f0 1595
mbed_official 133:d4dda5c437f0 1596 /** @defgroup HASH_Group7 Peripheral State functions
mbed_official 133:d4dda5c437f0 1597 * @brief Peripheral State functions.
mbed_official 133:d4dda5c437f0 1598 *
mbed_official 133:d4dda5c437f0 1599 @verbatim
mbed_official 133:d4dda5c437f0 1600 ===============================================================================
mbed_official 133:d4dda5c437f0 1601 ##### Peripheral State functions #####
mbed_official 133:d4dda5c437f0 1602 ===============================================================================
mbed_official 133:d4dda5c437f0 1603 [..]
mbed_official 133:d4dda5c437f0 1604 This subsection permits to get in run-time the status of the peripheral.
mbed_official 133:d4dda5c437f0 1605
mbed_official 133:d4dda5c437f0 1606 @endverbatim
mbed_official 133:d4dda5c437f0 1607 * @{
mbed_official 133:d4dda5c437f0 1608 */
mbed_official 133:d4dda5c437f0 1609
mbed_official 133:d4dda5c437f0 1610 /**
mbed_official 133:d4dda5c437f0 1611 * @brief return the HASH state
mbed_official 133:d4dda5c437f0 1612 * @param hhash: HASH handle
mbed_official 133:d4dda5c437f0 1613 * @retval HAL state
mbed_official 133:d4dda5c437f0 1614 */
mbed_official 133:d4dda5c437f0 1615 HAL_HASH_STATETypeDef HAL_HASH_GetState(HASH_HandleTypeDef *hhash)
mbed_official 133:d4dda5c437f0 1616 {
mbed_official 133:d4dda5c437f0 1617 return hhash->State;
mbed_official 133:d4dda5c437f0 1618 }
mbed_official 133:d4dda5c437f0 1619
mbed_official 133:d4dda5c437f0 1620 /**
mbed_official 133:d4dda5c437f0 1621 * @}
mbed_official 133:d4dda5c437f0 1622 */
mbed_official 133:d4dda5c437f0 1623
mbed_official 133:d4dda5c437f0 1624 /**
mbed_official 133:d4dda5c437f0 1625 * @brief DMA HASH Input Data complete callback.
mbed_official 133:d4dda5c437f0 1626 * @param hdma: DMA handle
mbed_official 133:d4dda5c437f0 1627 * @retval None
mbed_official 133:d4dda5c437f0 1628 */
mbed_official 133:d4dda5c437f0 1629 static void HASH_DMAXferCplt(DMA_HandleTypeDef *hdma)
mbed_official 133:d4dda5c437f0 1630 {
mbed_official 133:d4dda5c437f0 1631 HASH_HandleTypeDef* hhash = ( HASH_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 133:d4dda5c437f0 1632 uint32_t inputaddr = 0;
mbed_official 133:d4dda5c437f0 1633 uint32_t buffersize = 0;
mbed_official 133:d4dda5c437f0 1634
mbed_official 133:d4dda5c437f0 1635 if((HASH->CR & HASH_CR_MODE) != HASH_CR_MODE)
mbed_official 133:d4dda5c437f0 1636 {
mbed_official 133:d4dda5c437f0 1637 /* Disable the DMA transfer */
mbed_official 133:d4dda5c437f0 1638 HASH->CR &= (uint32_t)(~HASH_CR_DMAE);
mbed_official 133:d4dda5c437f0 1639
mbed_official 133:d4dda5c437f0 1640 /* Change HASH peripheral state */
mbed_official 133:d4dda5c437f0 1641 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 1642
mbed_official 133:d4dda5c437f0 1643 /* Call Input data transfer complete callback */
mbed_official 133:d4dda5c437f0 1644 HAL_HASH_InCpltCallback(hhash);
mbed_official 133:d4dda5c437f0 1645 }
mbed_official 133:d4dda5c437f0 1646 else
mbed_official 133:d4dda5c437f0 1647 {
mbed_official 133:d4dda5c437f0 1648 /* Increment Interrupt counter */
mbed_official 133:d4dda5c437f0 1649 hhash->HashInCount++;
mbed_official 133:d4dda5c437f0 1650 /* Disable the DMA transfer before starting the next transfer */
mbed_official 133:d4dda5c437f0 1651 HASH->CR &= (uint32_t)(~HASH_CR_DMAE);
mbed_official 133:d4dda5c437f0 1652
mbed_official 133:d4dda5c437f0 1653 if(hhash->HashInCount <= 2)
mbed_official 133:d4dda5c437f0 1654 {
mbed_official 133:d4dda5c437f0 1655 /* In case HashInCount = 1, set the DMA to transfer data to HASH DIN register */
mbed_official 133:d4dda5c437f0 1656 if(hhash->HashInCount == 1)
mbed_official 133:d4dda5c437f0 1657 {
mbed_official 133:d4dda5c437f0 1658 inputaddr = (uint32_t)hhash->pHashInBuffPtr;
mbed_official 133:d4dda5c437f0 1659 buffersize = hhash->HashBuffSize;
mbed_official 133:d4dda5c437f0 1660 }
mbed_official 133:d4dda5c437f0 1661 /* In case HashInCount = 2, set the DMA to transfer key to HASH DIN register */
mbed_official 133:d4dda5c437f0 1662 else if(hhash->HashInCount == 2)
mbed_official 133:d4dda5c437f0 1663 {
mbed_official 133:d4dda5c437f0 1664 inputaddr = (uint32_t)hhash->Init.pKey;
mbed_official 133:d4dda5c437f0 1665 buffersize = hhash->Init.KeySize;
mbed_official 133:d4dda5c437f0 1666 }
mbed_official 133:d4dda5c437f0 1667 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 1668 HASH->STR |= 8 * (buffersize % 4);
mbed_official 133:d4dda5c437f0 1669
mbed_official 133:d4dda5c437f0 1670 /* Set the HASH DMA transfer complete */
mbed_official 133:d4dda5c437f0 1671 hhash->hdmain->XferCpltCallback = HASH_DMAXferCplt;
mbed_official 133:d4dda5c437f0 1672
mbed_official 133:d4dda5c437f0 1673 /* Enable the DMA In DMA Stream */
mbed_official 133:d4dda5c437f0 1674 HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (buffersize%4 ? (buffersize+3)/4:buffersize/4));
mbed_official 133:d4dda5c437f0 1675
mbed_official 133:d4dda5c437f0 1676 /* Enable DMA requests */
mbed_official 133:d4dda5c437f0 1677 HASH->CR |= (HASH_CR_DMAE);
mbed_official 133:d4dda5c437f0 1678 }
mbed_official 133:d4dda5c437f0 1679 else
mbed_official 133:d4dda5c437f0 1680 {
mbed_official 133:d4dda5c437f0 1681 /* Disable the DMA transfer */
mbed_official 133:d4dda5c437f0 1682 HASH->CR &= (uint32_t)(~HASH_CR_DMAE);
mbed_official 133:d4dda5c437f0 1683
mbed_official 133:d4dda5c437f0 1684 /* Reset the InCount */
mbed_official 133:d4dda5c437f0 1685 hhash->HashInCount = 0;
mbed_official 133:d4dda5c437f0 1686
mbed_official 133:d4dda5c437f0 1687 /* Change HASH peripheral state */
mbed_official 133:d4dda5c437f0 1688 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 1689
mbed_official 133:d4dda5c437f0 1690 /* Call Input data transfer complete callback */
mbed_official 133:d4dda5c437f0 1691 HAL_HASH_InCpltCallback(hhash);
mbed_official 133:d4dda5c437f0 1692 }
mbed_official 133:d4dda5c437f0 1693 }
mbed_official 133:d4dda5c437f0 1694 }
mbed_official 133:d4dda5c437f0 1695
mbed_official 133:d4dda5c437f0 1696 /**
mbed_official 133:d4dda5c437f0 1697 * @brief DMA HASH communication error callback.
mbed_official 133:d4dda5c437f0 1698 * @param hdma: DMA handle
mbed_official 133:d4dda5c437f0 1699 * @retval None
mbed_official 133:d4dda5c437f0 1700 */
mbed_official 133:d4dda5c437f0 1701 static void HASH_DMAError(DMA_HandleTypeDef *hdma)
mbed_official 133:d4dda5c437f0 1702 {
mbed_official 133:d4dda5c437f0 1703 HASH_HandleTypeDef* hhash = ( HASH_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 133:d4dda5c437f0 1704 hhash->State= HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 1705 HAL_HASH_ErrorCallback(hhash);
mbed_official 133:d4dda5c437f0 1706 }
mbed_official 133:d4dda5c437f0 1707
mbed_official 133:d4dda5c437f0 1708 /**
mbed_official 133:d4dda5c437f0 1709 * @brief Writes the input buffer in data register.
mbed_official 133:d4dda5c437f0 1710 * @param pInBuffer: Pointer to input buffer
mbed_official 133:d4dda5c437f0 1711 * @param Size: The size of input buffer
mbed_official 133:d4dda5c437f0 1712 * @retval None
mbed_official 133:d4dda5c437f0 1713 */
mbed_official 133:d4dda5c437f0 1714 static void HASH_WriteData(uint8_t *pInBuffer, uint32_t Size)
mbed_official 133:d4dda5c437f0 1715 {
mbed_official 133:d4dda5c437f0 1716 uint32_t buffercounter;
mbed_official 133:d4dda5c437f0 1717 uint32_t inputaddr = (uint32_t) pInBuffer;
mbed_official 133:d4dda5c437f0 1718
mbed_official 133:d4dda5c437f0 1719 for(buffercounter = 0; buffercounter < Size; buffercounter+=4)
mbed_official 133:d4dda5c437f0 1720 {
mbed_official 133:d4dda5c437f0 1721 HASH->DIN = *(uint32_t*)inputaddr;
mbed_official 133:d4dda5c437f0 1722 inputaddr+=4;
mbed_official 133:d4dda5c437f0 1723 }
mbed_official 133:d4dda5c437f0 1724 }
mbed_official 133:d4dda5c437f0 1725
mbed_official 133:d4dda5c437f0 1726 /**
mbed_official 133:d4dda5c437f0 1727 * @brief Provides the message digest result.
mbed_official 133:d4dda5c437f0 1728 * @param pMsgDigest: Pointer to the message digest
mbed_official 133:d4dda5c437f0 1729 * @param Size: The size of the message digest in bytes
mbed_official 133:d4dda5c437f0 1730 * @retval None
mbed_official 133:d4dda5c437f0 1731 */
mbed_official 133:d4dda5c437f0 1732 static void HASH_GetDigest(uint8_t *pMsgDigest, uint8_t Size)
mbed_official 133:d4dda5c437f0 1733 {
mbed_official 133:d4dda5c437f0 1734 uint32_t msgdigest = (uint32_t)pMsgDigest;
mbed_official 133:d4dda5c437f0 1735
mbed_official 133:d4dda5c437f0 1736 switch(Size)
mbed_official 133:d4dda5c437f0 1737 {
mbed_official 133:d4dda5c437f0 1738 case 16:
mbed_official 133:d4dda5c437f0 1739 /* Read the message digest */
mbed_official 133:d4dda5c437f0 1740 *(uint32_t*)(msgdigest) = __REV(HASH->HR[0]);
mbed_official 133:d4dda5c437f0 1741 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1742 *(uint32_t*)(msgdigest) = __REV(HASH->HR[1]);
mbed_official 133:d4dda5c437f0 1743 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1744 *(uint32_t*)(msgdigest) = __REV(HASH->HR[2]);
mbed_official 133:d4dda5c437f0 1745 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1746 *(uint32_t*)(msgdigest) = __REV(HASH->HR[3]);
mbed_official 133:d4dda5c437f0 1747 break;
mbed_official 133:d4dda5c437f0 1748 case 20:
mbed_official 133:d4dda5c437f0 1749 /* Read the message digest */
mbed_official 133:d4dda5c437f0 1750 *(uint32_t*)(msgdigest) = __REV(HASH->HR[0]);
mbed_official 133:d4dda5c437f0 1751 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1752 *(uint32_t*)(msgdigest) = __REV(HASH->HR[1]);
mbed_official 133:d4dda5c437f0 1753 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1754 *(uint32_t*)(msgdigest) = __REV(HASH->HR[2]);
mbed_official 133:d4dda5c437f0 1755 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1756 *(uint32_t*)(msgdigest) = __REV(HASH->HR[3]);
mbed_official 133:d4dda5c437f0 1757 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1758 *(uint32_t*)(msgdigest) = __REV(HASH->HR[4]);
mbed_official 133:d4dda5c437f0 1759 break;
mbed_official 133:d4dda5c437f0 1760 case 28:
mbed_official 133:d4dda5c437f0 1761 /* Read the message digest */
mbed_official 133:d4dda5c437f0 1762 *(uint32_t*)(msgdigest) = __REV(HASH->HR[0]);
mbed_official 133:d4dda5c437f0 1763 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1764 *(uint32_t*)(msgdigest) = __REV(HASH->HR[1]);
mbed_official 133:d4dda5c437f0 1765 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1766 *(uint32_t*)(msgdigest) = __REV(HASH->HR[2]);
mbed_official 133:d4dda5c437f0 1767 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1768 *(uint32_t*)(msgdigest) = __REV(HASH->HR[3]);
mbed_official 133:d4dda5c437f0 1769 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1770 *(uint32_t*)(msgdigest) = __REV(HASH->HR[4]);
mbed_official 133:d4dda5c437f0 1771 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1772 *(uint32_t*)(msgdigest) = __REV(HASH_DIGEST->HR[5]);
mbed_official 133:d4dda5c437f0 1773 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1774 *(uint32_t*)(msgdigest) = __REV(HASH_DIGEST->HR[6]);
mbed_official 133:d4dda5c437f0 1775 break;
mbed_official 133:d4dda5c437f0 1776 case 32:
mbed_official 133:d4dda5c437f0 1777 /* Read the message digest */
mbed_official 133:d4dda5c437f0 1778 *(uint32_t*)(msgdigest) = __REV(HASH->HR[0]);
mbed_official 133:d4dda5c437f0 1779 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1780 *(uint32_t*)(msgdigest) = __REV(HASH->HR[1]);
mbed_official 133:d4dda5c437f0 1781 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1782 *(uint32_t*)(msgdigest) = __REV(HASH->HR[2]);
mbed_official 133:d4dda5c437f0 1783 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1784 *(uint32_t*)(msgdigest) = __REV(HASH->HR[3]);
mbed_official 133:d4dda5c437f0 1785 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1786 *(uint32_t*)(msgdigest) = __REV(HASH->HR[4]);
mbed_official 133:d4dda5c437f0 1787 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1788 *(uint32_t*)(msgdigest) = __REV(HASH_DIGEST->HR[5]);
mbed_official 133:d4dda5c437f0 1789 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1790 *(uint32_t*)(msgdigest) = __REV(HASH_DIGEST->HR[6]);
mbed_official 133:d4dda5c437f0 1791 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1792 *(uint32_t*)(msgdigest) = __REV(HASH_DIGEST->HR[7]);
mbed_official 133:d4dda5c437f0 1793 break;
mbed_official 133:d4dda5c437f0 1794 default:
mbed_official 133:d4dda5c437f0 1795 break;
mbed_official 133:d4dda5c437f0 1796 }
mbed_official 133:d4dda5c437f0 1797 }
mbed_official 133:d4dda5c437f0 1798
mbed_official 133:d4dda5c437f0 1799 /**
mbed_official 133:d4dda5c437f0 1800 * @}
mbed_official 133:d4dda5c437f0 1801 */
mbed_official 133:d4dda5c437f0 1802 #endif /* STM32F415xx || STM32F417xx || STM32F437xx || STM32F439xx */
mbed_official 133:d4dda5c437f0 1803 #endif /* HAL_HASH_MODULE_ENABLED */
mbed_official 133:d4dda5c437f0 1804 /**
mbed_official 133:d4dda5c437f0 1805 * @}
mbed_official 133:d4dda5c437f0 1806 */
mbed_official 133:d4dda5c437f0 1807
mbed_official 133:d4dda5c437f0 1808 /**
mbed_official 133:d4dda5c437f0 1809 * @}
mbed_official 133:d4dda5c437f0 1810 */
mbed_official 133:d4dda5c437f0 1811
mbed_official 133:d4dda5c437f0 1812 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/