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targets/cmsis/TARGET_STM/TARGET_DISCO_F407VG/stm32f4xx_hal_flash_ex.h@133:d4dda5c437f0, 2014-03-24 (annotated)
- Committer:
- mbed_official
- Date:
- Mon Mar 24 17:45:07 2014 +0000
- Revision:
- 133:d4dda5c437f0
- Child:
- 242:7074e42da0b2
Synchronized with git revision 47b961246bed973fe4cb8932781ffc8025b78a61
Full URL: https://github.com/mbedmicro/mbed/commit/47b961246bed973fe4cb8932781ffc8025b78a61/
[STM32F4-Discovery (STM32F407VG)] initial port
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mbed_official | 133:d4dda5c437f0 | 1 | /** |
| mbed_official | 133:d4dda5c437f0 | 2 | ****************************************************************************** |
| mbed_official | 133:d4dda5c437f0 | 3 | * @file stm32f4xx_hal_flash_ex.h |
| mbed_official | 133:d4dda5c437f0 | 4 | * @author MCD Application Team |
| mbed_official | 133:d4dda5c437f0 | 5 | * @version V1.0.0 |
| mbed_official | 133:d4dda5c437f0 | 6 | * @date 18-February-2014 |
| mbed_official | 133:d4dda5c437f0 | 7 | * @brief Header file of FLASH HAL Extension module. |
| mbed_official | 133:d4dda5c437f0 | 8 | ****************************************************************************** |
| mbed_official | 133:d4dda5c437f0 | 9 | * @attention |
| mbed_official | 133:d4dda5c437f0 | 10 | * |
| mbed_official | 133:d4dda5c437f0 | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| mbed_official | 133:d4dda5c437f0 | 12 | * |
| mbed_official | 133:d4dda5c437f0 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| mbed_official | 133:d4dda5c437f0 | 14 | * are permitted provided that the following conditions are met: |
| mbed_official | 133:d4dda5c437f0 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| mbed_official | 133:d4dda5c437f0 | 16 | * this list of conditions and the following disclaimer. |
| mbed_official | 133:d4dda5c437f0 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| mbed_official | 133:d4dda5c437f0 | 18 | * this list of conditions and the following disclaimer in the documentation |
| mbed_official | 133:d4dda5c437f0 | 19 | * and/or other materials provided with the distribution. |
| mbed_official | 133:d4dda5c437f0 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| mbed_official | 133:d4dda5c437f0 | 21 | * may be used to endorse or promote products derived from this software |
| mbed_official | 133:d4dda5c437f0 | 22 | * without specific prior written permission. |
| mbed_official | 133:d4dda5c437f0 | 23 | * |
| mbed_official | 133:d4dda5c437f0 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| mbed_official | 133:d4dda5c437f0 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| mbed_official | 133:d4dda5c437f0 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| mbed_official | 133:d4dda5c437f0 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| mbed_official | 133:d4dda5c437f0 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| mbed_official | 133:d4dda5c437f0 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| mbed_official | 133:d4dda5c437f0 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| mbed_official | 133:d4dda5c437f0 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| mbed_official | 133:d4dda5c437f0 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| mbed_official | 133:d4dda5c437f0 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| mbed_official | 133:d4dda5c437f0 | 34 | * |
| mbed_official | 133:d4dda5c437f0 | 35 | ****************************************************************************** |
| mbed_official | 133:d4dda5c437f0 | 36 | */ |
| mbed_official | 133:d4dda5c437f0 | 37 | |
| mbed_official | 133:d4dda5c437f0 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| mbed_official | 133:d4dda5c437f0 | 39 | #ifndef __STM32F4xx_HAL_FLASH_EX_H |
| mbed_official | 133:d4dda5c437f0 | 40 | #define __STM32F4xx_HAL_FLASH_EX_H |
| mbed_official | 133:d4dda5c437f0 | 41 | |
| mbed_official | 133:d4dda5c437f0 | 42 | #ifdef __cplusplus |
| mbed_official | 133:d4dda5c437f0 | 43 | extern "C" { |
| mbed_official | 133:d4dda5c437f0 | 44 | #endif |
| mbed_official | 133:d4dda5c437f0 | 45 | |
| mbed_official | 133:d4dda5c437f0 | 46 | /* Includes ------------------------------------------------------------------*/ |
| mbed_official | 133:d4dda5c437f0 | 47 | #include "stm32f4xx_hal_def.h" |
| mbed_official | 133:d4dda5c437f0 | 48 | |
| mbed_official | 133:d4dda5c437f0 | 49 | /** @addtogroup STM32F4xx_HAL_Driver |
| mbed_official | 133:d4dda5c437f0 | 50 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 51 | */ |
| mbed_official | 133:d4dda5c437f0 | 52 | |
| mbed_official | 133:d4dda5c437f0 | 53 | /** @addtogroup FLASHEx |
| mbed_official | 133:d4dda5c437f0 | 54 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 55 | */ |
| mbed_official | 133:d4dda5c437f0 | 56 | |
| mbed_official | 133:d4dda5c437f0 | 57 | /* Exported types ------------------------------------------------------------*/ |
| mbed_official | 133:d4dda5c437f0 | 58 | |
| mbed_official | 133:d4dda5c437f0 | 59 | /** |
| mbed_official | 133:d4dda5c437f0 | 60 | * @brief FLASH Erase structure definition |
| mbed_official | 133:d4dda5c437f0 | 61 | */ |
| mbed_official | 133:d4dda5c437f0 | 62 | typedef struct |
| mbed_official | 133:d4dda5c437f0 | 63 | { |
| mbed_official | 133:d4dda5c437f0 | 64 | uint32_t TypeErase; /*!< TypeErase: Mass erase or sector Erase. |
| mbed_official | 133:d4dda5c437f0 | 65 | This parameter can be a value of @ref FLASHEx_Type_Erase */ |
| mbed_official | 133:d4dda5c437f0 | 66 | |
| mbed_official | 133:d4dda5c437f0 | 67 | uint32_t Banks; /*!< Banks: Select banks to erase when Mass erase is enabled |
| mbed_official | 133:d4dda5c437f0 | 68 | This parameter must be a value of @ref FLASHEx_Banks */ |
| mbed_official | 133:d4dda5c437f0 | 69 | |
| mbed_official | 133:d4dda5c437f0 | 70 | uint32_t Sector; /*!< Sector: Initial FLASH sector to erase when Mass erase is disabled |
| mbed_official | 133:d4dda5c437f0 | 71 | This parameter must be a value of @ref FLASHEx_Sectors */ |
| mbed_official | 133:d4dda5c437f0 | 72 | |
| mbed_official | 133:d4dda5c437f0 | 73 | uint32_t NbSectors; /*!< NbSectors: Number of sectors to be erased. |
| mbed_official | 133:d4dda5c437f0 | 74 | This parameter must be a value between 1 and (max number of sectors - value of Initial sector)*/ |
| mbed_official | 133:d4dda5c437f0 | 75 | |
| mbed_official | 133:d4dda5c437f0 | 76 | uint32_t VoltageRange;/*!< VoltageRange: The device voltage range which defines the erase parallelism |
| mbed_official | 133:d4dda5c437f0 | 77 | This parameter must be a value of @ref FLASHEx_Voltage_Range */ |
| mbed_official | 133:d4dda5c437f0 | 78 | |
| mbed_official | 133:d4dda5c437f0 | 79 | } FLASH_EraseInitTypeDef; |
| mbed_official | 133:d4dda5c437f0 | 80 | |
| mbed_official | 133:d4dda5c437f0 | 81 | /** |
| mbed_official | 133:d4dda5c437f0 | 82 | * @brief FLASH Option Bytes Program structure definition |
| mbed_official | 133:d4dda5c437f0 | 83 | */ |
| mbed_official | 133:d4dda5c437f0 | 84 | typedef struct |
| mbed_official | 133:d4dda5c437f0 | 85 | { |
| mbed_official | 133:d4dda5c437f0 | 86 | uint32_t OptionType; /*!< OptionType: Option byte to be configured. |
| mbed_official | 133:d4dda5c437f0 | 87 | This parameter can be a value of @ref FLASHEx_Option_Type */ |
| mbed_official | 133:d4dda5c437f0 | 88 | |
| mbed_official | 133:d4dda5c437f0 | 89 | uint32_t WRPState; /*!< WRPState: Write protection activation or deactivation. |
| mbed_official | 133:d4dda5c437f0 | 90 | This parameter can be a value of @ref FLASHEx_WRP_State */ |
| mbed_official | 133:d4dda5c437f0 | 91 | |
| mbed_official | 133:d4dda5c437f0 | 92 | uint32_t WRPSector; /*!< WRPSector: specifies the sector(s) to be write protected |
| mbed_official | 133:d4dda5c437f0 | 93 | The value of this parameter depend on device used within the same series */ |
| mbed_official | 133:d4dda5c437f0 | 94 | |
| mbed_official | 133:d4dda5c437f0 | 95 | uint32_t Banks; /*!< Banks: Select banks for WRP activation/deactivation of all sectors |
| mbed_official | 133:d4dda5c437f0 | 96 | This parameter must be a value of @ref FLASHEx_Banks */ |
| mbed_official | 133:d4dda5c437f0 | 97 | |
| mbed_official | 133:d4dda5c437f0 | 98 | uint32_t RDPLevel; /*!< RDPLevel: Set the read protection level.. |
| mbed_official | 133:d4dda5c437f0 | 99 | This parameter can be a value of @ref FLASHEx_Option_Bytes_Read_Protection */ |
| mbed_official | 133:d4dda5c437f0 | 100 | |
| mbed_official | 133:d4dda5c437f0 | 101 | uint32_t BORLevel; /*!< BORLevel: Set the BOR Level. |
| mbed_official | 133:d4dda5c437f0 | 102 | This parameter can be a value of @ref FLASHEx_BOR_Reset_Level */ |
| mbed_official | 133:d4dda5c437f0 | 103 | |
| mbed_official | 133:d4dda5c437f0 | 104 | uint8_t USERConfig; /*!< USERConfig: Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY. |
| mbed_official | 133:d4dda5c437f0 | 105 | This parameter can be a combination of @ref FLASHEx_Option_Bytes_IWatchdog, @ref FLASHEx_Option_Bytes_nRST_STOP and @ref FLASHEx_Option_Bytes_nRST_STDBY*/ |
| mbed_official | 133:d4dda5c437f0 | 106 | |
| mbed_official | 133:d4dda5c437f0 | 107 | } FLASH_OBProgramInitTypeDef; |
| mbed_official | 133:d4dda5c437f0 | 108 | |
| mbed_official | 133:d4dda5c437f0 | 109 | /** |
| mbed_official | 133:d4dda5c437f0 | 110 | * @brief FLASH Advanced Option Bytes Program structure definition |
| mbed_official | 133:d4dda5c437f0 | 111 | */ |
| mbed_official | 133:d4dda5c437f0 | 112 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F401xC) || defined(STM32F401xE) |
| mbed_official | 133:d4dda5c437f0 | 113 | typedef struct |
| mbed_official | 133:d4dda5c437f0 | 114 | { |
| mbed_official | 133:d4dda5c437f0 | 115 | uint32_t OptionType; /*!< OptionType: Option byte to be configured for extension . |
| mbed_official | 133:d4dda5c437f0 | 116 | This parameter can be a value of @ref FLASHEx_Advanced_Option_Type */ |
| mbed_official | 133:d4dda5c437f0 | 117 | |
| mbed_official | 133:d4dda5c437f0 | 118 | uint32_t PCROPState; /*!< PCROPState: PCROP activation or deactivation. |
| mbed_official | 133:d4dda5c437f0 | 119 | This parameter can be a value of @ref FLASHEx_PCROP_State */ |
| mbed_official | 133:d4dda5c437f0 | 120 | |
| mbed_official | 133:d4dda5c437f0 | 121 | #if defined (STM32F401xC) || defined (STM32F401xE) |
| mbed_official | 133:d4dda5c437f0 | 122 | uint16_t Sectors; /*!< Sectors: specifies the sector(s) set for PCROP |
| mbed_official | 133:d4dda5c437f0 | 123 | This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */ |
| mbed_official | 133:d4dda5c437f0 | 124 | #endif /* STM32F401xC || STM32F401xE */ |
| mbed_official | 133:d4dda5c437f0 | 125 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) |
| mbed_official | 133:d4dda5c437f0 | 126 | uint32_t Banks; /*!< Banks: Select banks for PCROP activation/deactivation of all sectors |
| mbed_official | 133:d4dda5c437f0 | 127 | This parameter must be a value of @ref FLASHEx_Banks */ |
| mbed_official | 133:d4dda5c437f0 | 128 | |
| mbed_official | 133:d4dda5c437f0 | 129 | uint16_t SectorsBank1; /*!< SectorsBank1: specifies the sector(s) set for PCROP for Bank1 |
| mbed_official | 133:d4dda5c437f0 | 130 | This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */ |
| mbed_official | 133:d4dda5c437f0 | 131 | |
| mbed_official | 133:d4dda5c437f0 | 132 | uint16_t SectorsBank2; /*!< SectorsBank2: specifies the sector(s) set for PCROP for Bank2 |
| mbed_official | 133:d4dda5c437f0 | 133 | This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */ |
| mbed_official | 133:d4dda5c437f0 | 134 | |
| mbed_official | 133:d4dda5c437f0 | 135 | uint8_t BootConfig; /*!< BootConfig: specifies Option bytes for boot config |
| mbed_official | 133:d4dda5c437f0 | 136 | This parameter can be a value of @ref FLASHEx_Dual_Boot */ |
| mbed_official | 133:d4dda5c437f0 | 137 | |
| mbed_official | 133:d4dda5c437f0 | 138 | #endif /*STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ |
| mbed_official | 133:d4dda5c437f0 | 139 | } FLASH_AdvOBProgramInitTypeDef; |
| mbed_official | 133:d4dda5c437f0 | 140 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE */ |
| mbed_official | 133:d4dda5c437f0 | 141 | |
| mbed_official | 133:d4dda5c437f0 | 142 | /* Exported constants --------------------------------------------------------*/ |
| mbed_official | 133:d4dda5c437f0 | 143 | |
| mbed_official | 133:d4dda5c437f0 | 144 | /** @defgroup FLASH_Exported_Constants FLASH Exported Constants |
| mbed_official | 133:d4dda5c437f0 | 145 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 146 | */ |
| mbed_official | 133:d4dda5c437f0 | 147 | |
| mbed_official | 133:d4dda5c437f0 | 148 | /** @defgroup FLASHEx_Type_Erase FLASH Type Erase |
| mbed_official | 133:d4dda5c437f0 | 149 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 150 | */ |
| mbed_official | 133:d4dda5c437f0 | 151 | #define TYPEERASE_SECTORS ((uint32_t)0x00) /*!< Sectors erase only */ |
| mbed_official | 133:d4dda5c437f0 | 152 | #define TYPEERASE_MASSERASE ((uint32_t)0x01) /*!< Flash Mass erase activation */ |
| mbed_official | 133:d4dda5c437f0 | 153 | |
| mbed_official | 133:d4dda5c437f0 | 154 | #define IS_TYPEERASE(VALUE)(((VALUE) == TYPEERASE_SECTORS) || \ |
| mbed_official | 133:d4dda5c437f0 | 155 | ((VALUE) == TYPEERASE_MASSERASE)) |
| mbed_official | 133:d4dda5c437f0 | 156 | |
| mbed_official | 133:d4dda5c437f0 | 157 | /** |
| mbed_official | 133:d4dda5c437f0 | 158 | * @} |
| mbed_official | 133:d4dda5c437f0 | 159 | */ |
| mbed_official | 133:d4dda5c437f0 | 160 | |
| mbed_official | 133:d4dda5c437f0 | 161 | /** @defgroup FLASHEx_Voltage_Range FLASH Voltage Range |
| mbed_official | 133:d4dda5c437f0 | 162 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 163 | */ |
| mbed_official | 133:d4dda5c437f0 | 164 | #define VOLTAGE_RANGE_1 ((uint32_t)0x00) /*!< Device operating range: 1.8V to 2.1V */ |
| mbed_official | 133:d4dda5c437f0 | 165 | #define VOLTAGE_RANGE_2 ((uint32_t)0x01) /*!< Device operating range: 2.1V to 2.7V */ |
| mbed_official | 133:d4dda5c437f0 | 166 | #define VOLTAGE_RANGE_3 ((uint32_t)0x02) /*!< Device operating range: 2.7V to 3.6V */ |
| mbed_official | 133:d4dda5c437f0 | 167 | #define VOLTAGE_RANGE_4 ((uint32_t)0x03) /*!< Device operating range: 2.7V to 3.6V + External Vpp */ |
| mbed_official | 133:d4dda5c437f0 | 168 | |
| mbed_official | 133:d4dda5c437f0 | 169 | #define IS_VOLTAGERANGE(RANGE)(((RANGE) == VOLTAGE_RANGE_1) || \ |
| mbed_official | 133:d4dda5c437f0 | 170 | ((RANGE) == VOLTAGE_RANGE_2) || \ |
| mbed_official | 133:d4dda5c437f0 | 171 | ((RANGE) == VOLTAGE_RANGE_3) || \ |
| mbed_official | 133:d4dda5c437f0 | 172 | ((RANGE) == VOLTAGE_RANGE_4)) |
| mbed_official | 133:d4dda5c437f0 | 173 | |
| mbed_official | 133:d4dda5c437f0 | 174 | /** |
| mbed_official | 133:d4dda5c437f0 | 175 | * @} |
| mbed_official | 133:d4dda5c437f0 | 176 | */ |
| mbed_official | 133:d4dda5c437f0 | 177 | |
| mbed_official | 133:d4dda5c437f0 | 178 | /** @defgroup FLASHEx_WRP_State FLASH WRP State |
| mbed_official | 133:d4dda5c437f0 | 179 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 180 | */ |
| mbed_official | 133:d4dda5c437f0 | 181 | #define WRPSTATE_DISABLE ((uint32_t)0x00) /*!< Disable the write protection of the desired bank 1 sectors */ |
| mbed_official | 133:d4dda5c437f0 | 182 | #define WRPSTATE_ENABLE ((uint32_t)0x01) /*!< Enable the write protection of the desired bank 1 sectors */ |
| mbed_official | 133:d4dda5c437f0 | 183 | |
| mbed_official | 133:d4dda5c437f0 | 184 | #define IS_WRPSTATE(VALUE)(((VALUE) == WRPSTATE_DISABLE) || \ |
| mbed_official | 133:d4dda5c437f0 | 185 | ((VALUE) == WRPSTATE_ENABLE)) |
| mbed_official | 133:d4dda5c437f0 | 186 | |
| mbed_official | 133:d4dda5c437f0 | 187 | /** |
| mbed_official | 133:d4dda5c437f0 | 188 | * @} |
| mbed_official | 133:d4dda5c437f0 | 189 | */ |
| mbed_official | 133:d4dda5c437f0 | 190 | |
| mbed_official | 133:d4dda5c437f0 | 191 | /** @defgroup FLASHEx_Option_Type FLASH Option Type |
| mbed_official | 133:d4dda5c437f0 | 192 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 193 | */ |
| mbed_official | 133:d4dda5c437f0 | 194 | #define OPTIONBYTE_WRP ((uint32_t)0x01) /*!< WRP option byte configuration */ |
| mbed_official | 133:d4dda5c437f0 | 195 | #define OPTIONBYTE_RDP ((uint32_t)0x02) /*!< RDP option byte configuration */ |
| mbed_official | 133:d4dda5c437f0 | 196 | #define OPTIONBYTE_USER ((uint32_t)0x04) /*!< USER option byte configuration */ |
| mbed_official | 133:d4dda5c437f0 | 197 | #define OPTIONBYTE_BOR ((uint32_t)0x08) /*!< BOR option byte configuration */ |
| mbed_official | 133:d4dda5c437f0 | 198 | |
| mbed_official | 133:d4dda5c437f0 | 199 | #define IS_OPTIONBYTE(VALUE)(((VALUE) < (OPTIONBYTE_WRP|OPTIONBYTE_RDP|OPTIONBYTE_USER|OPTIONBYTE_BOR))) |
| mbed_official | 133:d4dda5c437f0 | 200 | |
| mbed_official | 133:d4dda5c437f0 | 201 | /** |
| mbed_official | 133:d4dda5c437f0 | 202 | * @} |
| mbed_official | 133:d4dda5c437f0 | 203 | */ |
| mbed_official | 133:d4dda5c437f0 | 204 | |
| mbed_official | 133:d4dda5c437f0 | 205 | /** @defgroup FLASHEx_Option_Bytes_Read_Protection FLASH Option Bytes Read Protection |
| mbed_official | 133:d4dda5c437f0 | 206 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 207 | */ |
| mbed_official | 133:d4dda5c437f0 | 208 | #define OB_RDP_LEVEL_0 ((uint8_t)0xAA) |
| mbed_official | 133:d4dda5c437f0 | 209 | #define OB_RDP_LEVEL_1 ((uint8_t)0x55) |
| mbed_official | 133:d4dda5c437f0 | 210 | /*#define OB_RDP_LEVEL_2 ((uint8_t)0xCC)*/ /*!< Warning: When enabling read protection level 2 |
| mbed_official | 133:d4dda5c437f0 | 211 | it s no more possible to go back to level 1 or 0 */ |
| mbed_official | 133:d4dda5c437f0 | 212 | #define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) ||\ |
| mbed_official | 133:d4dda5c437f0 | 213 | ((LEVEL) == OB_RDP_LEVEL_1))/*||\ |
| mbed_official | 133:d4dda5c437f0 | 214 | ((LEVEL) == OB_RDP_LEVEL_2))*/ |
| mbed_official | 133:d4dda5c437f0 | 215 | /** |
| mbed_official | 133:d4dda5c437f0 | 216 | * @} |
| mbed_official | 133:d4dda5c437f0 | 217 | */ |
| mbed_official | 133:d4dda5c437f0 | 218 | |
| mbed_official | 133:d4dda5c437f0 | 219 | /** @defgroup FLASHEx_Option_Bytes_IWatchdog FLASH Option Bytes IWatchdog |
| mbed_official | 133:d4dda5c437f0 | 220 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 221 | */ |
| mbed_official | 133:d4dda5c437f0 | 222 | #define OB_IWDG_SW ((uint8_t)0x20) /*!< Software IWDG selected */ |
| mbed_official | 133:d4dda5c437f0 | 223 | #define OB_IWDG_HW ((uint8_t)0x00) /*!< Hardware IWDG selected */ |
| mbed_official | 133:d4dda5c437f0 | 224 | #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW)) |
| mbed_official | 133:d4dda5c437f0 | 225 | /** |
| mbed_official | 133:d4dda5c437f0 | 226 | * @} |
| mbed_official | 133:d4dda5c437f0 | 227 | */ |
| mbed_official | 133:d4dda5c437f0 | 228 | |
| mbed_official | 133:d4dda5c437f0 | 229 | /** @defgroup FLASHEx_Option_Bytes_nRST_STOP FLASH Option Bytes nRST_STOP |
| mbed_official | 133:d4dda5c437f0 | 230 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 231 | */ |
| mbed_official | 133:d4dda5c437f0 | 232 | #define OB_STOP_NO_RST ((uint8_t)0x40) /*!< No reset generated when entering in STOP */ |
| mbed_official | 133:d4dda5c437f0 | 233 | #define OB_STOP_RST ((uint8_t)0x00) /*!< Reset generated when entering in STOP */ |
| mbed_official | 133:d4dda5c437f0 | 234 | #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NO_RST) || ((SOURCE) == OB_STOP_RST)) |
| mbed_official | 133:d4dda5c437f0 | 235 | /** |
| mbed_official | 133:d4dda5c437f0 | 236 | * @} |
| mbed_official | 133:d4dda5c437f0 | 237 | */ |
| mbed_official | 133:d4dda5c437f0 | 238 | |
| mbed_official | 133:d4dda5c437f0 | 239 | |
| mbed_official | 133:d4dda5c437f0 | 240 | /** @defgroup FLASHEx_Option_Bytes_nRST_STDBY FLASH Option Bytes nRST_STDBY |
| mbed_official | 133:d4dda5c437f0 | 241 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 242 | */ |
| mbed_official | 133:d4dda5c437f0 | 243 | #define OB_STDBY_NO_RST ((uint8_t)0x80) /*!< No reset generated when entering in STANDBY */ |
| mbed_official | 133:d4dda5c437f0 | 244 | #define OB_STDBY_RST ((uint8_t)0x00) /*!< Reset generated when entering in STANDBY */ |
| mbed_official | 133:d4dda5c437f0 | 245 | #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NO_RST) || ((SOURCE) == OB_STDBY_RST)) |
| mbed_official | 133:d4dda5c437f0 | 246 | /** |
| mbed_official | 133:d4dda5c437f0 | 247 | * @} |
| mbed_official | 133:d4dda5c437f0 | 248 | */ |
| mbed_official | 133:d4dda5c437f0 | 249 | |
| mbed_official | 133:d4dda5c437f0 | 250 | /** @defgroup FLASHEx_BOR_Reset_Level FLASH BOR Reset Level |
| mbed_official | 133:d4dda5c437f0 | 251 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 252 | */ |
| mbed_official | 133:d4dda5c437f0 | 253 | #define OB_BOR_LEVEL3 ((uint8_t)0x00) /*!< Supply voltage ranges from 2.70 to 3.60 V */ |
| mbed_official | 133:d4dda5c437f0 | 254 | #define OB_BOR_LEVEL2 ((uint8_t)0x04) /*!< Supply voltage ranges from 2.40 to 2.70 V */ |
| mbed_official | 133:d4dda5c437f0 | 255 | #define OB_BOR_LEVEL1 ((uint8_t)0x08) /*!< Supply voltage ranges from 2.10 to 2.40 V */ |
| mbed_official | 133:d4dda5c437f0 | 256 | #define OB_BOR_OFF ((uint8_t)0x0C) /*!< Supply voltage ranges from 1.62 to 2.10 V */ |
| mbed_official | 133:d4dda5c437f0 | 257 | #define IS_OB_BOR_LEVEL(LEVEL) (((LEVEL) == OB_BOR_LEVEL1) || ((LEVEL) == OB_BOR_LEVEL2) ||\ |
| mbed_official | 133:d4dda5c437f0 | 258 | ((LEVEL) == OB_BOR_LEVEL3) || ((LEVEL) == OB_BOR_OFF)) |
| mbed_official | 133:d4dda5c437f0 | 259 | /** |
| mbed_official | 133:d4dda5c437f0 | 260 | * @} |
| mbed_official | 133:d4dda5c437f0 | 261 | */ |
| mbed_official | 133:d4dda5c437f0 | 262 | |
| mbed_official | 133:d4dda5c437f0 | 263 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F401xC) || defined(STM32F401xE) |
| mbed_official | 133:d4dda5c437f0 | 264 | /** @defgroup FLASHEx_PCROP_State FLASH PCROP State |
| mbed_official | 133:d4dda5c437f0 | 265 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 266 | */ |
| mbed_official | 133:d4dda5c437f0 | 267 | #define PCROPSTATE_DISABLE ((uint32_t)0x00) /*!< Disable PCROP */ |
| mbed_official | 133:d4dda5c437f0 | 268 | #define PCROPSTATE_ENABLE ((uint32_t)0x01) /*!< Enable PCROP */ |
| mbed_official | 133:d4dda5c437f0 | 269 | |
| mbed_official | 133:d4dda5c437f0 | 270 | #define IS_PCROPSTATE(VALUE)(((VALUE) == PCROPSTATE_DISABLE) || \ |
| mbed_official | 133:d4dda5c437f0 | 271 | ((VALUE) == PCROPSTATE_ENABLE)) |
| mbed_official | 133:d4dda5c437f0 | 272 | |
| mbed_official | 133:d4dda5c437f0 | 273 | /** |
| mbed_official | 133:d4dda5c437f0 | 274 | * @} |
| mbed_official | 133:d4dda5c437f0 | 275 | */ |
| mbed_official | 133:d4dda5c437f0 | 276 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE */ |
| mbed_official | 133:d4dda5c437f0 | 277 | |
| mbed_official | 133:d4dda5c437f0 | 278 | /** @defgroup FLASHEx_Advanced_Option_Type FLASH Advanced Option Type |
| mbed_official | 133:d4dda5c437f0 | 279 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 280 | */ |
| mbed_official | 133:d4dda5c437f0 | 281 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) |
| mbed_official | 133:d4dda5c437f0 | 282 | #define OBEX_PCROP ((uint32_t)0x01) /*!< PCROP option byte configuration */ |
| mbed_official | 133:d4dda5c437f0 | 283 | #define OBEX_BOOTCONFIG ((uint32_t)0x02) /*!< BOOTConfig option byte configuration */ |
| mbed_official | 133:d4dda5c437f0 | 284 | |
| mbed_official | 133:d4dda5c437f0 | 285 | #define IS_OBEX(VALUE)(((VALUE) == OBEX_PCROP) || \ |
| mbed_official | 133:d4dda5c437f0 | 286 | ((VALUE) == OBEX_BOOTCONFIG)) |
| mbed_official | 133:d4dda5c437f0 | 287 | |
| mbed_official | 133:d4dda5c437f0 | 288 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ |
| mbed_official | 133:d4dda5c437f0 | 289 | |
| mbed_official | 133:d4dda5c437f0 | 290 | #if defined(STM32F401xC) || defined(STM32F401xE) |
| mbed_official | 133:d4dda5c437f0 | 291 | #define OBEX_PCROP ((uint32_t)0x01) /*!<PCROP option byte configuration */ |
| mbed_official | 133:d4dda5c437f0 | 292 | |
| mbed_official | 133:d4dda5c437f0 | 293 | #define IS_OBEX(VALUE)(((VALUE) == OBEX_PCROP)) |
| mbed_official | 133:d4dda5c437f0 | 294 | |
| mbed_official | 133:d4dda5c437f0 | 295 | #endif /* STM32F401xC || STM32F401xE */ |
| mbed_official | 133:d4dda5c437f0 | 296 | /** |
| mbed_official | 133:d4dda5c437f0 | 297 | * @} |
| mbed_official | 133:d4dda5c437f0 | 298 | */ |
| mbed_official | 133:d4dda5c437f0 | 299 | |
| mbed_official | 133:d4dda5c437f0 | 300 | /** @defgroup FLASH_Latency FLASH Latency |
| mbed_official | 133:d4dda5c437f0 | 301 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 302 | */ |
| mbed_official | 133:d4dda5c437f0 | 303 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| mbed_official | 133:d4dda5c437f0 | 304 | #define FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS /*!< FLASH Zero Latency cycle */ |
| mbed_official | 133:d4dda5c437f0 | 305 | #define FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS /*!< FLASH One Latency cycle */ |
| mbed_official | 133:d4dda5c437f0 | 306 | #define FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS /*!< FLASH Two Latency cycles */ |
| mbed_official | 133:d4dda5c437f0 | 307 | #define FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS /*!< FLASH Three Latency cycles */ |
| mbed_official | 133:d4dda5c437f0 | 308 | #define FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS /*!< FLASH Four Latency cycles */ |
| mbed_official | 133:d4dda5c437f0 | 309 | #define FLASH_LATENCY_5 FLASH_ACR_LATENCY_5WS /*!< FLASH Five Latency cycles */ |
| mbed_official | 133:d4dda5c437f0 | 310 | #define FLASH_LATENCY_6 FLASH_ACR_LATENCY_6WS /*!< FLASH Six Latency cycles */ |
| mbed_official | 133:d4dda5c437f0 | 311 | #define FLASH_LATENCY_7 FLASH_ACR_LATENCY_7WS /*!< FLASH Seven Latency cycles */ |
| mbed_official | 133:d4dda5c437f0 | 312 | #define FLASH_LATENCY_8 FLASH_ACR_LATENCY_8WS /*!< FLASH Eight Latency cycles */ |
| mbed_official | 133:d4dda5c437f0 | 313 | #define FLASH_LATENCY_9 FLASH_ACR_LATENCY_9WS /*!< FLASH Nine Latency cycles */ |
| mbed_official | 133:d4dda5c437f0 | 314 | #define FLASH_LATENCY_10 FLASH_ACR_LATENCY_10WS /*!< FLASH Ten Latency cycles */ |
| mbed_official | 133:d4dda5c437f0 | 315 | #define FLASH_LATENCY_11 FLASH_ACR_LATENCY_11WS /*!< FLASH Eleven Latency cycles */ |
| mbed_official | 133:d4dda5c437f0 | 316 | #define FLASH_LATENCY_12 FLASH_ACR_LATENCY_12WS /*!< FLASH Twelve Latency cycles */ |
| mbed_official | 133:d4dda5c437f0 | 317 | #define FLASH_LATENCY_13 FLASH_ACR_LATENCY_13WS /*!< FLASH Thirteen Latency cycles */ |
| mbed_official | 133:d4dda5c437f0 | 318 | #define FLASH_LATENCY_14 FLASH_ACR_LATENCY_14WS /*!< FLASH Fourteen Latency cycles */ |
| mbed_official | 133:d4dda5c437f0 | 319 | #define FLASH_LATENCY_15 FLASH_ACR_LATENCY_15WS /*!< FLASH Fifteen Latency cycles */ |
| mbed_official | 133:d4dda5c437f0 | 320 | |
| mbed_official | 133:d4dda5c437f0 | 321 | |
| mbed_official | 133:d4dda5c437f0 | 322 | #define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) || \ |
| mbed_official | 133:d4dda5c437f0 | 323 | ((LATENCY) == FLASH_LATENCY_1) || \ |
| mbed_official | 133:d4dda5c437f0 | 324 | ((LATENCY) == FLASH_LATENCY_2) || \ |
| mbed_official | 133:d4dda5c437f0 | 325 | ((LATENCY) == FLASH_LATENCY_3) || \ |
| mbed_official | 133:d4dda5c437f0 | 326 | ((LATENCY) == FLASH_LATENCY_4) || \ |
| mbed_official | 133:d4dda5c437f0 | 327 | ((LATENCY) == FLASH_LATENCY_5) || \ |
| mbed_official | 133:d4dda5c437f0 | 328 | ((LATENCY) == FLASH_LATENCY_6) || \ |
| mbed_official | 133:d4dda5c437f0 | 329 | ((LATENCY) == FLASH_LATENCY_7) || \ |
| mbed_official | 133:d4dda5c437f0 | 330 | ((LATENCY) == FLASH_LATENCY_8) || \ |
| mbed_official | 133:d4dda5c437f0 | 331 | ((LATENCY) == FLASH_LATENCY_9) || \ |
| mbed_official | 133:d4dda5c437f0 | 332 | ((LATENCY) == FLASH_LATENCY_10) || \ |
| mbed_official | 133:d4dda5c437f0 | 333 | ((LATENCY) == FLASH_LATENCY_11) || \ |
| mbed_official | 133:d4dda5c437f0 | 334 | ((LATENCY) == FLASH_LATENCY_12) || \ |
| mbed_official | 133:d4dda5c437f0 | 335 | ((LATENCY) == FLASH_LATENCY_13) || \ |
| mbed_official | 133:d4dda5c437f0 | 336 | ((LATENCY) == FLASH_LATENCY_14) || \ |
| mbed_official | 133:d4dda5c437f0 | 337 | ((LATENCY) == FLASH_LATENCY_15)) |
| mbed_official | 133:d4dda5c437f0 | 338 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| mbed_official | 133:d4dda5c437f0 | 339 | |
| mbed_official | 133:d4dda5c437f0 | 340 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F401xC) || defined(STM32F401xE) |
| mbed_official | 133:d4dda5c437f0 | 341 | #define FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS /*!< FLASH Zero Latency cycle */ |
| mbed_official | 133:d4dda5c437f0 | 342 | #define FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS /*!< FLASH One Latency cycle */ |
| mbed_official | 133:d4dda5c437f0 | 343 | #define FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS /*!< FLASH Two Latency cycles */ |
| mbed_official | 133:d4dda5c437f0 | 344 | #define FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS /*!< FLASH Three Latency cycles */ |
| mbed_official | 133:d4dda5c437f0 | 345 | #define FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS /*!< FLASH Four Latency cycles */ |
| mbed_official | 133:d4dda5c437f0 | 346 | #define FLASH_LATENCY_5 FLASH_ACR_LATENCY_5WS /*!< FLASH Five Latency cycles */ |
| mbed_official | 133:d4dda5c437f0 | 347 | #define FLASH_LATENCY_6 FLASH_ACR_LATENCY_6WS /*!< FLASH Six Latency cycles */ |
| mbed_official | 133:d4dda5c437f0 | 348 | #define FLASH_LATENCY_7 FLASH_ACR_LATENCY_7WS /*!< FLASH Seven Latency cycles */ |
| mbed_official | 133:d4dda5c437f0 | 349 | |
| mbed_official | 133:d4dda5c437f0 | 350 | |
| mbed_official | 133:d4dda5c437f0 | 351 | #define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) || \ |
| mbed_official | 133:d4dda5c437f0 | 352 | ((LATENCY) == FLASH_LATENCY_1) || \ |
| mbed_official | 133:d4dda5c437f0 | 353 | ((LATENCY) == FLASH_LATENCY_2) || \ |
| mbed_official | 133:d4dda5c437f0 | 354 | ((LATENCY) == FLASH_LATENCY_3) || \ |
| mbed_official | 133:d4dda5c437f0 | 355 | ((LATENCY) == FLASH_LATENCY_4) || \ |
| mbed_official | 133:d4dda5c437f0 | 356 | ((LATENCY) == FLASH_LATENCY_5) || \ |
| mbed_official | 133:d4dda5c437f0 | 357 | ((LATENCY) == FLASH_LATENCY_6) || \ |
| mbed_official | 133:d4dda5c437f0 | 358 | ((LATENCY) == FLASH_LATENCY_7)) |
| mbed_official | 133:d4dda5c437f0 | 359 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE */ |
| mbed_official | 133:d4dda5c437f0 | 360 | |
| mbed_official | 133:d4dda5c437f0 | 361 | /** |
| mbed_official | 133:d4dda5c437f0 | 362 | * @} |
| mbed_official | 133:d4dda5c437f0 | 363 | */ |
| mbed_official | 133:d4dda5c437f0 | 364 | |
| mbed_official | 133:d4dda5c437f0 | 365 | |
| mbed_official | 133:d4dda5c437f0 | 366 | /** @defgroup FLASHEx_Banks FLASH Banks |
| mbed_official | 133:d4dda5c437f0 | 367 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 368 | */ |
| mbed_official | 133:d4dda5c437f0 | 369 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| mbed_official | 133:d4dda5c437f0 | 370 | #define FLASH_BANK_1 ((uint32_t)1) /*!< Bank 1 */ |
| mbed_official | 133:d4dda5c437f0 | 371 | #define FLASH_BANK_2 ((uint32_t)2) /*!< Bank 2 */ |
| mbed_official | 133:d4dda5c437f0 | 372 | #define FLASH_BANK_BOTH ((uint32_t)FLASH_BANK_1 | FLASH_BANK_2) /*!< Bank1 and Bank2 */ |
| mbed_official | 133:d4dda5c437f0 | 373 | |
| mbed_official | 133:d4dda5c437f0 | 374 | #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1) || \ |
| mbed_official | 133:d4dda5c437f0 | 375 | ((BANK) == FLASH_BANK_2) || \ |
| mbed_official | 133:d4dda5c437f0 | 376 | ((BANK) == FLASH_BANK_BOTH)) |
| mbed_official | 133:d4dda5c437f0 | 377 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| mbed_official | 133:d4dda5c437f0 | 378 | |
| mbed_official | 133:d4dda5c437f0 | 379 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F401xC) || defined(STM32F401xE) |
| mbed_official | 133:d4dda5c437f0 | 380 | #define FLASH_BANK_1 ((uint32_t)1) /*!< Bank 1 */ |
| mbed_official | 133:d4dda5c437f0 | 381 | |
| mbed_official | 133:d4dda5c437f0 | 382 | #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1)) |
| mbed_official | 133:d4dda5c437f0 | 383 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE */ |
| mbed_official | 133:d4dda5c437f0 | 384 | /** |
| mbed_official | 133:d4dda5c437f0 | 385 | * @} |
| mbed_official | 133:d4dda5c437f0 | 386 | */ |
| mbed_official | 133:d4dda5c437f0 | 387 | |
| mbed_official | 133:d4dda5c437f0 | 388 | /** @defgroup FLASHEx_MassErase_bit FLASH Mass Erase bit |
| mbed_official | 133:d4dda5c437f0 | 389 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 390 | */ |
| mbed_official | 133:d4dda5c437f0 | 391 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| mbed_official | 133:d4dda5c437f0 | 392 | #define FLASH_MER_BIT (FLASH_CR_MER1 | FLASH_CR_MER2) /*!< 2 MER bits here to clear */ |
| mbed_official | 133:d4dda5c437f0 | 393 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| mbed_official | 133:d4dda5c437f0 | 394 | |
| mbed_official | 133:d4dda5c437f0 | 395 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F401xC) || defined(STM32F401xE) |
| mbed_official | 133:d4dda5c437f0 | 396 | #define FLASH_MER_BIT (FLASH_CR_MER) /*!< only 1 MER Bit */ |
| mbed_official | 133:d4dda5c437f0 | 397 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE */ |
| mbed_official | 133:d4dda5c437f0 | 398 | /** |
| mbed_official | 133:d4dda5c437f0 | 399 | * @} |
| mbed_official | 133:d4dda5c437f0 | 400 | */ |
| mbed_official | 133:d4dda5c437f0 | 401 | |
| mbed_official | 133:d4dda5c437f0 | 402 | /** @defgroup FLASHEx_Sectors FLASH Sectors |
| mbed_official | 133:d4dda5c437f0 | 403 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 404 | */ |
| mbed_official | 133:d4dda5c437f0 | 405 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| mbed_official | 133:d4dda5c437f0 | 406 | #define FLASH_SECTOR_0 ((uint32_t)0) /*!< Sector Number 0 */ |
| mbed_official | 133:d4dda5c437f0 | 407 | #define FLASH_SECTOR_1 ((uint32_t)1) /*!< Sector Number 1 */ |
| mbed_official | 133:d4dda5c437f0 | 408 | #define FLASH_SECTOR_2 ((uint32_t)2) /*!< Sector Number 2 */ |
| mbed_official | 133:d4dda5c437f0 | 409 | #define FLASH_SECTOR_3 ((uint32_t)3) /*!< Sector Number 3 */ |
| mbed_official | 133:d4dda5c437f0 | 410 | #define FLASH_SECTOR_4 ((uint32_t)4) /*!< Sector Number 4 */ |
| mbed_official | 133:d4dda5c437f0 | 411 | #define FLASH_SECTOR_5 ((uint32_t)5) /*!< Sector Number 5 */ |
| mbed_official | 133:d4dda5c437f0 | 412 | #define FLASH_SECTOR_6 ((uint32_t)6) /*!< Sector Number 6 */ |
| mbed_official | 133:d4dda5c437f0 | 413 | #define FLASH_SECTOR_7 ((uint32_t)7) /*!< Sector Number 7 */ |
| mbed_official | 133:d4dda5c437f0 | 414 | #define FLASH_SECTOR_8 ((uint32_t)8) /*!< Sector Number 8 */ |
| mbed_official | 133:d4dda5c437f0 | 415 | #define FLASH_SECTOR_9 ((uint32_t)9) /*!< Sector Number 9 */ |
| mbed_official | 133:d4dda5c437f0 | 416 | #define FLASH_SECTOR_10 ((uint32_t)10) /*!< Sector Number 10 */ |
| mbed_official | 133:d4dda5c437f0 | 417 | #define FLASH_SECTOR_11 ((uint32_t)11) /*!< Sector Number 11 */ |
| mbed_official | 133:d4dda5c437f0 | 418 | #define FLASH_SECTOR_12 ((uint32_t)12) /*!< Sector Number 12 */ |
| mbed_official | 133:d4dda5c437f0 | 419 | #define FLASH_SECTOR_13 ((uint32_t)13) /*!< Sector Number 13 */ |
| mbed_official | 133:d4dda5c437f0 | 420 | #define FLASH_SECTOR_14 ((uint32_t)14) /*!< Sector Number 14 */ |
| mbed_official | 133:d4dda5c437f0 | 421 | #define FLASH_SECTOR_15 ((uint32_t)15) /*!< Sector Number 15 */ |
| mbed_official | 133:d4dda5c437f0 | 422 | #define FLASH_SECTOR_16 ((uint32_t)16) /*!< Sector Number 16 */ |
| mbed_official | 133:d4dda5c437f0 | 423 | #define FLASH_SECTOR_17 ((uint32_t)17) /*!< Sector Number 17 */ |
| mbed_official | 133:d4dda5c437f0 | 424 | #define FLASH_SECTOR_18 ((uint32_t)18) /*!< Sector Number 18 */ |
| mbed_official | 133:d4dda5c437f0 | 425 | #define FLASH_SECTOR_19 ((uint32_t)19) /*!< Sector Number 19 */ |
| mbed_official | 133:d4dda5c437f0 | 426 | #define FLASH_SECTOR_20 ((uint32_t)20) /*!< Sector Number 20 */ |
| mbed_official | 133:d4dda5c437f0 | 427 | #define FLASH_SECTOR_21 ((uint32_t)21) /*!< Sector Number 21 */ |
| mbed_official | 133:d4dda5c437f0 | 428 | #define FLASH_SECTOR_22 ((uint32_t)22) /*!< Sector Number 22 */ |
| mbed_official | 133:d4dda5c437f0 | 429 | #define FLASH_SECTOR_23 ((uint32_t)23) /*!< Sector Number 23 */ |
| mbed_official | 133:d4dda5c437f0 | 430 | |
| mbed_official | 133:d4dda5c437f0 | 431 | #define FLASH_SECTOR_TOTAL 24 |
| mbed_official | 133:d4dda5c437f0 | 432 | |
| mbed_official | 133:d4dda5c437f0 | 433 | #define IS_FLASH_SECTOR(SECTOR) ( ((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\ |
| mbed_official | 133:d4dda5c437f0 | 434 | ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\ |
| mbed_official | 133:d4dda5c437f0 | 435 | ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\ |
| mbed_official | 133:d4dda5c437f0 | 436 | ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7) ||\ |
| mbed_official | 133:d4dda5c437f0 | 437 | ((SECTOR) == FLASH_SECTOR_8) || ((SECTOR) == FLASH_SECTOR_9) ||\ |
| mbed_official | 133:d4dda5c437f0 | 438 | ((SECTOR) == FLASH_SECTOR_10) || ((SECTOR) == FLASH_SECTOR_11) ||\ |
| mbed_official | 133:d4dda5c437f0 | 439 | ((SECTOR) == FLASH_SECTOR_12) || ((SECTOR) == FLASH_SECTOR_13) ||\ |
| mbed_official | 133:d4dda5c437f0 | 440 | ((SECTOR) == FLASH_SECTOR_14) || ((SECTOR) == FLASH_SECTOR_15) ||\ |
| mbed_official | 133:d4dda5c437f0 | 441 | ((SECTOR) == FLASH_SECTOR_16) || ((SECTOR) == FLASH_SECTOR_17) ||\ |
| mbed_official | 133:d4dda5c437f0 | 442 | ((SECTOR) == FLASH_SECTOR_18) || ((SECTOR) == FLASH_SECTOR_19) ||\ |
| mbed_official | 133:d4dda5c437f0 | 443 | ((SECTOR) == FLASH_SECTOR_20) || ((SECTOR) == FLASH_SECTOR_21) ||\ |
| mbed_official | 133:d4dda5c437f0 | 444 | ((SECTOR) == FLASH_SECTOR_22) || ((SECTOR) == FLASH_SECTOR_23)) |
| mbed_official | 133:d4dda5c437f0 | 445 | |
| mbed_official | 133:d4dda5c437f0 | 446 | #define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) < 0x081FFFFF)) ||\ |
| mbed_official | 133:d4dda5c437f0 | 447 | (((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) < 0x1FFF7A0F))) |
| mbed_official | 133:d4dda5c437f0 | 448 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| mbed_official | 133:d4dda5c437f0 | 449 | |
| mbed_official | 133:d4dda5c437f0 | 450 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) |
| mbed_official | 133:d4dda5c437f0 | 451 | #define FLASH_SECTOR_0 ((uint32_t)0) /*!< Sector Number 0 */ |
| mbed_official | 133:d4dda5c437f0 | 452 | #define FLASH_SECTOR_1 ((uint32_t)1) /*!< Sector Number 1 */ |
| mbed_official | 133:d4dda5c437f0 | 453 | #define FLASH_SECTOR_2 ((uint32_t)2) /*!< Sector Number 2 */ |
| mbed_official | 133:d4dda5c437f0 | 454 | #define FLASH_SECTOR_3 ((uint32_t)3) /*!< Sector Number 3 */ |
| mbed_official | 133:d4dda5c437f0 | 455 | #define FLASH_SECTOR_4 ((uint32_t)4) /*!< Sector Number 4 */ |
| mbed_official | 133:d4dda5c437f0 | 456 | #define FLASH_SECTOR_5 ((uint32_t)5) /*!< Sector Number 5 */ |
| mbed_official | 133:d4dda5c437f0 | 457 | #define FLASH_SECTOR_6 ((uint32_t)6) /*!< Sector Number 6 */ |
| mbed_official | 133:d4dda5c437f0 | 458 | #define FLASH_SECTOR_7 ((uint32_t)7) /*!< Sector Number 7 */ |
| mbed_official | 133:d4dda5c437f0 | 459 | #define FLASH_SECTOR_8 ((uint32_t)8) /*!< Sector Number 8 */ |
| mbed_official | 133:d4dda5c437f0 | 460 | #define FLASH_SECTOR_9 ((uint32_t)9) /*!< Sector Number 9 */ |
| mbed_official | 133:d4dda5c437f0 | 461 | #define FLASH_SECTOR_10 ((uint32_t)10) /*!< Sector Number 10 */ |
| mbed_official | 133:d4dda5c437f0 | 462 | #define FLASH_SECTOR_11 ((uint32_t)11) /*!< Sector Number 11 */ |
| mbed_official | 133:d4dda5c437f0 | 463 | |
| mbed_official | 133:d4dda5c437f0 | 464 | #define FLASH_SECTOR_TOTAL 12 |
| mbed_official | 133:d4dda5c437f0 | 465 | |
| mbed_official | 133:d4dda5c437f0 | 466 | #define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\ |
| mbed_official | 133:d4dda5c437f0 | 467 | ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\ |
| mbed_official | 133:d4dda5c437f0 | 468 | ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\ |
| mbed_official | 133:d4dda5c437f0 | 469 | ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7) ||\ |
| mbed_official | 133:d4dda5c437f0 | 470 | ((SECTOR) == FLASH_SECTOR_8) || ((SECTOR) == FLASH_SECTOR_9) ||\ |
| mbed_official | 133:d4dda5c437f0 | 471 | ((SECTOR) == FLASH_SECTOR_10) || ((SECTOR) == FLASH_SECTOR_11)) |
| mbed_official | 133:d4dda5c437f0 | 472 | |
| mbed_official | 133:d4dda5c437f0 | 473 | #define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) < 0x080FFFFF)) ||\ |
| mbed_official | 133:d4dda5c437f0 | 474 | (((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) < 0x1FFF7A0F))) |
| mbed_official | 133:d4dda5c437f0 | 475 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */ |
| mbed_official | 133:d4dda5c437f0 | 476 | |
| mbed_official | 133:d4dda5c437f0 | 477 | #if defined(STM32F401xC) |
| mbed_official | 133:d4dda5c437f0 | 478 | #define FLASH_SECTOR_0 ((uint32_t)0) /*!< Sector Number 0 */ |
| mbed_official | 133:d4dda5c437f0 | 479 | #define FLASH_SECTOR_1 ((uint32_t)1) /*!< Sector Number 1 */ |
| mbed_official | 133:d4dda5c437f0 | 480 | #define FLASH_SECTOR_2 ((uint32_t)2) /*!< Sector Number 2 */ |
| mbed_official | 133:d4dda5c437f0 | 481 | #define FLASH_SECTOR_3 ((uint32_t)3) /*!< Sector Number 3 */ |
| mbed_official | 133:d4dda5c437f0 | 482 | #define FLASH_SECTOR_4 ((uint32_t)4) /*!< Sector Number 4 */ |
| mbed_official | 133:d4dda5c437f0 | 483 | #define FLASH_SECTOR_5 ((uint32_t)5) /*!< Sector Number 5 */ |
| mbed_official | 133:d4dda5c437f0 | 484 | |
| mbed_official | 133:d4dda5c437f0 | 485 | #define FLASH_SECTOR_TOTAL 6 |
| mbed_official | 133:d4dda5c437f0 | 486 | |
| mbed_official | 133:d4dda5c437f0 | 487 | #define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\ |
| mbed_official | 133:d4dda5c437f0 | 488 | ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\ |
| mbed_official | 133:d4dda5c437f0 | 489 | ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5)) |
| mbed_official | 133:d4dda5c437f0 | 490 | |
| mbed_official | 133:d4dda5c437f0 | 491 | #define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) < 0x0803FFFF)) ||\ |
| mbed_official | 133:d4dda5c437f0 | 492 | (((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) < 0x1FFF7A0F))) |
| mbed_official | 133:d4dda5c437f0 | 493 | #endif /* STM32F401xC */ |
| mbed_official | 133:d4dda5c437f0 | 494 | |
| mbed_official | 133:d4dda5c437f0 | 495 | #if defined(STM32F401xE) |
| mbed_official | 133:d4dda5c437f0 | 496 | #define FLASH_SECTOR_0 ((uint32_t)0) /*!< Sector Number 0 */ |
| mbed_official | 133:d4dda5c437f0 | 497 | #define FLASH_SECTOR_1 ((uint32_t)1) /*!< Sector Number 1 */ |
| mbed_official | 133:d4dda5c437f0 | 498 | #define FLASH_SECTOR_2 ((uint32_t)2) /*!< Sector Number 2 */ |
| mbed_official | 133:d4dda5c437f0 | 499 | #define FLASH_SECTOR_3 ((uint32_t)3) /*!< Sector Number 3 */ |
| mbed_official | 133:d4dda5c437f0 | 500 | #define FLASH_SECTOR_4 ((uint32_t)4) /*!< Sector Number 4 */ |
| mbed_official | 133:d4dda5c437f0 | 501 | #define FLASH_SECTOR_5 ((uint32_t)5) /*!< Sector Number 5 */ |
| mbed_official | 133:d4dda5c437f0 | 502 | #define FLASH_SECTOR_6 ((uint32_t)6) /*!< Sector Number 6 */ |
| mbed_official | 133:d4dda5c437f0 | 503 | #define FLASH_SECTOR_7 ((uint32_t)7) /*!< Sector Number 7 */ |
| mbed_official | 133:d4dda5c437f0 | 504 | |
| mbed_official | 133:d4dda5c437f0 | 505 | #define FLASH_SECTOR_TOTAL 8 |
| mbed_official | 133:d4dda5c437f0 | 506 | |
| mbed_official | 133:d4dda5c437f0 | 507 | #define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\ |
| mbed_official | 133:d4dda5c437f0 | 508 | ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\ |
| mbed_official | 133:d4dda5c437f0 | 509 | ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\ |
| mbed_official | 133:d4dda5c437f0 | 510 | ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7)) |
| mbed_official | 133:d4dda5c437f0 | 511 | |
| mbed_official | 133:d4dda5c437f0 | 512 | #define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) < 0x0807FFFF)) ||\ |
| mbed_official | 133:d4dda5c437f0 | 513 | (((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) < 0x1FFF7A0F))) |
| mbed_official | 133:d4dda5c437f0 | 514 | #endif /* STM32F401xE */ |
| mbed_official | 133:d4dda5c437f0 | 515 | |
| mbed_official | 133:d4dda5c437f0 | 516 | #define IS_NBSECTORS(NBSECTORS) (((NBSECTORS) != 0) && ((NBSECTORS) <= FLASH_SECTOR_TOTAL)) |
| mbed_official | 133:d4dda5c437f0 | 517 | |
| mbed_official | 133:d4dda5c437f0 | 518 | /** |
| mbed_official | 133:d4dda5c437f0 | 519 | * @} |
| mbed_official | 133:d4dda5c437f0 | 520 | */ |
| mbed_official | 133:d4dda5c437f0 | 521 | |
| mbed_official | 133:d4dda5c437f0 | 522 | /** @defgroup FLASHEx_Option_Bytes_Write_Protection FLASH Option Bytes Write Protection |
| mbed_official | 133:d4dda5c437f0 | 523 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 524 | */ |
| mbed_official | 133:d4dda5c437f0 | 525 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| mbed_official | 133:d4dda5c437f0 | 526 | #define OB_WRP_SECTOR_0 ((uint32_t)0x00000001) /*!< Write protection of Sector0 */ |
| mbed_official | 133:d4dda5c437f0 | 527 | #define OB_WRP_SECTOR_1 ((uint32_t)0x00000002) /*!< Write protection of Sector1 */ |
| mbed_official | 133:d4dda5c437f0 | 528 | #define OB_WRP_SECTOR_2 ((uint32_t)0x00000004) /*!< Write protection of Sector2 */ |
| mbed_official | 133:d4dda5c437f0 | 529 | #define OB_WRP_SECTOR_3 ((uint32_t)0x00000008) /*!< Write protection of Sector3 */ |
| mbed_official | 133:d4dda5c437f0 | 530 | #define OB_WRP_SECTOR_4 ((uint32_t)0x00000010) /*!< Write protection of Sector4 */ |
| mbed_official | 133:d4dda5c437f0 | 531 | #define OB_WRP_SECTOR_5 ((uint32_t)0x00000020) /*!< Write protection of Sector5 */ |
| mbed_official | 133:d4dda5c437f0 | 532 | #define OB_WRP_SECTOR_6 ((uint32_t)0x00000040) /*!< Write protection of Sector6 */ |
| mbed_official | 133:d4dda5c437f0 | 533 | #define OB_WRP_SECTOR_7 ((uint32_t)0x00000080) /*!< Write protection of Sector7 */ |
| mbed_official | 133:d4dda5c437f0 | 534 | #define OB_WRP_SECTOR_8 ((uint32_t)0x00000100) /*!< Write protection of Sector8 */ |
| mbed_official | 133:d4dda5c437f0 | 535 | #define OB_WRP_SECTOR_9 ((uint32_t)0x00000200) /*!< Write protection of Sector9 */ |
| mbed_official | 133:d4dda5c437f0 | 536 | #define OB_WRP_SECTOR_10 ((uint32_t)0x00000400) /*!< Write protection of Sector10 */ |
| mbed_official | 133:d4dda5c437f0 | 537 | #define OB_WRP_SECTOR_11 ((uint32_t)0x00000800) /*!< Write protection of Sector11 */ |
| mbed_official | 133:d4dda5c437f0 | 538 | #define OB_WRP_SECTOR_12 ((uint32_t)0x00000001 << 12) /*!< Write protection of Sector12 */ |
| mbed_official | 133:d4dda5c437f0 | 539 | #define OB_WRP_SECTOR_13 ((uint32_t)0x00000002 << 12) /*!< Write protection of Sector13 */ |
| mbed_official | 133:d4dda5c437f0 | 540 | #define OB_WRP_SECTOR_14 ((uint32_t)0x00000004 << 12) /*!< Write protection of Sector14 */ |
| mbed_official | 133:d4dda5c437f0 | 541 | #define OB_WRP_SECTOR_15 ((uint32_t)0x00000008 << 12) /*!< Write protection of Sector15 */ |
| mbed_official | 133:d4dda5c437f0 | 542 | #define OB_WRP_SECTOR_16 ((uint32_t)0x00000010 << 12) /*!< Write protection of Sector16 */ |
| mbed_official | 133:d4dda5c437f0 | 543 | #define OB_WRP_SECTOR_17 ((uint32_t)0x00000020 << 12) /*!< Write protection of Sector17 */ |
| mbed_official | 133:d4dda5c437f0 | 544 | #define OB_WRP_SECTOR_18 ((uint32_t)0x00000040 << 12) /*!< Write protection of Sector18 */ |
| mbed_official | 133:d4dda5c437f0 | 545 | #define OB_WRP_SECTOR_19 ((uint32_t)0x00000080 << 12) /*!< Write protection of Sector19 */ |
| mbed_official | 133:d4dda5c437f0 | 546 | #define OB_WRP_SECTOR_20 ((uint32_t)0x00000100 << 12) /*!< Write protection of Sector20 */ |
| mbed_official | 133:d4dda5c437f0 | 547 | #define OB_WRP_SECTOR_21 ((uint32_t)0x00000200 << 12) /*!< Write protection of Sector21 */ |
| mbed_official | 133:d4dda5c437f0 | 548 | #define OB_WRP_SECTOR_22 ((uint32_t)0x00000400 << 12) /*!< Write protection of Sector22 */ |
| mbed_official | 133:d4dda5c437f0 | 549 | #define OB_WRP_SECTOR_23 ((uint32_t)0x00000800 << 12) /*!< Write protection of Sector23 */ |
| mbed_official | 133:d4dda5c437f0 | 550 | #define OB_WRP_SECTOR_All ((uint32_t)0x00000FFF << 12) /*!< Write protection of all Sectors */ |
| mbed_official | 133:d4dda5c437f0 | 551 | |
| mbed_official | 133:d4dda5c437f0 | 552 | #define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & (uint32_t)0xFF000000) == 0x00000000) && ((SECTOR) != 0x00000000)) |
| mbed_official | 133:d4dda5c437f0 | 553 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| mbed_official | 133:d4dda5c437f0 | 554 | |
| mbed_official | 133:d4dda5c437f0 | 555 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) |
| mbed_official | 133:d4dda5c437f0 | 556 | #define OB_WRP_SECTOR_0 ((uint32_t)0x00000001) /*!< Write protection of Sector0 */ |
| mbed_official | 133:d4dda5c437f0 | 557 | #define OB_WRP_SECTOR_1 ((uint32_t)0x00000002) /*!< Write protection of Sector1 */ |
| mbed_official | 133:d4dda5c437f0 | 558 | #define OB_WRP_SECTOR_2 ((uint32_t)0x00000004) /*!< Write protection of Sector2 */ |
| mbed_official | 133:d4dda5c437f0 | 559 | #define OB_WRP_SECTOR_3 ((uint32_t)0x00000008) /*!< Write protection of Sector3 */ |
| mbed_official | 133:d4dda5c437f0 | 560 | #define OB_WRP_SECTOR_4 ((uint32_t)0x00000010) /*!< Write protection of Sector4 */ |
| mbed_official | 133:d4dda5c437f0 | 561 | #define OB_WRP_SECTOR_5 ((uint32_t)0x00000020) /*!< Write protection of Sector5 */ |
| mbed_official | 133:d4dda5c437f0 | 562 | #define OB_WRP_SECTOR_6 ((uint32_t)0x00000040) /*!< Write protection of Sector6 */ |
| mbed_official | 133:d4dda5c437f0 | 563 | #define OB_WRP_SECTOR_7 ((uint32_t)0x00000080) /*!< Write protection of Sector7 */ |
| mbed_official | 133:d4dda5c437f0 | 564 | #define OB_WRP_SECTOR_8 ((uint32_t)0x00000100) /*!< Write protection of Sector8 */ |
| mbed_official | 133:d4dda5c437f0 | 565 | #define OB_WRP_SECTOR_9 ((uint32_t)0x00000200) /*!< Write protection of Sector9 */ |
| mbed_official | 133:d4dda5c437f0 | 566 | #define OB_WRP_SECTOR_10 ((uint32_t)0x00000400) /*!< Write protection of Sector10 */ |
| mbed_official | 133:d4dda5c437f0 | 567 | #define OB_WRP_SECTOR_11 ((uint32_t)0x00000800) /*!< Write protection of Sector11 */ |
| mbed_official | 133:d4dda5c437f0 | 568 | #define OB_WRP_SECTOR_All ((uint32_t)0x00000FFF) /*!< Write protection of all Sectors */ |
| mbed_official | 133:d4dda5c437f0 | 569 | |
| mbed_official | 133:d4dda5c437f0 | 570 | #define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000)) |
| mbed_official | 133:d4dda5c437f0 | 571 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */ |
| mbed_official | 133:d4dda5c437f0 | 572 | |
| mbed_official | 133:d4dda5c437f0 | 573 | #if defined(STM32F401xC) |
| mbed_official | 133:d4dda5c437f0 | 574 | #define OB_WRP_SECTOR_0 ((uint32_t)0x00000001) /*!< Write protection of Sector0 */ |
| mbed_official | 133:d4dda5c437f0 | 575 | #define OB_WRP_SECTOR_1 ((uint32_t)0x00000002) /*!< Write protection of Sector1 */ |
| mbed_official | 133:d4dda5c437f0 | 576 | #define OB_WRP_SECTOR_2 ((uint32_t)0x00000004) /*!< Write protection of Sector2 */ |
| mbed_official | 133:d4dda5c437f0 | 577 | #define OB_WRP_SECTOR_3 ((uint32_t)0x00000008) /*!< Write protection of Sector3 */ |
| mbed_official | 133:d4dda5c437f0 | 578 | #define OB_WRP_SECTOR_4 ((uint32_t)0x00000010) /*!< Write protection of Sector4 */ |
| mbed_official | 133:d4dda5c437f0 | 579 | #define OB_WRP_SECTOR_5 ((uint32_t)0x00000020) /*!< Write protection of Sector5 */ |
| mbed_official | 133:d4dda5c437f0 | 580 | #define OB_WRP_SECTOR_All ((uint32_t)0x00000FFF) /*!< Write protection of all Sectors */ |
| mbed_official | 133:d4dda5c437f0 | 581 | |
| mbed_official | 133:d4dda5c437f0 | 582 | #define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000)) |
| mbed_official | 133:d4dda5c437f0 | 583 | #endif /* STM32F401xC */ |
| mbed_official | 133:d4dda5c437f0 | 584 | |
| mbed_official | 133:d4dda5c437f0 | 585 | #if defined(STM32F401xE) |
| mbed_official | 133:d4dda5c437f0 | 586 | #define OB_WRP_SECTOR_0 ((uint32_t)0x00000001) /*!< Write protection of Sector0 */ |
| mbed_official | 133:d4dda5c437f0 | 587 | #define OB_WRP_SECTOR_1 ((uint32_t)0x00000002) /*!< Write protection of Sector1 */ |
| mbed_official | 133:d4dda5c437f0 | 588 | #define OB_WRP_SECTOR_2 ((uint32_t)0x00000004) /*!< Write protection of Sector2 */ |
| mbed_official | 133:d4dda5c437f0 | 589 | #define OB_WRP_SECTOR_3 ((uint32_t)0x00000008) /*!< Write protection of Sector3 */ |
| mbed_official | 133:d4dda5c437f0 | 590 | #define OB_WRP_SECTOR_4 ((uint32_t)0x00000010) /*!< Write protection of Sector4 */ |
| mbed_official | 133:d4dda5c437f0 | 591 | #define OB_WRP_SECTOR_5 ((uint32_t)0x00000020) /*!< Write protection of Sector5 */ |
| mbed_official | 133:d4dda5c437f0 | 592 | #define OB_WRP_SECTOR_6 ((uint32_t)0x00000040) /*!< Write protection of Sector6 */ |
| mbed_official | 133:d4dda5c437f0 | 593 | #define OB_WRP_SECTOR_7 ((uint32_t)0x00000080) /*!< Write protection of Sector7 */ |
| mbed_official | 133:d4dda5c437f0 | 594 | #define OB_WRP_SECTOR_All ((uint32_t)0x00000FFF) /*!< Write protection of all Sectors */ |
| mbed_official | 133:d4dda5c437f0 | 595 | |
| mbed_official | 133:d4dda5c437f0 | 596 | #define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000)) |
| mbed_official | 133:d4dda5c437f0 | 597 | #endif /* STM32F401xE */ |
| mbed_official | 133:d4dda5c437f0 | 598 | /** |
| mbed_official | 133:d4dda5c437f0 | 599 | * @} |
| mbed_official | 133:d4dda5c437f0 | 600 | */ |
| mbed_official | 133:d4dda5c437f0 | 601 | |
| mbed_official | 133:d4dda5c437f0 | 602 | /** @defgroup FLASHEx_Option_Bytes_PC_ReadWrite_Protection FLASH Option Bytes PC ReadWrite Protection |
| mbed_official | 133:d4dda5c437f0 | 603 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 604 | */ |
| mbed_official | 133:d4dda5c437f0 | 605 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| mbed_official | 133:d4dda5c437f0 | 606 | #define OB_PCROP_SECTOR_0 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector0 */ |
| mbed_official | 133:d4dda5c437f0 | 607 | #define OB_PCROP_SECTOR_1 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector1 */ |
| mbed_official | 133:d4dda5c437f0 | 608 | #define OB_PCROP_SECTOR_2 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector2 */ |
| mbed_official | 133:d4dda5c437f0 | 609 | #define OB_PCROP_SECTOR_3 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector3 */ |
| mbed_official | 133:d4dda5c437f0 | 610 | #define OB_PCROP_SECTOR_4 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector4 */ |
| mbed_official | 133:d4dda5c437f0 | 611 | #define OB_PCROP_SECTOR_5 ((uint32_t)0x00000020) /*!< PC Read/Write protection of Sector5 */ |
| mbed_official | 133:d4dda5c437f0 | 612 | #define OB_PCROP_SECTOR_6 ((uint32_t)0x00000040) /*!< PC Read/Write protection of Sector6 */ |
| mbed_official | 133:d4dda5c437f0 | 613 | #define OB_PCROP_SECTOR_7 ((uint32_t)0x00000080) /*!< PC Read/Write protection of Sector7 */ |
| mbed_official | 133:d4dda5c437f0 | 614 | #define OB_PCROP_SECTOR_8 ((uint32_t)0x00000100) /*!< PC Read/Write protection of Sector8 */ |
| mbed_official | 133:d4dda5c437f0 | 615 | #define OB_PCROP_SECTOR_9 ((uint32_t)0x00000200) /*!< PC Read/Write protection of Sector9 */ |
| mbed_official | 133:d4dda5c437f0 | 616 | #define OB_PCROP_SECTOR_10 ((uint32_t)0x00000400) /*!< PC Read/Write protection of Sector10 */ |
| mbed_official | 133:d4dda5c437f0 | 617 | #define OB_PCROP_SECTOR_11 ((uint32_t)0x00000800) /*!< PC Read/Write protection of Sector11 */ |
| mbed_official | 133:d4dda5c437f0 | 618 | #define OB_PCROP_SECTOR_12 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector12 */ |
| mbed_official | 133:d4dda5c437f0 | 619 | #define OB_PCROP_SECTOR_13 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector13 */ |
| mbed_official | 133:d4dda5c437f0 | 620 | #define OB_PCROP_SECTOR_14 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector14 */ |
| mbed_official | 133:d4dda5c437f0 | 621 | #define OB_PCROP_SECTOR_15 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector15 */ |
| mbed_official | 133:d4dda5c437f0 | 622 | #define OB_PCROP_SECTOR_16 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector16 */ |
| mbed_official | 133:d4dda5c437f0 | 623 | #define OB_PCROP_SECTOR_17 ((uint32_t)0x00000020) /*!< PC Read/Write protection of Sector17 */ |
| mbed_official | 133:d4dda5c437f0 | 624 | #define OB_PCROP_SECTOR_18 ((uint32_t)0x00000040) /*!< PC Read/Write protection of Sector18 */ |
| mbed_official | 133:d4dda5c437f0 | 625 | #define OB_PCROP_SECTOR_19 ((uint32_t)0x00000080) /*!< PC Read/Write protection of Sector19 */ |
| mbed_official | 133:d4dda5c437f0 | 626 | #define OB_PCROP_SECTOR_20 ((uint32_t)0x00000100) /*!< PC Read/Write protection of Sector20 */ |
| mbed_official | 133:d4dda5c437f0 | 627 | #define OB_PCROP_SECTOR_21 ((uint32_t)0x00000200) /*!< PC Read/Write protection of Sector21 */ |
| mbed_official | 133:d4dda5c437f0 | 628 | #define OB_PCROP_SECTOR_22 ((uint32_t)0x00000400) /*!< PC Read/Write protection of Sector22 */ |
| mbed_official | 133:d4dda5c437f0 | 629 | #define OB_PCROP_SECTOR_23 ((uint32_t)0x00000800) /*!< PC Read/Write protection of Sector23 */ |
| mbed_official | 133:d4dda5c437f0 | 630 | #define OB_PCROP_SECTOR_All ((uint32_t)0x00000FFF) /*!< PC Read/Write protection of all Sectors */ |
| mbed_official | 133:d4dda5c437f0 | 631 | |
| mbed_official | 133:d4dda5c437f0 | 632 | #define IS_OB_PCROP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000)) |
| mbed_official | 133:d4dda5c437f0 | 633 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| mbed_official | 133:d4dda5c437f0 | 634 | |
| mbed_official | 133:d4dda5c437f0 | 635 | #if defined(STM32F401xC) |
| mbed_official | 133:d4dda5c437f0 | 636 | #define OB_PCROP_SECTOR_0 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector0 */ |
| mbed_official | 133:d4dda5c437f0 | 637 | #define OB_PCROP_SECTOR_1 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector1 */ |
| mbed_official | 133:d4dda5c437f0 | 638 | #define OB_PCROP_SECTOR_2 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector2 */ |
| mbed_official | 133:d4dda5c437f0 | 639 | #define OB_PCROP_SECTOR_3 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector3 */ |
| mbed_official | 133:d4dda5c437f0 | 640 | #define OB_PCROP_SECTOR_4 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector4 */ |
| mbed_official | 133:d4dda5c437f0 | 641 | #define OB_PCROP_SECTOR_5 ((uint32_t)0x00000020) /*!< PC Read/Write protection of Sector5 */ |
| mbed_official | 133:d4dda5c437f0 | 642 | #define OB_PCROP_SECTOR_All ((uint32_t)0x00000FFF) /*!< PC Read/Write protection of all Sectors */ |
| mbed_official | 133:d4dda5c437f0 | 643 | |
| mbed_official | 133:d4dda5c437f0 | 644 | #define IS_OB_PCROP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000)) |
| mbed_official | 133:d4dda5c437f0 | 645 | #endif /* STM32F401xC */ |
| mbed_official | 133:d4dda5c437f0 | 646 | |
| mbed_official | 133:d4dda5c437f0 | 647 | #if defined(STM32F401xE) |
| mbed_official | 133:d4dda5c437f0 | 648 | #define OB_PCROP_SECTOR_0 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector0 */ |
| mbed_official | 133:d4dda5c437f0 | 649 | #define OB_PCROP_SECTOR_1 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector1 */ |
| mbed_official | 133:d4dda5c437f0 | 650 | #define OB_PCROP_SECTOR_2 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector2 */ |
| mbed_official | 133:d4dda5c437f0 | 651 | #define OB_PCROP_SECTOR_3 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector3 */ |
| mbed_official | 133:d4dda5c437f0 | 652 | #define OB_PCROP_SECTOR_4 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector4 */ |
| mbed_official | 133:d4dda5c437f0 | 653 | #define OB_PCROP_SECTOR_5 ((uint32_t)0x00000020) /*!< PC Read/Write protection of Sector5 */ |
| mbed_official | 133:d4dda5c437f0 | 654 | #define OB_PCROP_SECTOR_6 ((uint32_t)0x00000040) /*!< PC Read/Write protection of Sector6 */ |
| mbed_official | 133:d4dda5c437f0 | 655 | #define OB_PCROP_SECTOR_7 ((uint32_t)0x00000080) /*!< PC Read/Write protection of Sector7 */ |
| mbed_official | 133:d4dda5c437f0 | 656 | #define OB_PCROP_SECTOR_All ((uint32_t)0x00000FFF) /*!< PC Read/Write protection of all Sectors */ |
| mbed_official | 133:d4dda5c437f0 | 657 | |
| mbed_official | 133:d4dda5c437f0 | 658 | #define IS_OB_PCROP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000)) |
| mbed_official | 133:d4dda5c437f0 | 659 | #endif /* STM32F401xE */ |
| mbed_official | 133:d4dda5c437f0 | 660 | |
| mbed_official | 133:d4dda5c437f0 | 661 | /** |
| mbed_official | 133:d4dda5c437f0 | 662 | * @} |
| mbed_official | 133:d4dda5c437f0 | 663 | */ |
| mbed_official | 133:d4dda5c437f0 | 664 | |
| mbed_official | 133:d4dda5c437f0 | 665 | /** @defgroup FLASHEx_Dual_Boot FLASH Dual Boot |
| mbed_official | 133:d4dda5c437f0 | 666 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 667 | */ |
| mbed_official | 133:d4dda5c437f0 | 668 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| mbed_official | 133:d4dda5c437f0 | 669 | #define OB_DUAL_BOOT_ENABLE ((uint8_t)0x10) /*!< Dual Bank Boot Enable */ |
| mbed_official | 133:d4dda5c437f0 | 670 | #define OB_DUAL_BOOT_DISABLE ((uint8_t)0x00) /*!< Dual Bank Boot Disable, always boot on User Flash */ |
| mbed_official | 133:d4dda5c437f0 | 671 | #define IS_OB_BOOT(BOOT) (((BOOT) == OB_DUAL_BOOT_ENABLE) || ((BOOT) == OB_DUAL_BOOT_DISABLE)) |
| mbed_official | 133:d4dda5c437f0 | 672 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| mbed_official | 133:d4dda5c437f0 | 673 | /** |
| mbed_official | 133:d4dda5c437f0 | 674 | * @} |
| mbed_official | 133:d4dda5c437f0 | 675 | */ |
| mbed_official | 133:d4dda5c437f0 | 676 | |
| mbed_official | 133:d4dda5c437f0 | 677 | /** @defgroup FLASHEx_Selection_Protection_Mode FLASH Selection Protection Mode |
| mbed_official | 133:d4dda5c437f0 | 678 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 679 | */ |
| mbed_official | 133:d4dda5c437f0 | 680 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F401xC) || defined(STM32F401xE) |
| mbed_official | 133:d4dda5c437f0 | 681 | #define OB_PCROP_DESELECTED ((uint8_t)0x00) /*!< Disabled PcROP, nWPRi bits used for Write Protection on sector i */ |
| mbed_official | 133:d4dda5c437f0 | 682 | #define OB_PCROP_SELECTED ((uint8_t)0x80) /*!< Enable PcROP, nWPRi bits used for PCRoP Protection on sector i */ |
| mbed_official | 133:d4dda5c437f0 | 683 | #define IS_OB_PCROP_SELECT(PCROP) (((PCROP) == OB_PCROP_SELECTED) || ((PCROP) == OB_PCROP_DESELECTED)) |
| mbed_official | 133:d4dda5c437f0 | 684 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE */ |
| mbed_official | 133:d4dda5c437f0 | 685 | /** |
| mbed_official | 133:d4dda5c437f0 | 686 | * @} |
| mbed_official | 133:d4dda5c437f0 | 687 | */ |
| mbed_official | 133:d4dda5c437f0 | 688 | |
| mbed_official | 133:d4dda5c437f0 | 689 | /** |
| mbed_official | 133:d4dda5c437f0 | 690 | * @brief OPTCR1 register byte 2 (Bits[23:16]) base address |
| mbed_official | 133:d4dda5c437f0 | 691 | */ |
| mbed_official | 133:d4dda5c437f0 | 692 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| mbed_official | 133:d4dda5c437f0 | 693 | #define OPTCR1_BYTE2_ADDRESS ((uint32_t)0x40023C1A) |
| mbed_official | 133:d4dda5c437f0 | 694 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| mbed_official | 133:d4dda5c437f0 | 695 | |
| mbed_official | 133:d4dda5c437f0 | 696 | /** |
| mbed_official | 133:d4dda5c437f0 | 697 | * @} |
| mbed_official | 133:d4dda5c437f0 | 698 | */ |
| mbed_official | 133:d4dda5c437f0 | 699 | |
| mbed_official | 133:d4dda5c437f0 | 700 | /* Exported macro ------------------------------------------------------------*/ |
| mbed_official | 133:d4dda5c437f0 | 701 | |
| mbed_official | 133:d4dda5c437f0 | 702 | /* Exported functions --------------------------------------------------------*/ |
| mbed_official | 133:d4dda5c437f0 | 703 | |
| mbed_official | 133:d4dda5c437f0 | 704 | /* Extension Program operation functions *************************************/ |
| mbed_official | 133:d4dda5c437f0 | 705 | HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError); |
| mbed_official | 133:d4dda5c437f0 | 706 | HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit); |
| mbed_official | 133:d4dda5c437f0 | 707 | HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit); |
| mbed_official | 133:d4dda5c437f0 | 708 | void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit); |
| mbed_official | 133:d4dda5c437f0 | 709 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F401xC) || defined(STM32F401xE) |
| mbed_official | 133:d4dda5c437f0 | 710 | HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit); |
| mbed_official | 133:d4dda5c437f0 | 711 | void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit); |
| mbed_official | 133:d4dda5c437f0 | 712 | HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void); |
| mbed_official | 133:d4dda5c437f0 | 713 | HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void); |
| mbed_official | 133:d4dda5c437f0 | 714 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE */ |
| mbed_official | 133:d4dda5c437f0 | 715 | |
| mbed_official | 133:d4dda5c437f0 | 716 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| mbed_official | 133:d4dda5c437f0 | 717 | uint16_t HAL_FLASHEx_OB_GetBank2WRP(void); |
| mbed_official | 133:d4dda5c437f0 | 718 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| mbed_official | 133:d4dda5c437f0 | 719 | |
| mbed_official | 133:d4dda5c437f0 | 720 | void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange); |
| mbed_official | 133:d4dda5c437f0 | 721 | |
| mbed_official | 133:d4dda5c437f0 | 722 | /** |
| mbed_official | 133:d4dda5c437f0 | 723 | * @} |
| mbed_official | 133:d4dda5c437f0 | 724 | */ |
| mbed_official | 133:d4dda5c437f0 | 725 | |
| mbed_official | 133:d4dda5c437f0 | 726 | /** |
| mbed_official | 133:d4dda5c437f0 | 727 | * @} |
| mbed_official | 133:d4dda5c437f0 | 728 | */ |
| mbed_official | 133:d4dda5c437f0 | 729 | |
| mbed_official | 133:d4dda5c437f0 | 730 | #ifdef __cplusplus |
| mbed_official | 133:d4dda5c437f0 | 731 | } |
| mbed_official | 133:d4dda5c437f0 | 732 | #endif |
| mbed_official | 133:d4dda5c437f0 | 733 | |
| mbed_official | 133:d4dda5c437f0 | 734 | #endif /* __STM32F4xx_HAL_FLASH_EX_H */ |
| mbed_official | 133:d4dda5c437f0 | 735 | |
| mbed_official | 133:d4dda5c437f0 | 736 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |