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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F072RB/stm32f0xx_hal_rcc_ex.c@205:c41fc65bcfb4, 2014-05-22 (annotated)

Committer:: mbed_official
Date:: Thu May 22 20:00:09 2014 +0100
Revision:: 205:c41fc65bcfb4
Child:: 218:44081b78fdc2

Synchronized with git revision ea4b6f76efab17a3f7d7777b0cc1ef05fec6d1cb



Full URL: https://github.com/mbedmicro/mbed/commit/ea4b6f76efab17a3f7d7777b0cc1ef05fec6d1cb/



[NUCLEO_F072RB] cmsis files

Who changed what in which revision?

User	Revision	Line number	New contents of line
mbed_official	205:c41fc65bcfb4	1	/**
mbed_official	205:c41fc65bcfb4	2	******************************************************************************
mbed_official	205:c41fc65bcfb4	3	* @file stm32f0xx_hal_rcc_ex.c
mbed_official	205:c41fc65bcfb4	4	* @author MCD Application Team
mbed_official	205:c41fc65bcfb4	5	* @version V1.0.0
mbed_official	205:c41fc65bcfb4	6	* @date 20-May-2014
mbed_official	205:c41fc65bcfb4	7	* @brief Extended RCC HAL module driver
mbed_official	205:c41fc65bcfb4	8	* This file provides firmware functions to manage the following
mbed_official	205:c41fc65bcfb4	9	* functionalities RCC extension peripheral:
mbed_official	205:c41fc65bcfb4	10	* + Extended Clock Source configuration functions
mbed_official	205:c41fc65bcfb4	11	*
mbed_official	205:c41fc65bcfb4	12	@verbatim
mbed_official	205:c41fc65bcfb4	13	==============================================================================
mbed_official	205:c41fc65bcfb4	14	##### How to use this driver #####
mbed_official	205:c41fc65bcfb4	15	==============================================================================
mbed_official	205:c41fc65bcfb4	16
mbed_official	205:c41fc65bcfb4	17	For CRS, RCC Extention HAL driver can be used as follows:
mbed_official	205:c41fc65bcfb4	18
mbed_official	205:c41fc65bcfb4	19	(#) In System clock config, HSI48 need to be enabled
mbed_official	205:c41fc65bcfb4	20
mbed_official	205:c41fc65bcfb4	21	(#] Enable CRS clock in IP MSP init which will use CRS functions
mbed_official	205:c41fc65bcfb4	22
mbed_official	205:c41fc65bcfb4	23	(#) Call CRS functions like this
mbed_official	205:c41fc65bcfb4	24	(##) Prepare synchronization configuration necessary for HSI48 calibration
mbed_official	205:c41fc65bcfb4	25	(+++) Default values can be set for frequency Error Measurement (reload and error limit)
mbed_official	205:c41fc65bcfb4	26	and also HSI48 oscillator smooth trimming.
mbed_official	205:c41fc65bcfb4	27	(+++) Macro __HAL_RCC_CRS_CALCULATE_RELOADVALUE can be also used to calculate
mbed_official	205:c41fc65bcfb4	28	directly reload value with target and sychronization frequencies values
mbed_official	205:c41fc65bcfb4	29	(##) Call function HAL_RCCEx_CRSConfig which
mbed_official	205:c41fc65bcfb4	30	(+++) Reset CRS registers to their default values.
mbed_official	205:c41fc65bcfb4	31	(+++) Configure CRS registers with synchronization configuration
mbed_official	205:c41fc65bcfb4	32	(+++) Enable automatic calibration and frequency error counter feature
mbed_official	205:c41fc65bcfb4	33
mbed_official	205:c41fc65bcfb4	34	(##) A polling function is provided to wait for complete Synchronization
mbed_official	205:c41fc65bcfb4	35	(+++) Call function 'HAL_RCCEx_CRSWaitSynchronization()'
mbed_official	205:c41fc65bcfb4	36	(+++) According to CRS status, user can decide to adjust again the calibration or continue
mbed_official	205:c41fc65bcfb4	37	application if synchronization is OK
mbed_official	205:c41fc65bcfb4	38
mbed_official	205:c41fc65bcfb4	39	(#) User can retrieve information related to synchronization in calling function
mbed_official	205:c41fc65bcfb4	40	HAL_RCCEx_CRSGetSynchronizationInfo()
mbed_official	205:c41fc65bcfb4	41
mbed_official	205:c41fc65bcfb4	42	(#) Regarding synchronization status and synchronization information, user can try a new calibration
mbed_official	205:c41fc65bcfb4	43	in changing synchronization configuration and call again HAL_RCCEx_CRSConfig.
mbed_official	205:c41fc65bcfb4	44	Note: When the SYNC event is detected during the downcounting phase (before reaching the zero value),
mbed_official	205:c41fc65bcfb4	45	it means that the actual frequency is lower than the target (and so, that the TRIM value should be
mbed_official	205:c41fc65bcfb4	46	incremented), while when it is detected during the upcounting phase it means that the actual frequency
mbed_official	205:c41fc65bcfb4	47	is higher (and that the TRIM value should be decremented).
mbed_official	205:c41fc65bcfb4	48
mbed_official	205:c41fc65bcfb4	49	(#) To use IT mode, user needs to handle it in calling different macros available to do it
mbed_official	205:c41fc65bcfb4	50	(__HAL_RCC_CRS_XXX_IT). Interuptions will go through RCC Handler (RCC_IRQn/RCC_CRS_IRQHandler)
mbed_official	205:c41fc65bcfb4	51	(+++) Call function HAL_RCCEx_CRSConfig()
mbed_official	205:c41fc65bcfb4	52	(+++) Enable RCC_IRQn (thnaks to NVIC functions)
mbed_official	205:c41fc65bcfb4	53	(+++) Enable CRS IT (__HAL_RCC_CRS_ENABLE_IT)
mbed_official	205:c41fc65bcfb4	54	[+++) Implement CRS status management in RCC_CRS_IRQHandler
mbed_official	205:c41fc65bcfb4	55
mbed_official	205:c41fc65bcfb4	56	(#) To force a SYNC EVENT, user can use function 'HAL_RCCEx_CRSSoftwareSynchronizationGenerate()'. Function can be
mbed_official	205:c41fc65bcfb4	57	called before calling HAL_RCCEx_CRSConfig (for instance in Systick handler)
mbed_official	205:c41fc65bcfb4	58
mbed_official	205:c41fc65bcfb4	59	@endverbatim
mbed_official	205:c41fc65bcfb4	60	******************************************************************************
mbed_official	205:c41fc65bcfb4	61	* @attention
mbed_official	205:c41fc65bcfb4	62	*
mbed_official	205:c41fc65bcfb4	63	* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official	205:c41fc65bcfb4	64	*
mbed_official	205:c41fc65bcfb4	65	* Redistribution and use in source and binary forms, with or without modification,
mbed_official	205:c41fc65bcfb4	66	* are permitted provided that the following conditions are met:
mbed_official	205:c41fc65bcfb4	67	* 1. Redistributions of source code must retain the above copyright notice,
mbed_official	205:c41fc65bcfb4	68	* this list of conditions and the following disclaimer.
mbed_official	205:c41fc65bcfb4	69	* 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official	205:c41fc65bcfb4	70	* this list of conditions and the following disclaimer in the documentation
mbed_official	205:c41fc65bcfb4	71	* and/or other materials provided with the distribution.
mbed_official	205:c41fc65bcfb4	72	* 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official	205:c41fc65bcfb4	73	* may be used to endorse or promote products derived from this software
mbed_official	205:c41fc65bcfb4	74	* without specific prior written permission.
mbed_official	205:c41fc65bcfb4	75	*
mbed_official	205:c41fc65bcfb4	76	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official	205:c41fc65bcfb4	77	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official	205:c41fc65bcfb4	78	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official	205:c41fc65bcfb4	79	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official	205:c41fc65bcfb4	80	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official	205:c41fc65bcfb4	81	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official	205:c41fc65bcfb4	82	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official	205:c41fc65bcfb4	83	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official	205:c41fc65bcfb4	84	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official	205:c41fc65bcfb4	85	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official	205:c41fc65bcfb4	86	*
mbed_official	205:c41fc65bcfb4	87	******************************************************************************
mbed_official	205:c41fc65bcfb4	88	*/
mbed_official	205:c41fc65bcfb4	89
mbed_official	205:c41fc65bcfb4	90	/* Includes ------------------------------------------------------------------*/
mbed_official	205:c41fc65bcfb4	91	#include "stm32f0xx_hal.h"
mbed_official	205:c41fc65bcfb4	92
mbed_official	205:c41fc65bcfb4	93	/** @addtogroup STM32F0xx_HAL_Driver
mbed_official	205:c41fc65bcfb4	94	* @{
mbed_official	205:c41fc65bcfb4	95	*/
mbed_official	205:c41fc65bcfb4	96
mbed_official	205:c41fc65bcfb4	97	/** @defgroup RCCEx
mbed_official	205:c41fc65bcfb4	98	* @brief RCC Extension HAL module driver.
mbed_official	205:c41fc65bcfb4	99	* @{
mbed_official	205:c41fc65bcfb4	100	*/
mbed_official	205:c41fc65bcfb4	101
mbed_official	205:c41fc65bcfb4	102	#ifdef HAL_RCC_MODULE_ENABLED
mbed_official	205:c41fc65bcfb4	103
mbed_official	205:c41fc65bcfb4	104	/* Private typedef -----------------------------------------------------------*/
mbed_official	205:c41fc65bcfb4	105	/* Private define ------------------------------------------------------------*/
mbed_official	205:c41fc65bcfb4	106	#define HSI48_TIMEOUT_VALUE ((uint32_t)100) /* 100 ms */
mbed_official	205:c41fc65bcfb4	107
mbed_official	205:c41fc65bcfb4	108	/* Bit position in register */
mbed_official	205:c41fc65bcfb4	109	#define CRS_CFGR_FELIM_BITNUMBER 16
mbed_official	205:c41fc65bcfb4	110	#define CRS_CR_TRIM_BITNUMBER 8
mbed_official	205:c41fc65bcfb4	111	#define CRS_ISR_FECAP_BITNUMBER 16
mbed_official	205:c41fc65bcfb4	112
mbed_official	205:c41fc65bcfb4	113	/* Private macro -------------------------------------------------------------*/
mbed_official	205:c41fc65bcfb4	114	/* Private variables ---------------------------------------------------------*/
mbed_official	205:c41fc65bcfb4	115	const uint8_t PLLMULFactorTable[16] = { 2, 3, 4, 5, 6, 7, 8, 9,
mbed_official	205:c41fc65bcfb4	116	10, 11, 12, 13, 14, 15, 16, 16};
mbed_official	205:c41fc65bcfb4	117	const uint8_t PredivFactorTable[16] = { 1, 2, 3, 4, 5, 6, 7, 8,
mbed_official	205:c41fc65bcfb4	118	9,10, 11, 12, 13, 14, 15, 16};
mbed_official	205:c41fc65bcfb4	119
mbed_official	205:c41fc65bcfb4	120	/* Private function prototypes -----------------------------------------------*/
mbed_official	205:c41fc65bcfb4	121	/* Private functions ---------------------------------------------------------*/
mbed_official	205:c41fc65bcfb4	122
mbed_official	205:c41fc65bcfb4	123	/** @defgroup RCCEx_Private_Functions
mbed_official	205:c41fc65bcfb4	124	* @{
mbed_official	205:c41fc65bcfb4	125	*/
mbed_official	205:c41fc65bcfb4	126
mbed_official	205:c41fc65bcfb4	127	/** @defgroup RCCEx_Group1 Extended Peripheral Control functions
mbed_official	205:c41fc65bcfb4	128	* @brief Extended RCC clocks control functions
mbed_official	205:c41fc65bcfb4	129	*
mbed_official	205:c41fc65bcfb4	130	@verbatim
mbed_official	205:c41fc65bcfb4	131	===============================================================================
mbed_official	205:c41fc65bcfb4	132	##### Extended Peripheral Control functions #####
mbed_official	205:c41fc65bcfb4	133	===============================================================================
mbed_official	205:c41fc65bcfb4	134	[..]
mbed_official	205:c41fc65bcfb4	135	This subsection provides a set of functions allowing to control the RCC Clocks
mbed_official	205:c41fc65bcfb4	136	frequencies.
mbed_official	205:c41fc65bcfb4	137	[..]
mbed_official	205:c41fc65bcfb4	138	(@) Important note: Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to
mbed_official	205:c41fc65bcfb4	139	select the RTC clock source; in this case the Backup domain will be reset in
mbed_official	205:c41fc65bcfb4	140	order to modify the RTC Clock source, as consequence RTC registers (including
mbed_official	205:c41fc65bcfb4	141	the backup registers) and RCC_BDCR register are set to their reset values.
mbed_official	205:c41fc65bcfb4	142
mbed_official	205:c41fc65bcfb4	143	@endverbatim
mbed_official	205:c41fc65bcfb4	144	* @{
mbed_official	205:c41fc65bcfb4	145	*/
mbed_official	205:c41fc65bcfb4	146
mbed_official	205:c41fc65bcfb4	147	/**
mbed_official	205:c41fc65bcfb4	148	* @brief Initializes the RCC Oscillators according to the specified parameters in the
mbed_official	205:c41fc65bcfb4	149	* RCC_OscInitTypeDef.
mbed_official	205:c41fc65bcfb4	150	* @param RCC_OscInitStruct: pointer to an RCC_OscInitTypeDef structure that
mbed_official	205:c41fc65bcfb4	151	* contains the configuration information for the RCC Oscillators.
mbed_official	205:c41fc65bcfb4	152	* @note The PLL is not disabled when used as system clock.
mbed_official	205:c41fc65bcfb4	153	* @retval HAL status
mbed_official	205:c41fc65bcfb4	154	*/
mbed_official	205:c41fc65bcfb4	155	HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
mbed_official	205:c41fc65bcfb4	156	{
mbed_official	205:c41fc65bcfb4	157	uint32_t tickstart = 0;
mbed_official	205:c41fc65bcfb4	158
mbed_official	205:c41fc65bcfb4	159	/* Check the parameters */
mbed_official	205:c41fc65bcfb4	160	assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
mbed_official	205:c41fc65bcfb4	161	/------------------------------- HSE Configuration ------------------------/
mbed_official	205:c41fc65bcfb4	162	if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
mbed_official	205:c41fc65bcfb4	163	{
mbed_official	205:c41fc65bcfb4	164	/* Check the parameters */
mbed_official	205:c41fc65bcfb4	165	assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
mbed_official	205:c41fc65bcfb4	166	/* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
mbed_official	205:c41fc65bcfb4	167	if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) \|\|
mbed_official	205:c41fc65bcfb4	168	((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
mbed_official	205:c41fc65bcfb4	169	{
mbed_official	205:c41fc65bcfb4	170	if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState != RCC_HSE_ON))
mbed_official	205:c41fc65bcfb4	171	{
mbed_official	205:c41fc65bcfb4	172	return HAL_ERROR;
mbed_official	205:c41fc65bcfb4	173	}
mbed_official	205:c41fc65bcfb4	174	}
mbed_official	205:c41fc65bcfb4	175	else
mbed_official	205:c41fc65bcfb4	176	{
mbed_official	205:c41fc65bcfb4	177	/* Reset HSEON and HSEBYP bits before configuring the HSE --------------*/
mbed_official	205:c41fc65bcfb4	178	__HAL_RCC_HSE_CONFIG(RCC_HSE_OFF);
mbed_official	205:c41fc65bcfb4	179
mbed_official	205:c41fc65bcfb4	180	/* Get timeout */
mbed_official	205:c41fc65bcfb4	181	tickstart = HAL_GetTick();
mbed_official	205:c41fc65bcfb4	182
mbed_official	205:c41fc65bcfb4	183	/* Wait till HSE is disabled */
mbed_official	205:c41fc65bcfb4	184	while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
mbed_official	205:c41fc65bcfb4	185	{
mbed_official	205:c41fc65bcfb4	186	if((HAL_GetTick() - tickstart) >= HSE_TIMEOUT_VALUE)
mbed_official	205:c41fc65bcfb4	187	{
mbed_official	205:c41fc65bcfb4	188	return HAL_TIMEOUT;
mbed_official	205:c41fc65bcfb4	189	}
mbed_official	205:c41fc65bcfb4	190	}
mbed_official	205:c41fc65bcfb4	191
mbed_official	205:c41fc65bcfb4	192	/* Set the new HSE configuration ---------------------------------------*/
mbed_official	205:c41fc65bcfb4	193	__HAL_RCC_HSE_CONFIG((uint8_t)RCC_OscInitStruct->HSEState);
mbed_official	205:c41fc65bcfb4	194
mbed_official	205:c41fc65bcfb4	195	/* Check the HSE State */
mbed_official	205:c41fc65bcfb4	196	if((RCC_OscInitStruct->HSEState) == RCC_HSE_ON)
mbed_official	205:c41fc65bcfb4	197	{
mbed_official	205:c41fc65bcfb4	198	/* Get timeout */
mbed_official	205:c41fc65bcfb4	199	tickstart = HAL_GetTick();
mbed_official	205:c41fc65bcfb4	200
mbed_official	205:c41fc65bcfb4	201	/* Wait till HSE is ready */
mbed_official	205:c41fc65bcfb4	202	while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
mbed_official	205:c41fc65bcfb4	203	{
mbed_official	205:c41fc65bcfb4	204	if((HAL_GetTick() - tickstart) >= HSE_TIMEOUT_VALUE)
mbed_official	205:c41fc65bcfb4	205	{
mbed_official	205:c41fc65bcfb4	206	return HAL_TIMEOUT;
mbed_official	205:c41fc65bcfb4	207	}
mbed_official	205:c41fc65bcfb4	208	}
mbed_official	205:c41fc65bcfb4	209	}
mbed_official	205:c41fc65bcfb4	210	else
mbed_official	205:c41fc65bcfb4	211	{
mbed_official	205:c41fc65bcfb4	212	/* Get timeout */
mbed_official	205:c41fc65bcfb4	213	tickstart = HAL_GetTick();
mbed_official	205:c41fc65bcfb4	214
mbed_official	205:c41fc65bcfb4	215	/* Wait till HSE is bypassed or disabled */
mbed_official	205:c41fc65bcfb4	216	while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
mbed_official	205:c41fc65bcfb4	217	{
mbed_official	205:c41fc65bcfb4	218	if((HAL_GetTick() - tickstart) >= HSE_TIMEOUT_VALUE)
mbed_official	205:c41fc65bcfb4	219	{
mbed_official	205:c41fc65bcfb4	220	return HAL_TIMEOUT;
mbed_official	205:c41fc65bcfb4	221	}
mbed_official	205:c41fc65bcfb4	222	}
mbed_official	205:c41fc65bcfb4	223	}
mbed_official	205:c41fc65bcfb4	224	}
mbed_official	205:c41fc65bcfb4	225	}
mbed_official	205:c41fc65bcfb4	226	/----------------------------- HSI Configuration --------------------------/
mbed_official	205:c41fc65bcfb4	227	if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
mbed_official	205:c41fc65bcfb4	228	{
mbed_official	205:c41fc65bcfb4	229	/* Check the parameters */
mbed_official	205:c41fc65bcfb4	230	assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
mbed_official	205:c41fc65bcfb4	231	assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
mbed_official	205:c41fc65bcfb4	232
mbed_official	205:c41fc65bcfb4	233	/* When the HSI is used as system clock it is not allowed to be disabled */
mbed_official	205:c41fc65bcfb4	234	if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) \|\|
mbed_official	205:c41fc65bcfb4	235	((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI)))
mbed_official	205:c41fc65bcfb4	236	{
mbed_official	205:c41fc65bcfb4	237	if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
mbed_official	205:c41fc65bcfb4	238	{
mbed_official	205:c41fc65bcfb4	239	return HAL_ERROR;
mbed_official	205:c41fc65bcfb4	240	}
mbed_official	205:c41fc65bcfb4	241	}
mbed_official	205:c41fc65bcfb4	242	else
mbed_official	205:c41fc65bcfb4	243	{
mbed_official	205:c41fc65bcfb4	244	/* Check the HSI State */
mbed_official	205:c41fc65bcfb4	245	if((RCC_OscInitStruct->HSIState)!= RCC_HSI_OFF)
mbed_official	205:c41fc65bcfb4	246	{
mbed_official	205:c41fc65bcfb4	247	/* Enable the Internal High Speed oscillator (HSI). */
mbed_official	205:c41fc65bcfb4	248	__HAL_RCC_HSI_ENABLE();
mbed_official	205:c41fc65bcfb4	249
mbed_official	205:c41fc65bcfb4	250	tickstart = HAL_GetTick();
mbed_official	205:c41fc65bcfb4	251
mbed_official	205:c41fc65bcfb4	252	/* Wait till HSI is ready */
mbed_official	205:c41fc65bcfb4	253	while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
mbed_official	205:c41fc65bcfb4	254	{
mbed_official	205:c41fc65bcfb4	255	if((HAL_GetTick() - tickstart) >= HSI_TIMEOUT_VALUE)
mbed_official	205:c41fc65bcfb4	256	{
mbed_official	205:c41fc65bcfb4	257	return HAL_TIMEOUT;
mbed_official	205:c41fc65bcfb4	258	}
mbed_official	205:c41fc65bcfb4	259	}
mbed_official	205:c41fc65bcfb4	260
mbed_official	205:c41fc65bcfb4	261	/* Adjusts the Internal High Speed oscillator (HSI) calibration value. */
mbed_official	205:c41fc65bcfb4	262	__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
mbed_official	205:c41fc65bcfb4	263	}
mbed_official	205:c41fc65bcfb4	264	else
mbed_official	205:c41fc65bcfb4	265	{
mbed_official	205:c41fc65bcfb4	266	/* Disable the Internal High Speed oscillator (HSI). */
mbed_official	205:c41fc65bcfb4	267	__HAL_RCC_HSI_DISABLE();
mbed_official	205:c41fc65bcfb4	268
mbed_official	205:c41fc65bcfb4	269	/* Get timeout */
mbed_official	205:c41fc65bcfb4	270	tickstart = HAL_GetTick();
mbed_official	205:c41fc65bcfb4	271
mbed_official	205:c41fc65bcfb4	272	/* Wait till HSI is ready */
mbed_official	205:c41fc65bcfb4	273	while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
mbed_official	205:c41fc65bcfb4	274	{
mbed_official	205:c41fc65bcfb4	275	if((HAL_GetTick() - tickstart) >= HSI_TIMEOUT_VALUE)
mbed_official	205:c41fc65bcfb4	276	{
mbed_official	205:c41fc65bcfb4	277	return HAL_TIMEOUT;
mbed_official	205:c41fc65bcfb4	278	}
mbed_official	205:c41fc65bcfb4	279	}
mbed_official	205:c41fc65bcfb4	280	}
mbed_official	205:c41fc65bcfb4	281	}
mbed_official	205:c41fc65bcfb4	282	}
mbed_official	205:c41fc65bcfb4	283	/------------------------------ LSI Configuration -------------------------/
mbed_official	205:c41fc65bcfb4	284	if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
mbed_official	205:c41fc65bcfb4	285	{
mbed_official	205:c41fc65bcfb4	286	/* Check the parameters */
mbed_official	205:c41fc65bcfb4	287	assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
mbed_official	205:c41fc65bcfb4	288
mbed_official	205:c41fc65bcfb4	289	/* Check the LSI State */
mbed_official	205:c41fc65bcfb4	290	if((RCC_OscInitStruct->LSIState)!= RCC_LSI_OFF)
mbed_official	205:c41fc65bcfb4	291	{
mbed_official	205:c41fc65bcfb4	292	/* Enable the Internal Low Speed oscillator (LSI). */
mbed_official	205:c41fc65bcfb4	293	__HAL_RCC_LSI_ENABLE();
mbed_official	205:c41fc65bcfb4	294
mbed_official	205:c41fc65bcfb4	295	/* Get timeout */
mbed_official	205:c41fc65bcfb4	296	tickstart = HAL_GetTick() ;
mbed_official	205:c41fc65bcfb4	297
mbed_official	205:c41fc65bcfb4	298	/* Wait till LSI is ready */
mbed_official	205:c41fc65bcfb4	299	while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
mbed_official	205:c41fc65bcfb4	300	{
mbed_official	205:c41fc65bcfb4	301	if((HAL_GetTick() - tickstart) >= LSI_TIMEOUT_VALUE)
mbed_official	205:c41fc65bcfb4	302	{
mbed_official	205:c41fc65bcfb4	303	return HAL_TIMEOUT;
mbed_official	205:c41fc65bcfb4	304	}
mbed_official	205:c41fc65bcfb4	305	}
mbed_official	205:c41fc65bcfb4	306	}
mbed_official	205:c41fc65bcfb4	307	else
mbed_official	205:c41fc65bcfb4	308	{
mbed_official	205:c41fc65bcfb4	309	/* Disable the Internal Low Speed oscillator (LSI). */
mbed_official	205:c41fc65bcfb4	310	__HAL_RCC_LSI_DISABLE();
mbed_official	205:c41fc65bcfb4	311
mbed_official	205:c41fc65bcfb4	312	/* Get timeout */
mbed_official	205:c41fc65bcfb4	313	tickstart = HAL_GetTick() ;
mbed_official	205:c41fc65bcfb4	314
mbed_official	205:c41fc65bcfb4	315	/* Wait till LSI is ready */
mbed_official	205:c41fc65bcfb4	316	while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
mbed_official	205:c41fc65bcfb4	317	{
mbed_official	205:c41fc65bcfb4	318	if((HAL_GetTick() - tickstart) >= LSI_TIMEOUT_VALUE)
mbed_official	205:c41fc65bcfb4	319	{
mbed_official	205:c41fc65bcfb4	320	return HAL_TIMEOUT;
mbed_official	205:c41fc65bcfb4	321	}
mbed_official	205:c41fc65bcfb4	322	}
mbed_official	205:c41fc65bcfb4	323	}
mbed_official	205:c41fc65bcfb4	324	}
mbed_official	205:c41fc65bcfb4	325	/------------------------------ LSE Configuration -------------------------/
mbed_official	205:c41fc65bcfb4	326	if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
mbed_official	205:c41fc65bcfb4	327	{
mbed_official	205:c41fc65bcfb4	328	/* Check the parameters */
mbed_official	205:c41fc65bcfb4	329	assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
mbed_official	205:c41fc65bcfb4	330
mbed_official	205:c41fc65bcfb4	331	/* Enable Power Clock */
mbed_official	205:c41fc65bcfb4	332	__PWR_CLK_ENABLE();
mbed_official	205:c41fc65bcfb4	333
mbed_official	205:c41fc65bcfb4	334	/* Enable write access to Backup domain */
mbed_official	205:c41fc65bcfb4	335	SET_BIT(PWR->CR, PWR_CR_DBP);
mbed_official	205:c41fc65bcfb4	336
mbed_official	205:c41fc65bcfb4	337	/* Wait for Backup domain Write protection disable */
mbed_official	205:c41fc65bcfb4	338	tickstart = HAL_GetTick() ;
mbed_official	205:c41fc65bcfb4	339
mbed_official	205:c41fc65bcfb4	340	while((PWR->CR & PWR_CR_DBP) == RESET)
mbed_official	205:c41fc65bcfb4	341	{
mbed_official	205:c41fc65bcfb4	342	if((HAL_GetTick() - tickstart) >= DBP_TIMEOUT_VALUE)
mbed_official	205:c41fc65bcfb4	343	{
mbed_official	205:c41fc65bcfb4	344	return HAL_TIMEOUT;
mbed_official	205:c41fc65bcfb4	345	}
mbed_official	205:c41fc65bcfb4	346	}
mbed_official	205:c41fc65bcfb4	347
mbed_official	205:c41fc65bcfb4	348	/* Reset LSEON and LSEBYP bits before configuring the LSE ----------------*/
mbed_official	205:c41fc65bcfb4	349	__HAL_RCC_LSE_CONFIG(RCC_LSE_OFF);
mbed_official	205:c41fc65bcfb4	350
mbed_official	205:c41fc65bcfb4	351	/* Get timeout */
mbed_official	205:c41fc65bcfb4	352	tickstart = HAL_GetTick() ;
mbed_official	205:c41fc65bcfb4	353
mbed_official	205:c41fc65bcfb4	354	/* Wait till LSE is ready */
mbed_official	205:c41fc65bcfb4	355	while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
mbed_official	205:c41fc65bcfb4	356	{
mbed_official	205:c41fc65bcfb4	357	if((HAL_GetTick() - tickstart) >= LSE_TIMEOUT_VALUE)
mbed_official	205:c41fc65bcfb4	358	{
mbed_official	205:c41fc65bcfb4	359	return HAL_TIMEOUT;
mbed_official	205:c41fc65bcfb4	360	}
mbed_official	205:c41fc65bcfb4	361	}
mbed_official	205:c41fc65bcfb4	362
mbed_official	205:c41fc65bcfb4	363	/* Set the new LSE configuration -----------------------------------------*/
mbed_official	205:c41fc65bcfb4	364	__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
mbed_official	205:c41fc65bcfb4	365	/* Check the LSE State */
mbed_official	205:c41fc65bcfb4	366	if((RCC_OscInitStruct->LSEState) == RCC_LSE_ON)
mbed_official	205:c41fc65bcfb4	367	{
mbed_official	205:c41fc65bcfb4	368	/* Get timeout */
mbed_official	205:c41fc65bcfb4	369	tickstart = HAL_GetTick() ;
mbed_official	205:c41fc65bcfb4	370
mbed_official	205:c41fc65bcfb4	371	/* Wait till LSE is ready */
mbed_official	205:c41fc65bcfb4	372	while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
mbed_official	205:c41fc65bcfb4	373	{
mbed_official	205:c41fc65bcfb4	374	if((HAL_GetTick() - tickstart) >= LSE_TIMEOUT_VALUE)
mbed_official	205:c41fc65bcfb4	375	{
mbed_official	205:c41fc65bcfb4	376	return HAL_TIMEOUT;
mbed_official	205:c41fc65bcfb4	377	}
mbed_official	205:c41fc65bcfb4	378	}
mbed_official	205:c41fc65bcfb4	379	}
mbed_official	205:c41fc65bcfb4	380	else
mbed_official	205:c41fc65bcfb4	381	{
mbed_official	205:c41fc65bcfb4	382	/* Get timeout */
mbed_official	205:c41fc65bcfb4	383	tickstart = HAL_GetTick() ;
mbed_official	205:c41fc65bcfb4	384
mbed_official	205:c41fc65bcfb4	385	/* Wait till LSE is ready */
mbed_official	205:c41fc65bcfb4	386	while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
mbed_official	205:c41fc65bcfb4	387	{
mbed_official	205:c41fc65bcfb4	388	if((HAL_GetTick() - tickstart) >= LSE_TIMEOUT_VALUE)
mbed_official	205:c41fc65bcfb4	389	{
mbed_official	205:c41fc65bcfb4	390	return HAL_TIMEOUT;
mbed_official	205:c41fc65bcfb4	391	}
mbed_official	205:c41fc65bcfb4	392	}
mbed_official	205:c41fc65bcfb4	393	}
mbed_official	205:c41fc65bcfb4	394	}
mbed_official	205:c41fc65bcfb4	395
mbed_official	205:c41fc65bcfb4	396	/----------------------------- HSI14 Configuration --------------------------/
mbed_official	205:c41fc65bcfb4	397	if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI14) == RCC_OSCILLATORTYPE_HSI14)
mbed_official	205:c41fc65bcfb4	398	{
mbed_official	205:c41fc65bcfb4	399	/* Check the parameters */
mbed_official	205:c41fc65bcfb4	400	assert_param(IS_RCC_HSI14(RCC_OscInitStruct->HSI14State));
mbed_official	205:c41fc65bcfb4	401	assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSI14CalibrationValue));
mbed_official	205:c41fc65bcfb4	402
mbed_official	205:c41fc65bcfb4	403	/* Check the HSI14 State */
mbed_official	205:c41fc65bcfb4	404	if((RCC_OscInitStruct->HSI14State) == RCC_HSI14_ON)
mbed_official	205:c41fc65bcfb4	405	{
mbed_official	205:c41fc65bcfb4	406	/* Disable ADC control of the Internal High Speed oscillator HSI14 */
mbed_official	205:c41fc65bcfb4	407	__HAL_RCC_HSI14ADC_DISABLE();
mbed_official	205:c41fc65bcfb4	408
mbed_official	205:c41fc65bcfb4	409	/* Enable the Internal High Speed oscillator (HSI). */
mbed_official	205:c41fc65bcfb4	410	__HAL_RCC_HSI14_ENABLE();
mbed_official	205:c41fc65bcfb4	411
mbed_official	205:c41fc65bcfb4	412	/* Get timeout */
mbed_official	205:c41fc65bcfb4	413	tickstart = HAL_GetTick();
mbed_official	205:c41fc65bcfb4	414
mbed_official	205:c41fc65bcfb4	415	/* Wait till HSI is ready */
mbed_official	205:c41fc65bcfb4	416	while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) == RESET)
mbed_official	205:c41fc65bcfb4	417	{
mbed_official	205:c41fc65bcfb4	418	if((HAL_GetTick() - tickstart) >= HSI14_TIMEOUT_VALUE)
mbed_official	205:c41fc65bcfb4	419	{
mbed_official	205:c41fc65bcfb4	420	return HAL_TIMEOUT;
mbed_official	205:c41fc65bcfb4	421	}
mbed_official	205:c41fc65bcfb4	422	}
mbed_official	205:c41fc65bcfb4	423
mbed_official	205:c41fc65bcfb4	424	/* Adjusts the Internal High Speed oscillator 14Mhz (HSI14) calibration value. */
mbed_official	205:c41fc65bcfb4	425	__HAL_RCC_HSI14_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSI14CalibrationValue);
mbed_official	205:c41fc65bcfb4	426	}
mbed_official	205:c41fc65bcfb4	427	else if((RCC_OscInitStruct->HSI14State) == RCC_HSI14_ADC_CONTROL)
mbed_official	205:c41fc65bcfb4	428	{
mbed_official	205:c41fc65bcfb4	429	/* Enable ADC control of the Internal High Speed oscillator HSI14 */
mbed_official	205:c41fc65bcfb4	430	__HAL_RCC_HSI14ADC_ENABLE();
mbed_official	205:c41fc65bcfb4	431
mbed_official	205:c41fc65bcfb4	432	/* Adjusts the Internal High Speed oscillator 14Mhz (HSI14) calibration value. */
mbed_official	205:c41fc65bcfb4	433	__HAL_RCC_HSI14_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSI14CalibrationValue);
mbed_official	205:c41fc65bcfb4	434	}
mbed_official	205:c41fc65bcfb4	435	else
mbed_official	205:c41fc65bcfb4	436	{
mbed_official	205:c41fc65bcfb4	437	/* Disable ADC control of the Internal High Speed oscillator HSI14 */
mbed_official	205:c41fc65bcfb4	438	__HAL_RCC_HSI14ADC_DISABLE();
mbed_official	205:c41fc65bcfb4	439
mbed_official	205:c41fc65bcfb4	440	/* Disable the Internal High Speed oscillator (HSI). */
mbed_official	205:c41fc65bcfb4	441	__HAL_RCC_HSI14_DISABLE();
mbed_official	205:c41fc65bcfb4	442
mbed_official	205:c41fc65bcfb4	443	/* Get timeout */
mbed_official	205:c41fc65bcfb4	444	tickstart = HAL_GetTick();
mbed_official	205:c41fc65bcfb4	445
mbed_official	205:c41fc65bcfb4	446	/* Wait till HSI is ready */
mbed_official	205:c41fc65bcfb4	447	while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) != RESET)
mbed_official	205:c41fc65bcfb4	448	{
mbed_official	205:c41fc65bcfb4	449	if((HAL_GetTick() - tickstart) >= HSI14_TIMEOUT_VALUE)
mbed_official	205:c41fc65bcfb4	450	{
mbed_official	205:c41fc65bcfb4	451	return HAL_TIMEOUT;
mbed_official	205:c41fc65bcfb4	452	}
mbed_official	205:c41fc65bcfb4	453	}
mbed_official	205:c41fc65bcfb4	454	}
mbed_official	205:c41fc65bcfb4	455	}
mbed_official	205:c41fc65bcfb4	456
mbed_official	205:c41fc65bcfb4	457	#if defined(STM32F042x6) \|\| defined(STM32F048xx) \|\| defined(STM32F072xB) \|\| defined(STM32F078xx)
mbed_official	205:c41fc65bcfb4	458	/----------------------------- HSI48 Configuration --------------------------/
mbed_official	205:c41fc65bcfb4	459	if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI48) == RCC_OSCILLATORTYPE_HSI48)
mbed_official	205:c41fc65bcfb4	460	{
mbed_official	205:c41fc65bcfb4	461	/* Check the parameters */
mbed_official	205:c41fc65bcfb4	462	assert_param(IS_RCC_HSI48(RCC_OscInitStruct->HSI48State));
mbed_official	205:c41fc65bcfb4	463
mbed_official	205:c41fc65bcfb4	464	/* When the HSI48 is used as system clock it is not allowed to be disabled */
mbed_official	205:c41fc65bcfb4	465	if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI48) \|\|
mbed_official	205:c41fc65bcfb4	466	((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI48)))
mbed_official	205:c41fc65bcfb4	467	{
mbed_official	205:c41fc65bcfb4	468	if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != RESET) && (RCC_OscInitStruct->HSI48State != RCC_HSI48_ON))
mbed_official	205:c41fc65bcfb4	469	{
mbed_official	205:c41fc65bcfb4	470	return HAL_ERROR;
mbed_official	205:c41fc65bcfb4	471	}
mbed_official	205:c41fc65bcfb4	472	}
mbed_official	205:c41fc65bcfb4	473	else
mbed_official	205:c41fc65bcfb4	474	{
mbed_official	205:c41fc65bcfb4	475	/* Check the HSI State */
mbed_official	205:c41fc65bcfb4	476	if((RCC_OscInitStruct->HSI48State)!= RCC_HSI48_OFF)
mbed_official	205:c41fc65bcfb4	477	{
mbed_official	205:c41fc65bcfb4	478	/* Enable the Internal High Speed oscillator (HSI48). */
mbed_official	205:c41fc65bcfb4	479	__HAL_RCC_HSI48_ENABLE();
mbed_official	205:c41fc65bcfb4	480
mbed_official	205:c41fc65bcfb4	481	/* Get timeout */
mbed_official	205:c41fc65bcfb4	482	tickstart = HAL_GetTick();
mbed_official	205:c41fc65bcfb4	483
mbed_official	205:c41fc65bcfb4	484	/* Wait till HSI is ready */
mbed_official	205:c41fc65bcfb4	485	while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == RESET)
mbed_official	205:c41fc65bcfb4	486	{
mbed_official	205:c41fc65bcfb4	487	if((HAL_GetTick() - tickstart) >= HSI48_TIMEOUT_VALUE)
mbed_official	205:c41fc65bcfb4	488	{
mbed_official	205:c41fc65bcfb4	489	return HAL_TIMEOUT;
mbed_official	205:c41fc65bcfb4	490	}
mbed_official	205:c41fc65bcfb4	491	}
mbed_official	205:c41fc65bcfb4	492	}
mbed_official	205:c41fc65bcfb4	493	else
mbed_official	205:c41fc65bcfb4	494	{
mbed_official	205:c41fc65bcfb4	495	/* Disable the Internal High Speed oscillator (HSI48). */
mbed_official	205:c41fc65bcfb4	496	__HAL_RCC_HSI48_DISABLE();
mbed_official	205:c41fc65bcfb4	497
mbed_official	205:c41fc65bcfb4	498	/* Get timeout */
mbed_official	205:c41fc65bcfb4	499	tickstart = HAL_GetTick();
mbed_official	205:c41fc65bcfb4	500
mbed_official	205:c41fc65bcfb4	501	/* Wait till HSI is ready */
mbed_official	205:c41fc65bcfb4	502	while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != RESET)
mbed_official	205:c41fc65bcfb4	503	{
mbed_official	205:c41fc65bcfb4	504	if((HAL_GetTick() - tickstart) >= HSI48_TIMEOUT_VALUE)
mbed_official	205:c41fc65bcfb4	505	{
mbed_official	205:c41fc65bcfb4	506	return HAL_TIMEOUT;
mbed_official	205:c41fc65bcfb4	507	}
mbed_official	205:c41fc65bcfb4	508	}
mbed_official	205:c41fc65bcfb4	509	}
mbed_official	205:c41fc65bcfb4	510	}
mbed_official	205:c41fc65bcfb4	511	}
mbed_official	205:c41fc65bcfb4	512	#endif /* STM32F042x6 \|\| STM32F072xB \|\| STM32F078xx */
mbed_official	205:c41fc65bcfb4	513
mbed_official	205:c41fc65bcfb4	514	/-------------------------------- PLL Configuration -----------------------/
mbed_official	205:c41fc65bcfb4	515	/* Check the parameters */
mbed_official	205:c41fc65bcfb4	516	assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
mbed_official	205:c41fc65bcfb4	517	if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
mbed_official	205:c41fc65bcfb4	518	{
mbed_official	205:c41fc65bcfb4	519	/* Check if the PLL is used as system clock or not */
mbed_official	205:c41fc65bcfb4	520	if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
mbed_official	205:c41fc65bcfb4	521	{
mbed_official	205:c41fc65bcfb4	522	if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
mbed_official	205:c41fc65bcfb4	523	{
mbed_official	205:c41fc65bcfb4	524	/* Check the parameters */
mbed_official	205:c41fc65bcfb4	525	assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
mbed_official	205:c41fc65bcfb4	526	assert_param(IS_RCC_PREDIV(RCC_OscInitStruct->PLL.PREDIV));
mbed_official	205:c41fc65bcfb4	527	assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
mbed_official	205:c41fc65bcfb4	528
mbed_official	205:c41fc65bcfb4	529	/* Disable the main PLL. */
mbed_official	205:c41fc65bcfb4	530	__HAL_RCC_PLL_DISABLE();
mbed_official	205:c41fc65bcfb4	531
mbed_official	205:c41fc65bcfb4	532	/* Get timeout */
mbed_official	205:c41fc65bcfb4	533	tickstart = HAL_GetTick();
mbed_official	205:c41fc65bcfb4	534
mbed_official	205:c41fc65bcfb4	535	/* Wait till PLL is ready */
mbed_official	205:c41fc65bcfb4	536	while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
mbed_official	205:c41fc65bcfb4	537	{
mbed_official	205:c41fc65bcfb4	538	if((HAL_GetTick() - tickstart) >= PLL_TIMEOUT_VALUE)
mbed_official	205:c41fc65bcfb4	539	{
mbed_official	205:c41fc65bcfb4	540	return HAL_TIMEOUT;
mbed_official	205:c41fc65bcfb4	541	}
mbed_official	205:c41fc65bcfb4	542	}
mbed_official	205:c41fc65bcfb4	543
mbed_official	205:c41fc65bcfb4	544	/* Configure the main PLL clock source, predivider and multiplication factor. */
mbed_official	205:c41fc65bcfb4	545	__HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
mbed_official	205:c41fc65bcfb4	546	RCC_OscInitStruct->PLL.PREDIV,
mbed_official	205:c41fc65bcfb4	547	RCC_OscInitStruct->PLL.PLLMUL);
mbed_official	205:c41fc65bcfb4	548
mbed_official	205:c41fc65bcfb4	549	/* Enable the main PLL. */
mbed_official	205:c41fc65bcfb4	550	__HAL_RCC_PLL_ENABLE();
mbed_official	205:c41fc65bcfb4	551
mbed_official	205:c41fc65bcfb4	552	/* Get timeout */
mbed_official	205:c41fc65bcfb4	553	tickstart = HAL_GetTick();
mbed_official	205:c41fc65bcfb4	554
mbed_official	205:c41fc65bcfb4	555	/* Wait till PLL is ready */
mbed_official	205:c41fc65bcfb4	556	while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
mbed_official	205:c41fc65bcfb4	557	{
mbed_official	205:c41fc65bcfb4	558	if((HAL_GetTick() - tickstart) >= PLL_TIMEOUT_VALUE)
mbed_official	205:c41fc65bcfb4	559	{
mbed_official	205:c41fc65bcfb4	560	return HAL_TIMEOUT;
mbed_official	205:c41fc65bcfb4	561	}
mbed_official	205:c41fc65bcfb4	562	}
mbed_official	205:c41fc65bcfb4	563	}
mbed_official	205:c41fc65bcfb4	564	else
mbed_official	205:c41fc65bcfb4	565	{
mbed_official	205:c41fc65bcfb4	566	/* Disable the main PLL. */
mbed_official	205:c41fc65bcfb4	567	__HAL_RCC_PLL_DISABLE();
mbed_official	205:c41fc65bcfb4	568	/* Get timeout */
mbed_official	205:c41fc65bcfb4	569	tickstart = HAL_GetTick();
mbed_official	205:c41fc65bcfb4	570
mbed_official	205:c41fc65bcfb4	571	/* Wait till PLL is ready */
mbed_official	205:c41fc65bcfb4	572	while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
mbed_official	205:c41fc65bcfb4	573	{
mbed_official	205:c41fc65bcfb4	574	if((HAL_GetTick() - tickstart) >= PLL_TIMEOUT_VALUE)
mbed_official	205:c41fc65bcfb4	575	{
mbed_official	205:c41fc65bcfb4	576	return HAL_TIMEOUT;
mbed_official	205:c41fc65bcfb4	577	}
mbed_official	205:c41fc65bcfb4	578	}
mbed_official	205:c41fc65bcfb4	579	}
mbed_official	205:c41fc65bcfb4	580	}
mbed_official	205:c41fc65bcfb4	581	else
mbed_official	205:c41fc65bcfb4	582	{
mbed_official	205:c41fc65bcfb4	583	return HAL_ERROR;
mbed_official	205:c41fc65bcfb4	584	}
mbed_official	205:c41fc65bcfb4	585	}
mbed_official	205:c41fc65bcfb4	586	return HAL_OK;
mbed_official	205:c41fc65bcfb4	587	}
mbed_official	205:c41fc65bcfb4	588
mbed_official	205:c41fc65bcfb4	589	/**
mbed_official	205:c41fc65bcfb4	590	* @brief Initializes the CPU, AHB and APB busses clocks according to the specified
mbed_official	205:c41fc65bcfb4	591	* parameters in the RCC_ClkInitStruct.
mbed_official	205:c41fc65bcfb4	592	* @param RCC_ClkInitStruct: pointer to an RCC_OscInitTypeDef structure that
mbed_official	205:c41fc65bcfb4	593	* contains the configuration information for the RCC peripheral.
mbed_official	205:c41fc65bcfb4	594	* @param FLatency: FLASH Latency
mbed_official	205:c41fc65bcfb4	595	* This parameter can be one of the following values:
mbed_official	205:c41fc65bcfb4	596	* @arg FLASH_LATENCY_0: FLASH 0 Latency cycle
mbed_official	205:c41fc65bcfb4	597	* @arg FLASH_LATENCY_1: FLASH 1 Latency cycle
mbed_official	205:c41fc65bcfb4	598	*
mbed_official	205:c41fc65bcfb4	599	* @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
mbed_official	205:c41fc65bcfb4	600	* and updated by HAL_RCC_GetHCLKFreq() function called within this function
mbed_official	205:c41fc65bcfb4	601	*
mbed_official	205:c41fc65bcfb4	602	* @note The HSI is used (enabled by hardware) as system clock source after
mbed_official	205:c41fc65bcfb4	603	* startup from Reset, wake-up from STOP and STANDBY mode, or in case
mbed_official	205:c41fc65bcfb4	604	* of failure of the HSE used directly or indirectly as system clock
mbed_official	205:c41fc65bcfb4	605	* (if the Clock Security System CSS is enabled).
mbed_official	205:c41fc65bcfb4	606	*
mbed_official	205:c41fc65bcfb4	607	* @note A switch from one clock source to another occurs only if the target
mbed_official	205:c41fc65bcfb4	608	* clock source is ready (clock stable after startup delay or PLL locked).
mbed_official	205:c41fc65bcfb4	609	* If a clock source which is not yet ready is selected, the switch will
mbed_official	205:c41fc65bcfb4	610	* occur when the clock source will be ready.
mbed_official	205:c41fc65bcfb4	611	* @retval HAL status
mbed_official	205:c41fc65bcfb4	612	*/
mbed_official	205:c41fc65bcfb4	613	HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
mbed_official	205:c41fc65bcfb4	614	{
mbed_official	205:c41fc65bcfb4	615	uint32_t tickstart = 0;
mbed_official	205:c41fc65bcfb4	616
mbed_official	205:c41fc65bcfb4	617	/* Check the parameters */
mbed_official	205:c41fc65bcfb4	618	assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType));
mbed_official	205:c41fc65bcfb4	619	assert_param(IS_FLASH_LATENCY(FLatency));
mbed_official	205:c41fc65bcfb4	620
mbed_official	205:c41fc65bcfb4	621	/* To correctly read data from FLASH memory, the number of wait states (LATENCY)
mbed_official	205:c41fc65bcfb4	622	must be correctly programmed according to the frequency of the CPU clock
mbed_official	205:c41fc65bcfb4	623	(HCLK) of the device. */
mbed_official	205:c41fc65bcfb4	624
mbed_official	205:c41fc65bcfb4	625	/* Increasing the CPU frequency */
mbed_official	205:c41fc65bcfb4	626	if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
mbed_official	205:c41fc65bcfb4	627	{
mbed_official	205:c41fc65bcfb4	628	/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
mbed_official	205:c41fc65bcfb4	629	__HAL_FLASH_SET_LATENCY(FLatency);
mbed_official	205:c41fc65bcfb4	630
mbed_official	205:c41fc65bcfb4	631	/* Check that the new number of wait states is taken into account to access the Flash
mbed_official	205:c41fc65bcfb4	632	memory by reading the FLASH_ACR register */
mbed_official	205:c41fc65bcfb4	633	if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
mbed_official	205:c41fc65bcfb4	634	{
mbed_official	205:c41fc65bcfb4	635	return HAL_ERROR;
mbed_official	205:c41fc65bcfb4	636	}
mbed_official	205:c41fc65bcfb4	637
mbed_official	205:c41fc65bcfb4	638	/-------------------------- HCLK Configuration --------------------------/
mbed_official	205:c41fc65bcfb4	639	if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
mbed_official	205:c41fc65bcfb4	640	{
mbed_official	205:c41fc65bcfb4	641	assert_param(IS_RCC_SYSCLK_DIV(RCC_ClkInitStruct->AHBCLKDivider));
mbed_official	205:c41fc65bcfb4	642	MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
mbed_official	205:c41fc65bcfb4	643	}
mbed_official	205:c41fc65bcfb4	644
mbed_official	205:c41fc65bcfb4	645	/------------------------- SYSCLK Configuration ---------------------------/
mbed_official	205:c41fc65bcfb4	646	if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
mbed_official	205:c41fc65bcfb4	647	{
mbed_official	205:c41fc65bcfb4	648	assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
mbed_official	205:c41fc65bcfb4	649
mbed_official	205:c41fc65bcfb4	650	/* HSE is selected as System Clock Source */
mbed_official	205:c41fc65bcfb4	651	if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
mbed_official	205:c41fc65bcfb4	652	{
mbed_official	205:c41fc65bcfb4	653	/* Check the HSE ready flag */
mbed_official	205:c41fc65bcfb4	654	if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
mbed_official	205:c41fc65bcfb4	655	{
mbed_official	205:c41fc65bcfb4	656	return HAL_ERROR;
mbed_official	205:c41fc65bcfb4	657	}
mbed_official	205:c41fc65bcfb4	658	}
mbed_official	205:c41fc65bcfb4	659	/* PLL is selected as System Clock Source */
mbed_official	205:c41fc65bcfb4	660	else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
mbed_official	205:c41fc65bcfb4	661	{
mbed_official	205:c41fc65bcfb4	662	/* Check the PLL ready flag */
mbed_official	205:c41fc65bcfb4	663	if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
mbed_official	205:c41fc65bcfb4	664	{
mbed_official	205:c41fc65bcfb4	665	return HAL_ERROR;
mbed_official	205:c41fc65bcfb4	666	}
mbed_official	205:c41fc65bcfb4	667	}
mbed_official	205:c41fc65bcfb4	668	#if defined(STM32F042x6) \|\| defined(STM32F048xx) \|\| defined(STM32F072xB) \|\| defined(STM32F078xx)
mbed_official	205:c41fc65bcfb4	669	/* HSI48 is selected as System Clock Source */
mbed_official	205:c41fc65bcfb4	670	else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI48)
mbed_official	205:c41fc65bcfb4	671	{
mbed_official	205:c41fc65bcfb4	672	/* Check the HSI48 ready flag */
mbed_official	205:c41fc65bcfb4	673	if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == RESET)
mbed_official	205:c41fc65bcfb4	674	{
mbed_official	205:c41fc65bcfb4	675	return HAL_ERROR;
mbed_official	205:c41fc65bcfb4	676	}
mbed_official	205:c41fc65bcfb4	677	}
mbed_official	205:c41fc65bcfb4	678	#endif /* STM32F042x6 \|\| STM32F072xB \|\| STM32F078xx */
mbed_official	205:c41fc65bcfb4	679	/* HSI is selected as System Clock Source */
mbed_official	205:c41fc65bcfb4	680	else
mbed_official	205:c41fc65bcfb4	681	{
mbed_official	205:c41fc65bcfb4	682	/* Check the HSI ready flag */
mbed_official	205:c41fc65bcfb4	683	if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
mbed_official	205:c41fc65bcfb4	684	{
mbed_official	205:c41fc65bcfb4	685	return HAL_ERROR;
mbed_official	205:c41fc65bcfb4	686	}
mbed_official	205:c41fc65bcfb4	687	}
mbed_official	205:c41fc65bcfb4	688	MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_ClkInitStruct->SYSCLKSource);
mbed_official	205:c41fc65bcfb4	689
mbed_official	205:c41fc65bcfb4	690	/* Get timeout */
mbed_official	205:c41fc65bcfb4	691	tickstart = HAL_GetTick();
mbed_official	205:c41fc65bcfb4	692
mbed_official	205:c41fc65bcfb4	693	if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
mbed_official	205:c41fc65bcfb4	694	{
mbed_official	205:c41fc65bcfb4	695	while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE)
mbed_official	205:c41fc65bcfb4	696	{
mbed_official	205:c41fc65bcfb4	697	if((HAL_GetTick() - tickstart) >= CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official	205:c41fc65bcfb4	698	{
mbed_official	205:c41fc65bcfb4	699	return HAL_TIMEOUT;
mbed_official	205:c41fc65bcfb4	700	}
mbed_official	205:c41fc65bcfb4	701	}
mbed_official	205:c41fc65bcfb4	702	}
mbed_official	205:c41fc65bcfb4	703	else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
mbed_official	205:c41fc65bcfb4	704	{
mbed_official	205:c41fc65bcfb4	705	while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
mbed_official	205:c41fc65bcfb4	706	{
mbed_official	205:c41fc65bcfb4	707	if((HAL_GetTick() - tickstart) >= CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official	205:c41fc65bcfb4	708	{
mbed_official	205:c41fc65bcfb4	709	return HAL_TIMEOUT;
mbed_official	205:c41fc65bcfb4	710	}
mbed_official	205:c41fc65bcfb4	711	}
mbed_official	205:c41fc65bcfb4	712	}
mbed_official	205:c41fc65bcfb4	713	#if defined(STM32F042x6) \|\| defined(STM32F048xx) \|\| defined(STM32F072xB) \|\| defined(STM32F078xx)
mbed_official	205:c41fc65bcfb4	714	else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI48)
mbed_official	205:c41fc65bcfb4	715	{
mbed_official	205:c41fc65bcfb4	716	while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI48)
mbed_official	205:c41fc65bcfb4	717	{
mbed_official	205:c41fc65bcfb4	718	if((HAL_GetTick() - tickstart) >= CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official	205:c41fc65bcfb4	719	{
mbed_official	205:c41fc65bcfb4	720	return HAL_TIMEOUT;
mbed_official	205:c41fc65bcfb4	721	}
mbed_official	205:c41fc65bcfb4	722	}
mbed_official	205:c41fc65bcfb4	723	}
mbed_official	205:c41fc65bcfb4	724	#endif /* STM32F042x6 \|\| STM32F072xB \|\| STM32F078xx */
mbed_official	205:c41fc65bcfb4	725	else
mbed_official	205:c41fc65bcfb4	726	{
mbed_official	205:c41fc65bcfb4	727	while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI)
mbed_official	205:c41fc65bcfb4	728	{
mbed_official	205:c41fc65bcfb4	729	if((HAL_GetTick() - tickstart) >= CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official	205:c41fc65bcfb4	730	{
mbed_official	205:c41fc65bcfb4	731	return HAL_TIMEOUT;
mbed_official	205:c41fc65bcfb4	732	}
mbed_official	205:c41fc65bcfb4	733	}
mbed_official	205:c41fc65bcfb4	734	}
mbed_official	205:c41fc65bcfb4	735	}
mbed_official	205:c41fc65bcfb4	736	}
mbed_official	205:c41fc65bcfb4	737	/* Decreasing the CPU frequency */
mbed_official	205:c41fc65bcfb4	738	else
mbed_official	205:c41fc65bcfb4	739	{
mbed_official	205:c41fc65bcfb4	740	/-------------------------- HCLK Configuration --------------------------/
mbed_official	205:c41fc65bcfb4	741	if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
mbed_official	205:c41fc65bcfb4	742	{
mbed_official	205:c41fc65bcfb4	743	assert_param(IS_RCC_SYSCLK_DIV(RCC_ClkInitStruct->AHBCLKDivider));
mbed_official	205:c41fc65bcfb4	744	MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
mbed_official	205:c41fc65bcfb4	745	}
mbed_official	205:c41fc65bcfb4	746
mbed_official	205:c41fc65bcfb4	747	/------------------------- SYSCLK Configuration ---------------------------/
mbed_official	205:c41fc65bcfb4	748	if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
mbed_official	205:c41fc65bcfb4	749	{
mbed_official	205:c41fc65bcfb4	750	assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
mbed_official	205:c41fc65bcfb4	751
mbed_official	205:c41fc65bcfb4	752	/* HSE is selected as System Clock Source */
mbed_official	205:c41fc65bcfb4	753	if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
mbed_official	205:c41fc65bcfb4	754	{
mbed_official	205:c41fc65bcfb4	755	/* Check the HSE ready flag */
mbed_official	205:c41fc65bcfb4	756	if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
mbed_official	205:c41fc65bcfb4	757	{
mbed_official	205:c41fc65bcfb4	758	return HAL_ERROR;
mbed_official	205:c41fc65bcfb4	759	}
mbed_official	205:c41fc65bcfb4	760	}
mbed_official	205:c41fc65bcfb4	761	/* PLL is selected as System Clock Source */
mbed_official	205:c41fc65bcfb4	762	else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
mbed_official	205:c41fc65bcfb4	763	{
mbed_official	205:c41fc65bcfb4	764	/* Check the PLL ready flag */
mbed_official	205:c41fc65bcfb4	765	if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
mbed_official	205:c41fc65bcfb4	766	{
mbed_official	205:c41fc65bcfb4	767	return HAL_ERROR;
mbed_official	205:c41fc65bcfb4	768	}
mbed_official	205:c41fc65bcfb4	769	}
mbed_official	205:c41fc65bcfb4	770	#if defined(STM32F042x6) \|\| defined(STM32F048xx) \|\| defined(STM32F072xB) \|\| defined(STM32F078xx)
mbed_official	205:c41fc65bcfb4	771	/* HSI48 is selected as System Clock Source */
mbed_official	205:c41fc65bcfb4	772	else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI48)
mbed_official	205:c41fc65bcfb4	773	{
mbed_official	205:c41fc65bcfb4	774	/* Check the HSI48 ready flag */
mbed_official	205:c41fc65bcfb4	775	if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == RESET)
mbed_official	205:c41fc65bcfb4	776	{
mbed_official	205:c41fc65bcfb4	777	return HAL_ERROR;
mbed_official	205:c41fc65bcfb4	778	}
mbed_official	205:c41fc65bcfb4	779	}
mbed_official	205:c41fc65bcfb4	780	#endif /* STM32F042x6 \|\| STM32F072xB \|\| STM32F078xx */
mbed_official	205:c41fc65bcfb4	781	/* HSI is selected as System Clock Source */
mbed_official	205:c41fc65bcfb4	782	else
mbed_official	205:c41fc65bcfb4	783	{
mbed_official	205:c41fc65bcfb4	784	/* Check the HSI ready flag */
mbed_official	205:c41fc65bcfb4	785	if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
mbed_official	205:c41fc65bcfb4	786	{
mbed_official	205:c41fc65bcfb4	787	return HAL_ERROR;
mbed_official	205:c41fc65bcfb4	788	}
mbed_official	205:c41fc65bcfb4	789	}
mbed_official	205:c41fc65bcfb4	790	MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_ClkInitStruct->SYSCLKSource);
mbed_official	205:c41fc65bcfb4	791
mbed_official	205:c41fc65bcfb4	792	/* Get timeout */
mbed_official	205:c41fc65bcfb4	793	tickstart = HAL_GetTick();
mbed_official	205:c41fc65bcfb4	794
mbed_official	205:c41fc65bcfb4	795	if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
mbed_official	205:c41fc65bcfb4	796	{
mbed_official	205:c41fc65bcfb4	797	while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE)
mbed_official	205:c41fc65bcfb4	798	{
mbed_official	205:c41fc65bcfb4	799	if((HAL_GetTick() - tickstart) >= CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official	205:c41fc65bcfb4	800	{
mbed_official	205:c41fc65bcfb4	801	return HAL_TIMEOUT;
mbed_official	205:c41fc65bcfb4	802	}
mbed_official	205:c41fc65bcfb4	803	}
mbed_official	205:c41fc65bcfb4	804	}
mbed_official	205:c41fc65bcfb4	805	else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
mbed_official	205:c41fc65bcfb4	806	{
mbed_official	205:c41fc65bcfb4	807	while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
mbed_official	205:c41fc65bcfb4	808	{
mbed_official	205:c41fc65bcfb4	809	if((HAL_GetTick() - tickstart) >= CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official	205:c41fc65bcfb4	810	{
mbed_official	205:c41fc65bcfb4	811	return HAL_TIMEOUT;
mbed_official	205:c41fc65bcfb4	812	}
mbed_official	205:c41fc65bcfb4	813	}
mbed_official	205:c41fc65bcfb4	814	}
mbed_official	205:c41fc65bcfb4	815	#if defined(STM32F042x6) \|\| defined(STM32F048xx) \|\| defined(STM32F072xB) \|\| defined(STM32F078xx)
mbed_official	205:c41fc65bcfb4	816	else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI48)
mbed_official	205:c41fc65bcfb4	817	{
mbed_official	205:c41fc65bcfb4	818	while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI48)
mbed_official	205:c41fc65bcfb4	819	{
mbed_official	205:c41fc65bcfb4	820	if((HAL_GetTick() - tickstart) >= CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official	205:c41fc65bcfb4	821	{
mbed_official	205:c41fc65bcfb4	822	return HAL_TIMEOUT;
mbed_official	205:c41fc65bcfb4	823	}
mbed_official	205:c41fc65bcfb4	824	}
mbed_official	205:c41fc65bcfb4	825	}
mbed_official	205:c41fc65bcfb4	826	#endif /* STM32F042x6 \|\| STM32F072xB \|\| STM32F078xx */
mbed_official	205:c41fc65bcfb4	827	else
mbed_official	205:c41fc65bcfb4	828	{
mbed_official	205:c41fc65bcfb4	829	while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI)
mbed_official	205:c41fc65bcfb4	830	{
mbed_official	205:c41fc65bcfb4	831	if((HAL_GetTick() - tickstart) >= CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official	205:c41fc65bcfb4	832	{
mbed_official	205:c41fc65bcfb4	833	return HAL_TIMEOUT;
mbed_official	205:c41fc65bcfb4	834	}
mbed_official	205:c41fc65bcfb4	835	}
mbed_official	205:c41fc65bcfb4	836	}
mbed_official	205:c41fc65bcfb4	837	}
mbed_official	205:c41fc65bcfb4	838
mbed_official	205:c41fc65bcfb4	839	/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
mbed_official	205:c41fc65bcfb4	840	__HAL_FLASH_SET_LATENCY(FLatency);
mbed_official	205:c41fc65bcfb4	841
mbed_official	205:c41fc65bcfb4	842	/* Check that the new number of wait states is taken into account to access the Flash
mbed_official	205:c41fc65bcfb4	843	memory by reading the FLASH_ACR register */
mbed_official	205:c41fc65bcfb4	844	if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
mbed_official	205:c41fc65bcfb4	845	{
mbed_official	205:c41fc65bcfb4	846	return HAL_ERROR;
mbed_official	205:c41fc65bcfb4	847	}
mbed_official	205:c41fc65bcfb4	848	}
mbed_official	205:c41fc65bcfb4	849
mbed_official	205:c41fc65bcfb4	850	/-------------------------- PCLK1 Configuration ---------------------------/
mbed_official	205:c41fc65bcfb4	851	if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
mbed_official	205:c41fc65bcfb4	852	{
mbed_official	205:c41fc65bcfb4	853	assert_param(IS_RCC_HCLK_DIV(RCC_ClkInitStruct->APB1CLKDivider));
mbed_official	205:c41fc65bcfb4	854	MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_ClkInitStruct->APB1CLKDivider);
mbed_official	205:c41fc65bcfb4	855	}
mbed_official	205:c41fc65bcfb4	856
mbed_official	205:c41fc65bcfb4	857	/* Configure the source of time base considering new system clocks settings*/
mbed_official	205:c41fc65bcfb4	858	HAL_InitTick (TICK_INT_PRIORITY);
mbed_official	205:c41fc65bcfb4	859
mbed_official	205:c41fc65bcfb4	860	return HAL_OK;
mbed_official	205:c41fc65bcfb4	861	}
mbed_official	205:c41fc65bcfb4	862
mbed_official	205:c41fc65bcfb4	863	/**
mbed_official	205:c41fc65bcfb4	864	* @brief Returns the SYSCLK frequency
mbed_official	205:c41fc65bcfb4	865	* @note The system frequency computed by this function is not the real
mbed_official	205:c41fc65bcfb4	866	* frequency in the chip. It is calculated based on the predefined
mbed_official	205:c41fc65bcfb4	867	* constant and the selected clock source:
mbed_official	205:c41fc65bcfb4	868	* @note If SYSCLK source is HSI, function returns a value based on HSI_VALUE(*)
mbed_official	205:c41fc65bcfb4	869	* @note If SYSCLK source is HSI48, function returns a value based on HSI48_VALUE(*)
mbed_official	205:c41fc65bcfb4	870	* @note If SYSCLK source is HSE, function returns a value based on HSE_VALUE
mbed_official	205:c41fc65bcfb4	871	* divided by PREDIV factor(**)
mbed_official	205:c41fc65bcfb4	872	* @note If SYSCLK source is PLL, function returns a value based on HSE_VALUE
mbed_official	205:c41fc65bcfb4	873	* divided by PREDIV factor(**) or depending on STM32F0xx devices either a value based
mbed_official	205:c41fc65bcfb4	874	* on HSI_VALUE divided by 2 or HSI_VALUE divided by PREDIV factor(*) multiplied by the
mbed_official	205:c41fc65bcfb4	875	* PLL factor .
mbed_official	205:c41fc65bcfb4	876	* @note (*) HSI_VALUE & HSI48_VALUE are constants defined in stm32f0xx_hal_conf.h file
mbed_official	205:c41fc65bcfb4	877	* (default values 8 MHz and 48MHz).
mbed_official	205:c41fc65bcfb4	878	* @note (**) HSE_VALUE is a constant defined in stm32f0xx_hal_conf.h file (default value
mbed_official	205:c41fc65bcfb4	879	* 8 MHz), user has to ensure that HSE_VALUE is same as the real
mbed_official	205:c41fc65bcfb4	880	* frequency of the crystal used. Otherwise, this function may
mbed_official	205:c41fc65bcfb4	881	* have wrong result.
mbed_official	205:c41fc65bcfb4	882	*
mbed_official	205:c41fc65bcfb4	883	* @note The result of this function could be not correct when using fractional
mbed_official	205:c41fc65bcfb4	884	* value for HSE crystal.
mbed_official	205:c41fc65bcfb4	885	*
mbed_official	205:c41fc65bcfb4	886	* @note This function can be used by the user application to compute the
mbed_official	205:c41fc65bcfb4	887	* baudrate for the communication peripherals or configure other parameters.
mbed_official	205:c41fc65bcfb4	888	*
mbed_official	205:c41fc65bcfb4	889	* @note Each time SYSCLK changes, this function must be called to update the
mbed_official	205:c41fc65bcfb4	890	* right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
mbed_official	205:c41fc65bcfb4	891	*
mbed_official	205:c41fc65bcfb4	892	* @param None
mbed_official	205:c41fc65bcfb4	893	* @retval SYSCLK frequency
mbed_official	205:c41fc65bcfb4	894	*/
mbed_official	205:c41fc65bcfb4	895	uint32_t HAL_RCC_GetSysClockFreq(void)
mbed_official	205:c41fc65bcfb4	896	{
mbed_official	205:c41fc65bcfb4	897	uint32_t tmpreg = 0, prediv = 0, pllmul = 0, pllclk = 0;
mbed_official	205:c41fc65bcfb4	898	uint32_t sysclockfreq = 0;
mbed_official	205:c41fc65bcfb4	899
mbed_official	205:c41fc65bcfb4	900	tmpreg = RCC->CFGR;
mbed_official	205:c41fc65bcfb4	901
mbed_official	205:c41fc65bcfb4	902	/* Get SYSCLK source -------------------------------------------------------*/
mbed_official	205:c41fc65bcfb4	903	switch (tmpreg & RCC_CFGR_SWS)
mbed_official	205:c41fc65bcfb4	904	{
mbed_official	205:c41fc65bcfb4	905	case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock source */
mbed_official	205:c41fc65bcfb4	906	sysclockfreq = HSE_VALUE;
mbed_official	205:c41fc65bcfb4	907	break;
mbed_official	205:c41fc65bcfb4	908
mbed_official	205:c41fc65bcfb4	909	case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock source */
mbed_official	205:c41fc65bcfb4	910	pllmul = PLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_BITNUMBER];
mbed_official	205:c41fc65bcfb4	911	prediv = PredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_BITNUMBER];
mbed_official	205:c41fc65bcfb4	912	if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
mbed_official	205:c41fc65bcfb4	913	{
mbed_official	205:c41fc65bcfb4	914	/* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */
mbed_official	205:c41fc65bcfb4	915	pllclk = (HSE_VALUE/prediv) * pllmul;
mbed_official	205:c41fc65bcfb4	916	}
mbed_official	205:c41fc65bcfb4	917	#if defined(STM32F042x6) \|\| defined(STM32F048xx) \|\| defined(STM32F072xB) \|\| defined(STM32F078xx)
mbed_official	205:c41fc65bcfb4	918	else if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSI48)
mbed_official	205:c41fc65bcfb4	919	{
mbed_official	205:c41fc65bcfb4	920	/* HSI48 used as PLL clock source : PLLCLK = HSI48/PREDIV * PLLMUL */
mbed_official	205:c41fc65bcfb4	921	pllclk = (HSI48_VALUE/prediv) * pllmul;
mbed_official	205:c41fc65bcfb4	922	}
mbed_official	205:c41fc65bcfb4	923	#endif /* STM32F042x6 \|\| STM32F048xx \|\| STM32F072xB \|\| STM32F078xx */
mbed_official	205:c41fc65bcfb4	924	else
mbed_official	205:c41fc65bcfb4	925	{
mbed_official	205:c41fc65bcfb4	926	#if defined(STM32F042x6) \|\| defined(STM32F048xx) \|\| \
mbed_official	205:c41fc65bcfb4	927	defined(STM32F071xB) \|\| defined(STM32F072xB) \|\| defined(STM32F078xx)
mbed_official	205:c41fc65bcfb4	928	/* HSI used as PLL clock source : PLLCLK = HSI/PREDIV * PLLMUL */
mbed_official	205:c41fc65bcfb4	929	pllclk = (HSI_VALUE/prediv) * pllmul;
mbed_official	205:c41fc65bcfb4	930	#else
mbed_official	205:c41fc65bcfb4	931	/* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
mbed_official	205:c41fc65bcfb4	932	pllclk = (HSI_VALUE >> 1) * pllmul;
mbed_official	205:c41fc65bcfb4	933	#endif /* STM32F042x6 \|\| STM32F048xx \|\| STM32F071xB \|\| STM32F072xB \|\| STM32F078xx */
mbed_official	205:c41fc65bcfb4	934	}
mbed_official	205:c41fc65bcfb4	935	sysclockfreq = pllclk;
mbed_official	205:c41fc65bcfb4	936	break;
mbed_official	205:c41fc65bcfb4	937
mbed_official	205:c41fc65bcfb4	938	#if defined(STM32F042x6) \|\| defined(STM32F048xx) \|\| defined(STM32F072xB) \|\| defined(STM32F078xx)
mbed_official	205:c41fc65bcfb4	939	case RCC_SYSCLKSOURCE_STATUS_HSI48: /* HSI48 used as system clock source */
mbed_official	205:c41fc65bcfb4	940	sysclockfreq = HSI48_VALUE;
mbed_official	205:c41fc65bcfb4	941	break;
mbed_official	205:c41fc65bcfb4	942	#endif /* STM32F042x6 \|\| STM32F072xB \|\| STM32F078xx */
mbed_official	205:c41fc65bcfb4	943
mbed_official	205:c41fc65bcfb4	944	case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
mbed_official	205:c41fc65bcfb4	945	default:
mbed_official	205:c41fc65bcfb4	946	sysclockfreq = HSI_VALUE;
mbed_official	205:c41fc65bcfb4	947	break;
mbed_official	205:c41fc65bcfb4	948	}
mbed_official	205:c41fc65bcfb4	949	return sysclockfreq;
mbed_official	205:c41fc65bcfb4	950	}
mbed_official	205:c41fc65bcfb4	951
mbed_official	205:c41fc65bcfb4	952	/**
mbed_official	205:c41fc65bcfb4	953	* @brief Initializes the RCC extended peripherals clocks according to the specified
mbed_official	205:c41fc65bcfb4	954	* parameters in the RCC_PeriphCLKInitTypeDef.
mbed_official	205:c41fc65bcfb4	955	* @param PeriphClkInit: pointer to an RCC_PeriphCLKInitTypeDef structure that
mbed_official	205:c41fc65bcfb4	956	* contains the configuration information for the Extended Peripherals clocks
mbed_official	205:c41fc65bcfb4	957	* (USART, RTC, I2C, CEC and USB).
mbed_official	205:c41fc65bcfb4	958	*
mbed_official	205:c41fc65bcfb4	959	* @note Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to select
mbed_official	205:c41fc65bcfb4	960	* the RTC clock source; in this case the Backup domain will be reset in
mbed_official	205:c41fc65bcfb4	961	* order to modify the RTC Clock source, as consequence RTC registers (including
mbed_official	205:c41fc65bcfb4	962	* the backup registers) and RCC_BDCR register are set to their reset values.
mbed_official	205:c41fc65bcfb4	963	*
mbed_official	205:c41fc65bcfb4	964	* @retval None
mbed_official	205:c41fc65bcfb4	965	*/
mbed_official	205:c41fc65bcfb4	966	HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
mbed_official	205:c41fc65bcfb4	967	{
mbed_official	205:c41fc65bcfb4	968	uint32_t tickstart = 0;
mbed_official	205:c41fc65bcfb4	969	uint32_t tmpreg = 0;
mbed_official	205:c41fc65bcfb4	970
mbed_official	205:c41fc65bcfb4	971	/* Check the parameters */
mbed_official	205:c41fc65bcfb4	972	assert_param(IS_RCC_PERIPHCLK(PeriphClkInit->PeriphClockSelection));
mbed_official	205:c41fc65bcfb4	973
mbed_official	205:c41fc65bcfb4	974	/---------------------------- RTC configuration -------------------------------/
mbed_official	205:c41fc65bcfb4	975	if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC))
mbed_official	205:c41fc65bcfb4	976	{
mbed_official	205:c41fc65bcfb4	977	/* Enable Power Clock*/
mbed_official	205:c41fc65bcfb4	978	__PWR_CLK_ENABLE();
mbed_official	205:c41fc65bcfb4	979
mbed_official	205:c41fc65bcfb4	980	/* Enable write access to Backup domain */
mbed_official	205:c41fc65bcfb4	981	SET_BIT(PWR->CR, PWR_CR_DBP);
mbed_official	205:c41fc65bcfb4	982
mbed_official	205:c41fc65bcfb4	983	/* Wait for Backup domain Write protection disable */
mbed_official	205:c41fc65bcfb4	984	tickstart = HAL_GetTick();
mbed_official	205:c41fc65bcfb4	985
mbed_official	205:c41fc65bcfb4	986	while((PWR->CR & PWR_CR_DBP) == RESET)
mbed_official	205:c41fc65bcfb4	987	{
mbed_official	205:c41fc65bcfb4	988	if((HAL_GetTick() - tickstart) >= DBP_TIMEOUT_VALUE)
mbed_official	205:c41fc65bcfb4	989	{
mbed_official	205:c41fc65bcfb4	990	return HAL_TIMEOUT;
mbed_official	205:c41fc65bcfb4	991	}
mbed_official	205:c41fc65bcfb4	992	}
mbed_official	205:c41fc65bcfb4	993
mbed_official	205:c41fc65bcfb4	994	/* Reset the Backup domain only if the RTC Clock source selction is modified */
mbed_official	205:c41fc65bcfb4	995	if((RCC->BDCR & RCC_BDCR_RTCSEL) != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))
mbed_official	205:c41fc65bcfb4	996	{
mbed_official	205:c41fc65bcfb4	997	/* Store the content of BDCR register before the reset of Backup Domain */
mbed_official	205:c41fc65bcfb4	998	tmpreg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
mbed_official	205:c41fc65bcfb4	999	/* RTC Clock selection can be changed only if the Backup Domain is reset */
mbed_official	205:c41fc65bcfb4	1000	__HAL_RCC_BACKUPRESET_FORCE();
mbed_official	205:c41fc65bcfb4	1001	__HAL_RCC_BACKUPRESET_RELEASE();
mbed_official	205:c41fc65bcfb4	1002	/* Restore the Content of BDCR register */
mbed_official	205:c41fc65bcfb4	1003	RCC->BDCR = tmpreg;
mbed_official	205:c41fc65bcfb4	1004	}
mbed_official	205:c41fc65bcfb4	1005
mbed_official	205:c41fc65bcfb4	1006	/* If LSE is selected as RTC clock source, wait for LSE reactivation */
mbed_official	205:c41fc65bcfb4	1007	if(PeriphClkInit->RTCClockSelection == RCC_RTCCLKSOURCE_LSE)
mbed_official	205:c41fc65bcfb4	1008	{
mbed_official	205:c41fc65bcfb4	1009	/* Get timeout */
mbed_official	205:c41fc65bcfb4	1010	tickstart = HAL_GetTick() ;
mbed_official	205:c41fc65bcfb4	1011
mbed_official	205:c41fc65bcfb4	1012	/* Wait till LSE is ready */
mbed_official	205:c41fc65bcfb4	1013	while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
mbed_official	205:c41fc65bcfb4	1014	{
mbed_official	205:c41fc65bcfb4	1015	if((HAL_GetTick() - tickstart) >= LSE_TIMEOUT_VALUE)
mbed_official	205:c41fc65bcfb4	1016	{
mbed_official	205:c41fc65bcfb4	1017	return HAL_TIMEOUT;
mbed_official	205:c41fc65bcfb4	1018	}
mbed_official	205:c41fc65bcfb4	1019	}
mbed_official	205:c41fc65bcfb4	1020	}
mbed_official	205:c41fc65bcfb4	1021	__HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
mbed_official	205:c41fc65bcfb4	1022	}
mbed_official	205:c41fc65bcfb4	1023
mbed_official	205:c41fc65bcfb4	1024	/------------------------------- USART1 Configuration ------------------------/
mbed_official	205:c41fc65bcfb4	1025	if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1)
mbed_official	205:c41fc65bcfb4	1026	{
mbed_official	205:c41fc65bcfb4	1027	/* Check the parameters */
mbed_official	205:c41fc65bcfb4	1028	assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection));
mbed_official	205:c41fc65bcfb4	1029
mbed_official	205:c41fc65bcfb4	1030	/* Configure the USART1 clock source */
mbed_official	205:c41fc65bcfb4	1031	__HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection);
mbed_official	205:c41fc65bcfb4	1032	}
mbed_official	205:c41fc65bcfb4	1033
mbed_official	205:c41fc65bcfb4	1034	#if defined(STM32F071xB) \|\| defined(STM32F072xB) \|\| defined(STM32F078xx)
mbed_official	205:c41fc65bcfb4	1035	/----------------------------- USART2 Configuration --------------------------/
mbed_official	205:c41fc65bcfb4	1036	if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2)
mbed_official	205:c41fc65bcfb4	1037	{
mbed_official	205:c41fc65bcfb4	1038	/* Check the parameters */
mbed_official	205:c41fc65bcfb4	1039	assert_param(IS_RCC_USART2CLKSOURCE(PeriphClkInit->Usart2ClockSelection));
mbed_official	205:c41fc65bcfb4	1040
mbed_official	205:c41fc65bcfb4	1041	/* Configure the USART2 clock source */
mbed_official	205:c41fc65bcfb4	1042	__HAL_RCC_USART2_CONFIG(PeriphClkInit->Usart2ClockSelection);
mbed_official	205:c41fc65bcfb4	1043	}
mbed_official	205:c41fc65bcfb4	1044	#endif /* STM32F071xB \|\| STM32F072xB \|\| STM32F078xx */
mbed_official	205:c41fc65bcfb4	1045
mbed_official	205:c41fc65bcfb4	1046	/------------------------------ I2C1 Configuration ------------------------/
mbed_official	205:c41fc65bcfb4	1047	if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1)
mbed_official	205:c41fc65bcfb4	1048	{
mbed_official	205:c41fc65bcfb4	1049	/* Check the parameters */
mbed_official	205:c41fc65bcfb4	1050	assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection));
mbed_official	205:c41fc65bcfb4	1051
mbed_official	205:c41fc65bcfb4	1052	/* Configure the I2C1 clock source */
mbed_official	205:c41fc65bcfb4	1053	__HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection);
mbed_official	205:c41fc65bcfb4	1054	}
mbed_official	205:c41fc65bcfb4	1055
mbed_official	205:c41fc65bcfb4	1056	#if defined(STM32F042x6) \|\| defined(STM32F048xx) \|\| defined(STM32F072xB)
mbed_official	205:c41fc65bcfb4	1057	/------------------------------ USB Configuration ------------------------/
mbed_official	205:c41fc65bcfb4	1058	if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB)
mbed_official	205:c41fc65bcfb4	1059	{
mbed_official	205:c41fc65bcfb4	1060	/* Check the parameters */
mbed_official	205:c41fc65bcfb4	1061	assert_param(IS_RCC_USBCLKSOURCE(PeriphClkInit->UsbClockSelection));
mbed_official	205:c41fc65bcfb4	1062
mbed_official	205:c41fc65bcfb4	1063	/* Configure the USB clock source */
mbed_official	205:c41fc65bcfb4	1064	__HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
mbed_official	205:c41fc65bcfb4	1065	}
mbed_official	205:c41fc65bcfb4	1066	#endif /* STM32F042x6 \|\| STM32F072xB */
mbed_official	205:c41fc65bcfb4	1067
mbed_official	205:c41fc65bcfb4	1068	#if defined(STM32F042x6) \|\| defined(STM32F048xx) \|\| \
mbed_official	205:c41fc65bcfb4	1069	defined(STM32F051x8) \|\| defined(STM32F058xx) \|\| \
mbed_official	205:c41fc65bcfb4	1070	defined(STM32F071xB) \|\| defined(STM32F072xB) \|\| defined(STM32F078xx)
mbed_official	205:c41fc65bcfb4	1071	/------------------------------ CEC clock Configuration -------------------/
mbed_official	205:c41fc65bcfb4	1072	if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CEC) == RCC_PERIPHCLK_CEC)
mbed_official	205:c41fc65bcfb4	1073	{
mbed_official	205:c41fc65bcfb4	1074	/* Check the parameters */
mbed_official	205:c41fc65bcfb4	1075	assert_param(IS_RCC_CECCLKSOURCE(PeriphClkInit->CecClockSelection));
mbed_official	205:c41fc65bcfb4	1076
mbed_official	205:c41fc65bcfb4	1077	/* Configure the CEC clock source */
mbed_official	205:c41fc65bcfb4	1078	__HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection);
mbed_official	205:c41fc65bcfb4	1079	}
mbed_official	205:c41fc65bcfb4	1080	#endif /* STM32F042x6 \|\| */
mbed_official	205:c41fc65bcfb4	1081	/* STM32F051x8 \|\| STM32F058xx \|\| */
mbed_official	205:c41fc65bcfb4	1082	/* STM32F071xB \|\| STM32F072xB \|\| STM32F078xx */
mbed_official	205:c41fc65bcfb4	1083
mbed_official	205:c41fc65bcfb4	1084	return HAL_OK;
mbed_official	205:c41fc65bcfb4	1085	}
mbed_official	205:c41fc65bcfb4	1086
mbed_official	205:c41fc65bcfb4	1087	/**
mbed_official	205:c41fc65bcfb4	1088	* @brief Get the RCC_ClkInitStruct according to the internal
mbed_official	205:c41fc65bcfb4	1089	* RCC configuration registers.
mbed_official	205:c41fc65bcfb4	1090	* @param PeriphClkInit: pointer to an RCC_PeriphCLKInitTypeDef structure that
mbed_official	205:c41fc65bcfb4	1091	* returns the configuration information for the Extended Peripherals clocks
mbed_official	205:c41fc65bcfb4	1092	* (USART, RTC, I2C, CEC and USB).
mbed_official	205:c41fc65bcfb4	1093	* @retval None
mbed_official	205:c41fc65bcfb4	1094	*/
mbed_official	205:c41fc65bcfb4	1095	void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
mbed_official	205:c41fc65bcfb4	1096	{
mbed_official	205:c41fc65bcfb4	1097	/* Set all possible values for the extended clock type parameter------------*/
mbed_official	205:c41fc65bcfb4	1098	/* Common part first */
mbed_official	205:c41fc65bcfb4	1099	PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 \| RCC_PERIPHCLK_I2C1 \| RCC_PERIPHCLK_RTC;
mbed_official	205:c41fc65bcfb4	1100	/* Get the RTC configuration --------------------------------------------*/
mbed_official	205:c41fc65bcfb4	1101	PeriphClkInit->RTCClockSelection = __HAL_RCC_GET_RTC_SOURCE();
mbed_official	205:c41fc65bcfb4	1102	/* Get the USART1 configuration --------------------------------------------*/
mbed_official	205:c41fc65bcfb4	1103	PeriphClkInit->Usart1ClockSelection = __HAL_RCC_GET_USART1_SOURCE();
mbed_official	205:c41fc65bcfb4	1104	/* Get the I2C1 clock source -----------------------------------------------*/
mbed_official	205:c41fc65bcfb4	1105	PeriphClkInit->I2c1ClockSelection = __HAL_RCC_GET_I2C1_SOURCE();
mbed_official	205:c41fc65bcfb4	1106
mbed_official	205:c41fc65bcfb4	1107	#if defined(STM32F071xB) \|\| defined(STM32F072xB) \|\| defined(STM32F078xx)
mbed_official	205:c41fc65bcfb4	1108	PeriphClkInit->PeriphClockSelection \|= RCC_PERIPHCLK_USART2;
mbed_official	205:c41fc65bcfb4	1109	/* Get the USART2 clock source ---------------------------------------------*/
mbed_official	205:c41fc65bcfb4	1110	PeriphClkInit->Usart2ClockSelection = __HAL_RCC_GET_USART2_SOURCE();
mbed_official	205:c41fc65bcfb4	1111	#endif /* STM32F071xB \|\| STM32F072xB \|\| STM32F078xx */
mbed_official	205:c41fc65bcfb4	1112
mbed_official	205:c41fc65bcfb4	1113	#if defined(STM32F042x6) \|\| defined(STM32F048xx) \|\| defined(STM32F072xB)
mbed_official	205:c41fc65bcfb4	1114	PeriphClkInit->PeriphClockSelection \|= RCC_PERIPHCLK_USB;
mbed_official	205:c41fc65bcfb4	1115	/* Get the USB clock source ---------------------------------------------*/
mbed_official	205:c41fc65bcfb4	1116	PeriphClkInit->UsbClockSelection = __HAL_RCC_GET_USB_SOURCE();
mbed_official	205:c41fc65bcfb4	1117	#endif /* STM32F042x6 \|\| STM32F072xB */
mbed_official	205:c41fc65bcfb4	1118
mbed_official	205:c41fc65bcfb4	1119	#if defined(STM32F042x6) \|\| defined(STM32F048xx) \|\| \
mbed_official	205:c41fc65bcfb4	1120	defined(STM32F051x8) \|\| defined(STM32F058xx) \|\| \
mbed_official	205:c41fc65bcfb4	1121	defined(STM32F071xB) \|\| defined(STM32F072xB) \|\| defined(STM32F078xx)
mbed_official	205:c41fc65bcfb4	1122	PeriphClkInit->PeriphClockSelection \|= RCC_PERIPHCLK_CEC;
mbed_official	205:c41fc65bcfb4	1123	/* Get the CEC clock source ------------------------------------------------*/
mbed_official	205:c41fc65bcfb4	1124	PeriphClkInit->CecClockSelection = __HAL_RCC_GET_CEC_SOURCE();
mbed_official	205:c41fc65bcfb4	1125	#endif /* STM32F042x6 \|\| */
mbed_official	205:c41fc65bcfb4	1126	/* STM32F051x8 \|\| STM32F058xx \|\| */
mbed_official	205:c41fc65bcfb4	1127	/* STM32F071xB \|\| STM32F072xB \|\| STM32F078xx */
mbed_official	205:c41fc65bcfb4	1128
mbed_official	205:c41fc65bcfb4	1129	}
mbed_official	205:c41fc65bcfb4	1130
mbed_official	205:c41fc65bcfb4	1131	#if defined(STM32F042x6) \|\| defined(STM32F048xx) \|\| \
mbed_official	205:c41fc65bcfb4	1132	defined(STM32F071xB) \|\| defined(STM32F072xB) \|\| defined(STM32F078xx)
mbed_official	205:c41fc65bcfb4	1133	/**
mbed_official	205:c41fc65bcfb4	1134	* @brief Start automatic synchronization using polling mode
mbed_official	205:c41fc65bcfb4	1135	* @param pInit Pointer on RCC_CRSInitTypeDef structure
mbed_official	205:c41fc65bcfb4	1136	* @retval None
mbed_official	205:c41fc65bcfb4	1137	*/
mbed_official	205:c41fc65bcfb4	1138	void HAL_RCCEx_CRSConfig(RCC_CRSInitTypeDef *pInit)
mbed_official	205:c41fc65bcfb4	1139	{
mbed_official	205:c41fc65bcfb4	1140	/* Check the parameters */
mbed_official	205:c41fc65bcfb4	1141	assert_param(IS_RCC_CRS_SYNC_DIV(pInit->Prescaler));
mbed_official	205:c41fc65bcfb4	1142	assert_param(IS_RCC_CRS_SYNC_SOURCE(pInit->Source));
mbed_official	205:c41fc65bcfb4	1143	assert_param(IS_RCC_CRS_SYNC_POLARITY(pInit->Polarity));
mbed_official	205:c41fc65bcfb4	1144	assert_param(IS_RCC_CRS_RELOADVALUE(pInit->ReloadValue));
mbed_official	205:c41fc65bcfb4	1145	assert_param(IS_RCC_CRS_ERRORLIMIT(pInit->ErrorLimitValue));
mbed_official	205:c41fc65bcfb4	1146	assert_param(IS_RCC_CRS_HSI48CALIBRATION(pInit->HSI48CalibrationValue));
mbed_official	205:c41fc65bcfb4	1147
mbed_official	205:c41fc65bcfb4	1148
mbed_official	205:c41fc65bcfb4	1149	/* CONFIGURATION */
mbed_official	205:c41fc65bcfb4	1150
mbed_official	205:c41fc65bcfb4	1151	/* Before configuration, reset CRS registers to their default values*/
mbed_official	205:c41fc65bcfb4	1152	__CRS_FORCE_RESET();
mbed_official	205:c41fc65bcfb4	1153	__CRS_RELEASE_RESET();
mbed_official	205:c41fc65bcfb4	1154
mbed_official	205:c41fc65bcfb4	1155	/* Configure Synchronization input */
mbed_official	205:c41fc65bcfb4	1156	/* Clear SYNCDIV[2:0], SYNCSRC[1:0] & SYNCSPOL bits */
mbed_official	205:c41fc65bcfb4	1157	CRS->CFGR &= ~(CRS_CFGR_SYNCDIV \| CRS_CFGR_SYNCSRC \| CRS_CFGR_SYNCPOL);
mbed_official	205:c41fc65bcfb4	1158
mbed_official	205:c41fc65bcfb4	1159	/* Set the CRS_CFGR_SYNCDIV[2:0] bits according to Prescaler value */
mbed_official	205:c41fc65bcfb4	1160	CRS->CFGR \|= pInit->Prescaler;
mbed_official	205:c41fc65bcfb4	1161
mbed_official	205:c41fc65bcfb4	1162	/* Set the SYNCSRC[1:0] bits according to Source value */
mbed_official	205:c41fc65bcfb4	1163	CRS->CFGR \|= pInit->Source;
mbed_official	205:c41fc65bcfb4	1164
mbed_official	205:c41fc65bcfb4	1165	/* Set the SYNCSPOL bits according to Polarity value */
mbed_official	205:c41fc65bcfb4	1166	CRS->CFGR \|= pInit->Polarity;
mbed_official	205:c41fc65bcfb4	1167
mbed_official	205:c41fc65bcfb4	1168	/* Configure Frequency Error Measurement */
mbed_official	205:c41fc65bcfb4	1169	/* Clear RELOAD[15:0] & FELIM[7:0] bits*/
mbed_official	205:c41fc65bcfb4	1170	CRS->CFGR &= ~(CRS_CFGR_RELOAD \| CRS_CFGR_FELIM);
mbed_official	205:c41fc65bcfb4	1171
mbed_official	205:c41fc65bcfb4	1172	/* Set the RELOAD[15:0] bits according to ReloadValue value */
mbed_official	205:c41fc65bcfb4	1173	CRS->CFGR \|= pInit->ReloadValue;
mbed_official	205:c41fc65bcfb4	1174
mbed_official	205:c41fc65bcfb4	1175	/* Set the FELIM[7:0] bits according to ErrorLimitValue value */
mbed_official	205:c41fc65bcfb4	1176	CRS->CFGR \|= (pInit->ErrorLimitValue << CRS_CFGR_FELIM_BITNUMBER);
mbed_official	205:c41fc65bcfb4	1177
mbed_official	205:c41fc65bcfb4	1178	/* Adjust HSI48 oscillator smooth trimming */
mbed_official	205:c41fc65bcfb4	1179	/* Clear TRIM[5:0] bits */
mbed_official	205:c41fc65bcfb4	1180	CRS->CR &= ~CRS_CR_TRIM;
mbed_official	205:c41fc65bcfb4	1181
mbed_official	205:c41fc65bcfb4	1182	/* Set the TRIM[5:0] bits according to RCC_CRS_HSI48CalibrationValue value */
mbed_official	205:c41fc65bcfb4	1183	CRS->CR \|= (pInit->HSI48CalibrationValue << CRS_CR_TRIM_BITNUMBER);
mbed_official	205:c41fc65bcfb4	1184
mbed_official	205:c41fc65bcfb4	1185
mbed_official	205:c41fc65bcfb4	1186	/* START AUTOMATIC SYNCHRONIZATION*/
mbed_official	205:c41fc65bcfb4	1187
mbed_official	205:c41fc65bcfb4	1188	/* Enable Automatic trimming */
mbed_official	205:c41fc65bcfb4	1189	__HAL_RCC_CRS_ENABLE_AUTOMATIC_CALIB();
mbed_official	205:c41fc65bcfb4	1190
mbed_official	205:c41fc65bcfb4	1191	/* Enable Frequency error counter */
mbed_official	205:c41fc65bcfb4	1192	__HAL_RCC_CRS_ENABLE_FREQ_ERROR_COUNTER();
mbed_official	205:c41fc65bcfb4	1193
mbed_official	205:c41fc65bcfb4	1194	}
mbed_official	205:c41fc65bcfb4	1195
mbed_official	205:c41fc65bcfb4	1196	/**
mbed_official	205:c41fc65bcfb4	1197	* @brief Generate the software synchronization event
mbed_official	205:c41fc65bcfb4	1198	* @param None
mbed_official	205:c41fc65bcfb4	1199	* @retval None
mbed_official	205:c41fc65bcfb4	1200	*/
mbed_official	205:c41fc65bcfb4	1201	void HAL_RCCEx_CRSSoftwareSynchronizationGenerate(void)
mbed_official	205:c41fc65bcfb4	1202	{
mbed_official	205:c41fc65bcfb4	1203	CRS->CR \|= CRS_CR_SWSYNC;
mbed_official	205:c41fc65bcfb4	1204	}
mbed_official	205:c41fc65bcfb4	1205
mbed_official	205:c41fc65bcfb4	1206
mbed_official	205:c41fc65bcfb4	1207	/**
mbed_official	205:c41fc65bcfb4	1208	* @brief Function to return synchronization info
mbed_official	205:c41fc65bcfb4	1209	* @param pSynchroInfo Pointer on RCC_CRSSynchroInfoTypeDef structure
mbed_official	205:c41fc65bcfb4	1210	* @retval None
mbed_official	205:c41fc65bcfb4	1211	*/
mbed_official	205:c41fc65bcfb4	1212	void HAL_RCCEx_CRSGetSynchronizationInfo(RCC_CRSSynchroInfoTypeDef *pSynchroInfo)
mbed_official	205:c41fc65bcfb4	1213	{
mbed_official	205:c41fc65bcfb4	1214	/* Check the parameter */
mbed_official	205:c41fc65bcfb4	1215	assert_param(pSynchroInfo != NULL);
mbed_official	205:c41fc65bcfb4	1216
mbed_official	205:c41fc65bcfb4	1217	/* Get the reload value */
mbed_official	205:c41fc65bcfb4	1218	pSynchroInfo->ReloadValue = (uint32_t)(CRS->CFGR & CRS_CFGR_RELOAD);
mbed_official	205:c41fc65bcfb4	1219
mbed_official	205:c41fc65bcfb4	1220	/* Get HSI48 oscillator smooth trimming */
mbed_official	205:c41fc65bcfb4	1221	pSynchroInfo->HSI48CalibrationValue = (uint32_t)((CRS->CR & CRS_CR_TRIM) >> CRS_CR_TRIM_BITNUMBER);
mbed_official	205:c41fc65bcfb4	1222
mbed_official	205:c41fc65bcfb4	1223	/* Get Frequency error capture */
mbed_official	205:c41fc65bcfb4	1224	pSynchroInfo->FreqErrorCapture = (uint32_t)((CRS->ISR & CRS_ISR_FECAP) >> CRS_ISR_FECAP_BITNUMBER);
mbed_official	205:c41fc65bcfb4	1225
mbed_official	205:c41fc65bcfb4	1226	/* Get FFrequency error direction */
mbed_official	205:c41fc65bcfb4	1227	pSynchroInfo->FreqErrorDirection = (uint32_t)(CRS->ISR & CRS_ISR_FEDIR);
mbed_official	205:c41fc65bcfb4	1228
mbed_official	205:c41fc65bcfb4	1229
mbed_official	205:c41fc65bcfb4	1230	}
mbed_official	205:c41fc65bcfb4	1231
mbed_official	205:c41fc65bcfb4	1232	/**
mbed_official	205:c41fc65bcfb4	1233	* @brief This function handles CRS Synchronization Timeout.
mbed_official	205:c41fc65bcfb4	1234	* @param Timeout: Duration of the timeout
mbed_official	205:c41fc65bcfb4	1235	* @note Timeout is based on the maximum time to receive a SYNC event based on synchronization
mbed_official	205:c41fc65bcfb4	1236	* frequency.
mbed_official	205:c41fc65bcfb4	1237	* @note If Timeout set to HAL_MAX_DELAY, HAL_TIMEOUT will be never returned.
mbed_official	205:c41fc65bcfb4	1238	* @retval Combination of Synchronization status
mbed_official	205:c41fc65bcfb4	1239	* This parameter can be a combination of the following values:
mbed_official	205:c41fc65bcfb4	1240	* @arg RCC_CRS_TIMEOUT
mbed_official	205:c41fc65bcfb4	1241	* @arg RCC_CRS_SYNCOK
mbed_official	205:c41fc65bcfb4	1242	* @arg RCC_CRS_SYNCWARM
mbed_official	205:c41fc65bcfb4	1243	* @arg RCC_CRS_SYNCERR
mbed_official	205:c41fc65bcfb4	1244	* @arg RCC_CRS_SYNCMISS
mbed_official	205:c41fc65bcfb4	1245	* @arg RCC_CRS_TRIMOV
mbed_official	205:c41fc65bcfb4	1246	*/
mbed_official	205:c41fc65bcfb4	1247	RCC_CRSStatusTypeDef HAL_RCCEx_CRSWaitSynchronization(uint32_t Timeout)
mbed_official	205:c41fc65bcfb4	1248	{
mbed_official	205:c41fc65bcfb4	1249	RCC_CRSStatusTypeDef crsstatus = RCC_CRS_NONE;
mbed_official	205:c41fc65bcfb4	1250	uint32_t tickstart = 0;
mbed_official	205:c41fc65bcfb4	1251
mbed_official	205:c41fc65bcfb4	1252	/* Get timeout */
mbed_official	205:c41fc65bcfb4	1253	tickstart = HAL_GetTick();
mbed_official	205:c41fc65bcfb4	1254
mbed_official	205:c41fc65bcfb4	1255	/* Check that if one of CRS flags have been set */
mbed_official	205:c41fc65bcfb4	1256	while(RCC_CRS_NONE == crsstatus)
mbed_official	205:c41fc65bcfb4	1257	{
mbed_official	205:c41fc65bcfb4	1258	if(Timeout != HAL_MAX_DELAY)
mbed_official	205:c41fc65bcfb4	1259	{
mbed_official	205:c41fc65bcfb4	1260	if((HAL_GetTick() - tickstart ) >= Timeout)
mbed_official	205:c41fc65bcfb4	1261	{
mbed_official	205:c41fc65bcfb4	1262	crsstatus = RCC_CRS_TIMEOUT;
mbed_official	205:c41fc65bcfb4	1263	}
mbed_official	205:c41fc65bcfb4	1264	}
mbed_official	205:c41fc65bcfb4	1265	/* Check CRS SYNCOK flag */
mbed_official	205:c41fc65bcfb4	1266	if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCOK))
mbed_official	205:c41fc65bcfb4	1267	{
mbed_official	205:c41fc65bcfb4	1268	/* CRS SYNC event OK */
mbed_official	205:c41fc65bcfb4	1269	crsstatus \|= RCC_CRS_SYNCOK;
mbed_official	205:c41fc65bcfb4	1270
mbed_official	205:c41fc65bcfb4	1271	/* Clear CRS SYNC event OK bit */
mbed_official	205:c41fc65bcfb4	1272	__HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCOK);
mbed_official	205:c41fc65bcfb4	1273	}
mbed_official	205:c41fc65bcfb4	1274
mbed_official	205:c41fc65bcfb4	1275	/* Check CRS SYNCWARN flag */
mbed_official	205:c41fc65bcfb4	1276	if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCWARN))
mbed_official	205:c41fc65bcfb4	1277	{
mbed_official	205:c41fc65bcfb4	1278	/* CRS SYNC warning */
mbed_official	205:c41fc65bcfb4	1279	crsstatus \|= RCC_CRS_SYNCWARM;
mbed_official	205:c41fc65bcfb4	1280
mbed_official	205:c41fc65bcfb4	1281	/* Clear CRS SYNCWARN bit */
mbed_official	205:c41fc65bcfb4	1282	__HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCWARN);
mbed_official	205:c41fc65bcfb4	1283	}
mbed_official	205:c41fc65bcfb4	1284
mbed_official	205:c41fc65bcfb4	1285	/* Check CRS TRIM overflow flag */
mbed_official	205:c41fc65bcfb4	1286	if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_TRIMOVF))
mbed_official	205:c41fc65bcfb4	1287	{
mbed_official	205:c41fc65bcfb4	1288	/* CRS SYNC Error */
mbed_official	205:c41fc65bcfb4	1289	crsstatus \|= RCC_CRS_TRIMOV;
mbed_official	205:c41fc65bcfb4	1290
mbed_official	205:c41fc65bcfb4	1291	/* Clear CRS Error bit */
mbed_official	205:c41fc65bcfb4	1292	__HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_TRIMOVF);
mbed_official	205:c41fc65bcfb4	1293	}
mbed_official	205:c41fc65bcfb4	1294
mbed_official	205:c41fc65bcfb4	1295	/* Check CRS Error flag */
mbed_official	205:c41fc65bcfb4	1296	if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCERR))
mbed_official	205:c41fc65bcfb4	1297	{
mbed_official	205:c41fc65bcfb4	1298	/* CRS SYNC Error */
mbed_official	205:c41fc65bcfb4	1299	crsstatus \|= RCC_CRS_SYNCERR;
mbed_official	205:c41fc65bcfb4	1300
mbed_official	205:c41fc65bcfb4	1301	/* Clear CRS Error bit */
mbed_official	205:c41fc65bcfb4	1302	__HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCERR);
mbed_official	205:c41fc65bcfb4	1303	}
mbed_official	205:c41fc65bcfb4	1304
mbed_official	205:c41fc65bcfb4	1305	/* Check CRS SYNC Missed flag */
mbed_official	205:c41fc65bcfb4	1306	if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCMISS))
mbed_official	205:c41fc65bcfb4	1307	{
mbed_official	205:c41fc65bcfb4	1308	/* CRS SYNC Missed */
mbed_official	205:c41fc65bcfb4	1309	crsstatus \|= RCC_CRS_SYNCMISS;
mbed_official	205:c41fc65bcfb4	1310
mbed_official	205:c41fc65bcfb4	1311	/* Clear CRS SYNC Missed bit */
mbed_official	205:c41fc65bcfb4	1312	__HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCMISS);
mbed_official	205:c41fc65bcfb4	1313	}
mbed_official	205:c41fc65bcfb4	1314
mbed_official	205:c41fc65bcfb4	1315	/* Check CRS Expected SYNC flag */
mbed_official	205:c41fc65bcfb4	1316	if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_ESYNC))
mbed_official	205:c41fc65bcfb4	1317	{
mbed_official	205:c41fc65bcfb4	1318	/* frequency error counter reached a zero value */
mbed_official	205:c41fc65bcfb4	1319	__HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_ESYNC);
mbed_official	205:c41fc65bcfb4	1320	}
mbed_official	205:c41fc65bcfb4	1321	}
mbed_official	205:c41fc65bcfb4	1322
mbed_official	205:c41fc65bcfb4	1323	return crsstatus;
mbed_official	205:c41fc65bcfb4	1324	}
mbed_official	205:c41fc65bcfb4	1325
mbed_official	205:c41fc65bcfb4	1326	#endif /* STM32F042x6 \|\| */
mbed_official	205:c41fc65bcfb4	1327	/* STM32F071xB \|\| STM32F072xB \|\| STM32F078xx */
mbed_official	205:c41fc65bcfb4	1328
mbed_official	205:c41fc65bcfb4	1329	/**
mbed_official	205:c41fc65bcfb4	1330	* @}
mbed_official	205:c41fc65bcfb4	1331	*/
mbed_official	205:c41fc65bcfb4	1332
mbed_official	205:c41fc65bcfb4	1333	/**
mbed_official	205:c41fc65bcfb4	1334	* @}
mbed_official	205:c41fc65bcfb4	1335	*/
mbed_official	205:c41fc65bcfb4	1336
mbed_official	205:c41fc65bcfb4	1337	#endif /* HAL_RCC_MODULE_ENABLED */
mbed_official	205:c41fc65bcfb4	1338	/**
mbed_official	205:c41fc65bcfb4	1339	* @}
mbed_official	205:c41fc65bcfb4	1340	*/
mbed_official	205:c41fc65bcfb4	1341
mbed_official	205:c41fc65bcfb4	1342	/**
mbed_official	205:c41fc65bcfb4	1343	* @}
mbed_official	205:c41fc65bcfb4	1344	*/
mbed_official	205:c41fc65bcfb4	1345
mbed_official	205:c41fc65bcfb4	1346	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	13 Sep 2014
Imports:	4
Forks:	0
Commits:	324
Dependents:	1
Dependencies:	0
Followers:	2

targets/cmsis/TARGET_STM/TARGET_NUCLEO_F072RB/stm32f0xx_hal_rcc_ex.c@205:c41fc65bcfb4, 2014-05-22 (annotated)

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